ATTR_EXECUTION_PLATFORM TARGET_TYPE_SYSTEM Which execution platform the HW Procedure is running on Some HWPs (e.g. special wakeup) use different registers for different platforms to avoid arbitration problems when multiple platforms do the same thing concurrently uint8 HOST = 0x01, FSP = 0x02, OCC = 0x03 ATTR_IS_SIMULATION TARGET_TYPE_SYSTEM env: 1 = Awan/HWSimulator. 0 = Simics/RealHW. uint8 ATTR_MNFG_FLAGS TARGET_TYPE_SYSTEM The manufacturing flags. This is a bitfield. Each bit is a flag and multiple flags can be set uint64 MNFG_NO_FLAG = 0x0000000000000000, MNFG_THRESHOLDS = 0x0000000000000001, MNFG_AVP_ENABLE = 0x0000000000000002, MNFG_HDAT_AVP_ENABLE = 0x0000000000000004, MNFG_SRC_TERM = 0x0000000000000008, MNFG_IPL_MEMORY_CE_CHECKING = 0x0000000000000010, MNFG_FAST_BACKGROUND_SCRUB = 0x0000000000000020, MNFG_TEST_DRAM_REPAIRS = 0x0000000000000040, MNFG_DISABLE_DRAM_REPAIRS = 0x0000000000000080, MNFG_ENABLE_EXHAUSTIVE_PATTERN_TEST = 0x0000000000000100, MNFG_ENABLE_STANDARD_PATTERN_TEST = 0x0000000000000200, MNFG_ENABLE_MINIMUM_PATTERN_TEST = 0x0000000000000400, MNFG_DISABLE_FABRIC_eREPAIR = 0x0000000000000800, MNFG_DISABLE_MEMORY_eREPAIR = 0x0000000000001000, MNFG_FABRIC_DEPLOY_LANE_SPARES = 0x0000000000002000, MNFG_DMI_DEPLOY_LANE_SPARES = 0x0000000000004000, MNFG_PSI_DIAGNOSTIC = 0x0000000000008000, MNFG_BRAZOS_WRAP_CONFIG = 0x0000000000010000 ATTR_IS_MPIPL TARGET_TYPE_SYSTEM 1 = in Memory Preserving IPL mode. 0 = in normal IPL mode. uint8 ATTR_PROC_EPS_TABLE_TYPE TARGET_TYPE_SYSTEM Processor epsilon table type. Used to calculate the processor nest epsilon register values. Provided by the Machine Readable Workbook. uint8 EPS_TYPE_LE = 0x01, EPS_TYPE_HE = 0x02, EPS_TYPE_1S = 0x03 ATTR_PROC_FABRIC_PUMP_MODE TARGET_TYPE_SYSTEM Processor SMP Fabric broadcast scope configuration. MODE1 = default = chip/group/system/remote group/foreign. MODE2 = group/system/remote group/foreign. Provided by the Machine Readable Workbook. uint8 MODE1 = 0x01, MODE2 = 0x02 ATTR_PROC_X_BUS_WIDTH TARGET_TYPE_SYSTEM Processor SMP X bus width. Provided by the Machine Readable Workbook. uint8 W4BYTE = 0x01, W8BYTE = 0x02 ATTR_ALL_MCS_IN_INTERLEAVING_GROUP TARGET_TYPE_SYSTEM If all MCS chiplets are in an interleaving group (1=true, 0=false). If true the SMP fabric is setup in normal mode. If false the SMP fabric is setup in checkerboard mode. Provided by the Machine Readable Workbook. uint8 ATTR_NEST_FREQ_MHZ TARGET_TYPE_SYSTEM Nest Freq for system in MHz uint32 ATTR_BOOT_FREQ_MHZ TARGET_TYPE_SYSTEM Boot frequency in MHZ. uint32 ATTR_EX_GARD_BITS TARGET_TYPE_SYSTEM Vector to communicate the guarded EX chiplets to SBE One Guard bit per EX chiplet, bit location aligned to chiplet ID (bit 16: EX00, bit 17: EX01, bit 18: EX02 ... bit 31: EX15) Guarded EX chiplets are marked by a '1'. uint32 ATTR_DISABLE_I2C_ACCESS TARGET_TYPE_SYSTEM Set to skip physical access to i2c interface in SBE execution. Consumed by SBE hooks to permit skipping of selected code when running on a test platform (i.e., wafer) which does not have a physical SEEPROM connected. uint8 ATTR_PIB_I2C_REFCLOCK TARGET_TYPE_SYSTEM i2c reference clock for the system uint32 ATTR_PIB_I2C_NEST_PLL TARGET_TYPE_SYSTEM i2c pll for the system uint32 ATTR_SBE_IMAGE_OFFSET TARGET_TYPE_SYSTEM HostBoot image for SBE, offset to account for ECC uint32 ATTR_BOOT_VOLTAGE TARGET_TYPE_SYSTEM Boot Voltage for system uint32 ATTR_RISK_LEVEL TARGET_TYPE_SYSTEM Defines risk level to consider for initialization values applied during IPL. Risk level 0 should contain solutions for all known errata, and may sacrifice performance to avoid data integrity issue/error checking cases. Risk level 100 may introduce data integrity/error scenarios to provide full performance or visibility to state space/coverage behind known issues. uint32 RL0 = 0x000, RL100 = 0x100 ATTR_PROC_REFCLOCK_RCVR_TERM TARGET_TYPE_SYSTEM Defines system specific value of processor refclock receiver termination (FSI GP4 bits 8:9) uint8 ATTR_PCI_REFCLOCK_RCVR_TERM TARGET_TYPE_SYSTEM Defines system specific value of PCI refclock receiver termination (FSI GP4 bits 10:11) uint8 ATTR_MEMB_DMI_REFCLOCK_RCVR_TERM TARGET_TYPE_SYSTEM Defines system specific value of DMI refclock receiver termination (FSI GP4 bits 8:9) uint8 ATTR_MEMB_DDR_REFCLOCK_RCVR_TERM TARGET_TYPE_SYSTEM Defines system specific value of DDR refclock receiver termination (FSI GP4 bits 10:11) uint8 ATTR_MEM_FILTER_PLL_SOURCE TARGET_TYPE_SYSTEM Defines source of MEM filter PLL input (FSI GP4 bit 23) uint8 PROC_REFCLK = 0x0, PCI_REFCLK = 0x1 ATTR_MULTI_SCOM_BUFFER_MAX_SIZE TARGET_TYPE_SYSTEM Defines maximum size of data buffer to allocate for optimal performance with platform implementation of fapiMultiScom API. uint64 MULTI_SCOM_BUFFER_SIZE_1KB = 0x0000000000000400, MULTI_SCOM_BUFFER_SIZE_2KB = 0x0000000000000800, MULTI_SCOM_BUFFER_SIZE_4KB = 0x0000000000001000, MULTI_SCOM_BUFFER_SIZE_8KB = 0x0000000000002000, MULTI_SCOM_BUFFER_SIZE_16KB = 0x0000000000004000, MULTI_SCOM_BUFFER_SIZE_32KB = 0x0000000000008000, MULTI_SCOM_BUFFER_SIZE_64KB = 0x0000000000010000, MULTI_SCOM_BUFFER_SIZE_128KB = 0x0000000000020000, MULTI_SCOM_BUFFER_SIZE_256KB = 0x0000000000040000, MULTI_SCOM_BUFFER_SIZE_512KB = 0x0000000000080000, MULTI_SCOM_BUFFER_SIZE_1MB = 0x0000000000100000 ATTR_RECONFIGURE_LOOP TARGET_TYPE_SYSTEM Used to inidicate if a reconfigure loop is needed uint8 DECONFIGURE = 0x1, BAD_DQ_BIT_SET = 0x2 ATTR_PM_HWP_ATTR_VERSION TARGET_TYPE_SYSTEM Defines HWP version to be checked inside HWPs to determine if new code should be loaded/skipped/modified/etc. Service pack versions of the procedures may diverge from the working branch. Specific values to be defined as needed in the service pack release stream. uint32       ATTR_REDUNDANT_CLOCKS     TARGET_TYPE_SYSTEM           1 = System has redundant clock oscillators 0 = System does not have redundant clock oscillators From the Machine Readable Workbook         uint8             ATTR_MFG_TRACE_ENABLE     TARGET_TYPE_SYSTEM     Override this to a non-zero value to have the FAPI manufacturing traces output to the console or go to a fsp trace buffer when console not enabled. In cronus, setting this to a non-zero will output the FAPI_MFG traces to the same location as your other FAPI traces.         uint8