RC_PROC_START_CLOCKS_XBUS_CHIPLET_CLK_STATUS_ERR
Unexpected XBUS clock status register returned after clock start operation.
STATUS_REG
EXPECTED_REG
RC_PROC_START_CLOCKS_ABUS_CHIPLET_CLK_STATUS_ERR
Unexpected ABUS clock status register returned after clock start operation.
STATUS_REG
EXPECTED_REG
RC_PROC_START_CLOCKS_PCIE_CHIPLET_CLK_STATUS_ERR
Unexpected clock status register returned after clock start operation.
STATUS_REG
EXPECTED_REG
CHIP_IN_ERROR
HIGH
CHIP_IN_ERROR
CHIP_IN_ERROR
RC_PROC_START_CLOCKS_XBUS_CHIPLET_FIR_ERR
Unexpected chiplet FIR bit set after clock start operation.
FIR_REG
FIR_EXP_REG
RC_PROC_START_CLOCKS_ABUS_CHIPLET_FIR_ERR
Unexpected chiplet FIR bit set after clock start operation.
FIR_REG
FIR_EXP_REG
RC_PROC_START_CLOCKS_PCIE_CHIPLET_FIR_ERR
Unexpected chiplet FIR bit set after clock start operation.
FIR_REG
FIR_EXP_REG
CHIP_IN_ERROR
HIGH
CHIP_IN_ERROR
CHIP_IN_ERROR
RC_PROC_START_CLOCKS_CHIPLETS_PARTIAL_GOOD_ERR
Unexpected chiplet selection when reading the partial good vector.
CHIPLET_BASE_SCOM_ADDR
CODE
HIGH