ATTR_MEM_MIRROR_PLACEMENT_POLICY
TARGET_TYPE_SYSTEM
Define placement policy/scheme for non-mirrored/mirrored memory
layout
creator: platform
consumer: opt_memmap
firmware notes:
NORMAL = non-mirrored start: 0, mirrored start: 512TB
FLIPPED = mirrored start: 0, non-mirrored start: 512TB
SELECTIVE = non-mirrored/mirrored start (interleaved): 0
DRAWER = non-mirrored start: 1TB*drawer, mirrored start: 512TB+(1TB*drawer/2)
uint8
NORMAL = 0x0,
FLIPPED = 0x1,
SELECTIVE = 0x2,
DRAWER = 0x3
ATTR_PROC_MEM_BASE
TARGET_TYPE_PROC_CHIP
Base address for non-mirrored memory regions
creator: platform (proc_config_base_addr)
consumer: mss_setup_bars
firmware notes:
64-bit RA
uint64
ATTR_PROC_MEM_BASES
TARGET_TYPE_PROC_CHIP
Non-mirrored memory base addresses
creator: mss_setup_bars
consumer: proc_setup_bars, platform
firmware notes:
64-bit RA
eight independent non-mirrored segments are supported
(max number based on Venice design)
uint64
8
ATTR_PROC_MEM_BASES_ACK
TARGET_TYPE_PROC_CHIP
Non-mirrored memory base addresses
creator: mss_setup_bars
consumer: opt_mem_map
Mem opt map uses this for the bases of the non-mirror ranges.
(max number based on Venice design)
uint64
8
ATTR_PROC_MEM_SIZES
TARGET_TYPE_PROC_CHIP
Size of non-mirrored memory regions
creator: mss_setup_bars
consumer: proc_setup_bars, platform
firmware notes:
for given index value, address space assumed to be contiguous
from ATTR_PROC_MEM_BASES value at matching index
eight independent non-mirrored segments are supported
(max number based on Venice design)
uint64
8
ATTR_PROC_MEM_SIZES_ACK
TARGET_TYPE_PROC_CHIP
Size of non-mirrored memory regions up to a power of 2
creator: mss_setup_bars
consumer: opt_mem_map
Mem opt map uses this to stack mirror ranges. The real amount of memory behind the mirror group maybe less than the number reported here if there are memory holes
uint64
8
ATTR_PROC_MIRROR_BASE
TARGET_TYPE_PROC_CHIP
Base address for mirrored memory regions
creator: platform (proc_config_base_addr)
consumer: mss_setup_bars
firmware notes:
64-bit RA
uint64
ATTR_PROC_MIRROR_BASES
TARGET_TYPE_PROC_CHIP
Mirrored memory base addresses
creator: mss_setup_bars
consumer: proc_setup_bars, platform
firmware notes:
64-bit RA
four independent mirrored segments are supported
(max number based on Venice design)
uint64
4
ATTR_PROC_MIRROR_BASES_ACK
TARGET_TYPE_PROC_CHIP
Mirrored memory base addresses
creator: mss_setup_bars
consumer: consumer: opt_mem_map
Mem opt map uses this for the bases of the mirror ranges.
(max number based on Venice design)
uint64
4
ATTR_PROC_MIRROR_SIZES
TARGET_TYPE_PROC_CHIP
Size of mirrored memory region
creator: mss_setup_bars
consumer: proc_setup_bars, platform
firmware notes:
for given index value, address space assumed to be contiguous
from ATTR_PROC_MIRROR_BASES value at matching index
four independent mirrored segments are supported
(max number based on Venice design)
uint64
4
ATTR_PROC_MIRROR_SIZES_ACK
TARGET_TYPE_PROC_CHIP
Size of mirrored memory region up to a power of 2
creator: mss_setup_bars
consumer: opt_mem_map
Mem opt map uses this to stack mirror ranges. The real amount of memory behind the mirror group maybe less than the number reported here if there are memory holes
uint64
4
ATTR_PROC_FOREIGN_NEAR_BASE
TARGET_TYPE_PROC_CHIP
Foreign (near) address region base address
creator: platform
consumer: proc_setup_bars
firmware notes:
64-bit RA
two independent regions are supported
(one per foreign link)
uint64
2
ATTR_PROC_FOREIGN_NEAR_SIZE
TARGET_TYPE_PROC_CHIP
Size of foreign (near) region
creator: platform
consumer: proc_setup_bars
firmware notes:
address space assumed to be contiguous from associated
ATTR_PROC_FOREIGN_NEAR_BASE for given index value
two independent regions are supported
(one per foreign link)
uint64
2
ATTR_PROC_FOREIGN_FAR_BASE
TARGET_TYPE_PROC_CHIP
Foreign (far) address region base address
creator: platform
consumer: proc_setup_bars
firmware notes:
64-bit RA
two independent regions are supported
(one per foreign link)
uint64
2
ATTR_PROC_FOREIGN_FAR_SIZE
TARGET_TYPE_PROC_CHIP
Size of foreign (far) region
creator: platform
consumer: proc_setup_bars
firmware notes:
address space assumed to be contiguous from associated
ATTR_PROC_FOREIGN_FAR_BASE for given index value
two independent regions are supported
(one per foreign link)
uint64
2
ATTR_PROC_HA_BASE
TARGET_TYPE_PROC_CHIP
HA logging base address
firmware notes:
64-bit RA
eight independent segments are supported
(max number based on Venice design)
uint64
8
ATTR_PROC_HA_SIZE
TARGET_TYPE_PROC_CHIP
Size of HA memory region
firmware notes:
address space assumed to be contiguous from associated
ATTR_PROC_HA_BASE for given index value
eight independent segments are supported
(max number based on Venice design)
uint64
8
ATTR_PROC_HTM_BAR_SIZE
TARGET_TYPE_PROC_CHIP
Desired HTM trace memory size value
creator: platform
firmware notes:
set by platform to request size of per-chip area reserved
for HTM trace memory
uint64
256_GB = 0x0000004000000000,
128_GB = 0x0000002000000000,
64_GB = 0x0000001000000000,
32_GB = 0x0000000800000000,
16_GB = 0x0000000400000000,
8_GB = 0x0000000200000000,
4_GB = 0x0000000100000000,
2_GB = 0x0000000080000000,
1_GB = 0x0000000040000000,
512_MB = 0x0000000020000000,
256_MB = 0x0000000010000000,
128_MB = 0x0000000008000000,
64_MB = 0x0000000004000000,
32_MB = 0x0000000002000000,
16_MB = 0x0000000001000000,
ZERO = 0x0000000000000000
ATTR_PROC_HTM_BAR_BASE_ADDR
TARGET_TYPE_PROC_CHIP
HTM trace memory base address allocated
uint64
ATTR_PROC_OCC_SANDBOX_SIZE
TARGET_TYPE_PROC_CHIP
Desired size of OCC sandbox memory region
creator: platform
firmware notes:
set by platform to request size of per-chip area reserved
for OCC sandbox function
uint64
256_GB = 0x0000004000000000,
128_GB = 0x0000002000000000,
64_GB = 0x0000001000000000,
32_GB = 0x0000000800000000,
16_GB = 0x0000000400000000,
8_GB = 0x0000000200000000,
4_GB = 0x0000000100000000,
2_GB = 0x0000000080000000,
1_GB = 0x0000000040000000,
512_MB = 0x0000000020000000,
256_MB = 0x0000000010000000,
128_MB = 0x0000000008000000,
64_MB = 0x0000000004000000,
32_MB = 0x0000000002000000,
16_MB = 0x0000000001000000,
ZERO = 0x0000000000000000
ATTR_PROC_OCC_SANDBOX_BASE_ADDR
TARGET_TYPE_PROC_CHIP
OCC sandbox base address allocated
uint64