# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
# $Source: src/usr/diag/prdf/common/plat/pegasus/Proc_acts_XBUS.rule $
#
# IBM CONFIDENTIAL
#
# COPYRIGHT International Business Machines Corp. 2012,2014
#
# p1
#
# Object Code Only (OCO) source materials
# Licensed Internal Code Source Materials
# IBM HostBoot Licensed Internal Code
#
# The source code for this program is not published or otherwise
# divested of its trade secrets, irrespective of what has been
# deposited with the U.S. Copyright Office.
#
# Origin: 30
#
# IBM_PROLOG_END_TAG

################################################################################
# XBUS Chiplet Registers
################################################################################

rule XbusChipletFir
{
  CHECK_STOP:
     (XBUS_CHIPLET_CS_FIR       & `1FC0000000000000`) & ~XBUS_CHIPLET_FIR_MASK;
  RECOVERABLE:
    ((XBUS_CHIPLET_RE_FIR >> 2) & `1FC0000000000000`) & ~XBUS_CHIPLET_FIR_MASK;
};

group gXbusChipletFir filter singlebit
{
    /** XbusChipletFir[3]
     *  Attention from LFIR
     */
    (XbusChipletFir, bit(3)) ? analyze(gXbusLFir);

    /** XbusChipletFir[4]
     *  Attention from PBENFIR
     */
    (XbusChipletFir, bit(4)) ? analyze(gPbenFir);

    /** XbusChipletFir[5]
     *  Attention from IOXFIR_0 (Venice only)
     */
    (XbusChipletFir, bit(5)) ? analyze(gIoxFir_0);

    /** XbusChipletFir[6]
     *  Attention from IOXFIR_1
     */
    (XbusChipletFir, bit(6)) ? analyze(gIoxFir_1);

    /** XbusChipletFir[7]
     *  Attention from IOXFIR_2 (Venice only)
     */
    (XbusChipletFir, bit(7)) ? analyze(gIoxFir_2);

    /** XbusChipletFir[8]
     *  Attention from IOXFIR_3 (Venice only)
     */
    (XbusChipletFir, bit(8)) ? analyze(gIoxFir_3);

    /** XbusChipletFir[9]
     *  Attention from PSIXBUSFIR
     */
    (XbusChipletFir, bit(9)) ? defaultMaskedError;
};

################################################################################
# XBUS Chiplet LFIR
################################################################################

rule XbusLFir
{
  CHECK_STOP:  XBUS_LFIR & ~XBUS_LFIR_MASK & ~XBUS_LFIR_ACT0 & ~XBUS_LFIR_ACT1;
  RECOVERABLE: XBUS_LFIR & ~XBUS_LFIR_MASK & ~XBUS_LFIR_ACT0 &  XBUS_LFIR_ACT1;
};

group gXbusLFir filter singlebit
{
    /** XBUS_LFIR[0]
     *  CFIR internal parity error
     */
    (XbusLFir, bit(0)) ? SelfHighThr32PerDay;

    /** XBUS_LFIR[1]
     *  Local errors from GPIO (PCB error)
     */
    (XbusLFir, bit(1)) ? defaultMaskedError;

    /** XBUS_LFIR[2]
     *  Local errors from CC (PCB error)
     */
    (XbusLFir, bit(2)) ? defaultMaskedError;

    /** XBUS_LFIR[3]
     *  Local errors from CC (OPCG, parity, scan collision, ...)
     */
    (XbusLFir, bit(3)) ? defaultMaskedError;

    /** XBUS_LFIR[4]
     *  Local errors from PSC (PCB error)
     */
    (XbusLFir, bit(4)) ? defaultMaskedError;

    /** XBUS_LFIR[5]
     *  Local errors from PSC (parity error)
     */
    (XbusLFir, bit(5)) ? defaultMaskedError;

    /** XBUS_LFIR[6]
     *  Local errors from Thermal (parity error)
     */
    (XbusLFir, bit(6)) ? defaultMaskedError;

    /** XBUS_LFIR[7]
     *  Local errors from Thermal (PCB error)
     */
    (XbusLFir, bit(7)) ? defaultMaskedError;

    /** XBUS_LFIR[8|9]
     *  Local errors from Thermal (Trip error)
     */
    (XbusLFir, bit(8|9)) ? defaultMaskedError;

    /** XBUS_LFIR[10:13]
     *  Local errors from Trace Array ( error)
     */
    (XbusLFir, bit(10|11|12|13)) ? SelfHighThr32PerDay;

    /** XBUS_LFIR[14]
     *  FIR_IN14: local errors from dcadj
     */
    (XbusLFir, bit(14)) ? SelfHighThr32PerDay;

    /** XBUS_LFIR[15:20]
     *  FIR_IN14: local errors from dcadj
     */
    (XbusLFir, bit(15|16|17|18|19|20)) ? defaultMaskedError;

    /** XBUS_LFIR[21:30]
     *  FIR_IN15: unused local error
     */
    (XbusLFir, bit(21|22|23|24|25|26|27|28|29|30)) ? defaultMaskedError;

    /** XBUS_LFIR[31:39]
     *  FIR_IN15: unused local error
     */
    (XbusLFir, bit(31|32|33|34|35|36|37|38|39)) ? defaultMaskedError;

    /** XBUS_LFIR[40]
     *  FIR_IN40:malfunction alert (local xstop in another chiplet)
     */
    (XbusLFir, bit(40)) ? defaultMaskedError;
};

################################################################################
# XBUS Chiplet PBENFIR
################################################################################

#FIXME RTC 23127 We need to revisit the Firmware action
#FabricBus_CE_With_Repair. Description is same as P7 but
#it appears it may need change.This appilies to PBEN FIR.
#calloutXbus0InterfaceTh5pDay may need modification.

rule PbenFir
{
    CHECK_STOP:  PBENFIR & ~PBENFIR_MASK & ~PBENFIR_ACT0 & ~PBENFIR_ACT1;
    RECOVERABLE: PBENFIR & ~PBENFIR_MASK & ~PBENFIR_ACT0 &  PBENFIR_ACT1;
};

group gPbenFir filter singlebit
{
    /** PBENFIR[0]
     *  X0_LINK_RCV_CE: x0 link rcv ce
     */
    (PbenFir, bit(0)) ? calloutXbus0InterfaceTh5pDay;

    /** PBENFIR[1]
     *  X0_LINK_RCV_DERR: x0 link rcv derr
     */
    (PbenFir, bit(1)) ? defaultMaskedError;

    /** PBENFIR[2]
     *  X0_LINK_RCV_UE: x0 link rcv ue
     */
    (PbenFir, bit(2)) ? calloutXbus0InterfaceTh1;

    /** PBENFIR[3]
     *  X1_LINK_RCV_CE: x1 link rcv ce
     */
    (PbenFir, bit(3)) ? calloutXbus1InterfaceTh5pDay;

    /** PBENFIR[4]
     *  X1_LINK_RCV_DERR: x1 link rcv derr
     */
    (PbenFir, bit(4)) ? defaultMaskedError;

    /** PBENFIR[5]
     *  X1_LINK_RCV_UE: x1 link rcv ue
     */
    (PbenFir, bit(5)) ? calloutXbus1InterfaceTh1;

    /** PBENFIR[6]
     *  X2_LINK_RCV_CE: x2 link rcv ce
     */
    (PbenFir, bit(6)) ? calloutXbus2InterfaceTh5pDay;

    /** PBENFIR[7]
     *  X2_LINK_RCV_DERR: x2 link rcv derr
     */
    (PbenFir, bit(7)) ? defaultMaskedError;

    /** PBENFIR[8]
     *  X2_LINK_RCV_UE: x2 link rcv ue
     */
    (PbenFir, bit(8)) ? calloutXbus2InterfaceTh1;

    /** PBENFIR[9]
     *  X3_LINK_RCV_CE: x3 link rcv ce
     */
    (PbenFir, bit(9)) ? calloutXbus3InterfaceTh5pDay;

    /** PBENFIR[10]
     *  X3_LINK_RCV_DERR: x3 link rcv derr
     */
    (PbenFir, bit(10)) ? defaultMaskedError;

    /** PBENFIR[11]
     *  X3_LINK_RCV_UE: x3 link rcv ue
     */
    (PbenFir, bit(11)) ? calloutXbus3InterfaceTh1;

    /** PBENFIR[12]
     *  X_LINK_SND_CE: x link rcv ce
     */
    (PbenFir, bit(12)) ? SelfHighThr5PerHour;

    /** PBENFIR[13]
     *  X_LINK_SND_SUE: x link rcv sue
     */
    (PbenFir, bit(13)) ? defaultMaskedError;

    /** PBENFIR[14]
     *  X_LINK_SND_UE: x link rcv ue
     */
    (PbenFir, bit(14)) ? SelfHighThr1;

    /** PBENFIR[15]
     *  X_LINK_CR_OVERFLOW: x link command/response/data buffer overflow
     */
    (PbenFir, bit(15)) ? calloutProcLevel2MedThr1dumpShNoGard;

    /** PBENFIR[16]
     *  X0_LINK_FMR_ERR: x0 link framer error
     */
    (PbenFir, bit(16)) ? SelfHighThr1;

    /** PBENFIR[17]
     *  X1_LINK_FMR_ERR: x1 link framer error
     */
    (PbenFir, bit(17)) ? SelfHighThr1;

    /** PBENFIR[18]
     *  X2_LINK_FMR_ERR: x2 link framer error
     */
    (PbenFir, bit(18)) ? SelfHighThr1;

    /** PBENFIR[19]
     *  X3_LINK_FMR_ERR: x3 link framer error
     */
    (PbenFir, bit(19)) ? SelfHighThr1;

    /** PBENFIR[20]
     *  X_LINK_PSR_ERR: x link parser error
     */
    (PbenFir, bit(20)) ? SelfHighThr1;

    /** PBENFIR[21:30]
     *  Reserved
     */
    (PbenFir, bit(21|22|23|24|25|26|27|28|29|30)) ? defaultMaskedError;

    /** PBENFIR[31:35]
     *  Reserved
     */
    (PbenFir, bit(31|32|33|34|35)) ? defaultMaskedError;

    /** PBENFIR[36:37]
     *  FIR_SCOM_ERR: pben iox fir_scom_err
     */
    (PbenFir, bit(36|37)) ? defaultMaskedError;
};

################################################################################
# XBUS Chiplet IOXFIR_0
################################################################################

rule IoxFir_0
{
    CHECK_STOP:  IOXFIR_0 & ~IOXFIR_0_MASK & ~IOXFIR_0_ACT0 & ~IOXFIR_0_ACT1;
    RECOVERABLE: IOXFIR_0 & ~IOXFIR_0_MASK & ~IOXFIR_0_ACT0 &  IOXFIR_0_ACT1;
};

group gIoxFir_0 filter singlebit
{
    /** IOXFIR_0[0]
     * FIR_RX_INVALID_STATE_OR_PARITY_ERROR
     */
    (IoxFir_0, bit(0)) ? defaultMaskedError;

    /** IOXFIR_0[1]
     * FIR_TX_INVALID_STATE_OR_PARITY_ERROR
     */
    (IoxFir_0, bit(1)) ? defaultMaskedError;

    /** IOXFIR_0[2]
     *  FIR_GCR_HANG_ERROR
     */
    (IoxFir_0, bit(2)) ? calloutXbus0InterfaceTh1;

    /** IOXFIR_0[3:7]
     *  Reserved
     */
    (IoxFir_0, bit(3|4|5|6|7)) ? defaultMaskedError;

    /** IOXFIR_0[8]
     *  Training Error
     */
    (IoxFir_0, bit(8)) ? defaultMaskedError;

    /** IOXFIR_0[9]
     *  Spare Deployed
     */
    (IoxFir_0, bit(9)) ? spareDeployed_xbus0;

    /** IOXFIR_0[10]
     *  Max Spares Exceeded
     */
    (IoxFir_0, bit(10)) ? maxSparesExceeded_xbus0;

    /** IOXFIR_0[11]
     *  Recalibration or Dynamic Repair Error
     */
    (IoxFir_0, bit(11)) ? defaultMaskedError;

    /** IOXFIR_0[12]
     *  Too Many Bus Errors
     */
    (IoxFir_0, bit(12)) ? tooManyBusErrors_xbus0;

    /** IOXFIR_0[13:15]
     *  Reserved
     */
    (IoxFir_0, bit(13|14|15)) ? defaultMaskedError;

    /** IOXFIR_0[16:23]
     *  FIR_RX_BUS1 unused
     */
    (IoxFir_0, bit(16|17|18|19|20|21|22|23)) ? defaultMaskedError;

    /** IOXFIR_0[24:31]
     *  FIR_RX_BUS2 unused
     */
    (IoxFir_0, bit(24|25|26|27|28|29|30|31)) ? defaultMaskedError;

    /** IOXFIR_0[32:39]
     *  FIR_RX_BUS3 unused
     */
    (IoxFir_0, bit(32|33|34|35|36|37|38|39)) ? defaultMaskedError;

    /** IOXFIR_0[40:47]
     *  FIR_RX_BUS4 unused
     */
    (IoxFir_0, bit(40|41|42|43|44|45|46|47)) ? defaultMaskedError;

    /** IOXFIR_0[48]
     *  FIR_SCOMFIR_ERROR
     */
    (IoxFir_0, bit(48)) ? defaultMaskedError;

    /** IOXFIR_0[49]
     *  FIR_SCOMFIR_ERROR_CLONE
     */
    (IoxFir_0, bit(49)) ? defaultMaskedError;
};

################################################################################
# XBUS Chiplet IOXFIR_1
################################################################################

rule IoxFir_1
{
    CHECK_STOP:  IOXFIR_1 & ~IOXFIR_1_MASK & ~IOXFIR_1_ACT0 & ~IOXFIR_1_ACT1;
    RECOVERABLE: IOXFIR_1 & ~IOXFIR_1_MASK & ~IOXFIR_1_ACT0 &  IOXFIR_1_ACT1;
};

group gIoxFir_1 filter singlebit
{
    /** IOXFIR_1[0]
     *  FIR_RX_INVALID_STATE_OR_PARITY_ERROR
     */
    (IoxFir_1, bit(0)) ? defaultMaskedError;

    /** IOXFIR_1[1]
     *  FIR_TX_INVALID_STATE_OR_PARITY_ERROR
     */
    (IoxFir_1, bit(1)) ? defaultMaskedError;

    /** IOXFIR_1[2]
     *  FIR_GCR_HANG_ERROR
     */
    (IoxFir_1, bit(2)) ? calloutXbus1InterfaceTh1;

    /** IOXFIR_1[3:7]
     *  Reserved
     */
    (IoxFir_1, bit(3|4|5|6|7)) ? defaultMaskedError;

    /** IOXFIR_1[8]
     *  Training Error
     */
    (IoxFir_1, bit(8)) ? defaultMaskedError;

    /** IOXFIR_1[9]
     *  Spare Deployed
     */
    (IoxFir_1, bit(9)) ? spareDeployed_xbus1;

    /** IOXFIR_1[10]
     *  Max Spares Exceeded
     */
    (IoxFir_1, bit(10)) ? maxSparesExceeded_xbus1;

    /** IOXFIR_1[11]
     *  Recalibration or Dynamic Repair Error
     */
    (IoxFir_1, bit(11)) ? defaultMaskedError;

    /** IOXFIR_1[12]
     *  Too Many Bus Errors
     */
    (IoxFir_1, bit(12)) ? tooManyBusErrors_xbus1;

    /** IOXFIR_1[13:15]
     *  Reserved
     */
    (IoxFir_1, bit(13|14|15)) ? defaultMaskedError;

    /** IOXFIR_1[16:23]
     *  FIR_RX_BUS1 unused
     */
    (IoxFir_1, bit(16|17|18|19|20|21|22|23)) ? defaultMaskedError;

    /** IOXFIR_1[24:31]
     *  FIR_RX_BUS2 unused
     */
    (IoxFir_1, bit(24|25|26|27|28|29|30|31)) ? defaultMaskedError;

    /** IOXFIR_1[32:39]
     *  FIR_RX_BUS3 unused
     */
    (IoxFir_1, bit(32|33|34|35|36|37|38|39)) ? defaultMaskedError;

    /** IOXFIR_1[40:47]
     *  FIR_RX_BUS4 unused
     */
    (IoxFir_1, bit(40|41|42|43|44|45|46|47)) ? defaultMaskedError;

    /** IOXFIR_1[48]
     *  FIR_SCOMFIR_ERROR
     */
    (IoxFir_1, bit(48)) ? defaultMaskedError;

    /** IOXFIR_1[49]
     *  FIR_SCOMFIR_ERROR_CLONE
     */
    (IoxFir_1, bit(49)) ? defaultMaskedError;
};

################################################################################
# XBUS Chiplet IOXFIR_2
################################################################################

rule IoxFir_2
{
    CHECK_STOP:  IOXFIR_2 & ~IOXFIR_2_MASK & ~IOXFIR_2_ACT0 & ~IOXFIR_2_ACT1;
    RECOVERABLE: IOXFIR_2 & ~IOXFIR_2_MASK & ~IOXFIR_2_ACT0 &  IOXFIR_2_ACT1;
};

group gIoxFir_2 filter singlebit
{
    /** IOXFIR_2[0]
     * FIR_RX_INVALID_STATE_OR_PARITY_ERROR
     */
    (IoxFir_2, bit(0)) ? defaultMaskedError;

    /** IOXFIR_2[1]
     * FIR_TX_INVALID_STATE_OR_PARITY_ERROR
     */
    (IoxFir_2, bit(1)) ? defaultMaskedError;

    /** IOXFIR_2[2]
     *  FIR_GCR_HANG_ERROR
     */
    (IoxFir_2, bit(2)) ? calloutXbus2InterfaceTh1;

    /** IOXFIR_2[3:7]
     *  Reserved
     */
    (IoxFir_2, bit(3|4|5|6|7)) ? defaultMaskedError;

    /** IOXFIR_2[8]
     *  Training Error
     */
    (IoxFir_2, bit(8)) ? defaultMaskedError;

    /** IOXFIR_2[9]
     *  Spare Deployed
     */
    (IoxFir_2, bit(9)) ? spareDeployed_xbus2;

    /** IOXFIR_2[10]
     *  Max Spares Exceeded
     */
    (IoxFir_2, bit(10)) ? maxSparesExceeded_xbus2;

    /** IOXFIR_2[11]
     *  Recalibration or Dynamic Repair Error
     */
    (IoxFir_2, bit(11)) ? defaultMaskedError;

    /** IOXFIR_2[12]
     *  Too Many Bus Errors
     */
    (IoxFir_2, bit(12)) ? tooManyBusErrors_xbus2;

    /** IOXFIR_2[13:15]
     *  Reserved
     */
    (IoxFir_2, bit(13|14|15)) ? defaultMaskedError;

    /** IOXFIR_2[16:23]
     *  FIR_RX_BUS1 unused
     */
    (IoxFir_2, bit(16|17|18|19|20|21|22|23)) ? defaultMaskedError;

    /** IOXFIR_2[24:31]
     *  FIR_RX_BUS2 unused
     */
    (IoxFir_2, bit(24|25|26|27|28|29|30|31)) ? defaultMaskedError;

    /** IOXFIR_2[32:39]
     *  FIR_RX_BUS3 unused
     */
    (IoxFir_2, bit(32|33|34|35|36|37|38|39)) ? defaultMaskedError;

    /** IOXFIR_2[40:47]
     *  FIR_RX_BUS4 unused
     */
    (IoxFir_2, bit(40|41|42|43|44|45|46|47)) ? defaultMaskedError;

    /** IOXFIR_2[48]
     *  FIR_SCOMFIR_ERROR
     */
    (IoxFir_2, bit(48)) ? defaultMaskedError;

    /** IOXFIR_2[49]
     *  FIR_SCOMFIR_ERROR_CLONE
     */
    (IoxFir_2, bit(49)) ? defaultMaskedError;
};

################################################################################
# XBUS Chiplet IOXFIR_3
################################################################################

rule IoxFir_3
{
    CHECK_STOP:  IOXFIR_3 & ~IOXFIR_3_MASK & ~IOXFIR_3_ACT0 & ~IOXFIR_3_ACT1;
    RECOVERABLE: IOXFIR_3 & ~IOXFIR_3_MASK & ~IOXFIR_3_ACT0 &  IOXFIR_3_ACT1;
};

group gIoxFir_3 filter singlebit
{
    /** IOXFIR_3[0]
     * FIR_RX_INVALID_STATE_OR_PARITY_ERROR
     */
    (IoxFir_3, bit(0)) ? defaultMaskedError;

    /** IOXFIR_3[1]
     * FIR_TX_INVALID_STATE_OR_PARITY_ERROR
     */
    (IoxFir_3, bit(1)) ? defaultMaskedError;

    /** IOXFIR_3[2]
     *  FIR_GCR_HANG_ERROR
     */
    (IoxFir_3, bit(2)) ? calloutXbus3InterfaceTh1;

    /** IOXFIR_3[3:7]
     *  Reserved
     */
    (IoxFir_3, bit(3|4|5|6|7)) ? defaultMaskedError;

    /** IOXFIR_3[8]
     *  Training Error
     */
    (IoxFir_3, bit(8)) ? defaultMaskedError;

    /** IOXFIR_3[9]
     *  Spare Deployed
     */
    (IoxFir_3, bit(9)) ? spareDeployed_xbus3;

    /** IOXFIR_3[10]
     *  Max Spares Exceeded
     */
    (IoxFir_3, bit(10)) ? maxSparesExceeded_xbus3;

    /** IOXFIR_3[11]
     *  Recalibration or Dynamic Repair Error
     */
    (IoxFir_3, bit(11)) ? defaultMaskedError;

    /** IOXFIR_3[12]
     *  Too Many Bus Errors
     */
    (IoxFir_3, bit(12)) ? tooManyBusErrors_xbus3;

    /** IOXFIR_3[13:15]
     *  Reserved
     */
    (IoxFir_3, bit(13|14|15)) ? defaultMaskedError;

    /** IOXFIR_3[16:23]
     *  FIR_RX_BUS1 unused
     */
    (IoxFir_3, bit(16|17|18|19|20|21|22|23)) ? defaultMaskedError;

    /** IOXFIR_3[24:31]
     *  FIR_RX_BUS2 unused
     */
    (IoxFir_3, bit(24|25|26|27|28|29|30|31)) ? defaultMaskedError;

    /** IOXFIR_3[32:39]
     *  FIR_RX_BUS3 unused
     */
    (IoxFir_3, bit(32|33|34|35|36|37|38|39)) ? defaultMaskedError;

    /** IOXFIR_3[40:47]
     *  FIR_RX_BUS4 unused
     */
    (IoxFir_3, bit(40|41|42|43|44|45|46|47)) ? defaultMaskedError;

    /** IOXFIR_3[48]
     *  FIR_SCOMFIR_ERROR
     */
    (IoxFir_3, bit(48)) ? defaultMaskedError;

    /** IOXFIR_3[49]
     *  FIR_SCOMFIR_ERROR_CLONE
     */
    (IoxFir_3, bit(49)) ? defaultMaskedError;
};

################################################################################
# Actions specific to XBUS chiplet
################################################################################

/** Callout the XBUS 0 interface */
actionclass calloutXbus0Interface
{
    callout(connected(TYPE_XBUS, 0), MRU_MEDA);
    callout(connected_peer(TYPE_XBUS, 0), MRU_MEDA);
    callout(procedure(PassiveFabric_OnNode_ENUM), MRU_LOW);
};

/** Callout the XBUS 1 interface */
actionclass calloutXbus1Interface
{
    callout(connected(TYPE_XBUS, 1), MRU_MEDA);
    callout(connected_peer(TYPE_XBUS, 1), MRU_MEDA);
    callout(procedure(PassiveFabric_OnNode_ENUM), MRU_LOW);
};

/** Callout the XBUS 2 interface */
actionclass calloutXbus2Interface
{
    callout(connected(TYPE_XBUS, 2), MRU_MEDA);
    callout(connected_peer(TYPE_XBUS, 2), MRU_MEDA);
    callout(procedure(PassiveFabric_OnNode_ENUM), MRU_LOW);
};

/** Callout the XBUS 3 interface */
actionclass calloutXbus3Interface
{
    callout(connected(TYPE_XBUS, 3), MRU_MEDA);
    callout(connected_peer(TYPE_XBUS, 3), MRU_MEDA);
    callout(procedure(PassiveFabric_OnNode_ENUM), MRU_LOW);
};

/** Callout the XBUS 0 interface, threshold 1 */
actionclass calloutXbus0InterfaceTh1 { calloutXbus0Interface; threshold1; };

/** Callout the XBUS 1 interface, threshold 1 */
actionclass calloutXbus1InterfaceTh1 { calloutXbus1Interface; threshold1; };

/** Callout the XBUS 2 interface, threshold 1 */
actionclass calloutXbus2InterfaceTh1 { calloutXbus2Interface; threshold1; };

/** Callout the XBUS 3 interface, threshold 1 */
actionclass calloutXbus3InterfaceTh1 { calloutXbus3Interface; threshold1; };

/** Lane Repair: spare deployed - XBUS 0 */
actionclass spareDeployed_xbus0
{ calloutXbus0Interface; funccall("spareDeployed_xbus0"); };

/** Lane Repair: max spares exceeded - XBUS 0 */
actionclass maxSparesExceeded_xbus0
{ calloutXbus0InterfaceTh1; funccall("maxSparesExceeded_xbus0"); };

/** Lane Repair: too many bus errors - XBUS 0 */
actionclass tooManyBusErrors_xbus0
{ calloutXbus0InterfaceTh1; funccall("tooManyBusErrors_xbus0"); };

/** Lane Repair: spare deployed - XBUS 1 */
actionclass spareDeployed_xbus1
{ calloutXbus1Interface; funccall("spareDeployed_xbus1"); };

/** Lane Repair: max spares exceeded - XBUS 1 */
actionclass maxSparesExceeded_xbus1
{ calloutXbus1InterfaceTh1; funccall("maxSparesExceeded_xbus1"); };

/** Lane Repair: too many bus errors - XBUS 1 */
actionclass tooManyBusErrors_xbus1
{ calloutXbus1InterfaceTh1; funccall("tooManyBusErrors_xbus1"); };

/** Lane Repair: spare deployed - XBUS 2 */
actionclass spareDeployed_xbus2
{ calloutXbus2Interface; funccall("spareDeployed_xbus2"); };

/** Lane Repair: max spares exceeded - XBUS 2 */
actionclass maxSparesExceeded_xbus2
{ calloutXbus2InterfaceTh1; funccall("maxSparesExceeded_xbus2"); };

/** Lane Repair: too many bus errors - XBUS 2 */
actionclass tooManyBusErrors_xbus2
{ calloutXbus2InterfaceTh1; funccall("tooManyBusErrors_xbus2"); };

/** Lane Repair: spare deployed - XBUS 3 */
actionclass spareDeployed_xbus3
{ calloutXbus3Interface; funccall("spareDeployed_xbus3"); };

/** Lane Repair: max spares exceeded - XBUS 3 */
actionclass maxSparesExceeded_xbus3
{ calloutXbus3InterfaceTh1; funccall("maxSparesExceeded_xbus3"); };

/** Lane Repair: too many bus errors - XBUS 3 */
actionclass tooManyBusErrors_xbus3
{ calloutXbus3InterfaceTh1; funccall("tooManyBusErrors_xbus3"); };

/** Threshold 5 per day, mask but do not predictively callout XBUS 0 */
actionclass calloutXbus0InterfaceTh5pDay
{
    calloutXbus0Interface;
    threshold5pday;
    funccall("ClearServiceCallFlag");
};

/** Threshold 5 per day, mask but do not predictively callout XBUS 1 */
actionclass calloutXbus1InterfaceTh5pDay
{
    calloutXbus1Interface;
    threshold5pday;
    funccall("ClearServiceCallFlag");
};

/** Threshold 5 per day, mask but do not predictively callout XBUS 2 */
actionclass calloutXbus2InterfaceTh5pDay
{   calloutXbus2Interface;
    threshold5pday;
    funccall("ClearServiceCallFlag");
};

/** Threshold 5 per day, mask but do not predictively callout XBUS 3 */
actionclass calloutXbus3InterfaceTh5pDay
{
    calloutXbus3Interface;
    threshold5pday;
    funccall("ClearServiceCallFlag");
};

/** Callout XBUS 0 with "Threshold and Mask" policy. */
actionclass thresholdAndMask_xbus0 { calloutXbus0Interface; thresholdAndMask; };

/** Callout XBUS 1 with "Threshold and Mask" policy. */
actionclass thresholdAndMask_xbus1 { calloutXbus1Interface; thresholdAndMask; };

/** Callout XBUS 2 with "Threshold and Mask" policy. */
actionclass thresholdAndMask_xbus2 { calloutXbus2Interface; thresholdAndMask; };

/** Callout XBUS 3 with "Threshold and Mask" policy. */
actionclass thresholdAndMask_xbus3 { calloutXbus3Interface; thresholdAndMask; };