# IBM_PROLOG_BEGIN_TAG # This is an automatically generated prolog. # # $Source: src/usr/diag/prdf/common/plat/p9/p9_capp.rule $ # # OpenPOWER HostBoot Project # # Contributors Listed Below - COPYRIGHT 2016,2018 # [+] International Business Machines Corp. # # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or # implied. See the License for the specific language governing # permissions and limitations under the License. # # IBM_PROLOG_END_TAG chip p9_capp { name "P9 CAPP chiplet"; targettype TYPE_CAPP; sigoff 0x9000; dump DUMP_CONTENT_HW; scomlen 64; ############################################################################# # # # ###### # # # # ###### #### ### #### ##### ###### ##### #### # # # # # # # # # # # # # # # # ###### ##### # # #### # ##### # # #### # # # # # # ### # # # # ##### # # # # # # # # # # # # # # # # # # # # # ###### #### ### #### # ###### # # #### # # # ############################################################################# ############################################################################ # P9 CAPP target CXAFIR ############################################################################ register CXAFIR { name "P9 CAPP target CXAFIR"; scomaddr 0x02010800; reset (&, 0x02010801); mask (|, 0x02010805); capture group default; }; register CXAFIR_MASK { name "P9 CAPP target CXAFIR MASK"; scomaddr 0x02010803; capture group default; }; register CXAFIR_ACT0 { name "P9 CAPP target CXAFIR ACT0"; scomaddr 0x02010806; capture group default; capture req nonzero("CXAFIR"); }; register CXAFIR_ACT1 { name "P9 CAPP target CXAFIR ACT1"; scomaddr 0x02010807; capture group default; capture req nonzero("CXAFIR"); }; # Include registers not defined by the xml .include "p9_capp_regs.rule"; }; ############################################################################## # # # #### # # # # # # # # ##### ### # # # ## ##### ### ### # # ### # # # # # # # # # # # # # # # # # # ## # # # # #### # # # #### ### # ####### # # # # # # # # ### # # # # # # # # # # # # # # # # # # # ## # # # # # ### #### ##### ### # # # ## # ### ### # # ### # # # ############################################################################## ################################################################################ # Summary for CAPP ################################################################################ rule rCAPP { CHECK_STOP: summary( 0, rCXAFIR ); RECOVERABLE: summary( 0, rCXAFIR ); UNIT_CS: summary( 0, rCXAFIR ); }; group gCAPP attntype CHECK_STOP, RECOVERABLE, UNIT_CS filter singlebit { (rCAPP, bit(0)) ? analyze(gCXAFIR); }; ################################################################################ # P9 CAPP target CXAFIR ################################################################################ rule rCXAFIR { CHECK_STOP: CXAFIR & ~CXAFIR_MASK & ~CXAFIR_ACT0 & ~CXAFIR_ACT1; RECOVERABLE: CXAFIR & ~CXAFIR_MASK & ~CXAFIR_ACT0 & CXAFIR_ACT1; UNIT_CS: CXAFIR & ~CXAFIR_MASK & CXAFIR_ACT0 & CXAFIR_ACT1; }; group gCXAFIR filter singlebit, cs_root_cause { /** CXAFIR[0] * CXA Informational PE */ (rCXAFIR, bit(0)) ? defaultMaskedError; /** CXAFIR[1] * CXA System Xstop PE */ (rCXAFIR, bit(1)) ? self_th_1; /** CXAFIR[2] * CXA CE on Master array. */ (rCXAFIR, bit(2)) ? self_th_32perDay; /** CXAFIR[3] * CXA UE on Master array. */ (rCXAFIR, bit(3)) ? self_th_1; /** CXAFIR[4] * CXA Timer expired recoverable error */ (rCXAFIR, bit(4)) ? level2_th_1; /** CXAFIR[5] * Recovery sequencer hang detection */ (rCXAFIR, bit(5)) ? self_th_1; /** CXAFIR[6] * XPT saw UE on PB data */ (rCXAFIR, bit(6)) ? level2_th_1; /** CXAFIR[7] * XPT saw SUE on PB data */ (rCXAFIR, bit(7)) ? level2_th_1_SUE; /** CXAFIR[8] * Correctable error on Snooper array. */ (rCXAFIR, bit(8)) ? self_th_5perHour; /** CXAFIR[9] * Uncorrectable error on Snooper array. */ (rCXAFIR, bit(9)) ? self_th_1; /** CXAFIR[10] * RECOVERY_FAILED: CAPP recovery failed */ (rCXAFIR, bit(10)) ? self_th_1; /** CXAFIR[11] * Illegal LPC BAR access */ (rCXAFIR, bit(11)) ? defaultMaskedError; /** CXAFIR[12] * XPT recoverable error */ (rCXAFIR, bit(12)) ? defaultMaskedError; /** CXAFIR[13] * Recoverable errors detected in Master */ (rCXAFIR, bit(13)) ? level2_th_1; /** CXAFIR[14] * spare */ (rCXAFIR, bit(14)) ? defaultMaskedError; /** CXAFIR[15] * Scom satellite parity error */ (rCXAFIR, bit(15)) ? defaultMaskedError; /** CXAFIR[16] * CXA System checkstop errors in master */ (rCXAFIR, bit(16)) ? self_th_1; /** CXAFIR[17] * CXA System checkstop errors in Snooper */ (rCXAFIR, bit(17)) ? self_th_1; /** CXAFIR[18] * CXA transport System checkstop errors */ (rCXAFIR, bit(18)) ? self_th_1; /** CXAFIR[19] * CXA Master uOP FIR 1 for lab use */ (rCXAFIR, bit(19)) ? defaultMaskedError; /** CXAFIR[20] * CXA Master uOP FIR 2 for lab use */ (rCXAFIR, bit(20)) ? defaultMaskedError; /** CXAFIR[21] * CXA Master uOP FIR 3 for lab use */ (rCXAFIR, bit(21)) ? defaultMaskedError; /** CXAFIR[22] * Snooper uOP FIR 1 for lab use */ (rCXAFIR, bit(22)) ? defaultMaskedError; /** CXAFIR[23] * Snooper uOP FIR 2 for lab use */ (rCXAFIR, bit(23)) ? defaultMaskedError; /** CXAFIR[24] * Snooper uOP FIR 3 for lab use */ (rCXAFIR, bit(24)) ? defaultMaskedError; /** CXAFIR[25] * Misc informational PowerBus error */ (rCXAFIR, bit(25)) ? parent_proc_th_1; /** CXAFIR[26] * CXA Parity error on PowerBus interface */ (rCXAFIR, bit(26)) ? parent_proc_th_1; /** CXAFIR[27] * CXA: Any PowerBus data hang poll error */ (rCXAFIR, bit(27)) ? defaultMaskedError; /** CXAFIR[28] * CXA: PowerBus command hang error */ (rCXAFIR, bit(28)) ? defaultMaskedError; /** CXAFIR[29] * CXA: PB Addr Error detected by APC : ld */ (rCXAFIR, bit(29)) ? self_M_level2_L_th_1; /** CXAFIR[30] * CXA PB Addr Err detected by APC : st */ (rCXAFIR, bit(30)) ? self_M_level2_L_th_1; /** CXAFIR[31] * CXA: PPHB0 or PHB1 i linkdown */ (rCXAFIR, bit(31)) ? level2_th_1; /** CXAFIR[32] * APC ack_dead or ack_ed_dead */ (rCXAFIR, bit(32)) ? defaultMaskedError; /** CXAFIR[33] * CXA Any PowerBus command hang error */ (rCXAFIR, bit(33)) ? defaultMaskedError; /** CXAFIR[34] * CXA CE on data received from PB */ (rCXAFIR, bit(34)) ? self_th_5perHour; /** CXAFIR[35] * CXA: UE on data received from PowerBus */ (rCXAFIR, bit(35)) ? self_th_1; # NIMBUS_20 /** CXAFIR[36] * CXA: SUE on data received from PowerBus */ (rCXAFIR, bit(36)) ? defaultMaskedError; /** CXAFIR[37] * CXA: TLBI Timeout error. */ (rCXAFIR, bit(37)) ? level2_th_1; /** CXAFIR[38] * CXA: TLBI seq_err. */ (rCXAFIR, bit(38)) ? parent_proc_th_1; /** CXAFIR[39] * CXA: TLBI bad op error. */ (rCXAFIR, bit(39)) ? parent_proc_th_1; /** CXAFIR[40] * CXA: PE on TLBI sequence number */ (rCXAFIR, bit(40)) ? level2_th_1; /** CXAFIR[41] * APC received ack_dead or ack_ed_dead */ (rCXAFIR, bit(41)) ? defaultMaskedError; /** CXAFIR[42] * TimeBase error */ (rCXAFIR, bit(42)) ? defaultMaskedError; /** CXAFIR[43] * XPT Informational Error */ (rCXAFIR, bit(43)) ? defaultMaskedError; /** CXAFIR[44] * Command_queue_CE */ (rCXAFIR, bit(44)) ? self_th_5perHour; /** CXAFIR[45] * Command_queue_UE */ (rCXAFIR, bit(45)) ? self_th_1; /** CXAFIR[46] * PSL credit timeout error */ (rCXAFIR, bit(46)) ? level2_th_1; /** CXAFIR[47] * spare */ (rCXAFIR, bit(47)) ? defaultMaskedError; /** CXAFIR[48] * Hypervisor asserted */ (rCXAFIR, bit(48)) ? level2_th_1; /** CXAFIR[49] * spare */ (rCXAFIR, bit(49)) ? defaultMaskedError; /** CXAFIR[50] * SCOM err */ (rCXAFIR, bit(50)) ? defaultMaskedError; /** CXAFIR[51] * SCOM err */ (rCXAFIR, bit(51)) ? defaultMaskedError; }; ############################################################################## # # # # ### # # # # ## ##### ### ### # # # # # # ### ### ### ### # # # # # # # # # # ## # # # # # # # # # # # ####### # # # # # # # # # # ##### ### ### ## ### # # # # # # # # # # # ## # # # # # # # # # # # # # ## # ### ### # # ### ### # # ### ### ### ### # # # ############################################################################## # Include the common action set. .include "p9_common_actions.rule"; # Include the chip-specific action set. .include "p9_capp_actions.rule";