# IBM_PROLOG_BEGIN_TAG # This is an automatically generated prolog. # # $Source: src/usr/diag/prdf/common/plat/nimbus/nimbus_mcbist.rule $ # # OpenPOWER HostBoot Project # # Contributors Listed Below - COPYRIGHT 2016,2019 # [+] International Business Machines Corp. # # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or # implied. See the License for the specific language governing # permissions and limitations under the License. # # IBM_PROLOG_END_TAG chip nimbus_mcbist { name "NIMBUS MCBIST target"; targettype TYPE_MCBIST; sigoff 0x9000; dump DUMP_CONTENT_HW; scomlen 64; # Import signatures .include "prdfP9McbistExtraSig.H"; ############################################################################# # # # ###### # # # # ###### #### ### #### ##### ###### ##### #### # # # # # # # # # # # # # # # # ###### ##### # # #### # ##### # # #### # # # # # # ### # # # # ##### # # # # # # # # # # # # # # # # # # # # # ###### #### ### #### # ###### # # #### # # # ############################################################################# ############################################################################ # MC Chiplet FIR ############################################################################ register MC_CHIPLET_CS_FIR { name "MC Chiplet Checkstop FIR"; scomaddr 0x07040000; capture group default; }; register MC_CHIPLET_RE_FIR { name "MC Chiplet Recoverable FIR"; scomaddr 0x07040001; capture group default; }; register MC_CHIPLET_FIR_MASK { name "MC Chiplet FIR MASK"; scomaddr 0x07040002; capture group default; }; ############################################################################ # MC Chiplet Unit Checkstop FIR ############################################################################ register MC_CHIPLET_UCS_FIR { name "MC Chiplet Unit Checkstop FIR"; scomaddr 0x07040018; capture group default; }; register MC_CHIPLET_UCS_FIR_MASK { name "MC Chiplet Unit Checkstop FIR MASK"; scomaddr 0x07040019; capture group default; }; ############################################################################ # MC Chiplet Host Attention FIR ############################################################################ register MC_CHIPLET_HA_FIR { name "MC Chiplet Host Attention FIR"; scomaddr 0x07040009; capture group default; }; register MC_CHIPLET_HA_FIR_MASK { name "MC Chiplet Host Attention FIR MASK"; scomaddr 0x0704001a; capture group default; }; ############################################################################ # P9 chip MC_LFIR ############################################################################ register MC_LFIR { name "P9 chip MC_LFIR"; scomaddr 0x0704000a; reset (&, 0x0704000b); mask (|, 0x0704000f); capture group default; }; register MC_LFIR_MASK { name "P9 chip MC_LFIR MASK"; scomaddr 0x0704000d; capture group default; }; register MC_LFIR_ACT0 { name "P9 chip MC_LFIR ACT0"; scomaddr 0x07040010; capture group default; capture req nonzero("MC_LFIR"); }; register MC_LFIR_ACT1 { name "P9 chip MC_LFIR ACT1"; scomaddr 0x07040011; capture group default; capture req nonzero("MC_LFIR"); }; ############################################################################ # P9 MCBIST target MCBISTFIR ############################################################################ register MCBISTFIR { name "P9 MCBIST target MCBISTFIR"; scomaddr 0x07012300; reset (&, 0x07012301); mask (|, 0x07012305); capture group default; capture group MaintCmdRegs_mcb; }; register MCBISTFIR_MASK { name "P9 MCBIST target MCBISTFIR MASK"; scomaddr 0x07012303; capture group default; }; register MCBISTFIR_ACT0 { name "P9 MCBIST target MCBISTFIR ACT0"; scomaddr 0x07012306; capture group default; capture req nonzero("MCBISTFIR"); }; register MCBISTFIR_ACT1 { name "P9 MCBIST target MCBISTFIR ACT1"; scomaddr 0x07012307; capture group default; capture req nonzero("MCBISTFIR"); }; # Include registers not defined by the xml .include "nimbus_mcbist_regs.rule"; }; ############################################################################## # # # #### # # # # # # # # ##### ### # # # ## ##### ### ### # # ### # # # # # # # # # # # # # # # # # # ## # # # # #### # # # #### ### # ####### # # # # # # # # ### # # # # # # # # # # # # # # # # # # # ## # # # # # ### #### ##### ### # # # ## # ### ### # # ### # # # ############################################################################## ################################################################################ # MC Chiplet FIR ################################################################################ rule rMC_CHIPLET_FIR { CHECK_STOP: MC_CHIPLET_CS_FIR & ~MC_CHIPLET_FIR_MASK & `1fffffffffffffff`; RECOVERABLE: (MC_CHIPLET_RE_FIR >> 2) & ~MC_CHIPLET_FIR_MASK & `1fffffffffffffff`; }; group gMC_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE filter singlebit { /** MC_CHIPLET_FIR[3] * Attention from MC_LFIR */ (rMC_CHIPLET_FIR, bit(3)) ? analyzeMC_LFIR; /** MC_CHIPLET_FIR[4] * Attention from MCACALFIR 0 */ (rMC_CHIPLET_FIR, bit(4)) ? analyzeConnectedMCA0; /** MC_CHIPLET_FIR[5] * Attention from MCAECCFIR 0 */ (rMC_CHIPLET_FIR, bit(5)) ? analyzeConnectedMCA0; /** MC_CHIPLET_FIR[6] * Attention from MCACALFIR 1 */ (rMC_CHIPLET_FIR, bit(6)) ? analyzeConnectedMCA1; /** MC_CHIPLET_FIR[7] * Attention from MCAECCFIR 1 */ (rMC_CHIPLET_FIR, bit(7)) ? analyzeConnectedMCA1; /** MC_CHIPLET_FIR[8] * Attention from MCACALFIR 2 */ (rMC_CHIPLET_FIR, bit(8)) ? analyzeConnectedMCA2; /** MC_CHIPLET_FIR[9] * Attention from MCAECCFIR 2 */ (rMC_CHIPLET_FIR, bit(9)) ? analyzeConnectedMCA2; /** MC_CHIPLET_FIR[10] * Attention from MCACALFIR 3 */ (rMC_CHIPLET_FIR, bit(10)) ? analyzeConnectedMCA3; /** MC_CHIPLET_FIR[11] * Attention from MCAECCFIR 3 */ (rMC_CHIPLET_FIR, bit(11)) ? analyzeConnectedMCA3; /** MC_CHIPLET_FIR[12] * Attention from MCBISTFIR */ (rMC_CHIPLET_FIR, bit(12)) ? analyzeMCBISTFIR; /** MC_CHIPLET_FIR[13] * Attention from DDRPHYFIR 1 */ (rMC_CHIPLET_FIR, bit(13)) ? analyzeConnectedMCA1; /** MC_CHIPLET_FIR[14] * Attention from DDRPHYFIR 3 */ (rMC_CHIPLET_FIR, bit(14)) ? analyzeConnectedMCA3; /** MC_CHIPLET_FIR[15] * Attention from DDRPHYFIR 0 */ (rMC_CHIPLET_FIR, bit(15)) ? analyzeConnectedMCA0; /** MC_CHIPLET_FIR[16] * Attention from DDRPHYFIR 2 */ (rMC_CHIPLET_FIR, bit(16)) ? analyzeConnectedMCA2; }; ################################################################################ # MC Chiplet Unit Checkstop FIR ################################################################################ rule rMC_CHIPLET_UCS_FIR { UNIT_CS: MC_CHIPLET_UCS_FIR & ~(MC_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`; }; group gMC_CHIPLET_UCS_FIR attntype UNIT_CS filter singlebit { /** MC_CHIPLET_UCS_FIR[1] * Attention from MCAECCFIR 0 */ (rMC_CHIPLET_UCS_FIR, bit(1)) ? analyzeConnectedMCA0; /** MC_CHIPLET_UCS_FIR[2] * Attention from MCACALFIR 0 */ (rMC_CHIPLET_UCS_FIR, bit(2)) ? analyzeConnectedMCA0; /** MC_CHIPLET_UCS_FIR[3] * Attention from MCAECCFIR 1 */ (rMC_CHIPLET_UCS_FIR, bit(3)) ? analyzeConnectedMCA1; /** MC_CHIPLET_UCS_FIR[4] * Attention from MCACALFIR 1 */ (rMC_CHIPLET_UCS_FIR, bit(4)) ? analyzeConnectedMCA1; /** MC_CHIPLET_UCS_FIR[5] * Attention from MCAECCFIR 2 */ (rMC_CHIPLET_UCS_FIR, bit(5)) ? analyzeConnectedMCA2; /** MC_CHIPLET_UCS_FIR[6] * Attention from MCACALFIR 2 */ (rMC_CHIPLET_UCS_FIR, bit(6)) ? analyzeConnectedMCA2; /** MC_CHIPLET_UCS_FIR[7] * Attention from MCAECCFIR 3 */ (rMC_CHIPLET_UCS_FIR, bit(7)) ? analyzeConnectedMCA3; /** MC_CHIPLET_UCS_FIR[8] * Attention from MCACALFIR 3 */ (rMC_CHIPLET_UCS_FIR, bit(8)) ? analyzeConnectedMCA3; /** MC_CHIPLET_UCS_FIR[9] * Attention from MCBISTFIR */ (rMC_CHIPLET_UCS_FIR, bit(9)) ? analyzeMCBISTFIR; }; ################################################################################ # MC Chiplet Host Attention FIR ################################################################################ rule rMC_CHIPLET_HA_FIR { HOST_ATTN: MC_CHIPLET_HA_FIR & ~(MC_CHIPLET_HA_FIR_MASK >> 1) & `7fffffffffffffff`; }; group gMC_CHIPLET_HA_FIR attntype HOST_ATTN filter singlebit { /** MC_CHIPLET_HA_FIR[1] * Attention from MCAECCFIR 0 */ (rMC_CHIPLET_HA_FIR, bit(1)) ? analyzeConnectedMCA0; /** MC_CHIPLET_HA_FIR[2] * Attention from MCACALFIR 0 */ (rMC_CHIPLET_HA_FIR, bit(2)) ? analyzeConnectedMCA0; /** MC_CHIPLET_HA_FIR[3] * Attention from MCAECCFIR 1 */ (rMC_CHIPLET_HA_FIR, bit(3)) ? analyzeConnectedMCA1; /** MC_CHIPLET_HA_FIR[4] * Attention from MCACALFIR 1 */ (rMC_CHIPLET_HA_FIR, bit(4)) ? analyzeConnectedMCA1; /** MC_CHIPLET_HA_FIR[5] * Attention from MCAECCFIR 2 */ (rMC_CHIPLET_HA_FIR, bit(5)) ? analyzeConnectedMCA2; /** MC_CHIPLET_HA_FIR[6] * Attention from MCACALFIR 2 */ (rMC_CHIPLET_HA_FIR, bit(6)) ? analyzeConnectedMCA2; /** MC_CHIPLET_HA_FIR[7] * Attention from MCAECCFIR 3 */ (rMC_CHIPLET_HA_FIR, bit(7)) ? analyzeConnectedMCA3; /** MC_CHIPLET_HA_FIR[8] * Attention from MCACALFIR 3 */ (rMC_CHIPLET_HA_FIR, bit(8)) ? analyzeConnectedMCA3; /** MC_CHIPLET_HA_FIR[9] * Attention from MCBISTFIR */ (rMC_CHIPLET_HA_FIR, bit(9)) ? analyzeMCBISTFIR; }; ################################################################################ # P9 chip MC_LFIR ################################################################################ rule rMC_LFIR { CHECK_STOP: MC_LFIR & ~MC_LFIR_MASK & ~MC_LFIR_ACT0 & ~MC_LFIR_ACT1; RECOVERABLE: MC_LFIR & ~MC_LFIR_MASK & ~MC_LFIR_ACT0 & MC_LFIR_ACT1; }; group gMC_LFIR filter singlebit, cs_root_cause { /** MC_LFIR[0] * CFIR internal parity error */ (rMC_LFIR, bit(0)) ? self_th_32perDay; /** MC_LFIR[1] * Chiplet Control Reg: PCB Access Error */ (rMC_LFIR, bit(1)) ? self_th_32perDay; /** MC_LFIR[2] * Clock Controller: PCB Access Error */ (rMC_LFIR, bit(2)) ? self_th_32perDay; /** MC_LFIR[3] * Clock Controller: Summarized Error */ (rMC_LFIR, bit(3)) ? self_th_32perDay; /** MC_LFIR[4] * PSCOM Logic: PCB Access Error */ (rMC_LFIR, bit(4)) ? defaultMaskedError; /** MC_LFIR[5] * PSCOM Logic: Summarized internal errors */ (rMC_LFIR, bit(5)) ? defaultMaskedError; /** MC_LFIR[6] * Therm Logic: Summarized internal errors */ (rMC_LFIR, bit(6)) ? defaultMaskedError; /** MC_LFIR[7] * Therm Logic: PCB Access Error */ (rMC_LFIR, bit(7)) ? defaultMaskedError; /** MC_LFIR[8] * Therm Logic: Temperature critical trip */ (rMC_LFIR, bit(8)) ? defaultMaskedError; /** MC_LFIR[9] * Therm Logic: Temperature fatal trip */ (rMC_LFIR, bit(9)) ? defaultMaskedError; /** MC_LFIR[10] * UNUSED in P9 */ (rMC_LFIR, bit(10)) ? defaultMaskedError; /** MC_LFIR[11] * Debug Logic: Scom Satellite Error */ (rMC_LFIR, bit(11)) ? defaultMaskedError; /** MC_LFIR[12] * Scom Satellite Error - Trace0 */ (rMC_LFIR, bit(12)) ? defaultMaskedError; /** MC_LFIR[13] * Scom Satellite Error - Trace0 */ (rMC_LFIR, bit(13)) ? defaultMaskedError; /** MC_LFIR[14] * Scom Satellite Error - Trace1 */ (rMC_LFIR, bit(14)) ? defaultMaskedError; /** MC_LFIR[15] * Scom Satellite Error - Trace1 */ (rMC_LFIR, bit(15)) ? defaultMaskedError; /** MC_LFIR[16:40] * spare */ (rMC_LFIR, bit(16|17|18|19|20|21|22|23|24|25|26|27|28|29|30|31|32|33|34|35|36|37|38|39|40)) ? defaultMaskedError; /** MC_LFIR[41] * Malfunction Alert or Local Checkstop */ (rMC_LFIR, bit(41)) ? defaultMaskedError; }; ################################################################################ # P9 MCBIST target MCBISTFIR ################################################################################ rule rMCBISTFIR { CHECK_STOP: MCBISTFIR & ~MCBISTFIR_MASK & ~MCBISTFIR_ACT0 & ~MCBISTFIR_ACT1; RECOVERABLE: MCBISTFIR & ~MCBISTFIR_MASK & ~MCBISTFIR_ACT0 & MCBISTFIR_ACT1; HOST_ATTN: MCBISTFIR & ~MCBISTFIR_MASK & MCBISTFIR_ACT0 & ~MCBISTFIR_ACT1; UNIT_CS: MCBISTFIR & ~MCBISTFIR_MASK & MCBISTFIR_ACT0 & MCBISTFIR_ACT1; }; group gMCBISTFIR filter singlebit, cs_root_cause { /** MCBISTFIR[0] * INVALID_MAINT_ADDRESS */ (rMCBISTFIR, bit(0)) ? defaultMaskedError; /** MCBISTFIR[1] * COMMAND_ADDRESS_TIMEOUT */ (rMCBISTFIR, bit(1)) ? command_addr_timeout; /** MCBISTFIR[2] * INTERNAL_FSM_ERROR */ (rMCBISTFIR, bit(2)) ? self_th_1; /** MCBISTFIR[3] * MCBIST_BRODCAST_OUT_OF_SYNC */ (rMCBISTFIR, bit(3)) ? self_th_1; /** MCBISTFIR[4] * MCBIST_DATA_ERROR */ (rMCBISTFIR, bit(4)) ? defaultMaskedError; /** MCBISTFIR[5] * Maintenance hard NCE ETE */ (rMCBISTFIR, bit(5)) ? defaultMaskedError; /** MCBISTFIR[6] * Maintenance soft NCE ETE */ (rMCBISTFIR, bit(6)) ? defaultMaskedError; /** MCBISTFIR[7] * Maintenance intermittent NCE ETE */ (rMCBISTFIR, bit(7)) ? defaultMaskedError; /** MCBISTFIR[8] * Maintenance RCE ETE */ (rMCBISTFIR, bit(8)) ? defaultMaskedError; /** MCBISTFIR[9] * Maintenance IMPE ETE */ (rMCBISTFIR, bit(9)) ? defaultMaskedError; /** MCBISTFIR[10] * MCBIST program complete */ (rMCBISTFIR, bit(10)) ? mcbist_program_complete; /** MCBISTFIR[11] * MCBIST_CCS_SUBTEST_DONE */ (rMCBISTFIR, bit(11)) ? defaultMaskedError; /** MCBISTFIR[12] * WAT_DEBUG_ATTN */ (rMCBISTFIR, bit(12)) ? defaultMaskedError; /** MCBISTFIR[13] * SCOM_RECOVERABLE_REG_PE */ (rMCBISTFIR, bit(13)) ? nvdimm_self_th_1; /** MCBISTFIR[14] * SCOM_FATAL_REG_PE */ (rMCBISTFIR, bit(14)) ? self_th_1; /** MCBISTFIR[15] * WAT_DEBUG_REG_PE */ (rMCBISTFIR, bit(15)) ? defaultMaskedError; /** MCBISTFIR[16:17] * spare */ (rMCBISTFIR, bit(16|17)) ? defaultMaskedError; /** MCBISTFIR[18] * INTERNAL_SCOM_ERROR */ (rMCBISTFIR, bit(18)) ? defaultMaskedError; /** MCBISTFIR[19] * INTERNAL_SCOM_ERROR_CLONE */ (rMCBISTFIR, bit(19)) ? defaultMaskedError; }; ############################################################################## # # # # ### # # # # ## ##### ### ### # # # # # # ### ### ### ### # # # # # # # # # # ## # # # # # # # # # # # ####### # # # # # # # # # # ##### ### ### ## ### # # # # # # # # # # # ## # # # # # # # # # # # # # ## # ### ### # # ### ### # # ### ### ### ### # # # ############################################################################## # Include the actions defined for this target .include "p9_common_actions.rule"; .include "nimbus_mcbist_actions.rule";