# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
# $Source: src/usr/diag/prdf/common/plat/explorer/explorer_ocmb_actions.rule $
#
# OpenPOWER HostBoot Project
#
# Contributors Listed Below - COPYRIGHT 2018,2019
# [+] International Business Machines Corp.
#
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
# implied. See the License for the specific language governing
# permissions and limitations under the License.
#
# IBM_PROLOG_END_TAG

################################################################################
#                                Thresholds                                    #
################################################################################

# Threshold syntax:
#   threshold( field(<timebase>) [, mfg(<timebase>)|mfg_file(<mfg_theshold>)] );
#
# Timebase syntax:
#   <threshold_count> [/ [timbase_count] <sec|min|hour|day>]
#
# Note that <mfg_theshold> can be found in prdfMfgThresholds.lst
#
# Examples:
#   threshold( field( 1        ) );
#   threshold( field(32 /   day) );
#   threshold( field( 5 / 2 min) );
#   threshold( field(32 / 1 day), mfg(2 / hour) );
#   threshold( field( 2 /   min), mfg(1       ) );
#   threshold( field(32 /   day), mfg_file(P8CHIP_OFFNODE_BUS_CES) );

/** Threshold of 1 */
actionclass threshold1
{
    threshold( field(1) );
};

/** Threshold of 32 per day */
actionclass threshold32pday
{
    threshold( field(32 / day) );
};

/** Threshold of 5 per day */
actionclass threshold5pday
{
    threshold( field(5 / day) );
};

################################################################################
#                               Special Flags                                  #
################################################################################

/** SUE source */
actionclass SueSource { flag(UERE); };

/** SUE originated from somewhere else */
actionclass SueSeen { flag(SUE); };

################################################################################
#                               Simple Callouts                                #
################################################################################

# Callout self
actionclass calloutSelfHigh { callout(MRU_HIGH); };
actionclass calloutSelfMed  { callout(MRU_MED);  };
actionclass calloutSelfMedA { callout(MRU_MEDA); };
actionclass calloutSelfLow  { callout(MRU_LOW);  };

# 2nd Level Support
actionclass callout2ndLvlMed
{ callout(procedure(LEVEL2_SUPPORT), MRU_MED); };

/** Callout self with  low priority but don't gard it */
actionclass calloutSelfLowNoGard
{ callout(MRU_LOW, NO_GARD); };

actionclass level2_M_self_L
{
    callout2ndLvlMed;
    calloutSelfLow;
};

actionclass omi
{
    callout(connected(TYPE_OMI), MRU_MED);
};

actionclass omi_bus
{
    calloutSelfMedA;
    callout(connected(TYPE_OMI), MRU_MEDA);
    funccall("calloutBusInterfacePlugin");
};

actionclass mem_port
{
    callout(connected(TYPE_MEM_PORT,0), MRU_MED);
};

actionclass mem_port_L
{
    callout(connected(TYPE_MEM_PORT,0), MRU_LOW);
};

actionclass all_dimm_H
{
    funccall("CalloutAttachedDimmsHigh");
};

actionclass all_dimm_H_memport_L
{
    all_dimm_H;
    mem_port_L;
};

actionclass parent_proc
{
    callout(connected(TYPE_PROC), MRU_MED);
};

################################################################################
#                           Callouts with thresholds                           #
################################################################################

actionclass self_th_1
{
    calloutSelfMed;
    threshold1;
};

actionclass self_th_32perDay
{
    calloutSelfMed;
    threshold32pday;
};

actionclass parent_proc_th_32perDay
{
    parent_proc;
    threshold32pday;
};

actionclass level2_th_1
{
    callout2ndLvlMed;
    threshold1;
};

actionclass level2_th_32perDay
{
    callout2ndLvlMed;
    threshold32pday;
};

actionclass level2_M_self_L_th_1
{
    level2_M_self_L;
    threshold1;
};

actionclass omi_th_1
{
    omi;
    threshold1;
};

actionclass omi_bus_th_1
{
    omi_bus;
    threshold1;
};

actionclass omi_bus_th_32perDay
{
    omi_bus;
    threshold32pday;
};

actionclass mem_port_th_1
{
    mem_port;
    threshold1;
};

actionclass mem_port_th_32perDay
{
    mem_port;
    threshold32pday;
};

################################################################################
#                                   Special                                    #
################################################################################

/**
 * Threshold 32/day (field) and 1 (mnfg). Do not predictively callout on
 * threshold in the field, instead just mask.
 */
actionclass threshold_and_mask
{
    threshold32pday;
    funccall("ClearServiceCallFlag");
};

actionclass threshold_and_mask_self   { calloutSelfMed;   threshold_and_mask; };

actionclass threshold_and_mask_level2
{
    level2_th_32perDay;
    threshold_and_mask;
};

actionclass threshold_and_mask_mem_port
{
    mem_port_th_32perDay;
    threshold_and_mask;
};

################################################################################
#                           Callouts with flags                                #
################################################################################

actionclass self_th_1_UERE     { self_th_1;     SueSource; };
actionclass level2_th_1_UERE   { level2_th_1;   SueSource; };
actionclass mem_port_th_1_UERE { mem_port_th_1; SueSource; };

################################################################################
#                               Default callouts                               #
################################################################################

/** Default action for an unexpected unmasked bit */
actionclass defaultMaskedError
{
    callout2ndLvlMed;
    threshold1;
};

/** Default TBD action */
actionclass TBDDefaultCallout
{
    callout2ndLvlMed;
    threshold( field(32 / day), mfg(32 / day) );
};

################################################################################
#                                 OCMB Actions                                 #
################################################################################

/** DDR4 PHY Interrupt */
actionclass ddr4_phy_interrupt
{
    calloutSelfHigh;
    threshold5pday;
    funccall("Ddr4PhyInterrupt");
};

/** Foxhound Fatal */
actionclass foxhound_fatal
{
    funccall("FoxhoundFatal");
    threshold1;
};

/** OMI-DL Fatal Error */
actionclass dl_fatal_error
{
    try( funccall("DlFatalError"), omi_bus );
    threshold1;
};

/** MCBIST program complete */
actionclass mcbist_program_complete
{
    funccall("McbistCmdComplete");
};

/** Verify Chip Mark */
actionclass verify_chip_mark_0 { funccall("AnalyzeFetchMpe_0"); };
actionclass verify_chip_mark_1 { funccall("AnalyzeFetchMpe_1"); };
actionclass verify_chip_mark_2 { funccall("AnalyzeFetchMpe_2"); };
actionclass verify_chip_mark_3 { funccall("AnalyzeFetchMpe_3"); };
actionclass verify_chip_mark_4 { funccall("AnalyzeFetchMpe_4"); };
actionclass verify_chip_mark_5 { funccall("AnalyzeFetchMpe_5"); };
actionclass verify_chip_mark_6 { funccall("AnalyzeFetchMpe_6"); };
actionclass verify_chip_mark_7 { funccall("AnalyzeFetchMpe_7"); };

/** Mainline NCE/TCE handling */
actionclass mainline_nce_tce_handling
{
    funccall("AnalyzeFetchNceTce");
};

/** Handle Mainline AUEs/IAUEs */
actionclass mainline_aue_iaue_handling
{
    funccall("AnalyzeFetchAueIaue");
    mem_port_L;
    threshold1;
};

/** Mainline UE handling */
actionclass mainline_ue_handling
{
    threshold( field(33 / 30 min ) ); # To prevent flooding. Will be unmasked
                                      # when background scrubbing resumes after
                                      # targeted diagnostics is complete.
    funccall("AnalyzeFetchUe");
};

actionclass mainline_ue_handling_UERE
{
    SueSource;
    mainline_ue_handling;
};

/** Handle Mainline IUEs */
actionclass mainline_iue_handling
{
    # An IUE itself is not a SUE source, however, a threshold of IUEs will
    # trigger a port failure, which will generate SUEs. The port failure could
    # also crash the machine so we want to make sure this bit is flagged as an
    # SUE just in case it is needed in the checkstop analysis.
    SueSource;
    # Thresholding done in the plugin
    funccall("AnalyzeMainlineIue");
};

/**  Handle Maintenance IUEs */
actionclass maintenance_iue_handling
{
    # An IUE itself is not a SUE source, however, a threshold of IUEs will
    # trigger a port failure, which will generate SUEs. The port failure could
    # also crash the machine so we want to make sure this bit is flagged as an
    # SUE just in case it is needed in the checkstop analysis.
    SueSource;
    # Thresholding done in the plugin
    funccall("AnalyzeMaintIue");
};

actionclass memory_impe_handling
{
    funccall("AnalyzeImpe");
};

/** Handle Maintenance AUEs */
actionclass maintenance_aue_handling
{
    funccall("AnalyzeMaintAue");
    mem_port_L;
    threshold1;
};

/** Handle Maintenance IAUEs */
actionclass maintenance_iaue_handling
{
    all_dimm_H_memport_L;
    threshold1;
};

/** RDF RCD Parity Error */
actionclass rdf_rcd_parity_error
{
    funccall("RdfRcdParityError");
    threshold1;
};

actionclass rdf_rcd_parity_error_UERE
{
    rdf_rcd_parity_error;
    SueSource;
};

/** SRQ RCD Parity Error */
actionclass srq_rcd_parity_error
{
    all_dimm_H_memport_L;
    threshold32pday;
};

actionclass srq_rcd_parity_error_UERE
{
    srq_rcd_parity_error;
    SueSource;
};

actionclass mem_port_failure
{
    all_dimm_H_memport_L;
    threshold1;                                # Threshold 1
};

################################################################################
# Analyze groups
################################################################################

actionclass analyzeOCMB_LFIR { analyze(gOCMB_LFIR); };
actionclass analyzeMMIOFIR   { analyze(gMMIOFIR);   };
actionclass analyzeSRQFIR    { analyze(gSRQFIR);    };
actionclass analyzeMCBISTFIR { analyze(gMCBISTFIR); };
actionclass analyzeRDFFIR    { analyze(gRDFFIR);    };
actionclass analyzeTLXFIR    { analyze(gTLXFIR);    };
actionclass analyzeTLXERR1
{
    analyze(gTLX_ERR1_REPORT);
    funccall("clearAndMaskTlxtRe");
};
actionclass analyzeOMIDLFIR  { analyze(gOMIDLFIR);  };