# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
# $Source: src/usr/diag/prdf/common/plat/centaur/centaur_mba_regs.rule $
#
# OpenPOWER HostBoot Project
#
# Contributors Listed Below - COPYRIGHT 2017,2018
# [+] International Business Machines Corp.
#
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
# implied. See the License for the specific language governing
# permissions and limitations under the License.
#
# IBM_PROLOG_END_TAG

    ############################################################################
    # Centaur chip MBA target MBACALFIR
    ############################################################################

    register MBACALFIR_AND
    {
        name        "Centaur chip MBA target MBACALFIR atomic AND";
        scomaddr    0x03010401;
        capture     group never;
        access      write_only;
    };

    register MBACALFIR_MASK_OR
    {
        name        "Centaur chip MBA target MBACALFIR_MASK atomic OR";
        scomaddr    0x03010405;
        capture     group never;
        access      write_only;
    };

    ############################################################################
    # Centaur chip MBA target MBAFIR
    ############################################################################

    register MBAFIR_MASK_OR
    {
        name        "Centaur chip MBA target MBAFIR_MASK atomic OR";
        scomaddr    0x03010605;
        capture     group never;
        access      write_only;
    };

    ############################################################################
    # Centaur chip MBA target MBASPA
    ############################################################################

    register MBASPA_AND
    {
        name        "Centaur chip MBA target MBASPA atomic AND";
        scomaddr    0x03010612;
        capture     group never;
        access      write_only;
    };

    register MBASPA_OR
    {
        name        "Centaur chip MBA target MBASPA atomic OR";
        scomaddr    0x03010613;
        capture     group never;
        access      write_only;
    };

    ############################################################################
    # Centaur chip MBA target MBADDRPHYFIR
    ############################################################################

    register MBADDRPHYFIR_AND
    {
        name        "Centaur chip MBA target MBADDRPHYFIR atomic AND";
        scomaddr    0x800200910301143F;
        capture     group never;
        access      write_only;
    };

    ############################################################################
    # Error Report Registers
    ############################################################################

    register MBA_ERR_REPORT
    {
        name        "MBU.MBA_SRQ.MBA_ERR_REPORTQ";
        scomaddr    0x0301041A;
        capture     group default;
    };

    register MBA_MCBERRPTQ
    {
        name        "MBU.MBA_MCBIST.SCOMFIR.MBA_MCBERRPTQ";
        scomaddr    0x030106E7;
        capture     group default;
    };

    register DDRPHY_APB_FIR_ERR0_P0
    {
        name        "DDRPHY_APB_FIR_ERR0_P0";
        scomaddr    0x8000D0060301143F;
        capture     group default;
    };

    register DDRPHY_APB_FIR_ERR1_P0
    {
        name        "DDRPHY_APB_FIR_ERR1_P0";
        scomaddr    0x8000D0070301143F;
        capture     group default;
    };

    register DDRPHY_APB_FIR_ERR0_P1
    {
        name        "DDRPHY_APB_FIR_ERR0_P1";
        scomaddr    0x8001D0060301143F;
        capture     group default;
    };

    register DDRPHY_APB_FIR_ERR1_P1
    {
        name        "DDRPHY_APB_FIR_ERR1_P1";
        scomaddr    0x8001D0070301143F;
        capture     group default;
    };

    ############################################################################
    # Maintenance Command Registers
    ############################################################################

    register MBMCT
    {
        name        "MBA Maintenance Command Type Register";
        scomaddr    0x0301060A;
        capture     group default;
        capture     group MaintCmdRegs;
    };

    # NOTE: PRD doesn't use MBMCC directly and the bits are cleared by HW so no
    # reason to add it here.

    register MBMSR
    {
        name        "MBA Maintenance Command Status Register";
        scomaddr    0x0301060C;
        capture     group default;
        capture     group MaintCmdRegs;
    };

    register MBMACA
    {
        name        "MBA Maintenance Command Start Address Register";
        scomaddr    0x0301060D;
        capture     group default;
        capture     group MaintCmdRegs;
    };

    register MBMEA
    {
        name        "MBA Maintenance Command End Address Register";
        scomaddr    0x0301060E;
        capture     group default;
        capture     group MaintCmdRegs;
    };

    register MBASCTL
    {
        name        "MBA Memory Scrub/Read Control Register";
        scomaddr    0x0301060F;
        capture     group default;
        capture     group MaintCmdRegs;
    };

    register MBAECTL
    {
        name        "MBA Error Control Register";
        scomaddr    0x03010610;
        capture     group default;
        capture     group MaintCmdRegs;
    };