/* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ /* $Source: src/import/generic/memory/lib/utils/voltage/gen_mss_voltage_traits.H $ */ /* */ /* OpenPOWER HostBoot Project */ /* */ /* Contributors Listed Below - COPYRIGHT 2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ /* You may obtain a copy of the License at */ /* */ /* http://www.apache.org/licenses/LICENSE-2.0 */ /* */ /* Unless required by applicable law or agreed to in writing, software */ /* distributed under the License is distributed on an "AS IS" BASIS, */ /* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ /* implied. See the License for the specific language governing */ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ /// /// @file gen_mss_voltage_traits.H /// @brief Contains voltage traits information /// // *HWP HWP Owner: Stephen Glancy // *HWP FW Owner: Andre Marin // *HWP Team: Memory // *HWP Level: 2 // *HWP Consumed by: CI #ifndef _GEN_MSS_VOLTAGE_TRAITS_H_ #define _GEN_MSS_VOLTAGE_TRAITS_H_ #include #include namespace mss { /// /// @class Traits and policy class for voltage code /// @tparam P mss::proc_type processor type /// @tparam D mss::spd::device_type DRAM device type (generation) /// template< mss::mc_type P, mss::spd::device_type D > class voltage_traits; /// /// @class Traits and policy class for voltage code - specialization for the NIMBUS processor type, DDR4 device type /// template<> class voltage_traits { public: ////////////////////////////////////////////////////////////// // Target types ////////////////////////////////////////////////////////////// static constexpr fapi2::TargetType VOLTAGE_TARGET_TYPE = fapi2::TARGET_TYPE_MCBIST; static constexpr fapi2::TargetType SPD_TARGET_TYPE = fapi2::TARGET_TYPE_MCS; ////////////////////////////////////////////////////////////// // Traits values ////////////////////////////////////////////////////////////// // List of attribute setter functions for setting voltage rail values static const std::vector&, uint32_t)> voltage_setters; }; /// /// @class Traits and policy class for voltage code - specialization for the AXONE processor type, DDR4 device type /// template<> class voltage_traits { public: ////////////////////////////////////////////////////////////// // Target types ////////////////////////////////////////////////////////////// static constexpr fapi2::TargetType VOLTAGE_TARGET_TYPE = fapi2::TARGET_TYPE_OCMB_CHIP; static constexpr fapi2::TargetType SPD_TARGET_TYPE = fapi2::TARGET_TYPE_MEM_PORT; ////////////////////////////////////////////////////////////// // Traits values ////////////////////////////////////////////////////////////// // List of attribute setter functions for setting voltage rail values static const std::vector&, uint32_t)> voltage_setters; // Static consts for DDR4 voltages used in p9_mss_volt static const uint64_t DDR4_NOMINAL_VOLTAGE = 1200; static const uint64_t DDR4_VPP_VOLTAGE = 2500; }; } // ns mss #endif