/* IBM_PROLOG_BEGIN_TAG                                                   */
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/* $Source: src/import/chips/p9a/procedures/hwp/memory/p9a_omi_train.C $  */
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/* OpenPOWER HostBoot Project                                             */
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/* IBM_PROLOG_END_TAG                                                     */

///
/// @file p9a_omi_train.C
/// @brief Check the omi status
///
// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com>
// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
// *HWP Team: Memory
// *HWP Level: 3
// *HWP Consumed by: Memory

#include <lib/shared/axone_defaults.H>
#include <p9a_omi_train.H>

#include <fapi2.H>
#include <p9a_mc_scom_addresses.H>
#include <p9a_mc_scom_addresses_fld.H>
#include <p9a_mc_scom_addresses_fixes.H>
#include <p9a_mc_scom_addresses_fld_fixes.H>
#include <generic/memory/lib/utils/c_str.H>
#include <generic/memory/lib/utils/scom.H>
#include <generic/memory/lib/utils/buffer_ops.H>
#include <generic/memory/lib/utils/find.H>
#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
#include <lib/mc/omi.H>
#include <lib/workarounds/p9a_omi_workarounds.H>
#include <generic/memory/mss_git_data_helper.H>


///
/// @brief Turn on Axone config regs to enable training
/// @param[in] i_target the OMI target to operate on
/// @return FAPI2_RC_SUCCESS iff ok
///
fapi2::ReturnCode p9a_omi_train( const fapi2::Target<fapi2::TARGET_TYPE_OMI>& i_target)
{
    mss::display_git_commit_info("p9a_omi_train");

    FAPI_INF("%s Start p9a_omi_train", mss::c_str(i_target));

    const auto& l_mc = mss::find_target<fapi2::TARGET_TYPE_MC>(i_target);
    const auto& l_ocmbs = mss::find_targets<fapi2::TARGET_TYPE_OCMB_CHIP>(i_target);

    FAPI_TRY(mss::mc::setup_mc_mcn_config(l_mc));
    FAPI_TRY(mss::mc::setup_mc_config1(i_target));
    FAPI_TRY(mss::mc::setup_mc_cya_bits(i_target));
    FAPI_TRY(mss::mc::setup_mc_error_action(i_target));
    FAPI_TRY(mss::mc::setup_mc_rmt_config(i_target));

    if(l_ocmbs.empty())
    {
        // No ocmbs, no training needed
        return fapi2::FAPI2_RC_SUCCESS;
    }

    {
        // Only one OCMB per OMI for axone
        const auto& l_ocmb = l_ocmbs[0];
        const auto& l_proc = mss::find_target<fapi2::TARGET_TYPE_PROC_CHIP>(l_ocmb);
        uint8_t l_dl_x4_backoff_en = 0;
        bool l_workaround_required = false;

        // Get BACKOFF_ENABLE CHIP_EC attribute
        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_OMI_DL_X4_BACKOFF_ENABLE, l_ocmb, l_dl_x4_backoff_en),
                 "Error getting ATTR_CHIP_EC_FEATURE_OMI_DL_X4_BACKOFF_ENABLE");

        // Determine if workaround will be performed, if so, perform it
        FAPI_TRY(mss::workarounds::mc::is_prbs_omi_required(l_ocmb, l_proc, l_workaround_required));

        if (l_workaround_required)
        {
            FAPI_TRY(mss::workarounds::mc::prbs_omi(i_target, l_dl_x4_backoff_en));
        }

        // Enable auto training
        FAPI_TRY(mss::mc::setup_mc_config0(i_target, mss::omi::train_mode::ENABLE_AUTO_TRAINING, l_dl_x4_backoff_en));

        return fapi2::FAPI2_RC_SUCCESS;
    }

fapi_try_exit:
    return fapi2::current_err;

}// p9a_omi_train