RC_P9_SETUP_BARS_FSP_BAR_ATTR_ERR Procedure: p9_setup_bars FSP BAR attributes are not aligned to HW implementation TARGET BAR_OFFSET BAR_OFFSET_MASK BAR_OVERLAP CODE HIGH RC_P9_SETUP_BARS_PSI_BAR_ATTR_ERR Procedure: p9_setup_bars PSI BAR attributes are not aligned to HW implementation TARGET BAR_OFFSET BAR_OFFSET_MASK BAR_OVERLAP CODE HIGH RC_P9_SETUP_BARS_NPU_PHY0_BAR_ATTR_ERR Procedure: p9_setup_bars NPU PHY0 BAR attributes are not aligned to HW implementation TARGET BAR_OFFSET BAR_OFFSET_MASK BAR_OVERLAP CODE HIGH RC_P9_SETUP_BARS_NPU_PHY1_BAR_ATTR_ERR Procedure: p9_setup_bars NPU PHY1 BAR attributes are not aligned to HW implementation TARGET BAR_OFFSET BAR_OFFSET_MASK BAR_OVERLAP CODE HIGH RC_P9_SETUP_BARS_NPU_MMIO_BAR_ATTR_ERR Procedure: p9_setup_bars NPU MMIO BAR attributes are not aligned to HW implementation TARGET BAR_OFFSET BAR_OFFSET_MASK BAR_OVERLAP CODE HIGH RC_P9_SETUP_BARS_INVALID_MCD_NM_RANGE_ERR Procedure: p9_setup_bars Invalid configuration for MCD non-mirrored range TARGET NM_RANGE_IDX NM_RANGE_BASE_ADDR NM_RANGE_SIZE NM_CHIP_BASE CODE HIGH RC_P9_SETUP_BARS_INVALID_MCD_M_RANGE_ERR Procedure: p9_setup_bars Invalid configuration for MCD mirrored range TARGET M_RANGE_IDX M_RANGE_BASE_ADDR M_RANGE_SIZE M_CHIP_BASE CODE HIGH RC_P9_SETUP_BARS_INVALID_MCD_GROUP_SIZE_ERR Procedure: p9_setup_bars Unsupported MCD group size TARGET RANGE_BASE_ADDR RANGE_SIZE MCD0_REG_ADDR MCD1_REG_ADDR CODE HIGH RC_P9_SETUP_BARS_INT_PC_BAR_ATTR_ERR Procedure: p9_setup_bars INT PC BAR attributes are not aligned to HW implementation TARGET BAR_OFFSET BAR_OFFSET_MASK BAR_OVERLAP CODE HIGH RC_P9_SETUP_BARS_INT_VC_BAR_ATTR_ERR Procedure: p9_setup_bars INT VC BAR attributes are not aligned to HW implementation TARGET BAR_OFFSET BAR_OFFSET_MASK BAR_OVERLAP CODE HIGH RC_P9_SETUP_BARS_INT_TM1_BAR_ATTR_ERR Procedure: p9_setup_bars INT TM1 BAR attributes are not aligned to HW implementation TARGET BAR_OFFSET BAR_OFFSET_MASK BAR_OVERLAP CODE HIGH RC_P9_SETUP_BARS_INT_IC_BAR_ATTR_ERR Procedure: p9_setup_bars INT IC BAR attributes are not aligned to HW implementation TARGET BAR_OFFSET BAR_OFFSET_MASK BAR_OVERLAP CODE HIGH RC_P9_SETUP_BARS_RANGE_OVERLAP_ERR Procedure: p9_setup_bars Overlapping memory/MMIO address ranges detected TARGET BASE_ADDR1 END_ADDR1 ENABLED1 BASE_ADDR2 END_ADDR2 ENABLED2 CODE HIGH