RC_MSS_INVALID_TIMING_VALUE
Invalid value calculated for timing value based on MTB and FTB from SPD.
VALUE
DIMM_TARGET
HIGH
DIMM_TARGET
RC_MSS_REACHED_HIGHEST_TCK
No valid tCK exists that would produce a CAS latency that is common among all dimms.
TCK
RC_MSS_NO_COMMON_SUPPORTED_CL
Current Configuration has no common supported CL values.
CL_SUPPORTED
MCS_TARGET
HIGH
MCS_TARGET
RC_MSS_EXCEED_TAA_MAX_NO_CL
Exceeded TAA MAX with Lowest frequency. No compatable CL.
CL
DIMM_TARGET
HIGH
DIMM_TARGET
RC_MSS_FREQ_NOT_EQUAL_NEST_FREQ
Case when mss_freq speeds are different and sync mode is required,
and mss_freq is not equal to nest freq.
MSS_FREQ
NEST_FREQ
MCS_TARGET
HIGH
MCS_TARGET
RC_MSS_UNSUPPORTED_FREQ_CALCULATED
The frequency calculated with spd data is not supported by the jedec standards.
DIMM_MIN_FREQ
RC_MSS_UNSUPPORTED_DEV_TYPE
Device type is not DDR4.
DEV_TYPE
DIMM_TARGET
HIGH
DIMM_TARGET