ATTR_MSS_MRW_NVDIMM_SLOT_POSITION
TARGET_TYPE_DIMM
The position of a dimm is based on which mca it is
associated with and which drop behind that mca, with
16 dimms possible per processor socket. The formula is:
[processor position with no gaps, i.e. 0,1,2,3]*16 +
[mca position on this processor * 2] + [dimm location behind this mca]
uint8
0xFF
mrw_nvdimm_slot_position
ATTR_MSS_MRW_UNSUPPORTED_RANK_CONFIG
TARGET_TYPE_MCS
Each MCA value is a 64-bit vector, where each byte represents an unsupported rank configuration.
Each nibble in the byte represents the total count of ranks (master and slave)
on each DIMM. The left-most nibble represents slot 0 and the right represents 1.
uint64
2
0
mrw_unsupported_rank_config