ATTR_CHIP_EC_FEATURE_HW409026 TARGET_TYPE_PROC_CHIP Optics DLL fast async cross causes DLL internal errs Fixed on all chips but Nimbus. ENUM_ATTR_NAME_NIMBUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_ONE_NPU_TOP TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP The chip had a consolodated npu_top. True for Nimbus and Cumulus, not Axone ENUM_ATTR_NAME_NIMBUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_NPU_SMF_NIMBUS_CUMULUS TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Defines ec levels where SMF is supported for Nimbus/Cumulus. ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x12 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_NPU_SMF_AXONE TARGET_TYPE_PROC_CHIP Defines ec levels where SMF is supported for Axone. ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_CP_FILTER_100MHZ TARGET_TYPE_PROC_CHIP True where CP refclock is expected to be 100 MHz ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_I2CM_INTERNAL_CLK_DIV2 TARGET_TYPE_PROC_CHIP I2CM internal clock divider is div2 , not div4 ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_NOT_DD1_FBC_AND_ALINK TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP DD1 FBC setting differs from DD2, ex. lo_limit adjustment. Adding for Axone as it has A-link support True if Nimbus dd2 or greater or cumulus ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_XBUS_COMPRESSION_WORKAROUND TARGET_TYPE_PROC_CHIP Modifies calibration gain targets and moves common mode to improve DAC linearity and compression. Enable only for Axone. ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_NO_NPU2_FIR TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Nimbus DD1 only: NPU2 FIR not present Axone, does not have a single npu_top. Instead it has npu_top0..2 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_CORE_LOCAL_TRACE2 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Does the core has TRACE2 with LOCAL dial names (Nimbus dd2.X and Cumulus, Not Axone) ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW416934_HW419818 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Nimbus DD1, DD2.0, DD2.1, Cumulus DD1 only; Combined into a single WAT solution HW416934 - Cache Inhibited (I=1) lxvd2x load sends 8 byte load to NCU instead of 16 byte HW419818 - stcx bug in the S2QA / S2Q drain stall ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_CORE_NIMDD22_SECURITY TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Force Nimbus DD2.2-specific security settings ENUM_ATTR_NAME_NIMBUS 0x22 EQUAL ATTR_CHIP_EC_FEATURE_FLUSH_L1D_TRIG TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP MTTRIG2 setup to flush L1D ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x12 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW420171 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Disable HW420171 Fix ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW413922 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Nimbus DD2.2 - Disable HW413922 Fix ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW414249_ROUND2 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Additional chickenswitch needed to mitigate HW414249 ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW423358 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW423358 - NDD2.2+ / CDD1.1+ ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW436858 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW436858 - TM suspend WAT workaround Note: This workaround is only needed for NDD22/CDD11, but this attribute will also be true for NDD23 for its compatibility modes ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 EQUAL ATTR_CHIP_EC_FEATURE_HW433038 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW433038 - LSU clockgating bug ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_NEW_TM_MODE TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Enable new TM handling for NDD2.2+ and CDD1.1+ ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_DIS_HW419330 TARGET_TYPE_PROC_CHIP Disable fix for HW419330 on Cumulus-based (PHYP) systems ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW430233 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW430233 ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_NDD23_SEC_BLOCK_ISSUE TARGET_TYPE_PROC_CHIP Enable Nimbus-specific secure block issue settings ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_SEC_BLOCK_ISSUE TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Enable secure block issue setting ENUM_ATTR_NAME_CUMULUS 0x12 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW430233_ROUND2 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW430233 - Disable fix in later chips ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW434484_HW452921 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW434484 / HW452921 - ISU clockgate ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW426420 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Additional workaround needed for TM - NDD2.2 / CDD1.1 only ENUM_ATTR_NAME_NIMBUS 0x22 EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 EQUAL ATTR_CHIP_EC_FEATURE_HW420489 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW420489 ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW419082 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW419082 ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_EN_FULL_DERAT TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Enable full ERAT usage ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW430944_DISFIX TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW430944 Quaint Gate - disable fix to match p9c1.1 p9n2.2 ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x12 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW437436_DISFIX TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW437436 Son of Quaint Gate - disable fix to match p9c1.1 p9n2.2 ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x12 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW430944_ROUND2 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW430944 Quaint Gate ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW446279 TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP HW446279 SMP Abus Cable Failure Use PPE SW recovery ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW446279_DISABLE_FIX TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP HW446279 SMP Abus Cable Failure Disable HW fixes to rely on PPE SW recovery ENUM_ATTR_NAME_CUMULUS 0x13 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW430944 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW430944 Quaint Gate ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW417233 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Nimbus DD1, DD2.0, DD2.1, Cumulus DD1 only: HW417233 - Copy paste lsu bug ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_P9_NO_NDL_IOVALID TARGET_TYPE_PROC_CHIP Returns true if the chip has no NDL IOValid bits ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_DMI_MC_PLL_SCAN_BUCKETS TARGET_TYPE_PROC_CHIP Use nest buckets for mc_pll_bndy for cumulus ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_EARLYMODE_FIX TARGET_TYPE_PROC_CHIP Returns true if MPW2 bits should be set ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_CORE_TRACE_NOT_SCOMABLE TARGET_TYPE_PROC_CHIP Returns true if the core trace arrays are not dumpable via SCOM. Permanent erratum for all P9 chips, hence true for all. ENUM_ATTR_NAME_NIMBUS 0xAF EQUAL ATTR_CHIP_EC_FEATURE_TRCTRL_HAS_NO_RUN_BITS TARGET_TYPE_PROC_CHIP Returns true if the trace array TRCTRL registers do not have run, run_sticky and hold_run bits Nimbus EC 0x10 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_TEST1 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP Returns if a chip contains the TEST1 feature. True if either: Centaur EC 10 Cumulus EC greater than 30 ENUM_ATTR_NAME_CENTAUR 0x10 EQUAL ENUM_ATTR_NAME_CUMULUS 0x30 GREATER_THAN ATTR_CHIP_EC_FEATURE_TEST2 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP Returns if a chip contains the TEST2 feature. True if: Murano EC less than 20 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_FSI_GP_SHADOWS_OVERWRITE TARGET_TYPE_PROC_CHIP DD1 attribute for assigning flushvalues to root_ctrl and perv_ctrl registers. True if: Nimbus EC less than 20 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_N3_FLUSH_MODE TARGET_TYPE_PROC_CHIP DD1 update : Flush mode not initiated for N3. True if: Nimbus EC less than 20 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_VITL_CLOCK_GATING TARGET_TYPE_PROC_CHIP DD1 only: disable local clock gating VITAL. This is used by the procedure for p9_sbe_tp_chiplet_init1 and p9_Sbe_chiplet_reset. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_SDISN_SETUP TARGET_TYPE_PROC_CHIP Sdis_n set or clear : flushing LCBES condition woraround. True if: Nimbus EC less than 20 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_THREAD_REBALANCING TARGET_TYPE_PROC_CHIP Nimbus DD1 only: Thread rebalancing to lower SMT level not supported. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW407180 TARGET_TYPE_PROC_CHIP Apply Nimbus DD1 specific filter PLL settings ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW423532 TARGET_TYPE_PROC_CHIP Apply bgoffset m1 to filter PLLs ENUM_ATTR_NAME_NIMBUS 0x21 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW423535 TARGET_TYPE_PROC_CHIP Apply bandwidth updates to filter PLLs + OBUS Tank PLL ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW365079 TARGET_TYPE_PROC_CHIP DD1 only config, issue: HW365079 Planning on enabling it with an irritator. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW367017 TARGET_TYPE_PROC_CHIP HW367017 P9N DD1 Collision with scrubber correcting a CE and a castout operation, resulting in cache corruption Scrubbing off for DD2 as well, HW405443 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW393692 TARGET_TYPE_PROC_CHIP HW393692 - need to turn off NCU hardware checker (fir bit 2) for illegal tlbies/slbie formats for DD1. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW372146 TARGET_TYPE_PROC_CHIP HW372146 For turning off clock gating on nctlbsm ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW405413 TARGET_TYPE_PROC_CHIP HW405413 : NCU sends data out of order ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW328175 TARGET_TYPE_PROC_CHIP HW328175 : PB mode register does not reflect steady-state value of PB init ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW367321 TARGET_TYPE_PROC_CHIP HW367321 clock gating bug on err_rpt ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW254454 TARGET_TYPE_PROC_CHIP HW254454: In P9 DD1, DRAM_ABIST_DONE_DC is unused; SRAM_ABIST_DONE_DC is shared by sram and edram ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW375534 TARGET_TYPE_PROC_CHIP Max 24 64-byte read buffers (HW375534) ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW366248 TARGET_TYPE_PROC_CHIP FOR P9N DD1 Prefetch Limit needs to be scan init to 0 because SCOM is broken (HW366248) Always OR-ed with previous value. Essentially we can only set bits, not clear. So we want to scan init to 0. these are n1 n3 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW395756 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW395756 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW396288 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW396288 - Dispatch Serialize all mtmsrd ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW394497 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW394497 - Turn all mtfpscr/mffspcr ops Dispatch Serialize to enable speculative FPSCR. (HW374002) ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW394447_HW394186 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW394447 / HW394186 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW393129 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW393129 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW393318 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW393318 - Turn all decimal quad ops Dispatch Serialize. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW430539 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Nimbus DD2.X / Cumulus DD1.X - Enable tlbie hangbuster ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_DIS_241 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Nimbus DD1/DD2.0, Cumulus DD1.0: HW393547, HW413718 HW447773 - Fixed in Nimbus DD2.3 and Cumulus DD1.3 ENUM_ATTR_NAME_NIMBUS 0x22 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x12 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW447585_CDD13_NDD23 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW447585 - disable slbwalk - dials changed in CDD1.3+/NDD2.3+ ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x13 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW447585 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW447585 - disable slbwalk ENUM_ATTR_NAME_NIMBUS 0x22 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x12 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW447589 TARGET_TYPE_PROC_CHIP HW447589 - disable tlb_miss SDAR writes on mixed translation products - fixed on Nimbus DD2.3 ENUM_ATTR_NAME_NIMBUS 0x23 LESS_THAN ATTR_CHIP_EC_FEATURE_EMQ_DIS_TRACKER_ROUND2 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Disable tracker fix for CDD1.1+/NDD2.3+/ADD1.0+ ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_EMQ_DIS_TRACKER TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Nimbus DD1.0: HW393929 / HW394578 Nimbus DD2.0 / Cumulus DD1.0: HW416227 Nimbus DD2.1 / Nimbus DD2.2 / Cumulus DD1.1: HW425027 ENUM_ATTR_NAME_NIMBUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW425526_ROUND2 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Cumulus DD1.1+ / Nimbus 2.3+ - Undo fix ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW425526 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW425526 - Force H-Bit in the TLB ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_SW406970 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP SW406970 - SCOM clockgating issue ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW362088 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW362088 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW391334_HW391367 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW391334 / HW391367 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW387890 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW387890 NOTE: should be turned back off if LSU gets stuck in a cyclical ntc_plz loop. This switch was added in RITB as part of a large, multiple-fix solution for the cycling ntc_plz with DEFAULT=OFF. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW384613 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW384613 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW373955 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW373955 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW381889 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW381889 - Disable TM ROT mode ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW379315 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW379315 - Fix tiered hangbuster triggering ntc_plz ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW347876 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW347876 - default not correct ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_DISABLE_PAGE_WALK_CACHE_HITS TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW373955 - In Radix Mode: Page Walk Cache unsupported HW361596 / HW371500 / HW373955 - In SDR1 mode and UPRT=1 mode: Disable Page Walk Cache hits ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_RFC02491 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: DD1 Defer -ldmx not supported (i.e. Garbage Collection RFC02491) ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW359913_HW356752 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW359913 / HW356752 ltptr not supported - will be treated as an illegal instruction ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW364229 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW364229 - enb_reduce_spec mode, causes a tlbie hang ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW330187 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW330187 - Instruction Fusion not supported ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW371453 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW371453 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW379562_HW419742 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW379562 - Turn off store-forward to LQ Nimbus DD2.0/DD2.1, Cumulus DD1.0: HW419742 ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW443669 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW443669 ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x13 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW443982 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW443982 - Fixed in NDD2.3 and CDD1.3 ENUM_ATTR_NAME_NIMBUS 0x23 LESS_THAN ENUM_ATTR_NAME_CUMULUS 0x13 LESS_THAN ATTR_CHIP_EC_FEATURE_HW371047_HW415528_HW420575 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Nimbus DD1: HW371047 - TMDIR disabled due to multi-threaded issue. Nimbus DD2.0 / Cumulus DD1.0: HW415528 Nimbus DD2.1: HW420575 ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW416317 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW416317 ENUM_ATTR_NAME_NIMBUS 0x21 EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW373589 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW373589 - Reject 2nd of lqarx pair ops if they are on back-to-back cycles. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW373167 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW373167 - Problems with arbitrating between NTC and NTC+1 flush requests when one is recoverable and the other involves trechkpt. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW372808 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW372808 - TM hwsync does not wait on load ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW372208 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW372208 - larx missed bad dval ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW373137 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW373137 - Stop prefetch and invalidate erat collison causing erat multihits ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW371867 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW371867 - Performance enhancement that is too buggy to leave enabled ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW368478 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW368478 - S2Q clock gate has to be disabled ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW360131 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW360131 - POR value is an invalid combination and is not represented in the dial. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW404199 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Nimbus DD2.x / Cumulus DD1.x - HW404199 / HW422083 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW370085 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW370085 - IFU can send an erroneous 2nd "force miss" to the LSU on a shared translation, causing an unnecessary table walk. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW369677 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW369677 - Dynamic set delete not implemented ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW367863 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW367863 - Workaround when EAT thinks it's empty and IDU still reports that it's out of itags. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW365384 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW365384 - data prefetch clock gate needed ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW365576 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW365576 - Need to disable reset of LRQ deallocate bit ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW365510 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW365510 - TM merging in the LRQ not supported - disable with chicken switch ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_DISABLE_SPEC_STWCX TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Nimbus DD1.0 DD2.0, Cumulus DD1.0 HW353069 / HW358383 / HW358418 / HW358662 / HW358824 / HW363605 Not doing Performance: MB State - Need to disable speculative stwcx ENUM_ATTR_NAME_NIMBUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW363926 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW363926 - Workaround for clockgating bug for Local Very Good Mode (performance) ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW339090_HW354135 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW339090 / HW354135 - Branch flush performance ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW361821 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW361821 - Icache way prediction must be disabled for all SMT modes except SMT1 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW380199 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW380199 - L2 store reordering induced consistency bug Only set at safest risk level ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW399524 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW399524 disable functionality, can only be enabled on non-FP/VMX tests ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_SRAM_RELAXED_SETTINGS TARGET_TYPE_PROC_CHIP Nimbus DD1 only: adjust/relax SRAM timing parameters ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW369979 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW369979; Defer to DD2: [GRUB multi chiplet] l3_fir_reg_l3_hw_control_err L3 FIR bit 24 (mask control_err(2) by setting dial: err_rpt0_mask(2) to ON) ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW378093 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW378093; Defer to DD2: edram_info_capture_cfg defaults to wrong value ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW288205_HW392168 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW288205 (P8 CQ) : L3 PF Hang fix. Change behavior of L3 Prefetch Back-off mechanism HW392168 (P9 CQ) : This bug existed in P8 and was set to 0x4. The bug was not fixed ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW406803 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: HW406803 : bug with calculating home region for LCO's using wrong bit44 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW392009 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: Enable work around for HW392009 Auto Special Wakeup Disables [LMCR(12:13)]. Do not scan flush to 1s. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW377094 TARGET_TYPE_PROC_CHIP DD1 only: HW377094 L2 stq and ncu stq deadlock. g/ord_g causes artificial dependency between barrier and snptlbcmp in NCU while lfsr bits being reused in L2 stq causes entry to never be selected due to high priority ld-hit-st override. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW398015 TARGET_TYPE_PROC_CHIP DD1 only: HW398015 work around ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW396393 TARGET_TYPE_PROC_CHIP DD1 only: HW396393 rare TM fail condition. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW421347 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Nimbus DD2.1, Cumulus DD1.0 and older: HW421347 Scandalous Pie Core hang when going into re-cfg due to L3pref unfairness in L2 CIU between cores ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW374111 TARGET_TYPE_PROC_CHIP DD1 only: HW374111 snapshot doesn't work for domestic copy that hits the L2 cache. all 16 RC machines need to turn off clock gating ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW373819 TARGET_TYPE_PROC_CHIP DD1 only: HW373819 PEC SBCE could cause coherency problems when running in conjunction with copy/paste ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW370687 TARGET_TYPE_PROC_CHIP DD1 only: HW370687 xlate_addr_to_id clock gating bug ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW370692 TARGET_TYPE_PROC_CHIP DD1 only: HW370692 deadlock allowing snptlbcmp to pass around stcxf ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW394803 TARGET_TYPE_PROC_CHIP DD1 only: HW394803 - Fatal Venus: Critical section fail ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW370984 TARGET_TYPE_PROC_CHIP DD1 only: HW370984 - No wakeup from hypdbell to core 1 stopped in level 2 ESL=0 (SMT1 test) ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW376874 TARGET_TYPE_PROC_CHIP DD1 only: HW376874 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW319315 TARGET_TYPE_PROC_CHIP DD1 only: mask TFAC parity errors (HW319315) ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW385178 TARGET_TYPE_PROC_CHIP DD1 only: enable workarounds for HW385178 - Force SMT4 mode for Stop 1 and 2 SPR loss ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW393734 TARGET_TYPE_PROC_CHIP DD1 only: enable workarounds for HW393734 - Stop2 hang workaround ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW396520 TARGET_TYPE_PROC_CHIP DD1 only: enable workarounds for HW396520 (skip flushmode inhibit drop) ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW388878 TARGET_TYPE_PROC_CHIP DD1 only: enable workarounds for HW388878 (VCS) ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW376651 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: enable workarounds for HW376651 Masks ahash parity error checker to avoid FiR when running EX1 only configs ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW389511 TARGET_TYPE_PROC_CHIP DD1 only: enable workarounds for HW389511 (PPM Reg collision) ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW386013 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: enable workarounds for HW386013 in FBC initfile pb_cfg_cent_opt3_mode must be configured as an smp to allow vas data ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW407123 TARGET_TYPE_PROC_CHIP Nimbus DD1,DD2: enable workarounds for HW407123 in FBC initfile Slow down xlink cmd rate to work around broken single link credit dial that would have prevented rcmd overflows ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW424691 TARGET_TYPE_PROC_CHIP Cumulus DDx.x: enable workarounds for HW424691 in FBC initfile Set alink token inits via scan for p9c to avoid serial scom conflict ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW409019 TARGET_TYPE_PROC_CHIP Nimbus DD2.X: enable workarounds for HW409019 in FBC initfile Set single link credit workaround in numbus dd2.x, revert in p9c ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW418117 TARGET_TYPE_PROC_CHIP Nimbus DD2.1 and below: enable workarounds for HW418117 in FBC initfile Cumulus DD1.0: enable workarounds for HW418117 in FBC initfile Disable lpc_ed to prevent lw.rty_other in p9n dd2.1 and below, and in p9c dd1.0 revert in p9c dd1.1 and p9n dd2.2 ENUM_ATTR_NAME_NIMBUS 0x22 LESS_THAN ENUM_ATTR_NAME_CUMULUS 0x10 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_NMMU_NDD1 TARGET_TYPE_PROC_CHIP Configure NMMU for Nimbus DD1 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_NMMU_AX1_ISS768_FIX_DIS TARGET_TYPE_PROC_CHIP NMMU disables seg fault generation for radix access to DR=1, HV=1 with lpid !=0. ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_NMMU_PWC_DIS_DD2 TARGET_TYPE_PROC_CHIP PWC disable for DD2 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_NMMU_PDE_EN_DD2 TARGET_TYPE_PROC_CHIP Enabling PDE fix for dd2 only, not needed going forward ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ATTR_CHIP_EC_FEATURE_NMMU_NOT_ISS734 TARGET_TYPE_PROC_CHIP NMMU does not require application of issue734 fixes Issue734 exists on Nimbus dd2.1+ ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN ATTR_CHIP_EC_FEATURE_HW378025 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: enable workarounds for HW378025 in INT initfile Shared credits in ATX can only be updated when clockgate is disabled ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW930007 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: enable workarounds for HW930007 in INT initfile ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW372116 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: enable workarounds for HW372116 in INT initfile Remote Ld credit in PC should be set to zero to avoid ATX dropped commands ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW395947 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: enable workarounds for HW395947 in INT initfile Workaround for relaxed write ordering causing SBT entry corruption ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW408972 TARGET_TYPE_PROC_CHIP Nimbus DD1,DD2: enable workarounds for HW408972 in INT initfile Workaround for missing escalation bug with group interrupts ENUM_ATTR_NAME_NIMBUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_NOT_HW414702 TARGET_TYPE_PROC_CHIP Anything NOT Nimbus DD1: enable workarounds for HW414702 in INT initfile Workaround for clockgating bug with vpc at kill accessing bad data ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW425038 TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP HW425038 for INT initfile on Coral and Cumulus systems. Clockgate disable workaround for INT ARX timeout issue ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW438727 TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP Anything NDD20+,CDD10+,ADD10+: Disable clockgating to allow correct errors to be reported in ODL c_err_rpt and other error capture. Axone see: HW481539 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW426891 TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP HW426891 for INT initfile on Coral, Cumulus, and Axone systems for ship mode ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW397255 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: enable workaround for HW395947 Disable cross-chip MC sync propogation ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_PSI_HALF_SPEED TARGET_TYPE_PROC_CHIP Nimbus DD1 only: enable half speed PSI link operation due to relaxed chip timing closure ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_LPC_RESET_GPIO TARGET_TYPE_PROC_CHIP DD1 only: to do an LPC reset set the GPIO bits ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_PCIE_LOCK_PHASE_ROTATOR TARGET_TYPE_PROC_CHIP DD1.00 only: lock phase rotator ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_PCIE_DISABLE_FDDC TARGET_TYPE_PROC_CHIP DD1.01/DD1.02 only: disable DDC ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW393297 TARGET_TYPE_PROC_CHIP DD1 only: run XBUS at reduced frequency (14.4 instead of 16) to based on HW393297 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_SLOW_PCI_REF_CLOCK_ENABLE TARGET_TYPE_PROC_CHIP DD1 only: enable use of SS PLL to provide reduced frequency reference clock (94 MHz, instead of nominal 100 MHz) for PCI PLL ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_SW387041 TARGET_TYPE_PROC_CHIP DD1 only: restrict NVLINK frequency to 20gbs ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW396230 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: set L3/NCU skip group scope via scan only ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_DISABLE_64B_STORE> TARGET_TYPE_PROC_CHIP Nimbus DD1 only: don't set 64B store, dials didn't exist ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_DISABLE_TLBIE_PACING> TARGET_TYPE_PROC_CHIP Nimbus DD1 only: don't set tlbie pacing, dials didn't exist ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW408892 TARGET_TYPE_PROC_CHIP Nimbus DD1.X, DD2.0: Leave at default value of DIV_BY_10 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW405880_LCO_IN_RETENTION TARGET_TYPE_PROC_CHIP Nimbus DD1; set to 0b000 Numbus DD2+; set to 0b110 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW386657 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: set the optimal dial setups for LCO's via scan ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_PRE_CACHE_DD21_SETTINGS TARGET_TYPE_PROC_CHIP Not workaround or defect related. Just new dials to be set that are new in the caches for DD2. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_DISABLE_CP_ME TARGET_TYPE_PROC_CHIP Disable cp_me from the L3 for Nimbus DD1 and DD2.0 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_UNTUNED_LARX_STCX_PERF TARGET_TYPE_PROC_CHIP Nimbus DD1: Larx/stcx dials are non performance tuned ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_INCREASE_JITTER TARGET_TYPE_PROC_CHIP Cumulus DD1.0+ : increase the L2 re-request jitter for larger systems ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_NOT_HW409069 TARGET_TYPE_PROC_CHIP Nimbus DD2+: HW409069 load_larx protection not activated because of dtag_data_resp in hot lock load loop pvp test ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW383616 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: enable workaround for HW383616 Restrict GP/SP high water mark ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW384245 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: enable workaround for HW384245 Restrict TL DOB limit ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW388874 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: n3_br_fure is non-scannable ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW401184 TARGET_TYPE_PROC_CHIP Nimbus DD1: Silent Baron: TB and DEC SPRs stray apart with TOD enabled ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW401249 TARGET_TYPE_PROC_CHIP Nimbus DD1: mask EC local error from CC ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW397147 TARGET_TYPE_PROC_CHIP Nimbus DD1: Tired Grandpa -- CHKSW_DONT_PRIORITIZE_BRQ_MF ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW399388 TARGET_TYPE_PROC_CHIP Nimbus DD1: Intense Skunk -- CS_LOW_POWER_PRIORITY_MODE_DIS ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW399609 TARGET_TYPE_PROC_CHIP Nimbus DD1: Rich Starlight -- increase core hang limit to engage L2 random block gather LFSR ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW387254 TARGET_TYPE_PROC_CHIP Nimbus DD1: IMA interval timer overcounts based on missing edge detect ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW399919 TARGET_TYPE_PROC_CHIP Nimbus DD1: Major Queen ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW401811 TARGET_TYPE_PROC_CHIP Nimbus DD1: Silly Plutonium ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW400898 TARGET_TYPE_PROC_CHIP Nimbus DD1: Hungry Shark ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW416161 TARGET_TYPE_PROC_CHIP HW416161 - incomplete DD2.1 fix requires additional workaround ENUM_ATTR_NAME_NIMBUS 0x21 EQUAL ATTR_CHIP_EC_FEATURE_HW399765 TARGET_TYPE_PROC_CHIP Nimbus DD1: NCU AMO load ordering error ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW402145> TARGET_TYPE_PROC_CHIP Nimbus DD1: Husky Dinosaur ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW393578> TARGET_TYPE_PROC_CHIP Nimbus DD1: Red Snow ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW403075> TARGET_TYPE_PROC_CHIP Nimbus DD1: Icy Sapphire ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW399624> TARGET_TYPE_PROC_CHIP Nimbus DD1: Needy Kitten ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW405851> TARGET_TYPE_PROC_CHIP Nimbus DD1: Distant Supernova ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW403766> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW403766 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW405047> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW405047 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW405602> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW405602 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW405605> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW405605 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW405865> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW405865 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW406641> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW406641 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW406972> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW406972 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW407065> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW407065 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_PREVENT_Q0_HV_ACCESS> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Enable feature, preventing access to quadrant 0 in hypervisor mode when LPIDR != 0 ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_MIXED_CORE_XLATE> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Enable mixed core (HPT/Radix) translation ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW437820> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW437820 - LSU clockgating issue ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW407165> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW407165 ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ENUM_ATTR_NAME_NIMBUS 0x21 EQUAL ENUM_ATTR_NAME_NIMBUS 0x22 EQUAL ENUM_ATTR_NAME_CUMULUS 0x12 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW407165_DD23> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW407165 - Work around dial is renamed on Nimbus dd2.3 and Cumulus dd1.3 ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x13 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW408876> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW408876 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW408917> TARGET_TYPE_PROC_CHIP HW408917 ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ATTR_CHIP_EC_FEATURE_HW408988> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW408988 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW409270> TARGET_TYPE_PROC_CHIP HW409270 ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ATTR_CHIP_EC_FEATURE_HW431323> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW431323 ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW409365> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW409365 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW408891> TARGET_TYPE_PROC_CHIP Nimbus DD1.0 DD2.0 HW408891 - Recovery WAT ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW405021> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW405021 ENUM_ATTR_NAME_NIMBUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW409194> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW409194 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW407136> TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW407136 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW407385 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW407385 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW410389 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW410389 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW408901 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW408901 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW413799 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW413799 - ECC checking in SDKSMRF causes false failures ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW414370 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW414370 - TM atomicity failure ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW415857 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW415857 - Multiple marks can occur on CI ops - mask checker ENUM_ATTR_NAME_NIMBUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW422629 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW422629 - SETC clockgating issue with 2-for-1 ENUM_ATTR_NAME_NIMBUS 0x21 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW433125 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW433125 ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW414146 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW414146 - Nimbus DD2.x; affects pmu events and sier(30) ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW422533 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW422533 ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW417630 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW417630 - NDD2.2 / CDD1.1 ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW421831 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW421831 - ltptr hang issue ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW421426 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW421426 - SMT2 prefetch issue ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW499047 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW499047 - SMT2 prefetch issue ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW420860 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW420860 - Serialize lqarx ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_SERIALIZE_INDIRECT_BRANCHES_RL TARGET_TYPE_PROC_CHIP Serialize indirect branches using risklevel ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_SERIALIZE_INDIRECT_BRANCHES TARGET_TYPE_PROC_CHIP Serialize indirect branches ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_SERIALIZE_LTPTR TARGET_TYPE_PROC_CHIP Serialize LTPTR ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_CORE_CDD11_SECURITY TARGET_TYPE_PROC_CHIP Security settings for Cumulus DD1.1 ENUM_ATTR_NAME_CUMULUS 0x11 EQUAL ATTR_CHIP_EC_FEATURE_CORE_CDD12_CDD13_SECURITY TARGET_TYPE_PROC_CHIP Security settings for Cumulus DD1.2 and DD1.3 ENUM_ATTR_NAME_CUMULUS 0x12 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_CORE_CDD12_SECURITY TARGET_TYPE_PROC_CHIP Security settings for Cumulus DD1.2 ENUM_ATTR_NAME_CUMULUS 0x12 EQUAL ATTR_CHIP_EC_FEATURE_CORE_CDD13_NDD23_ADDXX_SECURITY TARGET_TYPE_PROC_CHIP Security settings for Cumulus DD1.3, Nimbus DD2.3, and Axone DDX.X ENUM_ATTR_NAME_NIMBUS 0x23 EQUAL ENUM_ATTR_NAME_CUMULUS 0x13 EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_CORE_ADDXX_SECURITY TARGET_TYPE_PROC_CHIP Security settings for Axone DDX.X ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_CORE_CDD11_CDD12_SECURITY TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Security settings for Cumulus DD1.1 and DD1.2 ENUM_ATTR_NAME_CUMULUS 0x11 EQUAL ENUM_ATTR_NAME_CUMULUS 0x12 EQUAL ATTR_CHIP_EC_FEATURE_CORE_COMPATIBILITY_MODE TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP True if the chip supports a compatibility mode ENUM_ATTR_NAME_NIMBUS 0x23 EQUAL ENUM_ATTR_NAME_CUMULUS 0x13 EQUAL ATTR_CHIP_EC_FEATURE_CORE_CDD13_COMPATIBILITY TARGET_TYPE_PROC_CHIP Used to revert Cumulus DD1.3 back to Cumulus DD1.2 inits ENUM_ATTR_NAME_CUMULUS 0x13 EQUAL ATTR_CHIP_EC_FEATURE_CORE_NDD23_COMPATIBILITY TARGET_TYPE_PROC_CHIP Used to revert Nimbus DD2.3 back to Nimbus DD2.2 inits ENUM_ATTR_NAME_NIMBUS 0x23 EQUAL ATTR_CHIP_EC_FEATURE_CORE_AXONE_PVR TARGET_TYPE_PROC_CHIP Used to correct the PVR Version for Axone chips ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_CORE_SMF_SETUP TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Core inits for enabling secure memory facility ENUM_ATTR_NAME_NIMBUS 0x23 EQUAL ENUM_ATTR_NAME_CUMULUS 0x13 EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_CORE_SMF_SETUP_RL TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Core inits for enabling secure memory facility by risk level Only enabled on risk level 4 and 5 for Nimbus 2.3 and Cumulus 1.3 ENUM_ATTR_NAME_NIMBUS 0x23 EQUAL ENUM_ATTR_NAME_CUMULUS 0x13 EQUAL ATTR_CHIP_EC_FEATURE_CORE_NDD23_CDD11_LOGIC TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Logic that only exist for NDD23+, CDD11+ ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_CORE_NDD23_CDD12_LOGIC TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Logic that only exist for NDD23+, CDD12+, ADD10+ ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x12 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_CORE_NDD23_CDD13_LOGIC TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Logic that only exist for NDD23+, CDD13+ ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x13 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW439303 TARGET_TYPE_PROC_CHIP HW439303 - CDD1.2 only ENUM_ATTR_NAME_CUMULUS 0x12 EQUAL ATTR_CHIP_EC_FEATURE_HW426554 TARGET_TYPE_PROC_CHIP HW426554 ENUM_ATTR_NAME_CUMULUS 0x11 EQUAL ATTR_CHIP_EC_FEATURE_HW435395 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP LTPTR issue ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_DIS_PATTERN_CACHE_RL TARGET_TYPE_PROC_CHIP Disable Pattern Cache at risklevel=0 for Nimbus DD2.2 and Nimbus DD2.3 compatibility Also disable for all Nimbus DD2.3 native modes ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_DIS_PATTERN_CACHE TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Disable Pattern Cache globally for Cumulus and Axone ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_DIS_COUNT_CACHE TARGET_TYPE_PROC_CHIP Disable Count Cache ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW415883_HW471413 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW415883, HW471413 - disable erat thread sharing ENUM_ATTR_NAME_NIMBUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW420948 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW420948 - SRQ/S2Q issue ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW414597 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW414597 - ISU clockgating bug concerning PMU events ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW415480 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW415480 - PMU Overflow exception issue ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW415236 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW415236 - ISU flush restore problem ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW407187 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW407187 - Serialize mttb ENUM_ATTR_NAME_NIMBUS 0x22 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW417577 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW417577 - PRQ clockgating issue ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW420130 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW420130 - Flush restore bug ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW415988 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW415988 - Ucon state machine is not currently POR for P9 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW415114 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW415114 - Disable zombie stores ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW415013 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW415013 - IFU branch issue ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW414384 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW414384 - ISU recovery timeout workaround ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW413853 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW413853 - Issue with FPSCR sticky bits ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW413917 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW413917 - Clock gating 241 issue ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW414249 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW414249 - Workaround for orphans causing SLB multihits ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW414375 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW414375 - DDIR false parity error issue ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW414829 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW414829 - Disable hotlocks ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW418789 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW418789 - Performance enhancement for balance flush ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW419618 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW419618 - Disable store data early wakeup ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW419642 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW419642 - ntc_plz should not reset PC hang pulse counter ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW418850 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW418850 - Disable LHL in SMT1 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW417829 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW417829 / HW423787 - Bad rfscv branch, NDD1.0,2.0,2.1, CDD1.0 HW432070 Angry Reindeer - NDD2.2, CDD1.1 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW417242 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW417242 - Software hang on TM HB Full ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW417734 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW417734 - NTC_FLUSH_PENDING_IN_RAM during thread reconfig ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW414871 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW414871 - TLBIE hang workaround ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW418738 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW418738 - S2Q clockgating issue ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW408629 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP HW408629 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW395939 TARGET_TYPE_PROC_CHIP For DD1, VAS has no BAR disable bit. Adding attribute to enable non zero init for the MMIO BARs. Issue HW395939 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_P9N_NX_DD1 TARGET_TYPE_PROC_CHIP Returns true if dd1. Less than Nimbus ec 0x20 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW403701 TARGET_TYPE_PROC_CHIP Nimbus DD1: Reduce rng pace from 2000->300 to work around grant unfairness ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW406130 TARGET_TYPE_PROC_CHIP Nimbus DD1: Reduce number of active DMA read requests down from 16->8 to work around erat access count bug ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW401552 TARGET_TYPE_PROC_CHIP Nimbus DD1: Workaround clockgating bug with APC machines missing deassert ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW403585> TARGET_TYPE_PROC_CHIP Nimbus DD1: Treacherous Dolphin ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW402019_PIBRESET_DELAY TARGET_TYPE_PROC_CHIP Nimbus DD1 only: Adding delay to wait for pibreset to complete ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_NDD1_ABIST_PARALLEL TARGET_TYPE_PROC_CHIP Nimbus DD1: set ABIST engines to PARALLEL mode. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_SETUP_BARS_NPU_DD1_ADDR TARGET_TYPE_PROC_CHIP DD1 only: Use the DD1 register addresses for the PHY0 BAR registers, PHY1 BAR registers, and MMIO BAR registers ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_SETUP_BARS_NPU_AXONE_ADDR TARGET_TYPE_PROC_CHIP Axone only: Use the Axone register addresses for the PHY0 BAR registers, PHY1 BAR registers, and MMIO BAR registers ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_SKEWADJ_P9NDD1_INIT TARGET_TYPE_PROC_CHIP Inits for skewAdj in P9 ndd1. These are different from the default inits used starting in NDD2. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_DCADJ_P9NDD1_INIT TARGET_TYPE_PROC_CHIP Inits for dutyCycleAdj in P9 ndd1. These are different from the default inits used starting in NDD2. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW397129> TARGET_TYPE_PROC_CHIP Attribute for if we need a workaround for re-enabling the MC fastpath since on Nimbus DD1 is gets disabled. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_MSS_HW392781_RDARRAY_CLKGATE TARGET_TYPE_PROC_CHIP Data integrity issue requires us to disable clockgate in read array for Nimbus DD1.0 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW400075 TARGET_TYPE_PROC_CHIP Addresses issue where MDI bit was getting wrong values with threadmill and transactional data resulting in coherency issues. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW398139 TARGET_TYPE_PROC_CHIP Avoid powerbus early hangs by enabling prefetch drops to break out of fairness issue with prefetch ops ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW400932 TARGET_TYPE_PROC_CHIP ATAG info corruption on presp issue requires us to disable clockgate for Nimbus DD1.0 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW401780 TARGET_TYPE_PROC_CHIP Need AMO caching disabled for multiple defects until Nimbus DD2.0 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW406577 TARGET_TYPE_PROC_CHIP Noise window disabled in DD1 because continually reocurring intermittent UE's can cause us to hang on refreshes. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW391162 TARGET_TYPE_PROC_CHIP Nimbus DD1 only: spoof pb_init in cache contained mode Enables L2 checkers to monitor for transactions arbitrating to broadcast onto the fabric ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_SCAN_SICR_TLBIE_QUIESCE TARGET_TYPE_PROC_CHIP Nimbus DD1 only: scan ON NCU_TLBIE_QUISCE fence for non-cache contained modes. Flush state corrected in HW for future revisions ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_BLOCK_REG_WAKEUP_DISABLE TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Nimbus DD2.2 / Cumulus DD1.1 - There is better fencing on the block wakeup signal from the core ppm, so the CME logic thinks it needs to block interrupts to PC. This sets an override to ignore the fenced off signal ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_CXA_P9NDD1_SPY_NAMES TARGET_TYPE_PROC_CHIP Use Nimbus DD1 CXA spy register definition names ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_OBUS_P9NDD1_SPY_NAMES TARGET_TYPE_PROC_CHIP Use Nimbus DD1 Obus spy register definition names ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_DDRPHY_P9NDD1_SPY_NAMES TARGET_TYPE_PROC_CHIP Use Nimbus DD1 DDR PHY spy register definition names ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_MCA_P9NDD1_ASYNC TARGET_TYPE_PROC_CHIP Program MCA ECC logic to support Nimbus DD1 asynchronus boundary crossing requirements ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_CORE_P9NDD1 TARGET_TYPE_PROC_CHIP Nimbus DD1 core spy behavior qualifier ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW363246 TARGET_TYPE_PROC_CHIP Nimbus DD1 only -- PCI Nest stack error report registers cannot be cleared ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW414759 TARGET_TYPE_PROC_CHIP Nimbus DD2.0 only -- apply PCI PLL and VGA gain EDGEMOD workarounds to enable GEN4 operation ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ATTR_CHIP_EC_FEATURE_HW414700 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Nimbus DD2.0, Cumulus DD1.0 -- set all UE FIRs to checkstop ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW415692 TARGET_TYPE_PROC_CHIP Nimbus DD[12] -- XB PLL lock reporting is unreliable based on unused x0 instance ENUM_ATTR_NAME_NIMBUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW410503 TARGET_TYPE_PROC_CHIP Cache Inject Throttle settings for Nimbus DD2.1 and Cumulus 1.0 to help with remote cache inject performance. ENUM_ATTR_NAME_NIMBUS 0x21 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_MCBIST_END_OF_RANK TARGET_TYPE_PROC_CHIP MCBIST has a bug where it won't detect the end of a rank properly for a 1R DIMM during super-fast read. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_MSS_WAT_DEBUG_ATTN TARGET_TYPE_PROC_CHIP WAT Debug Attention work-around for Nimbus DD1.0 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_MSS_NIMBUS_EC_LESS_THAN_TWO_OH TARGET_TYPE_PROC_CHIP Attribute used only for memory subsystem procedures. Tells us whether the chip EC we're running on is less than 2.0 and we're on a Nimbus ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_MSS_WR_VREF TARGET_TYPE_PROC_CHIP In DD1 Nimbus in the WR VREF algorithm, certain work-arounds are needed ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_DCD_WORKAROUND TARGET_TYPE_PROC_CHIP In DD1 Nimbus, the sofware DCD calibration needs to be run, as it does not exist in HW ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_MSS_DQS_POLARITY TARGET_TYPE_PROC_CHIP For Monza DDR port 2, one pair of DQS P/N is swapped polarity. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_MSS_VREF_DAC TARGET_TYPE_PROC_CHIP VREF DAC work-around for Nimbus DD1.0 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_MSS_TRAINING_BAD_BITS TARGET_TYPE_PROC_CHIP For Nimbus pre DD1.02 we want to pass DDR training if we see 'correctable' errors. This isn't the case for post-DD1.02 where we want to pass/fail training based on the results from the PHY itself ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_MSS_CHECK_DISABLE_HW_VREF_CAL TARGET_TYPE_PROC_CHIP In below DD2 Nimbus, the HW VREF calibration needs to be checked against the chip subversion to see if it can be run. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_MSS_RUN_RD_CTR_WORKAROUND TARGET_TYPE_PROC_CHIP In below DD2 Nimbus, a workaround after read centering might need to be run. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_MSS_ODT_CONFIG TARGET_TYPE_PROC_CHIP For Nimbus pre DD2.** we need to swap ODT2 and ODT3 values in the DDRPHY_SEQ_ODT_RD/WR_CONFIG registers due to a PHY erratum. Post DD2.** will have a hardware enabled fix for this (HW389360). ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_MSS_BLUE_WATERFALL_ADJUST TARGET_TYPE_PROC_CHIP In DD1.** Nimbus, the blue waterfall can calibrate to an incorrect value. In DD2 Nimbus, This isn't the case as the HW will not allow this calibration value ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_MSS_RED_WATERFALL_ADJUST TARGET_TYPE_PROC_CHIP In DD2.** Nimbus, We adjust the red waterfall to account for low VDN settings. We move the waterfall forward by one ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_MSS_CHECK_DIABLE_RD_VREF_CAL_VREFSENSE TARGET_TYPE_PROC_CHIP In below DD2 Nimbus, the RD VREF cal VREF sense needs to be checked against the chip subversion to see if it should be run. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_MSS_RUN_DQS_LOOP TARGET_TYPE_PROC_CHIP In DD1.** Nimbus, if we get a DQS fail from DQS_ALIGN in draminit_training, we rerun DQS_ALIGN for the failing bit for a set number of times or until it passed ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_MSS_PERIODICS TARGET_TYPE_PROC_CHIP For Nimbus DD1.** turn off periodics by default (zqcal and memcal). For Nimbus DD2.** it will be attribute driven without any restrictions. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_DISABLE_NPU_FREEZE TARGET_TYPE_PROC_CHIP True if NPU freeze (unit checkstop) should be disabled ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW411637 TARGET_TYPE_PROC_CHIP Mask INT SUE FIR bit for Nimbus DD2.0 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_NOT_HW399276 TARGET_TYPE_PROC_CHIP True if chip does not comtain HW399276 defect ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW407064 TARGET_TYPE_PROC_CHIP Enable DP16 delay line tap point for DD2 and beyond ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW368644 TARGET_TYPE_PROC_CHIP Register init for nimbus DD1 that is not necessary for DD2 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW384794 TARGET_TYPE_PROC_CHIP Workaround for defect where clock enables to PHY were incorrectly driven ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW375732 TARGET_TYPE_PROC_CHIP Workaround for Data mismatch discovered by Geyzer at certain async frequency ratios ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW411339 TARGET_TYPE_PROC_CHIP Workaround for supporting memory to nest frequency ratios greater than 1.33 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_RNG_ADAPTEST_SETTINGS TARGET_TYPE_PROC_CHIP The Random number generator has different settings in dd1 and dd2 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW389045 TARGET_TYPE_PROC_CHIP Nimbus DD1: Update the TSEL shadow copy by scanning as it't not connected to the SCOM reg. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW401131 TARGET_TYPE_PROC_CHIP Since amo cache clean line disabled for dd2, fix for HW401131 must also be disabled. ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_RING_SAVE_MPIPL TARGET_TYPE_PROC_CHIP For Nimbus DD2 we no longer need a workaround for Ring Save in MPIPL ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC TARGET_TYPE_PROC_CHIP Program MCA ECC logic to support Cumulus DD1.1 asynchronus boundary crossing requirements ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW423533_P9UDD11_MDI TARGET_TYPE_PROC_CHIP Program MCU to support standard MDI behavior for Cumulus DD1.1 allowing for MDI to be 0 in the system for local operations. ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW430546_P9UDD10_WARLIKE_PARASITE TARGET_TYPE_PROC_CHIP Reduce available channel tags for shadow machine usage to prevent tag overrun due to pathalogical bug. ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW404176_ASSERT_SCAN_CLK TARGET_TYPE_PROC_CHIP Cumulus only: MC chiplet requires scan clock in even cycle instead of odd ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW406337 TARGET_TYPE_PROC_CHIP Cumulus and Axone only: dropping MC chiplet fence during arrayinit ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW399466 TARGET_TYPE_PROC_CHIP Enable fix for HW399466 where all read data for amo smi ops is sent to rmw buffer. ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW418091 TARGET_TYPE_PROC_CHIP Adjust FRTL latency overflow check for HW418091 ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW355538 TARGET_TYPE_PROC_CHIP Enable fix for HW355538 that enables write MDI to 1 for retry UE. ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_NEW_MC_DD2_SETTINGS TARGET_TYPE_PROC_CHIP Not workaround or defect related. Just new dials to be set that are new in memory controller for DD2. ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_WOF_NOT_SUPPORTED TARGET_TYPE_PROC_CHIP Work Load Optimized Frequency non-support in manufacturing. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_VDM_NOT_SUPPORTED TARGET_TYPE_PROC_CHIP Voltage Droop Monitor non-support in manufacturing. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_VDM_POUNDW_SUPPRESS_ERROR TARGET_TYPE_PROC_CHIP Voltage Droop Monitors errors in #W should suppress error logs to ride through VDM disablement. Applies to Turbo Large Threshold check only. ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN ATTR_CHIP_EC_FEATURE_DD1_ANALOG TARGET_TYPE_PROC_CHIP DD1 update : Scan init VDM and IVRM latch workarounds. True if: Nimbus EC less than 20 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_DD1_DPLL_SETTINGS TARGET_TYPE_PROC_CHIP DD1 update : Scan init DPL Jump Values (SCOMMABLE in DD2). True if: Nimbus EC less than 20 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_P9N_INT_DD10 TARGET_TYPE_PROC_CHIP Common Attribute for INT DD10 spys ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_P9N_INT_DD20 TARGET_TYPE_PROC_CHIP Common Attribute for INT DD20 spys ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ATTR_CHIP_EC_FEATURE_P9N_INT_DD21 TARGET_TYPE_PROC_CHIP Common Attribute for INT DD21+ spys ENUM_ATTR_NAME_NIMBUS 0x21 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_DD1_FBC_SETTINGS TARGET_TYPE_PROC_CHIP DD1 FBC setting differs from DD2, ex. lo_limit adjustment. True if: Nimbus EC less than 20 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_AXONE_FBC_SETTINGS TARGET_TYPE_PROC_CHIP Fabric settings that are in Axone only ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW412371 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Workaround for HW412371 wrong lane getting trained in 11 lane mode. fixed in p9c dd1.1 Cumulus EC greater than 10 ENUM_ATTR_NAME_NIMBUS 0x10 GREATER_THAN ENUM_ATTR_NAME_CUMULUS 0x10 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_P9C_LOGIC_ONLY TARGET_TYPE_PROC_CHIP Returns true if spy name has usage only in P9C. Spy Name of Cumulus; Also used for cumulus only oscswitch settings. ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_SMF_SUPPORTED TARGET_TYPE_PROC_CHIP Returns true if secure memory is supported in chip design. ENUM_ATTR_NAME_NIMBUS 0x22 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x12 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_P9A_LOGIC_ONLY TARGET_TYPE_PROC_CHIP Returns true if spy name has usage only in P9A. ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_P9A_STOPCLOCKS TARGET_TYPE_PROC_CHIP Returns true if stopclocks function usage is for Axone chip ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_IOF0PLL_INITF TARGET_TYPE_PROC_CHIP Cumulus and Axone only: IOF0PLL initf ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_IOO1_IOO2_PLL_INITF TARGET_TYPE_PROC_CHIP Cumulus and Axone only: IOO1 and IOO2 PLL initf ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_EXTRACT_SBE_RC_P9NDD1_CHIPS TARGET_TYPE_PROC_CHIP Use to detect Nimbus DD1 chips in p9_extract_sbe_rc procedure ENUM_ATTR_NAME_NIMBUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_NO_GPTR_SUPPORT_VIA_MVPD TARGET_TYPE_PROC_CHIP GPTR support through MVPD is available in Nimbus DD2 and Cumulus and will NOT be if Nimbus DD1. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_POUNDV_VALIDATE_DISABLE TARGET_TYPE_PROC_CHIP Disables the checking of #V validity by p9_pstate_parameter_block. If not disable, invalid #V will fail to IPL. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW415945 TARGET_TYPE_PROC_CHIP Magenta Oatmeal -- disable ECC bypass ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_OBUS_HW419305 TARGET_TYPE_PROC_CHIP IO setting updates from lab findings Settings invalid for Nim DD1 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_HW410625> TARGET_TYPE_PROC_CHIP Nimbus DD1/DD2: NPU issues bkill instead of bkill_inc - misses shared copy in multi-group config. ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN ATTR_CHIP_EC_FEATURE_HW426816> TARGET_TYPE_PROC_CHIP Nimbus DD2.0-DD2.2/Cumulus DD1.0-DD1.1: CQ_SM allocation: Simultaneous free+allocate at the low water mark causes incorrect increment of reserved counter. ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW407330_DD2> TARGET_TYPE_PROC_CHIP Nimbus DD1/DD2: State Latches for Atomic CAS during ntl fence don't get reset. ENUM_ATTR_NAME_NIMBUS 0x20 EQUAL ATTR_CHIP_EC_FEATURE_HW407330_DD1> TARGET_TYPE_PROC_CHIP Nimbus DD1/DD2: State Latches for Atomic CAS during ntl fence don't get reset. ENUM_ATTR_NAME_NIMBUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW364887> TARGET_TYPE_PROC_CHIP Nimbus DD1: Data before Rcmd causes state machine to get stuck in wait-for-data state. ENUM_ATTR_NAME_NIMBUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW372457> TARGET_TYPE_PROC_CHIP Nimbus DD1: Probe Blocked Forever ENUM_ATTR_NAME_NIMBUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW419022> TARGET_TYPE_PROC_CHIP Cumulus DD1: Use alternate training sequence to establish OBUS fabric DL layer to avoid HW419022 ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW404391_SCAN TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP Nimbus DD2.1+: Workaround glxmux xstate issue by adjusting scan flush state of selected latches in NVDL and PHY logic ENUM_ATTR_NAME_NIMBUS 0x21 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW404391_SCAN_OB12 TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP Nimbus DD2.1+: Workaround glxmux xstate issue by adjusting scan flush state of selected latches in NVDL and PHY logic ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW404391_SCOM> TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP Nimbus DD2.0: Workaround glxmux xstate issue by applying SCOM sequence ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_EXTENDED_ADDRESSING_MODE> TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP Defines chip HW support for extended addressing mode ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW423589_OPTION2> TARGET_TYPE_PROC_CHIP Enable extended addressing mode to workaround MCD coherency issue HW423589. EC update will prevent application on any system. ENUM_ATTR_NAME_NIMBUS 0xAF EQUAL ATTR_CHIP_EC_FEATURE_HW423589_OPTION1 TARGET_TYPE_PROC_CHIP Disable MCD to workaround coherency issue HW423589 ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW437173 TARGET_TYPE_PROC_CHIP Limit NPU DCP0 credits advertised to an OpenCAPI AFU to 126. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW419021> TARGET_TYPE_PROC_CHIP Disable read data delay for Cumulus DD1.0 ENUM_ATTR_NAME_CUMULUS 0x10 EQUAL ATTR_CHIP_EC_FEATURE_HW422471 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Used in conjunction with ATTR_IO_O_CHANNEL_TYPE ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN ENUM_ATTR_NAME_CUMULUS 0x11 LESS_THAN ATTR_CHIP_EC_FEATURE_HW422471_HW446964 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP Used in conjunction with ATTR_IO_O_CHANNEL_TYPE ENUM_ATTR_NAME_NIMBUS 0x21 LESS_THAN ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_P9A_SBE_REGION TARGET_TYPE_PROC_CHIP New Region came in TP for Axone chip ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW414958 TARGET_TYPE_PROC_CHIP Disabling speculative dcbf* ttypes. ENUM_ATTR_NAME_NIMBUS 0x10 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_TLBIE_WAT TARGET_TYPE_PROC_CHIP Enable TLBIE WAT ENUM_ATTR_NAME_CUMULUS 0x12 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_TLBIE_WAT_5 TARGET_TYPE_PROC_CHIP HW483672: Enable TLBIE WAT (version 5); fixes unintended flushing Dials needed in addition to the original tlbie wat implementation to fix unintended flushing behavior induced by the original wat. Apply to native Cumulus DD1.3 risk levels only. ENUM_ATTR_NAME_CUMULUS 0x13 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW440920 TARGET_TYPE_PROC_CHIP Revert to ordered ("p8") TLBIE mode, disable NMMU snoop of TLBIE. ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW440920_DISABLE_FIX TARGET_TYPE_PROC_CHIP HW fixes for HW440920 are present in chip logic, but revert to ordered ("p8") TLBIE mode, disable NMMU snoop of TLBIE. disable nest TLBIE changes ENUM_ATTR_NAME_CUMULUS 0x13 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW446453 TARGET_TYPE_PROC_CHIP NCU HW contains design change to address HW446453 ENUM_ATTR_NAME_CUMULUS 0x13 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW477626 TARGET_TYPE_PROC_CHIP HW477626 Dangerous Elk: Enable L2 reservation protection for performance ENUM_ATTR_NAME_CUMULUS 0x12 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_SS_FPLL_SPREAD TARGET_TYPE_PROC_CHIP Generate 0.2% down spread in SS Filter PLL ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_SW430383 TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP Revert PCI store thread based ordering mode for SW430383 ENUM_ATTR_NAME_CUMULUS 0x11 GREATER_THAN_OR_EQUAL ENUM_ATTR_NAME_NIMBUS 0x23 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_AXONE_SW430383 TARGET_TYPE_PROC_CHIP Revert PCI store thread based ordering mode for SW430383 ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_CORE_RECOVERY_WA TARGET_TYPE_PROC_CHIP Unmask L2 FIR bit 39 to serve as PRD signalling mechanism for core recovery ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_SW432374 TARGET_TYPE_PROC_CHIP Configure pervasive FIR setup to expose PCI osc switch events ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_SW442771 TARGET_TYPE_PROC_CHIP Adjust scan flush state of NV DL logic to deassert recal abort ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW439321_FIXED_IN_P9UDD13 TARGET_TYPE_PROC_CHIP Disable RMW10 Hangbuster workaround in dd1.3 because of hardware fix ENUM_ATTR_NAME_CUMULUS 0x13 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW467590 TARGET_TYPE_PROC_CHIP Enable MC WAT to inject stalls into Read Queue when Atomic Read Modify Write Fetch operations request read buffer access. This produces a gap to allow the operation to complete. ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW461448 TARGET_TYPE_PROC_CHIP Enable MC WAT to hold off incoming commands to the memory controller after a certain fullness level. Currently configured to hold off for 75 counts after reaching 16 entries in the write buffers. This will allow existing entries in queue to make forward progress before commiting more into the queues. ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_SYNC_SS_PLL_SPREAD TARGET_TYPE_PROC_CHIP Use TOD to synchronize SS filter PLL spreading across system ENUM_ATTR_NAME_AXONE 0xAF EQUAL ATTR_CHIP_EC_FEATURE_HW403111 TARGET_TYPE_PROC_CHIP mtspr URMOR, rX will add the PPC instruction text to the Rx value ENUM_ATTR_NAME_NIMBUS 0x22 LESS_THAN_OR_EQUAL ENUM_ATTR_NAME_CUMULUS 0x13 LESS_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_US_TEMPLATES_0159 TARGET_TYPE_PROC_CHIP The processor only supports upstream OMI tempaltes 0, 1, 5, and 9. ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_DS_TEMPLATES_0147 TARGET_TYPE_PROC_CHIP The processor only supports downstream OMI tempaltes 0, 1, 4, and 7. ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_PIBMEM_REPAIR_AXONE TARGET_TYPE_PROC_CHIP Defines the ec level where pibmem repair is supported for Axone. ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_MEMORY_DIRECT_ATTACHED TARGET_TYPE_PROC_CHIP The processor supports direct attached memory via DDR interface ENUM_ATTR_NAME_NIMBUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_MEMORY_DMI_ATTACHED TARGET_TYPE_PROC_CHIP The processor supports memory attached via Centaur memory buffer chip. DMI connection links processor and Centaur chips. ENUM_ATTR_NAME_CUMULUS 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_OMI TARGET_TYPE_PROC_CHIP Chip uses OpenCAPI Memory Interface ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_HW476692 TARGET_TYPE_PROC_CHIP HW476692 ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_AXONE_GEMINI_OVERRUN TARGET_TYPE_PROC_CHIP Setup Memory controller to hold back too many operations from being passed to Gemini ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_AXONE_MMU TARGET_TYPE_PROC_CHIP Bumpy Toothpaste fix not enabled in Axone ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_AXONE_HW441771 TARGET_TYPE_PROC_CHIP Bumpy Toothpaste fix not enabled in Axone ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_OMI_DL_X4_BACKOFF_ENABLE TARGET_TYPE_OCMB_CHIP The DL half width backoff enable bit in DL_CONFIG0_CFG (bit 47) ENUM_ATTR_NAME_EXPLORER 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_GEMINI_MENTERP_WORKAROUND TARGET_TYPE_OCMB_CHIP Bypass MENTERP register read/writes on gemini due to FW bug ENUM_ATTR_NAME_GEMINI 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_AXONE_GEMINI_MDI_ERROR TARGET_TYPE_OCMB_CHIP Setup Memory controller to always deliver MDI=1 by default due to Gemini bug ENUM_ATTR_NAME_GEMINI 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_GEMINI_OMI_SETUP_CONFIG_WORKAROUND TARGET_TYPE_OCMB_CHIP Setup config registers for gemini in exp_omi_setup ENUM_ATTR_NAME_GEMINI 0x10 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_AXONE_HW476620 TARGET_TYPE_PROC_CHIP Sim fail defect number HW476620 ENUM_ATTR_NAME_AXONE 0x10 GREATER_THAN_OR_EQUAL