/* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ /* $Source: chips/p9/procedures/hwp/nest/p9_pcie_config.H $ */ /* */ /* IBM CONFIDENTIAL */ /* */ /* EKB Project */ /* */ /* COPYRIGHT 2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ /* The source code for this program is not published or otherwise */ /* divested of its trade secrets, irrespective of what has been */ /* deposited with the U.S. Copyright Office. */ /* */ /* IBM_PROLOG_END_TAG */ //----------------------------------------------------------------------------------- /// /// @file p9_pcie_config.H /// @brief Perform PCIE Phase2 init sequence (FAPI2) /// // *HWP HWP Owner: Christina Graves clgraves@us.ibm.com // *HWP FW Owner: Thi Tran thi@us.ibm.com // *HWP Team: Nest // *HWP Level: 1 // *HWP Consumed by: HB #ifndef _P9_PCIE_CONFIG_H_ #define _P9_PCIE_CONFIG_H_ //----------------------------------------------------------------------------------- // Includes //----------------------------------------------------------------------------------- #include //----------------------------------------------------------------------------------- // Structure definitions //----------------------------------------------------------------------------------- //function pointer typedef definition for HWP call support typedef fapi2::ReturnCode (*p9_pcie_config_FP_t) (const fapi2::Target&); //----------------------------------------------------------------------------------- // Constant definitions //----------------------------------------------------------------------------------- extern "C" { //----------------------------------------------------------------------------------- // Function prototype //----------------------------------------------------------------------------------- /// @brief Perform PCIE Phase2 init sequence /// @param[in] i_target => P9 chip target /// @return FAPI_RC_SUCCESS if the setup completes successfully, // fapi2::ReturnCode p9_pcie_config(const fapi2::Target& i_target); } //extern"C" #endif //_P9_PCIE_CONFIG_H_