#  Joe's initfile reference page:
#  https://w3-connections.ibm.com/wikis/home?lang=en-us#!/wiki/W9dc674bd1c19_432e_9f66_0e8b6ce7195f/page/P9%20Initfile%20Strategy%20%26%20Execution
#  http://ausxgsatm2.austin.ibm.com/gsa/home/j/m/jmcgill/web/public/p8/initfiles/mba_def.initfile

#--******************************************************************************
#-- ISSUES TO RESOVLE
#--******************************************************************************
#
#--******************************************************************************
#-- REFERENCES FOR FILE
#--******************************************************************************
# Files used to check what target type attributes are
#      MCS 
#           /gsa/ausgsa/home/s/l/sleung/ekb/ekb/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
#           /gsa/ausgsa/home/s/l/sleung/ekb/ekb/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml
#      PROC (apparently from grep)
#           /gsa/ausgsa/home/s/l/sleung/ekb/ekb/chips/p9/procedures/xml/attribute_info/nest_attributes.xml   (properties)
#           /gsa/ausgsa/home/s/l/sleung/ekb/ekb/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml (values)
#      Example:
#           <id>ATTR_EFF_NUM_RANKS_PER_DIMM</id>
#           <targetType>TARGET_TYPE_MCS</targetType>
# File used to see if attribute is 1D or 2D array
#      /gsa/ausgsa/home/s/l/sleung/ekb/ekb/output/gen/attribute_ids.H
#      Example:
#           typedef uint8_t ATTR_EFF_DIMM_TYPE_Type[2][2];
# File for finding correct spydef name
#      1st find the spydef file this ekb build is looking at by finding SPYDEF_FILE_LOCATION in file below
#           /gsa/ausgsa/home/s/l/sleung/ekb/ekb/tools/ifCompiler/scan_procedures.mk
#      2nd open *.spydef in that dir and search for spy names
#           /afs/awd.austin.ibm.com/projects/eclipz/lab/p9/vbu_models/n10_e9050_tp046_ec150u01a_soa_sc_u138_01/edc/*.spydef
#      (File comes from actually building a vbu file and looking at the spydef)
#      Example:
#           idial MCP.PORT1.SRQ.PC.MBAREF0Q_CFG_TRFC {
# Wrapper file calling this (TODO, need to actually make this file call this file)
#      /gsa/ausgsa/home/s/l/sleung/ekb/ekb/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C
# Output file generated
#      /gsa/ausgsa/home/s/l/sleung/ekb/ekb/chips/p9/procedures/hwp/initfiles/p9_mcs_scom.C




## Syntax Notes
# Compiler expects spys to be all caps


#--******************************************************************************
#-- Required keywords/variables
#--******************************************************************************

SyntaxVersion = 3

target_type 0 TARGET_TYPE_MCS;
target_type 1 TARGET_TYPE_SYSTEM;
target_type 2 TARGET_TYPE_PROC_CHIP;
target_type 3 TARGET_TYPE_MCBIST;

define SYS = TGT1; # If referencing Attr from system, add "SYS." in front
define MCBIST = TGT3; # If referencing Attr from mcbist, add "MCBIST." in front


#--******************************************************************************
#-- Systems Config
#--******************************************************************************

#--******************************************************************************
#-- Effective Attributes
#--******************************************************************************



#--******************************************************************************
#-- Dial Assignments
#--******************************************************************************




##########################
# DD1 WORKAROUNDS
##########################

# If cache scope prediciton logic is active, must disable fp_m bit, so fp ops will go fetch 128 bytes (for potential mdi update)
espy MC01.PBI01.SCOMFIR.MCMODE1_DISABLE_FP_M_BIT [when=S] {
  spyv;
  ON;
}

# HW376110
ispy MC01.PBI01.SCOMFIR.MCPERF1_MERGE_CAPACITY_LIMIT [when=S] { # still applies for dd2
  spyv;
  0b0111;
}

# Turns off SRQ pf drop
ispy MC01.PBI01.SCOMFIR.MCPERF1_ENABLE_PF_DROP_SRQ [when=S] {
  spyv;
  0;
}

# HW400075 Always set MDI to 1 for ttypes cp_me and cp_m
ispy MC01.PBI01.SCOMFIR.MCMODE2_DISABLE_MDI0 [when=S && ATTR_CHIP_EC_FEATURE_HW400075] {
  spyv,              expr;
  0b0001100000000,   (TGT1.ATTR_RISK_LEVEL == 0);
}

# HW398139 Enable commandlist prefetch drop for better arbitration
# Prefetch drop references an internal counter (6 by default - this is max value) to determine
# when a prefetch gets dropped. DROP_CNT_THRESH determines the rate the counter decrements (in units
# of 4 nest clocks) -- here, 8 * 4 nclks = 32 nclks, 32 nclks * 6 counts => takes 192 nest clocks
# to drop a prefetch. This dial may need to be tuned for performance.
espy MC01.PBI01.SCOMFIR.MCPERF1_ENABLE_PF_DROP_CMDLIST [when=S] { # enable for dd1 and dd2
  spyv;
  ON;
}

ispy MC01.PBI01.SCOMFIR.MCPERF1_PF_DROP_CNT_THRESH [when=S] {
  spyv, expr;
  8,      (ATTR_CHIP_EC_FEATURE_HW398139==1); # dd1 (arbitrarily chosen, empirically found to be stable)
  25,     (ATTR_CHIP_EC_FEATURE_HW398139!=1); # dd2 (performance chosen)
}

# Temporary Boston Fix HW411339 for 1600 nest 2400 mem frequencies

define def_mn_freq_ratio = (1000 * MCBIST.ATTR_MSS_FREQ) / SYS.ATTR_FREQ_PB_MHZ;

espy MC01.PBI01.SCOMFIR.MCMODE2_FORCE_SFSTAT_ACTIVE [when=S && ATTR_CHIP_EC_FEATURE_HW411339] {
  spyv, expr;
  OFF,     (def_mn_freq_ratio<=1350); # 1333 which is 2666/2000 (and lower ratios) will work as normal
  ON,      (def_mn_freq_ratio>1350);  # 1500 which is 2400/1600 will have sfsat/mdi always 1
}

##################
# DD2 NEW SETTINGS
##################

espy MC01.PBI01.SCOMFIR.MCMODE0_ENABLE_CENTAUR_SYNC [when=S && ATTR_CHIP_EC_FEATURE_NEW_MC_DD2_SETTINGS] {
  spyv;
  ON;
}

espy MC01.PBI01.SCOMFIR.MCMODE0_ENABLE_64_128B_READ [when=S && ATTR_CHIP_EC_FEATURE_NEW_MC_DD2_SETTINGS] {
  spyv;
  ON;
}

espy MC01.PBI01.SCOMFIR.MCMODE0_ENABLE_DROP_FP_DYN64_ACTIVE [when=S && ATTR_CHIP_EC_FEATURE_NEW_MC_DD2_SETTINGS] {
  spyv;
  ON;
}

ispy MC01.PBI01.SCOMFIR.MCPERF1_WRQ_CAPACITY_LIMIT [when=S && ATTR_CHIP_EC_FEATURE_NEW_MC_DD2_SETTINGS] {
  spyv;
  0b001111;
}

ispy MC01.PBI01.SCOMFIR.MCMODE2_COLLISION_MODES [when=S && ATTR_CHIP_EC_FEATURE_NEW_MC_DD2_SETTINGS] {
  spyv;
  0b0000000000001000;
}

espy MC01.PBI01.SCOMFIR.MCMODE0_CENTAURP_ENABLE_ECRESP [when=S && ATTR_CHIP_EC_FEATURE_NEW_MC_DD2_SETTINGS] {
  spyv;
  OFF;
}

espy MC01.PBI01.SCOMFIR.MCPERF1_ENABLE_PREFETCH_PROMOTE [when=S && ATTR_CHIP_EC_FEATURE_NEW_MC_DD2_SETTINGS] {
  spyv;
  ON;
}

# Dis Spec Ops for DCBFs (HW414958) dd1 and dd2
ispy MC01.PBI01.SCOMFIR.MCMODE1_DISABLE_SPEC_OP [when=S] {
  spyv;
  # Bit 45 of 33:51 field is DCBF type
  # 3333333444444444455
  # 3456789012345678901
  0b0000000000001000000;
}

#################
# DD2 WORKAROUNDS
#################