/* IBM_PROLOG_BEGIN_TAG                                                   */
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/* $Source: src/import/chips/centaur/procedures/hwp/perv/cen_startclocks.C $ */
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/* OpenPOWER HostBoot Project                                             */
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/// @file cen_startclocks.C
/// @brief Centaur start clocks (FAPI2)
///
/// General Description:
///   - Drop fences and tholds, start nest/mem clocks
///
/// Procedure Prereq:  TP chiplet must be initialized
//
/// @author Peng Fei GOU <shgoupf@cn.ibm.com>
///

//
// *HWP HWP Owner: Peng Fei GOU <shgoupf@us.ibm.com>
// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
// *HWP Team: Perv
// *HWP Level: 2
// *HWP Consumed by: HB
//

//------------------------------------------------------------------------------
// Includes
//------------------------------------------------------------------------------
#include <cen_startclocks.H>
#include <cen_common_funcs.H>
#include <cen_gen_scom_addresses.H>
#include <cen_gen_scom_addresses_fixes.H>

//------------------------------------------------------------------------------
// Function definitions
//------------------------------------------------------------------------------
fapi2::ReturnCode
cen_startclocks(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP>& i_target)
{
    FAPI_INF("Start");
    fapi2::buffer<uint32_t> reg_data_32 = 0;

    FAPI_DBG("Starting NEST clocks");
    FAPI_TRY(cen_startclocks_module(i_target, SCAN_CHIPLET_NEST),
             "Error from cen_startclocks_module (NEST)");

    FAPI_DBG("MBOX GP4 Reg: Set bit(2) to set MemReset Stability Control.");
    FAPI_TRY(fapi2::getCfamRegister(i_target, CEN_FSIGP4, reg_data_32),
             "Error from getCfamRegister (CEN_FSIGP4)");
    reg_data_32.setBit<2>();
    FAPI_TRY(fapi2::putCfamRegister(i_target, CEN_FSIGP4, reg_data_32),
             "Error from putCfamRegister (CEN_FSIGP4)");

    FAPI_DBG("MBOX GP4 Reg: Set bit(4) to release D3PHY PLL Reset Control.");
    FAPI_TRY(fapi2::getCfamRegister(i_target, CEN_FSIGP4, reg_data_32),
             "Error from getCfamRegister (CEN_FSIGP4)");
    reg_data_32.setBit<4>();
    FAPI_TRY(fapi2::putCfamRegister(i_target, CEN_FSIGP4, reg_data_32),
             "Error from putCfamRegister (CEN_FSIGP4)");

    FAPI_DBG("MBOX GP4 Reg: Set bits(22-23,28-30) to enable drivers and receivers.");
    FAPI_TRY(fapi2::getCfamRegister(i_target, CEN_FSIGP4, reg_data_32),
             "Error from getCfamRegister (CEN_FSIGP4)");
    reg_data_32.setBit<22, 2>().setBit<28, 3>();
    FAPI_TRY(fapi2::putCfamRegister(i_target, CEN_FSIGP4, reg_data_32),
             "Error from putCfamRegister (CEN_FSIGP4)");

    FAPI_DBG("Starting MEM clocks");
    FAPI_TRY(cen_startclocks_module(i_target, SCAN_CHIPLET_MEM),
             "Error from cen_startclocks_module (MEM)");

fapi_try_exit:
    FAPI_DBG("cen_startclocks End");
    return fapi2::current_err;
}