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/* $Source: src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_mb_interleave.H $ */
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/// @file p9c_mss_eff_mb_interleave.C
/// @brief checks the plugging rules for a centaur and works with interleaving within the centaur
///
/// *HWP HWP Owner: Luke Mulkey <lwmulkey@us.ibm.com>
/// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
/// *HWP Team: Memory
/// *HWP Level: 2
/// *HWP Consumed by: HB



#ifndef __MSS_EFF_MB_INTERLEAVE_H
#define __MSS_EFF_MB_INTERLEAVE_H

#include <fapi2.H>

typedef fapi2::ReturnCode (*p9c_mss_eff_mb_interleave_FP_t)(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP>&
        centaur );

extern "C"
{

    // This hardware procedure checks the plugging rules for a centaur and works with interleaving within the centaur
    // if various plug rules are violated at this level of the memory stack, error logs and deconfigures will happen
    // Many deconfig by assoication rules are not checked here.  Just 4.1 and 4.2 plus a required Interleaving check
    ///
    /// @brief checks the plugging rules for a centaur and works with interleaving within the centaur
    /// @param[in] i_cen_target
    /// @return fapi2::returnCode
    ///
    fapi2::ReturnCode p9c_mss_eff_mb_interleave(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP>& i_cen_target);



} // extern "C"

#endif