/* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ /* $Source: src/import/chips/centaur/common/include/cen_gen_scom_fld_template.H $ */ /* */ /* OpenPOWER HostBoot Project */ /* */ /* Contributors Listed Below - COPYRIGHT 2016,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ /* You may obtain a copy of the License at */ /* */ /* http://www.apache.org/licenses/LICENSE-2.0 */ /* */ /* Unless required by applicable law or agreed to in writing, software */ /* distributed under the License is distributed on an "AS IS" BASIS, */ /* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ /* implied. See the License for the specific language governing */ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ #ifndef CEN_GEN_SCOM_FLD_TEMPLATE_H #define CEN_GEN_SCOM_FLD_TEMPLATE_H static const uint64_t IDX_CEN_TX_CLK_MODE_PG_PDWN = 0; static const uint64_t IDX_CEN_TX_CLK_MODE_PG_INVERT = 1; static const uint64_t IDX_CEN_TX_CLK_MODE_PG_QUIESCE_P = 2; static const uint64_t IDX_CEN_TX_CLK_MODE_PG_QUIESCE_P_LEN = 3; static const uint64_t IDX_CEN_TX_CLK_MODE_PG_QUIESCE_N = 4; static const uint64_t IDX_CEN_TX_CLK_MODE_PG_QUIESCE_N_LEN = 5; static const uint64_t IDX_CEN_TX_CLK_MODE_PG_DDR = 6; static const uint64_t IDX_CEN_TX_SPARE_MODE_PG_0 = 7; static const uint64_t IDX_CEN_TX_SPARE_MODE_PG_1 = 8; static const uint64_t IDX_CEN_TX_SPARE_MODE_PG_2 = 9; static const uint64_t IDX_CEN_TX_SPARE_MODE_PG_3 = 10; static const uint64_t IDX_CEN_TX_SPARE_MODE_PG_4 = 11; static const uint64_t IDX_CEN_TX_SPARE_MODE_PG_5 = 12; static const uint64_t IDX_CEN_TX_SPARE_MODE_PG_6 = 13; static const uint64_t IDX_CEN_TX_SPARE_MODE_PG_7 = 14; static const uint64_t IDX_CEN_TX_MODE_PG_MAX_BAD_LANES = 15; static const uint64_t IDX_CEN_TX_MODE_PG_MAX_BAD_LANES_LEN = 16; static const uint64_t IDX_CEN_TX_MODE_PG_MSBSWAP = 17; static const uint64_t IDX_CEN_TX_MODE_PG_PDWN_LITE_DISABLE = 18; static const uint64_t IDX_CEN_TX_RESET_ACT_PG_CLR_PAR_ERRS = 19; static const uint64_t IDX_CEN_TX_RESET_ACT_PG_FIR = 20; static const uint64_t IDX_CEN_TX_BIST_STAT_PG_CLK_ERR = 21; static const uint64_t IDX_CEN_TX_FIR_PG_ERRS = 22; static const uint64_t IDX_CEN_TX_FIR_PG_ERRS_LEN = 23; static const uint64_t IDX_CEN_TX_FIR_PG_PL_ERR = 24; static const uint64_t IDX_CEN_TX_FIR_MASK_PG_ERRS = 25; static const uint64_t IDX_CEN_TX_FIR_MASK_PG_ERRS_LEN = 26; static const uint64_t IDX_CEN_TX_FIR_MASK_PG_PL_ERR = 27; static const uint64_t IDX_CEN_TX_FIR_ERROR_INJECT_PG_PG_ERR_INJ = 28; static const uint64_t IDX_CEN_TX_FIR_ERROR_INJECT_PG_PG_ERR_INJ_LEN = 29; static const uint64_t IDX_CEN_TX_ID1_PG_BUS_ID = 30; static const uint64_t IDX_CEN_TX_ID1_PG_BUS_ID_LEN = 31; static const uint64_t IDX_CEN_TX_ID1_PG_GROUP_ID = 32; static const uint64_t IDX_CEN_TX_ID1_PG_GROUP_ID_LEN = 33; static const uint64_t IDX_CEN_TX_ID2_PG_LAST_GROUP_ID = 34; static const uint64_t IDX_CEN_TX_ID2_PG_LAST_GROUP_ID_LEN = 35; static const uint64_t IDX_CEN_TX_ID3_PG_START_LANE_ID = 36; static const uint64_t IDX_CEN_TX_ID3_PG_START_LANE_ID_LEN = 37; static const uint64_t IDX_CEN_TX_ID3_PG_END_LANE_ID = 38; static const uint64_t IDX_CEN_TX_ID3_PG_END_LANE_ID_LEN = 39; static const uint64_t IDX_CEN_TX_CLK_CNTL_GCRMSG_PG_DRV_PATTERN_GCRMSG = 40; static const uint64_t IDX_CEN_TX_CLK_CNTL_GCRMSG_PG_DRV_PATTERN_GCRMSG_LEN = 41; static const uint64_t IDX_CEN_TX_FFE_MODE_PG_TEST = 42; static const uint64_t IDX_CEN_TX_FFE_MODE_PG_TEST_LEN = 43; static const uint64_t IDX_CEN_TX_FFE_MODE_PG_TEST_OVERRIDE1R = 44; static const uint64_t IDX_CEN_TX_FFE_MODE_PG_TEST_OVERRIDE2R = 45; static const uint64_t IDX_CEN_TX_FFE_MAIN_PG_P_ENC = 46; static const uint64_t IDX_CEN_TX_FFE_MAIN_PG_P_ENC_LEN = 47; static const uint64_t IDX_CEN_TX_FFE_MAIN_PG_N_ENC = 48; static const uint64_t IDX_CEN_TX_FFE_MAIN_PG_N_ENC_LEN = 49; static const uint64_t IDX_CEN_TX_FFE_POST_PG_P_ENC = 50; static const uint64_t IDX_CEN_TX_FFE_POST_PG_P_ENC_LEN = 51; static const uint64_t IDX_CEN_TX_FFE_POST_PG_N_ENC = 52; static const uint64_t IDX_CEN_TX_FFE_POST_PG_N_ENC_LEN = 53; static const uint64_t IDX_CEN_TX_FFE_MARGIN_PG_P_ENC = 54; static const uint64_t IDX_CEN_TX_FFE_MARGIN_PG_P_ENC_LEN = 55; static const uint64_t IDX_CEN_TX_FFE_MARGIN_PG_N_ENC = 56; static const uint64_t IDX_CEN_TX_FFE_MARGIN_PG_N_ENC_LEN = 57; static const uint64_t IDX_CEN_TX_BAD_LANE_ENC_GCRMSG_PG_LANE1_GCRMSG = 58; static const uint64_t IDX_CEN_TX_BAD_LANE_ENC_GCRMSG_PG_LANE1_GCRMSG_LEN = 59; static const uint64_t IDX_CEN_TX_BAD_LANE_ENC_GCRMSG_PG_LANE2_GCRMSG = 60; static const uint64_t IDX_CEN_TX_BAD_LANE_ENC_GCRMSG_PG_LANE2_GCRMSG_LEN = 61; static const uint64_t IDX_CEN_TX_BAD_LANE_ENC_GCRMSG_PG_CODE_GCRMSG = 62; static const uint64_t IDX_CEN_TX_BAD_LANE_ENC_GCRMSG_PG_CODE_GCRMSG_LEN = 63; static const uint64_t IDX_CEN_TX_SLS_LANE_ENC_GCRMSG_PG_GCRMSG = 64; static const uint64_t IDX_CEN_TX_SLS_LANE_ENC_GCRMSG_PG_GCRMSG_LEN = 65; static const uint64_t IDX_CEN_TX_SLS_LANE_ENC_GCRMSG_PG_VAL_GCRMSG = 66; static const uint64_t IDX_CEN_TX_WT_SEG_ENABLE_PG_EN_ALL_CLK_SEGS_GCRMSG = 67; static const uint64_t IDX_CEN_TX_WT_SEG_ENABLE_PG_EN_ALL_DATA_SEGS_GCRMSG = 68; static const uint64_t IDX_CEN_TX_LANE_DISABLED_VEC_0_15_PG_15 = 69; static const uint64_t IDX_CEN_TX_LANE_DISABLED_VEC_0_15_PG_15_LEN = 70; static const uint64_t IDX_CEN_TX_LANE_DISABLED_VEC_16_31_PG_31 = 71; static const uint64_t IDX_CEN_TX_LANE_DISABLED_VEC_16_31_PG_31_LEN = 72; static const uint64_t IDX_CEN_TX_SLS_LANE_MUX_GCRMSG_PG_SHDW_GCRMSG = 73; static const uint64_t IDX_CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_SHDW_REQ_GCRMSG = 74; static const uint64_t IDX_CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_SHDW_RPR_REQ_GCRMSG = 75; static const uint64_t IDX_CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_UNSHDW_REQ_GCRMSG = 76; static const uint64_t IDX_CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_UNSHDW_RPR_REQ_GCRMSG = 77; static const uint64_t IDX_CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_BUS_WIDTH = 78; static const uint64_t IDX_CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_BUS_WIDTH_LEN = 79; static const uint64_t IDX_CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_RPR_REQ_GCRMSG = 80; static const uint64_t IDX_CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_SLS_LANE_SEL_LG_GCRMSG = 81; static const uint64_t IDX_CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_SLS_LANE_UNSEL_LG_GCRMSG = 82; static const uint64_t IDX_CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_SPR_LNS_PDWN_LITE_GCRMSG = 83; static const uint64_t IDX_CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_LGL_RPR_REQ_GCRMSG = 84; static const uint64_t IDX_CEN_TX_WIRETEST_PP_WT_PATTERN_LENGTH = 85; static const uint64_t IDX_CEN_TX_WIRETEST_PP_WT_PATTERN_LENGTH_LEN = 86; static const uint64_t IDX_CEN_TX_MODE_PP_REDUCED_SCRAMBLE = 87; static const uint64_t IDX_CEN_TX_MODE_PP_REDUCED_SCRAMBLE_LEN = 88; static const uint64_t IDX_CEN_TX_MODE_PP_PRBS_SCRAMBLE = 89; static const uint64_t IDX_CEN_TX_MODE_PP_PRBS_SCRAMBLE_LEN = 90; static const uint64_t IDX_CEN_TX_MODE_PP_FIFO_L2U_DLY = 91; static const uint64_t IDX_CEN_TX_MODE_PP_FIFO_L2U_DLY_LEN = 92; static const uint64_t IDX_CEN_TX_SLS_GCRMSG_PP_SND_CMD = 93; static const uint64_t IDX_CEN_TX_SLS_GCRMSG_PP_DYN_RECAL_TSR_IGNORE_GCRMSG = 94; static const uint64_t IDX_CEN_TX_SLS_GCRMSG_PP_CMD = 95; static const uint64_t IDX_CEN_TX_SLS_GCRMSG_PP_CMD_LEN = 96; static const uint64_t IDX_CEN_TX_SLS_GCRMSG_PP_SND_CMD_PREV = 97; static const uint64_t IDX_CEN_TX_SLS_GCRMSG_PP_SND_USING_REG_SCRAMBLE = 98; static const uint64_t IDX_CEN_TX_BER_CNTL_A_PP_ERR_INJ_A_RAND_BEAT_DIS = 99; static const uint64_t IDX_CEN_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL = 100; static const uint64_t IDX_CEN_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL_LEN = 101; static const uint64_t IDX_CEN_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL = 102; static const uint64_t IDX_CEN_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL_LEN = 103; static const uint64_t IDX_CEN_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL = 104; static const uint64_t IDX_CEN_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL_LEN = 105; static const uint64_t IDX_CEN_TX_BER_CNTL_B_PP_ERR_INJ_B_RAND_BEAT_DIS = 106; static const uint64_t IDX_CEN_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL = 107; static const uint64_t IDX_CEN_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL_LEN = 108; static const uint64_t IDX_CEN_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL = 109; static const uint64_t IDX_CEN_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL_LEN = 110; static const uint64_t IDX_CEN_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL = 111; static const uint64_t IDX_CEN_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL_LEN = 112; static const uint64_t IDX_CEN_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL = 113; static const uint64_t IDX_CEN_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN = 114; static const uint64_t IDX_CEN_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL = 115; static const uint64_t IDX_CEN_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN = 116; static const uint64_t IDX_CEN_TX_BIST_CNTL_PP_EN = 117; static const uint64_t IDX_CEN_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_MODE = 118; static const uint64_t IDX_CEN_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_ALL_CMD = 119; static const uint64_t IDX_CEN_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_RECAL = 120; static const uint64_t IDX_CEN_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD = 121; static const uint64_t IDX_CEN_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD_LEN = 122; static const uint64_t IDX_CEN_TX_CNTL_PP_ENABLE_REDUCED_SCRAMBLE = 123; static const uint64_t IDX_CEN_TX_RESET_CFG_PP_HLD = 124; static const uint64_t IDX_CEN_TX_RESET_CFG_PP_HLD_LEN = 125; static const uint64_t IDX_CEN_TX_TDR_CNTL1_PP_DAC_CNTL = 126; static const uint64_t IDX_CEN_TX_TDR_CNTL1_PP_DAC_CNTL_LEN = 127; static const uint64_t IDX_CEN_TX_TDR_CNTL1_PP_PHASE_SEL = 128; static const uint64_t IDX_CEN_TX_TDR_CNTL2_PP_PULSE_OFFSET = 129; static const uint64_t IDX_CEN_TX_TDR_CNTL2_PP_PULSE_OFFSET_LEN = 130; static const uint64_t IDX_CEN_TX_TDR_CNTL3_PP_PULSE_WIDTH = 131; static const uint64_t IDX_CEN_TX_TDR_CNTL3_PP_PULSE_WIDTH_LEN = 132; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_PL_LANE_PDWN = 133; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_PL_LANE_INVERT = 134; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_PL_LANE_QUIESCE_P = 135; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_PL_LANE_QUIESCE_P_LEN = 136; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_PL_LANE_QUIESCE_N = 137; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_PL_LANE_QUIESCE_N_LEN = 138; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 139; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 140; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_1 = 141; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_2 = 142; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_3 = 143; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_4 = 144; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_5 = 145; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_6 = 146; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_7 = 147; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_BIST_STAT_PL_LANE_ERR = 148; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_PRBS_MODE_PL_TAP_ID = 149; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_PRBS_MODE_PL_TAP_ID_LEN = 150; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 151; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 152; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 153; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_FIR_PL_ERRS = 154; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_FIR_MASK_PL_ERRS = 155; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 156; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 157; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 158; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 159; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_WIRETEST_PP_WT_PATTERN_LENGTH = 160; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_WIRETEST_PP_WT_PATTERN_LENGTH_LEN = 161; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_MODE_PP_REDUCED_SCRAMBLE = 162; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_MODE_PP_REDUCED_SCRAMBLE_LEN = 163; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_MODE_PP_PRBS_SCRAMBLE = 164; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_MODE_PP_PRBS_SCRAMBLE_LEN = 165; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_MODE_PP_FIFO_L2U_DLY = 166; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_MODE_PP_FIFO_L2U_DLY_LEN = 167; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_SLS_GCRMSG_PP_SND_CMD = 168; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_SLS_GCRMSG_PP_DYN_RECAL_TSR_IGNORE_GCRMSG = 169; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_SLS_GCRMSG_PP_CMD = 170; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_SLS_GCRMSG_PP_CMD_LEN = 171; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_SLS_GCRMSG_PP_SND_CMD_PREV = 172; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_SLS_GCRMSG_PP_SND_USING_REG_SCRAMBLE = 173; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_A_PP_ERR_INJ_A_RAND_BEAT_DIS = 174; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL = 175; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL_LEN = 176; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL = 177; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL_LEN = 178; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL = 179; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL_LEN = 180; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_B_PP_ERR_INJ_B_RAND_BEAT_DIS = 181; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL = 182; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL_LEN = 183; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL = 184; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL_LEN = 185; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL = 186; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL_LEN = 187; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL = 188; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN = 189; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL = 190; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN = 191; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BIST_CNTL_PP_EN = 192; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_MODE = 193; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_ALL_CMD = 194; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_RECAL = 195; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD = 196; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD_LEN = 197; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_CNTL_PP_ENABLE_REDUCED_SCRAMBLE = 198; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_RESET_CFG_PP_HLD = 199; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_RESET_CFG_PP_HLD_LEN = 200; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL1_PP_DAC_CNTL = 201; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL1_PP_DAC_CNTL_LEN = 202; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL1_PP_PHASE_SEL = 203; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL2_PP_PULSE_OFFSET = 204; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL2_PP_PULSE_OFFSET_LEN = 205; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL3_PP_PULSE_WIDTH = 206; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL3_PP_PULSE_WIDTH_LEN = 207; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_PL_LANE_PDWN = 208; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_PL_LANE_INVERT = 209; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_PL_LANE_QUIESCE_P = 210; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_PL_LANE_QUIESCE_P_LEN = 211; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_PL_LANE_QUIESCE_N = 212; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_PL_LANE_QUIESCE_N_LEN = 213; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 214; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 215; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_1 = 216; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_2 = 217; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_3 = 218; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_4 = 219; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_5 = 220; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_6 = 221; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_7 = 222; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_BIST_STAT_PL_LANE_ERR = 223; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_PRBS_MODE_PL_TAP_ID = 224; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_PRBS_MODE_PL_TAP_ID_LEN = 225; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 226; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 227; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 228; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_FIR_PL_ERRS = 229; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_FIR_MASK_PL_ERRS = 230; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 231; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 232; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 233; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 234; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_PL_LANE_PDWN = 235; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_PL_LANE_INVERT = 236; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_PL_LANE_QUIESCE_P = 237; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_PL_LANE_QUIESCE_P_LEN = 238; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_PL_LANE_QUIESCE_N = 239; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_PL_LANE_QUIESCE_N_LEN = 240; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 241; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 242; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_1 = 243; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_2 = 244; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_3 = 245; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_4 = 246; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_5 = 247; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_6 = 248; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_7 = 249; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_BIST_STAT_PL_LANE_ERR = 250; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_PRBS_MODE_PL_TAP_ID = 251; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_PRBS_MODE_PL_TAP_ID_LEN = 252; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 253; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 254; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 255; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_FIR_PL_ERRS = 256; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_FIR_MASK_PL_ERRS = 257; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 258; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 259; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 260; static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 261; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_PL_LANE_PDWN = 262; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_PL_LANE_INVERT = 263; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_PL_LANE_QUIESCE_P = 264; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_PL_LANE_QUIESCE_P_LEN = 265; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_PL_LANE_QUIESCE_N = 266; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_PL_LANE_QUIESCE_N_LEN = 267; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 268; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_0 = 269; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 270; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_2 = 271; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_3 = 272; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_4 = 273; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_5 = 274; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_6 = 275; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_7 = 276; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_BIST_STAT_PL_LANE_ERR = 277; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_PRBS_MODE_PL_TAP_ID = 278; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_PRBS_MODE_PL_TAP_ID_LEN = 279; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 280; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 281; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 282; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_FIR_PL_ERRS = 283; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_FIR_MASK_PL_ERRS = 284; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 285; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 286; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 287; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 288; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_WIRETEST_PP_WT_PATTERN_LENGTH = 289; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_WIRETEST_PP_WT_PATTERN_LENGTH_LEN = 290; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_MODE_PP_REDUCED_SCRAMBLE = 291; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_MODE_PP_REDUCED_SCRAMBLE_LEN = 292; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_MODE_PP_PRBS_SCRAMBLE = 293; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_MODE_PP_PRBS_SCRAMBLE_LEN = 294; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_MODE_PP_FIFO_L2U_DLY = 295; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_MODE_PP_FIFO_L2U_DLY_LEN = 296; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_SLS_GCRMSG_PP_SND_CMD = 297; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_SLS_GCRMSG_PP_DYN_RECAL_TSR_IGNORE_GCRMSG = 298; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_SLS_GCRMSG_PP_CMD = 299; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_SLS_GCRMSG_PP_CMD_LEN = 300; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_SLS_GCRMSG_PP_SND_CMD_PREV = 301; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_SLS_GCRMSG_PP_SND_USING_REG_SCRAMBLE = 302; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_A_PP_ERR_INJ_A_RAND_BEAT_DIS = 303; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL = 304; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL_LEN = 305; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL = 306; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL_LEN = 307; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL = 308; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL_LEN = 309; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_B_PP_ERR_INJ_B_RAND_BEAT_DIS = 310; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL = 311; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL_LEN = 312; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL = 313; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL_LEN = 314; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL = 315; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL_LEN = 316; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL = 317; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN = 318; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL = 319; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN = 320; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BIST_CNTL_PP_EN = 321; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_MODE = 322; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_ALL_CMD = 323; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_RECAL = 324; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD = 325; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD_LEN = 326; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_CNTL_PP_ENABLE_REDUCED_SCRAMBLE = 327; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_RESET_CFG_PP_HLD = 328; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_RESET_CFG_PP_HLD_LEN = 329; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL1_PP_DAC_CNTL = 330; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL1_PP_DAC_CNTL_LEN = 331; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL1_PP_PHASE_SEL = 332; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL2_PP_PULSE_OFFSET = 333; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL2_PP_PULSE_OFFSET_LEN = 334; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL3_PP_PULSE_WIDTH = 335; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL3_PP_PULSE_WIDTH_LEN = 336; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_PL_LANE_PDWN = 337; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_PL_LANE_INVERT = 338; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_PL_LANE_QUIESCE_P = 339; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_PL_LANE_QUIESCE_P_LEN = 340; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_PL_LANE_QUIESCE_N = 341; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_PL_LANE_QUIESCE_N_LEN = 342; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 343; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_0 = 344; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 345; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_2 = 346; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_3 = 347; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_4 = 348; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_5 = 349; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_6 = 350; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_7 = 351; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_BIST_STAT_PL_LANE_ERR = 352; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_PRBS_MODE_PL_TAP_ID = 353; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_PRBS_MODE_PL_TAP_ID_LEN = 354; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 355; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 356; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 357; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_FIR_PL_ERRS = 358; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_FIR_MASK_PL_ERRS = 359; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 360; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 361; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 362; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 363; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_PL_LANE_PDWN = 364; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_PL_LANE_INVERT = 365; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_PL_LANE_QUIESCE_P = 366; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_PL_LANE_QUIESCE_P_LEN = 367; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_PL_LANE_QUIESCE_N = 368; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_PL_LANE_QUIESCE_N_LEN = 369; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 370; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_0 = 371; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 372; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_2 = 373; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_3 = 374; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_4 = 375; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_5 = 376; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_6 = 377; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_7 = 378; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_BIST_STAT_PL_LANE_ERR = 379; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_PRBS_MODE_PL_TAP_ID = 380; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_PRBS_MODE_PL_TAP_ID_LEN = 381; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 382; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 383; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 384; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_FIR_PL_ERRS = 385; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_FIR_MASK_PL_ERRS = 386; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 387; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 388; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 389; static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 390; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_MODE_PL_LANE_PDWN = 391; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_MODE_PL_LANE_INVERT = 392; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_MODE_PL_LANE_QUIESCE_P = 393; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_MODE_PL_LANE_QUIESCE_P_LEN = 394; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_MODE_PL_LANE_QUIESCE_N = 395; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_MODE_PL_LANE_QUIESCE_N_LEN = 396; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 397; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_0 = 398; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_1 = 399; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_2 = 400; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_3 = 401; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_4 = 402; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_5 = 403; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_6 = 404; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_7 = 405; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_BIST_STAT_PL_LANE_ERR = 406; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_PRBS_MODE_PL_TAP_ID = 407; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_PRBS_MODE_PL_TAP_ID_LEN = 408; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 409; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 410; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 411; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_FIR_PL_ERRS = 412; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_FIR_MASK_PL_ERRS = 413; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 414; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 415; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 416; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 417; static const uint64_t IDX_CEN_TXPACKS2_TX_WIRETEST_PP_WT_PATTERN_LENGTH = 418; static const uint64_t IDX_CEN_TXPACKS2_TX_WIRETEST_PP_WT_PATTERN_LENGTH_LEN = 419; static const uint64_t IDX_CEN_TXPACKS2_TX_MODE_PP_REDUCED_SCRAMBLE = 420; static const uint64_t IDX_CEN_TXPACKS2_TX_MODE_PP_REDUCED_SCRAMBLE_LEN = 421; static const uint64_t IDX_CEN_TXPACKS2_TX_MODE_PP_PRBS_SCRAMBLE = 422; static const uint64_t IDX_CEN_TXPACKS2_TX_MODE_PP_PRBS_SCRAMBLE_LEN = 423; static const uint64_t IDX_CEN_TXPACKS2_TX_MODE_PP_FIFO_L2U_DLY = 424; static const uint64_t IDX_CEN_TXPACKS2_TX_MODE_PP_FIFO_L2U_DLY_LEN = 425; static const uint64_t IDX_CEN_TXPACKS2_TX_SLS_GCRMSG_PP_SND_CMD = 426; static const uint64_t IDX_CEN_TXPACKS2_TX_SLS_GCRMSG_PP_DYN_RECAL_TSR_IGNORE_GCRMSG = 427; static const uint64_t IDX_CEN_TXPACKS2_TX_SLS_GCRMSG_PP_CMD = 428; static const uint64_t IDX_CEN_TXPACKS2_TX_SLS_GCRMSG_PP_CMD_LEN = 429; static const uint64_t IDX_CEN_TXPACKS2_TX_SLS_GCRMSG_PP_SND_CMD_PREV = 430; static const uint64_t IDX_CEN_TXPACKS2_TX_SLS_GCRMSG_PP_SND_USING_REG_SCRAMBLE = 431; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_A_PP_ERR_INJ_A_RAND_BEAT_DIS = 432; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL = 433; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL_LEN = 434; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL = 435; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL_LEN = 436; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL = 437; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL_LEN = 438; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_B_PP_ERR_INJ_B_RAND_BEAT_DIS = 439; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL = 440; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL_LEN = 441; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL = 442; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL_LEN = 443; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL = 444; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL_LEN = 445; static const uint64_t IDX_CEN_TXPACKS2_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL = 446; static const uint64_t IDX_CEN_TXPACKS2_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN = 447; static const uint64_t IDX_CEN_TXPACKS2_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL = 448; static const uint64_t IDX_CEN_TXPACKS2_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN = 449; static const uint64_t IDX_CEN_TXPACKS2_TX_BIST_CNTL_PP_EN = 450; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_MODE = 451; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_ALL_CMD = 452; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_RECAL = 453; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD = 454; static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD_LEN = 455; static const uint64_t IDX_CEN_TXPACKS2_TX_CNTL_PP_ENABLE_REDUCED_SCRAMBLE = 456; static const uint64_t IDX_CEN_TXPACKS2_TX_RESET_CFG_PP_HLD = 457; static const uint64_t IDX_CEN_TXPACKS2_TX_RESET_CFG_PP_HLD_LEN = 458; static const uint64_t IDX_CEN_TXPACKS2_TX_TDR_CNTL1_PP_DAC_CNTL = 459; static const uint64_t IDX_CEN_TXPACKS2_TX_TDR_CNTL1_PP_DAC_CNTL_LEN = 460; static const uint64_t IDX_CEN_TXPACKS2_TX_TDR_CNTL1_PP_PHASE_SEL = 461; static const uint64_t IDX_CEN_TXPACKS2_TX_TDR_CNTL2_PP_PULSE_OFFSET = 462; static const uint64_t IDX_CEN_TXPACKS2_TX_TDR_CNTL2_PP_PULSE_OFFSET_LEN = 463; static const uint64_t IDX_CEN_TXPACKS2_TX_TDR_CNTL3_PP_PULSE_WIDTH = 464; static const uint64_t IDX_CEN_TXPACKS2_TX_TDR_CNTL3_PP_PULSE_WIDTH_LEN = 465; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_MODE_PL_LANE_PDWN = 466; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_MODE_PL_LANE_INVERT = 467; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_MODE_PL_LANE_QUIESCE_P = 468; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_MODE_PL_LANE_QUIESCE_P_LEN = 469; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_MODE_PL_LANE_QUIESCE_N = 470; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_MODE_PL_LANE_QUIESCE_N_LEN = 471; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 472; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_0 = 473; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_1 = 474; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_2 = 475; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_3 = 476; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_4 = 477; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_5 = 478; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_6 = 479; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_7 = 480; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_BIST_STAT_PL_LANE_ERR = 481; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_PRBS_MODE_PL_TAP_ID = 482; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_PRBS_MODE_PL_TAP_ID_LEN = 483; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 484; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 485; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 486; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_FIR_PL_ERRS = 487; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_FIR_MASK_PL_ERRS = 488; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 489; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 490; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 491; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 492; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_MODE_PL_LANE_PDWN = 493; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_MODE_PL_LANE_INVERT = 494; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_MODE_PL_LANE_QUIESCE_P = 495; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_MODE_PL_LANE_QUIESCE_P_LEN = 496; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_MODE_PL_LANE_QUIESCE_N = 497; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_MODE_PL_LANE_QUIESCE_N_LEN = 498; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 499; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_0 = 500; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_1 = 501; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_2 = 502; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_3 = 503; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_4 = 504; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_5 = 505; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_6 = 506; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_7 = 507; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_BIST_STAT_PL_LANE_ERR = 508; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_PRBS_MODE_PL_TAP_ID = 509; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_PRBS_MODE_PL_TAP_ID_LEN = 510; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 511; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 512; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 513; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_FIR_PL_ERRS = 514; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_FIR_MASK_PL_ERRS = 515; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 516; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 517; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 518; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 519; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_MODE_PL_LANE_PDWN = 520; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_MODE_PL_LANE_INVERT = 521; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_MODE_PL_LANE_QUIESCE_P = 522; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_MODE_PL_LANE_QUIESCE_P_LEN = 523; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_MODE_PL_LANE_QUIESCE_N = 524; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_MODE_PL_LANE_QUIESCE_N_LEN = 525; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 526; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_0 = 527; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_1 = 528; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_2 = 529; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_3 = 530; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_4 = 531; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_5 = 532; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_6 = 533; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_7 = 534; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_BIST_STAT_PL_LANE_ERR = 535; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_PRBS_MODE_PL_TAP_ID = 536; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_PRBS_MODE_PL_TAP_ID_LEN = 537; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 538; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 539; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 540; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_FIR_PL_ERRS = 541; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_FIR_MASK_PL_ERRS = 542; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 543; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 544; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 545; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 546; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_MODE_PL_LANE_PDWN = 547; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_MODE_PL_LANE_INVERT = 548; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_MODE_PL_LANE_QUIESCE_P = 549; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_MODE_PL_LANE_QUIESCE_P_LEN = 550; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_MODE_PL_LANE_QUIESCE_N = 551; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_MODE_PL_LANE_QUIESCE_N_LEN = 552; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 553; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_0 = 554; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_1 = 555; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_2 = 556; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_3 = 557; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_4 = 558; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_5 = 559; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_6 = 560; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_7 = 561; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_BIST_STAT_PL_LANE_ERR = 562; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_PRBS_MODE_PL_TAP_ID = 563; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_PRBS_MODE_PL_TAP_ID_LEN = 564; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 565; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 566; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 567; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_FIR_PL_ERRS = 568; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_FIR_MASK_PL_ERRS = 569; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 570; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 571; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 572; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 573; static const uint64_t IDX_CEN_TXPACKS3_TX_WIRETEST_PP_WT_PATTERN_LENGTH = 574; static const uint64_t IDX_CEN_TXPACKS3_TX_WIRETEST_PP_WT_PATTERN_LENGTH_LEN = 575; static const uint64_t IDX_CEN_TXPACKS3_TX_MODE_PP_REDUCED_SCRAMBLE = 576; static const uint64_t IDX_CEN_TXPACKS3_TX_MODE_PP_REDUCED_SCRAMBLE_LEN = 577; static const uint64_t IDX_CEN_TXPACKS3_TX_MODE_PP_PRBS_SCRAMBLE = 578; static const uint64_t IDX_CEN_TXPACKS3_TX_MODE_PP_PRBS_SCRAMBLE_LEN = 579; static const uint64_t IDX_CEN_TXPACKS3_TX_MODE_PP_FIFO_L2U_DLY = 580; static const uint64_t IDX_CEN_TXPACKS3_TX_MODE_PP_FIFO_L2U_DLY_LEN = 581; static const uint64_t IDX_CEN_TXPACKS3_TX_SLS_GCRMSG_PP_SND_CMD = 582; static const uint64_t IDX_CEN_TXPACKS3_TX_SLS_GCRMSG_PP_DYN_RECAL_TSR_IGNORE_GCRMSG = 583; static const uint64_t IDX_CEN_TXPACKS3_TX_SLS_GCRMSG_PP_CMD = 584; static const uint64_t IDX_CEN_TXPACKS3_TX_SLS_GCRMSG_PP_CMD_LEN = 585; static const uint64_t IDX_CEN_TXPACKS3_TX_SLS_GCRMSG_PP_SND_CMD_PREV = 586; static const uint64_t IDX_CEN_TXPACKS3_TX_SLS_GCRMSG_PP_SND_USING_REG_SCRAMBLE = 587; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_A_PP_ERR_INJ_A_RAND_BEAT_DIS = 588; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL = 589; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL_LEN = 590; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL = 591; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL_LEN = 592; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL = 593; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL_LEN = 594; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_B_PP_ERR_INJ_B_RAND_BEAT_DIS = 595; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL = 596; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL_LEN = 597; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL = 598; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL_LEN = 599; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL = 600; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL_LEN = 601; static const uint64_t IDX_CEN_TXPACKS3_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL = 602; static const uint64_t IDX_CEN_TXPACKS3_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN = 603; static const uint64_t IDX_CEN_TXPACKS3_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL = 604; static const uint64_t IDX_CEN_TXPACKS3_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN = 605; static const uint64_t IDX_CEN_TXPACKS3_TX_BIST_CNTL_PP_EN = 606; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_MODE = 607; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_ALL_CMD = 608; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_RECAL = 609; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD = 610; static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD_LEN = 611; static const uint64_t IDX_CEN_TXPACKS3_TX_CNTL_PP_ENABLE_REDUCED_SCRAMBLE = 612; static const uint64_t IDX_CEN_TXPACKS3_TX_RESET_CFG_PP_HLD = 613; static const uint64_t IDX_CEN_TXPACKS3_TX_RESET_CFG_PP_HLD_LEN = 614; static const uint64_t IDX_CEN_TXPACKS3_TX_TDR_CNTL1_PP_DAC_CNTL = 615; static const uint64_t IDX_CEN_TXPACKS3_TX_TDR_CNTL1_PP_DAC_CNTL_LEN = 616; static const uint64_t IDX_CEN_TXPACKS3_TX_TDR_CNTL1_PP_PHASE_SEL = 617; static const uint64_t IDX_CEN_TXPACKS3_TX_TDR_CNTL2_PP_PULSE_OFFSET = 618; static const uint64_t IDX_CEN_TXPACKS3_TX_TDR_CNTL2_PP_PULSE_OFFSET_LEN = 619; static const uint64_t IDX_CEN_TXPACKS3_TX_TDR_CNTL3_PP_PULSE_WIDTH = 620; static const uint64_t IDX_CEN_TXPACKS3_TX_TDR_CNTL3_PP_PULSE_WIDTH_LEN = 621; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_MODE_PL_LANE_PDWN = 622; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_MODE_PL_LANE_INVERT = 623; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_MODE_PL_LANE_QUIESCE_P = 624; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_MODE_PL_LANE_QUIESCE_P_LEN = 625; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_MODE_PL_LANE_QUIESCE_N = 626; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_MODE_PL_LANE_QUIESCE_N_LEN = 627; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 628; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_0 = 629; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_1 = 630; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_2 = 631; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_3 = 632; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_4 = 633; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_5 = 634; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_6 = 635; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_7 = 636; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_BIST_STAT_PL_LANE_ERR = 637; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_PRBS_MODE_PL_TAP_ID = 638; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_PRBS_MODE_PL_TAP_ID_LEN = 639; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 640; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 641; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 642; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_FIR_PL_ERRS = 643; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_FIR_MASK_PL_ERRS = 644; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 645; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 646; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 647; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 648; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_MODE_PL_LANE_PDWN = 649; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_MODE_PL_LANE_INVERT = 650; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_MODE_PL_LANE_QUIESCE_P = 651; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_MODE_PL_LANE_QUIESCE_P_LEN = 652; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_MODE_PL_LANE_QUIESCE_N = 653; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_MODE_PL_LANE_QUIESCE_N_LEN = 654; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 655; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_0 = 656; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_1 = 657; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_2 = 658; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_3 = 659; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_4 = 660; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_5 = 661; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_6 = 662; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_7 = 663; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_BIST_STAT_PL_LANE_ERR = 664; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_PRBS_MODE_PL_TAP_ID = 665; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_PRBS_MODE_PL_TAP_ID_LEN = 666; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 667; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 668; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 669; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_FIR_PL_ERRS = 670; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_FIR_MASK_PL_ERRS = 671; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 672; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 673; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 674; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 675; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_MODE_PL_LANE_PDWN = 676; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_MODE_PL_LANE_INVERT = 677; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_MODE_PL_LANE_QUIESCE_P = 678; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_MODE_PL_LANE_QUIESCE_P_LEN = 679; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_MODE_PL_LANE_QUIESCE_N = 680; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_MODE_PL_LANE_QUIESCE_N_LEN = 681; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 682; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_0 = 683; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_1 = 684; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_2 = 685; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_3 = 686; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_4 = 687; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_5 = 688; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_6 = 689; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_7 = 690; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_BIST_STAT_PL_LANE_ERR = 691; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_PRBS_MODE_PL_TAP_ID = 692; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_PRBS_MODE_PL_TAP_ID_LEN = 693; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 694; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 695; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 696; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_FIR_PL_ERRS = 697; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_FIR_MASK_PL_ERRS = 698; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 699; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 700; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 701; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 702; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_PL_LANE_PDWN = 703; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_PL_LANE_INVERT = 704; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_PL_LANE_QUIESCE_P = 705; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_PL_LANE_QUIESCE_P_LEN = 706; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_PL_LANE_QUIESCE_N = 707; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_PL_LANE_QUIESCE_N_LEN = 708; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 709; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_0 = 710; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_1 = 711; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_2 = 712; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_3 = 713; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 714; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_5 = 715; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_6 = 716; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_7 = 717; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_BIST_STAT_PL_LANE_ERR = 718; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_PRBS_MODE_PL_TAP_ID = 719; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_PRBS_MODE_PL_TAP_ID_LEN = 720; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 721; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 722; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 723; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_FIR_PL_ERRS = 724; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_FIR_MASK_PL_ERRS = 725; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 726; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 727; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 728; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 729; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_WIRETEST_PP_WT_PATTERN_LENGTH = 730; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_WIRETEST_PP_WT_PATTERN_LENGTH_LEN = 731; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_MODE_PP_REDUCED_SCRAMBLE = 732; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_MODE_PP_REDUCED_SCRAMBLE_LEN = 733; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_MODE_PP_PRBS_SCRAMBLE = 734; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_MODE_PP_PRBS_SCRAMBLE_LEN = 735; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_MODE_PP_FIFO_L2U_DLY = 736; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_MODE_PP_FIFO_L2U_DLY_LEN = 737; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_SLS_GCRMSG_PP_SND_CMD = 738; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_SLS_GCRMSG_PP_DYN_RECAL_TSR_IGNORE_GCRMSG = 739; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_SLS_GCRMSG_PP_CMD = 740; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_SLS_GCRMSG_PP_CMD_LEN = 741; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_SLS_GCRMSG_PP_SND_CMD_PREV = 742; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_SLS_GCRMSG_PP_SND_USING_REG_SCRAMBLE = 743; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_A_PP_ERR_INJ_A_RAND_BEAT_DIS = 744; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL = 745; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL_LEN = 746; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL = 747; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL_LEN = 748; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL = 749; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL_LEN = 750; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_B_PP_ERR_INJ_B_RAND_BEAT_DIS = 751; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL = 752; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL_LEN = 753; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL = 754; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL_LEN = 755; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL = 756; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL_LEN = 757; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL = 758; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN = 759; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL = 760; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN = 761; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BIST_CNTL_PP_EN = 762; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_MODE = 763; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_ALL_CMD = 764; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_RECAL = 765; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD = 766; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD_LEN = 767; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_CNTL_PP_ENABLE_REDUCED_SCRAMBLE = 768; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_RESET_CFG_PP_HLD = 769; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_RESET_CFG_PP_HLD_LEN = 770; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL1_PP_DAC_CNTL = 771; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL1_PP_DAC_CNTL_LEN = 772; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL1_PP_PHASE_SEL = 773; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL2_PP_PULSE_OFFSET = 774; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL2_PP_PULSE_OFFSET_LEN = 775; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL3_PP_PULSE_WIDTH = 776; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL3_PP_PULSE_WIDTH_LEN = 777; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_PL_LANE_PDWN = 778; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_PL_LANE_INVERT = 779; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_PL_LANE_QUIESCE_P = 780; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_PL_LANE_QUIESCE_P_LEN = 781; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_PL_LANE_QUIESCE_N = 782; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_PL_LANE_QUIESCE_N_LEN = 783; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 784; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_0 = 785; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_1 = 786; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_2 = 787; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_3 = 788; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 789; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_5 = 790; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_6 = 791; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_7 = 792; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_BIST_STAT_PL_LANE_ERR = 793; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_PRBS_MODE_PL_TAP_ID = 794; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_PRBS_MODE_PL_TAP_ID_LEN = 795; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 796; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 797; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 798; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_FIR_PL_ERRS = 799; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_FIR_MASK_PL_ERRS = 800; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 801; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 802; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 803; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 804; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_PL_LANE_PDWN = 805; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_PL_LANE_INVERT = 806; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_PL_LANE_QUIESCE_P = 807; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_PL_LANE_QUIESCE_P_LEN = 808; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_PL_LANE_QUIESCE_N = 809; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_PL_LANE_QUIESCE_N_LEN = 810; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 811; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_0 = 812; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_1 = 813; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_2 = 814; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_3 = 815; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 816; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_5 = 817; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_6 = 818; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_7 = 819; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_BIST_STAT_PL_LANE_ERR = 820; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_PRBS_MODE_PL_TAP_ID = 821; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_PRBS_MODE_PL_TAP_ID_LEN = 822; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 823; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 824; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 825; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_FIR_PL_ERRS = 826; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_FIR_MASK_PL_ERRS = 827; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 828; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 829; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 830; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 831; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_PL_LANE_PDWN = 832; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_PL_LANE_INVERT = 833; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_PL_LANE_QUIESCE_P = 834; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_PL_LANE_QUIESCE_P_LEN = 835; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_PL_LANE_QUIESCE_N = 836; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_PL_LANE_QUIESCE_N_LEN = 837; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 838; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_0 = 839; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_1 = 840; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_2 = 841; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_3 = 842; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 843; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_5 = 844; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_6 = 845; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_7 = 846; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_BIST_STAT_PL_LANE_ERR = 847; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_PRBS_MODE_PL_TAP_ID = 848; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_PRBS_MODE_PL_TAP_ID_LEN = 849; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 850; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 851; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 852; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_FIR_PL_ERRS = 853; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_FIR_MASK_PL_ERRS = 854; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 855; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 856; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 857; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 858; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_PL_LANE_PDWN = 859; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_PL_LANE_INVERT = 860; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_PL_LANE_QUIESCE_P = 861; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_PL_LANE_QUIESCE_P_LEN = 862; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_PL_LANE_QUIESCE_N = 863; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_PL_LANE_QUIESCE_N_LEN = 864; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 865; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_0 = 866; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_1 = 867; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_2 = 868; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_3 = 869; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 870; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_5 = 871; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_6 = 872; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_7 = 873; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_BIST_STAT_PL_LANE_ERR = 874; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_PRBS_MODE_PL_TAP_ID = 875; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_PRBS_MODE_PL_TAP_ID_LEN = 876; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 877; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 878; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 879; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_FIR_PL_ERRS = 880; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_FIR_MASK_PL_ERRS = 881; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 882; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 883; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 884; static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 885; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_PL_LANE_PDWN = 886; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_PL_LANE_INVERT = 887; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_PL_LANE_QUIESCE_P = 888; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_PL_LANE_QUIESCE_P_LEN = 889; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_PL_LANE_QUIESCE_N = 890; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_PL_LANE_QUIESCE_N_LEN = 891; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 892; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_0 = 893; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_1 = 894; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_2 = 895; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_3 = 896; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_4 = 897; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 898; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_6 = 899; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_7 = 900; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_BIST_STAT_PL_LANE_ERR = 901; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_PRBS_MODE_PL_TAP_ID = 902; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_PRBS_MODE_PL_TAP_ID_LEN = 903; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 904; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 905; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 906; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_FIR_PL_ERRS = 907; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_FIR_MASK_PL_ERRS = 908; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 909; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 910; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 911; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 912; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_WIRETEST_PP_WT_PATTERN_LENGTH = 913; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_WIRETEST_PP_WT_PATTERN_LENGTH_LEN = 914; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_MODE_PP_REDUCED_SCRAMBLE = 915; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_MODE_PP_REDUCED_SCRAMBLE_LEN = 916; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_MODE_PP_PRBS_SCRAMBLE = 917; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_MODE_PP_PRBS_SCRAMBLE_LEN = 918; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_MODE_PP_FIFO_L2U_DLY = 919; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_MODE_PP_FIFO_L2U_DLY_LEN = 920; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_SLS_GCRMSG_PP_SND_CMD = 921; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_SLS_GCRMSG_PP_DYN_RECAL_TSR_IGNORE_GCRMSG = 922; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_SLS_GCRMSG_PP_CMD = 923; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_SLS_GCRMSG_PP_CMD_LEN = 924; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_SLS_GCRMSG_PP_SND_CMD_PREV = 925; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_SLS_GCRMSG_PP_SND_USING_REG_SCRAMBLE = 926; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_A_PP_ERR_INJ_A_RAND_BEAT_DIS = 927; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL = 928; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL_LEN = 929; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL = 930; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL_LEN = 931; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL = 932; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL_LEN = 933; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_B_PP_ERR_INJ_B_RAND_BEAT_DIS = 934; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL = 935; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL_LEN = 936; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL = 937; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL_LEN = 938; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL = 939; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL_LEN = 940; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL = 941; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN = 942; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL = 943; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN = 944; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BIST_CNTL_PP_EN = 945; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_MODE = 946; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_ALL_CMD = 947; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_RECAL = 948; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD = 949; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD_LEN = 950; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_CNTL_PP_ENABLE_REDUCED_SCRAMBLE = 951; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_RESET_CFG_PP_HLD = 952; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_RESET_CFG_PP_HLD_LEN = 953; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL1_PP_DAC_CNTL = 954; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL1_PP_DAC_CNTL_LEN = 955; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL1_PP_PHASE_SEL = 956; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL2_PP_PULSE_OFFSET = 957; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL2_PP_PULSE_OFFSET_LEN = 958; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL3_PP_PULSE_WIDTH = 959; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL3_PP_PULSE_WIDTH_LEN = 960; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_PL_LANE_PDWN = 961; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_PL_LANE_INVERT = 962; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_PL_LANE_QUIESCE_P = 963; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_PL_LANE_QUIESCE_P_LEN = 964; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_PL_LANE_QUIESCE_N = 965; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_PL_LANE_QUIESCE_N_LEN = 966; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 967; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_0 = 968; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_1 = 969; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_2 = 970; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_3 = 971; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_4 = 972; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 973; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_6 = 974; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_7 = 975; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_BIST_STAT_PL_LANE_ERR = 976; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_PRBS_MODE_PL_TAP_ID = 977; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_PRBS_MODE_PL_TAP_ID_LEN = 978; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 979; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 980; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 981; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_FIR_PL_ERRS = 982; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_FIR_MASK_PL_ERRS = 983; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 984; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 985; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 986; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 987; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_PL_LANE_PDWN = 988; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_PL_LANE_INVERT = 989; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_PL_LANE_QUIESCE_P = 990; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_PL_LANE_QUIESCE_P_LEN = 991; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_PL_LANE_QUIESCE_N = 992; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_PL_LANE_QUIESCE_N_LEN = 993; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 994; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_0 = 995; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_1 = 996; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_2 = 997; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_3 = 998; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_4 = 999; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 1000; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_6 = 1001; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_7 = 1002; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_BIST_STAT_PL_LANE_ERR = 1003; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_PRBS_MODE_PL_TAP_ID = 1004; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_PRBS_MODE_PL_TAP_ID_LEN = 1005; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 1006; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 1007; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 1008; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_FIR_PL_ERRS = 1009; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_FIR_MASK_PL_ERRS = 1010; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 1011; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 1012; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 1013; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 1014; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_PL_LANE_PDWN = 1015; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_PL_LANE_INVERT = 1016; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_PL_LANE_QUIESCE_P = 1017; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_PL_LANE_QUIESCE_P_LEN = 1018; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_PL_LANE_QUIESCE_N = 1019; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_PL_LANE_QUIESCE_N_LEN = 1020; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 1021; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_0 = 1022; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_1 = 1023; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_2 = 1024; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_3 = 1025; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_4 = 1026; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 1027; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_6 = 1028; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_7 = 1029; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_BIST_STAT_PL_LANE_ERR = 1030; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_PRBS_MODE_PL_TAP_ID = 1031; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_PRBS_MODE_PL_TAP_ID_LEN = 1032; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 1033; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 1034; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 1035; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_FIR_PL_ERRS = 1036; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_FIR_MASK_PL_ERRS = 1037; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 1038; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 1039; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 1040; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 1041; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_PL_LANE_PDWN = 1042; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_PL_LANE_INVERT = 1043; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_PL_LANE_QUIESCE_P = 1044; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_PL_LANE_QUIESCE_P_LEN = 1045; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_PL_LANE_QUIESCE_N = 1046; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_PL_LANE_QUIESCE_N_LEN = 1047; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_PL_LANE_SCRAMBLE_DISABLE = 1048; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_0 = 1049; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_1 = 1050; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_2 = 1051; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_3 = 1052; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_4 = 1053; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE = 1054; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_6 = 1055; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_7 = 1056; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_BIST_STAT_PL_LANE_ERR = 1057; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_PRBS_MODE_PL_TAP_ID = 1058; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_PRBS_MODE_PL_TAP_ID_LEN = 1059; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG = 1060; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN = 1061; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG = 1062; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_FIR_PL_ERRS = 1063; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_FIR_MASK_PL_ERRS = 1064; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 1065; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE = 1066; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE = 1067; static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG = 1068; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_BYPASSN = 1069; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_SPEDIV = 1070; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_SPEDIV_LEN = 1071; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_CPISEL = 1072; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_CPISEL_LEN = 1073; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_DIVSELB = 1074; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_DIVSELB_LEN = 1075; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_PCLKSEL = 1076; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_PCLKSEL_LEN = 1077; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_UNUSED0 = 1078; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_BANDSEL = 1079; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_BANDSEL_LEN = 1080; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE0 = 1081; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE1 = 1082; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE23 = 1083; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE23_LEN = 1084; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE4 = 1085; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE5 = 1086; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE6 = 1087; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE7 = 1088; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE8 = 1089; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE9 = 1090; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE10 = 1091; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_ATSTSEL = 1092; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_ATSTSEL_LEN = 1093; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_VCOSEL = 1094; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_BGOFFSET = 1095; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_BGOFFSET_LEN = 1096; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_CCALBANDSEL = 1097; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_CCALBANDSEL_LEN = 1098; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_UNUSED1 = 1099; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_UNUSED1_LEN = 1100; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_CCALFMAX = 1101; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_CCALFMIN = 1102; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_CCALLOAD = 1103; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_CCALCVHOLD = 1104; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_DCTEST_DC = 1105; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_CCALMETH = 1106; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_UNUSED4 = 1107; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_CMLEN = 1108; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0_UNUSED5 = 1109; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL1_CALREQ = 1110; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL1_CALRECAL = 1111; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL1_RDIV = 1112; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL1_RDIV_LEN = 1113; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL1_UNUSED2 = 1114; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL1_UNUSED2_LEN = 1115; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL1_CCALCOMP = 1116; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL1_CCALERR = 1117; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL1_SEL = 1118; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL1_SEL_LEN = 1119; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL1_EN = 1120; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL1_VSEL = 1121; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL1_VSEL_LEN = 1122; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL1_PLLOUTA_DISABLE = 1123; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL2_UNUSED_OUTB_DISABLE = 1124; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL2_UNUSED = 1125; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL2_UNUSED_LEN = 1126; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL2_RESET = 1127; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL2_SPARE = 1128; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL2_SPARE_LEN = 1129; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_BYPASSN = 1130; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_SPEDIV = 1131; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_SPEDIV_LEN = 1132; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CPISEL = 1133; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CPISEL_LEN = 1134; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_DIVSELB = 1135; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_DIVSELB_LEN = 1136; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_PCLKSEL = 1137; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_PCLKSEL_LEN = 1138; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_UNUSED0 = 1139; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_BANDSEL = 1140; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_BANDSEL_LEN = 1141; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_ANALOGTUNE = 1142; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_ANALOGTUNE_LEN = 1143; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_ATSTSEL = 1144; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_ATSTSEL_LEN = 1145; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_VCOSEL = 1146; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_BGOFFSET = 1147; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_BGOFFSET_LEN = 1148; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CCALBANDSEL = 1149; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CCALBANDSEL_LEN = 1150; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_UNUSED1 = 1151; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_UNUSED1_LEN = 1152; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CCALFMAX = 1153; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CCALFMIN = 1154; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CCALLOAD = 1155; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CCALCVHOLD = 1156; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CCALMETH = 1157; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_UNUSED4 = 1158; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CMLEN = 1159; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_UNUSED5 = 1160; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_CALREQ = 1161; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_CALRECAL = 1162; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_RDIV = 1163; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_RDIV_LEN = 1164; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_UNUSED2 = 1165; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_UNUSED2_LEN = 1166; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_CCALCOMP = 1167; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_CCALERR = 1168; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_PLLOUTA_DISABLE = 1169; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP2_SHADOW_UNUSED_OUTB_DISABLE = 1170; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP2_SHADOW_UNUSED = 1171; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP2_SHADOW_UNUSED_LEN = 1172; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP2_SHADOW_RESET = 1173; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP2_SHADOW_SPARE = 1174; static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP2_SHADOW_SPARE_LEN = 1175; static const uint64_t IDX_CEN_CUPLL_CTL_ANALOGTUNE = 1176; static const uint64_t IDX_CEN_CUPLL_CTL_ANALOGTUNE_LEN = 1177; static const uint64_t IDX_CEN_CUPLL_CTL_ATSTSEL = 1178; static const uint64_t IDX_CEN_CUPLL_CTL_ATSTSEL_LEN = 1179; static const uint64_t IDX_CEN_CUPLL_CTL_BANDSEL = 1180; static const uint64_t IDX_CEN_CUPLL_CTL_BANDSEL_LEN = 1181; static const uint64_t IDX_CEN_CUPLL_CTL_DIVSELFB = 1182; static const uint64_t IDX_CEN_CUPLL_CTL_DIVSELFB_LEN = 1183; static const uint64_t IDX_CEN_CUPLL_CTL_BGOFFSET = 1184; static const uint64_t IDX_CEN_CUPLL_CTL_BGOFFSET_LEN = 1185; static const uint64_t IDX_CEN_CUPLL_CTL_SPARE = 1186; static const uint64_t IDX_CEN_CUPLL_CTL_CAPSEL = 1187; static const uint64_t IDX_CEN_CUPLL_CTL_CPISEL = 1188; static const uint64_t IDX_CEN_CUPLL_CTL_CPISEL_LEN = 1189; static const uint64_t IDX_CEN_CUPLL_CTL_ITUNE = 1190; static const uint64_t IDX_CEN_CUPLL_CTL_ITUNE_LEN = 1191; static const uint64_t IDX_CEN_CUPLL_CTL_PCLKSEL = 1192; static const uint64_t IDX_CEN_CUPLL_CTL_PCLKSEL_LEN = 1193; static const uint64_t IDX_CEN_CUPLL_CTL_PHASEFB = 1194; static const uint64_t IDX_CEN_CUPLL_CTL_PHASEFB_LEN = 1195; static const uint64_t IDX_CEN_CUPLL_CTL_RDIV = 1196; static const uint64_t IDX_CEN_CUPLL_CTL_REFCLKSEL = 1197; static const uint64_t IDX_CEN_CUPLL_CTL_RESSEL = 1198; static const uint64_t IDX_CEN_CUPLL_CTL_VREGENABLE_N = 1199; static const uint64_t IDX_CEN_CUPLL_CTL_VREGBYPASS = 1200; static const uint64_t IDX_CEN_CUPLL_CTL_PLLLOCK = 1201; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_ANALOGTUNE = 1202; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_ANALOGTUNE_LEN = 1203; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_ATSTSEL = 1204; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_ATSTSEL_LEN = 1205; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_BANDSEL = 1206; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_BANDSEL_LEN = 1207; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_DIVSELFB = 1208; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_DIVSELFB_LEN = 1209; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_BGOFFSET = 1210; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_BGOFFSET_LEN = 1211; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_SPARE = 1212; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_CAPSEL = 1213; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_CPISEL = 1214; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_CPISEL_LEN = 1215; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_ITUNE = 1216; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_ITUNE_LEN = 1217; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_PCLKSEL = 1218; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_PCLKSEL_LEN = 1219; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_PHASEFB = 1220; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_PHASEFB_LEN = 1221; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_RDIV = 1222; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_REFCLKSEL = 1223; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_RESSEL = 1224; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_VREGENABLE_N = 1225; static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_SHADOW_VREGBYPASS = 1226; static const uint64_t IDX_CEN_RX_CLK_MODE_PG_PDWN = 1227; static const uint64_t IDX_CEN_RX_CLK_MODE_PG_INVERT = 1228; static const uint64_t IDX_CEN_RX_SPARE_MODE_PG_0 = 1229; static const uint64_t IDX_CEN_RX_SPARE_MODE_PG_1 = 1230; static const uint64_t IDX_CEN_RX_SPARE_MODE_PG_2 = 1231; static const uint64_t IDX_CEN_RX_SPARE_MODE_PG_3 = 1232; static const uint64_t IDX_CEN_RX_SPARE_MODE_PG_4 = 1233; static const uint64_t IDX_CEN_RX_SPARE_MODE_PG_SLS_EXTEND_SEL = 1234; static const uint64_t IDX_CEN_RX_SPARE_MODE_PG_SLS_EXTEND_SEL_LEN = 1235; static const uint64_t IDX_CEN_RX_MODE_PG_MASTER = 1236; static const uint64_t IDX_CEN_RX_MODE_PG_DISABLE_FENCE_RESET = 1237; static const uint64_t IDX_CEN_RX_MODE_PG_PDWN_LITE_DISABLE = 1238; static const uint64_t IDX_CEN_RX_MODE_PG_USE_SLS_AS_SPR = 1239; static const uint64_t IDX_CEN_RX_MODE_PG_BUMP_BEFORE_PRBS_SYNC = 1240; static const uint64_t IDX_CEN_RX_RESET_ACT_PG_CLR_PAR_ERRS = 1241; static const uint64_t IDX_CEN_RX_RESET_ACT_PG_FIR = 1242; static const uint64_t IDX_CEN_RX_ID1_PG_BUS_ID = 1243; static const uint64_t IDX_CEN_RX_ID1_PG_BUS_ID_LEN = 1244; static const uint64_t IDX_CEN_RX_ID1_PG_GROUP_ID = 1245; static const uint64_t IDX_CEN_RX_ID1_PG_GROUP_ID_LEN = 1246; static const uint64_t IDX_CEN_RX_ID2_PG_LAST_GROUP_ID = 1247; static const uint64_t IDX_CEN_RX_ID2_PG_LAST_GROUP_ID_LEN = 1248; static const uint64_t IDX_CEN_RX_ID3_PG_START_LANE_ID = 1249; static const uint64_t IDX_CEN_RX_ID3_PG_START_LANE_ID_LEN = 1250; static const uint64_t IDX_CEN_RX_ID3_PG_END_LANE_ID = 1251; static const uint64_t IDX_CEN_RX_ID3_PG_END_LANE_ID_LEN = 1252; static const uint64_t IDX_CEN_RX_MINIKERF_PG_MINIKERF = 1253; static const uint64_t IDX_CEN_RX_MINIKERF_PG_MINIKERF_LEN = 1254; static const uint64_t IDX_CEN_RX_DYN_RPR_DEBUG2_PG_BAD_BUS_LANE_ERR_CNTR_DIS_CLR = 1255; static const uint64_t IDX_CEN_RX_SLS_MODE_PG_DISABLE = 1256; static const uint64_t IDX_CEN_RX_SLS_MODE_PG_TX_DISABLE = 1257; static const uint64_t IDX_CEN_RX_SLS_MODE_PG_CNTR_TAP_PTS = 1258; static const uint64_t IDX_CEN_RX_SLS_MODE_PG_CNTR_TAP_PTS_LEN = 1259; static const uint64_t IDX_CEN_RX_SLS_MODE_PG_NONSLS_CNTR_TAP_PTS = 1260; static const uint64_t IDX_CEN_RX_SLS_MODE_PG_NONSLS_CNTR_TAP_PTS_LEN = 1261; static const uint64_t IDX_CEN_RX_SLS_MODE_PG_ERR_CHK_RUN = 1262; static const uint64_t IDX_CEN_RX_SLS_MODE_PG_FINAL_NOP_CS = 1263; static const uint64_t IDX_CEN_RX_SLS_MODE_PG_SR_FINAL_NOP_TIMEOUT_SEL = 1264; static const uint64_t IDX_CEN_RX_SLS_MODE_PG_SR_FINAL_NOP_TIMEOUT_SEL_LEN = 1265; static const uint64_t IDX_CEN_RX_SLS_MODE_PG_EXCEPTION2_CS = 1266; static const uint64_t IDX_CEN_RX_TRAINING_START_PG_START_WIRETEST = 1267; static const uint64_t IDX_CEN_RX_TRAINING_START_PG_START_DESKEW = 1268; static const uint64_t IDX_CEN_RX_TRAINING_START_PG_START_EYE_OPT = 1269; static const uint64_t IDX_CEN_RX_TRAINING_START_PG_START_REPAIR = 1270; static const uint64_t IDX_CEN_RX_TRAINING_START_PG_START_FUNC_MODE = 1271; static const uint64_t IDX_CEN_RX_TRAINING_START_PG_START_BIST = 1272; static const uint64_t IDX_CEN_RX_TRAINING_START_PG_START_OFFSET_CAL = 1273; static const uint64_t IDX_CEN_RX_TRAINING_START_PG_START_WT_BYPASS = 1274; static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG_WIRETEST_DONE = 1275; static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG_DESKEW_DONE = 1276; static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG_EYE_OPT_DONE = 1277; static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG_REPAIR_DONE = 1278; static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG_FUNC_MODE_DONE = 1279; static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG_BIST_STARTED = 1280; static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG_OFFSET_CAL_DONE = 1281; static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG_WT_BYPASS_DONE = 1282; static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG_WIRETEST_FAILED = 1283; static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG_DESKEW_FAILED = 1284; static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG_EYE_OPT_FAILED = 1285; static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG_REPAIR_FAILED = 1286; static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG_START_BIST_FAILED = 1287; static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG_OFFSET_CAL_FAILED = 1288; static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG_WT_BYPASS_FAILED = 1289; static const uint64_t IDX_CEN_RX_RECAL_STATUS_PG_STATUS = 1290; static const uint64_t IDX_CEN_RX_RECAL_STATUS_PG_STATUS_LEN = 1291; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL_PG_SLS = 1292; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL_PG_SLS_LEN = 1293; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL_PG_DS_BL = 1294; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL_PG_DS_BL_LEN = 1295; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL_PG_CL = 1296; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL_PG_CL_LEN = 1297; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL_PG_WT = 1298; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL_PG_WT_LEN = 1299; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL_PG_DS = 1300; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL_PG_DS_LEN = 1301; static const uint64_t IDX_CEN_RX_FIFO_MODE_PG_INITIAL_L2U_DLY = 1302; static const uint64_t IDX_CEN_RX_FIFO_MODE_PG_INITIAL_L2U_DLY_LEN = 1303; static const uint64_t IDX_CEN_RX_FIFO_MODE_PG_FINAL_L2U_DLY = 1304; static const uint64_t IDX_CEN_RX_FIFO_MODE_PG_FINAL_L2U_DLY_LEN = 1305; static const uint64_t IDX_CEN_RX_FIFO_MODE_PG_FINAL_L2U_MIN_ERR_THRESH = 1306; static const uint64_t IDX_CEN_RX_FIFO_MODE_PG_FINAL_L2U_MIN_ERR_THRESH_LEN = 1307; static const uint64_t IDX_CEN_RX_DYN_RPR_MODE_PG_ENC_BAD_DATA_LANE_SHFT_AMT = 1308; static const uint64_t IDX_CEN_RX_DYN_RPR_MODE_PG_ENC_BAD_DATA_LANE_SHFT_AMT_LEN = 1309; static const uint64_t IDX_CEN_RX_FIR1_PG_ERRS = 1310; static const uint64_t IDX_CEN_RX_FIR1_PG_ERRS_LEN = 1311; static const uint64_t IDX_CEN_RX_FIR1_PG_PL_FIR_ERR = 1312; static const uint64_t IDX_CEN_RX_FIR2_PG_ERRS = 1313; static const uint64_t IDX_CEN_RX_FIR2_PG_ERRS_LEN = 1314; static const uint64_t IDX_CEN_RX_FIR1_MASK_PG_ERRS = 1315; static const uint64_t IDX_CEN_RX_FIR1_MASK_PG_ERRS_LEN = 1316; static const uint64_t IDX_CEN_RX_FIR1_MASK_PG_PL_FIR_ERR_MASK = 1317; static const uint64_t IDX_CEN_RX_FIR2_MASK_PG_ERRS = 1318; static const uint64_t IDX_CEN_RX_FIR2_MASK_PG_ERRS_LEN = 1319; static const uint64_t IDX_CEN_RX_FIR1_ERROR_INJECT_PG_PG_ERR_INJ = 1320; static const uint64_t IDX_CEN_RX_FIR1_ERROR_INJECT_PG_PG_ERR_INJ_LEN = 1321; static const uint64_t IDX_CEN_RX_FIR2_ERROR_INJECT_PG_PG_ERR_INJ = 1322; static const uint64_t IDX_CEN_RX_FIR2_ERROR_INJECT_PG_PG_ERR_INJ_LEN = 1323; static const uint64_t IDX_CEN_RX_FIR_TRAINING_PG_ERROR = 1324; static const uint64_t IDX_CEN_RX_FIR_TRAINING_PG_PG_STATIC_SPARE_DEPLOYED = 1325; static const uint64_t IDX_CEN_RX_FIR_TRAINING_PG_PG_STATIC_MAX_SPARES_EXCEEDED = 1326; static const uint64_t IDX_CEN_RX_FIR_TRAINING_PG_PG_DYNAMIC_REPAIR_ERROR = 1327; static const uint64_t IDX_CEN_RX_FIR_TRAINING_PG_PG_DYNAMIC_SPARE_DEPLOYED = 1328; static const uint64_t IDX_CEN_RX_FIR_TRAINING_PG_PG_DYNAMIC_MAX_SPARES_EXCEEDED = 1329; static const uint64_t IDX_CEN_RX_FIR_TRAINING_PG_PG_RECAL_ERROR = 1330; static const uint64_t IDX_CEN_RX_FIR_TRAINING_PG_PG_RECAL_SPARE_DEPLOYED = 1331; static const uint64_t IDX_CEN_RX_FIR_TRAINING_PG_PG_RECAL_MAX_SPARES_EXCEEDED = 1332; static const uint64_t IDX_CEN_RX_FIR_TRAINING_PG_PG_TOO_MANY_BUS_ERRORS = 1333; static const uint64_t IDX_CEN_RX_FIR_TRAINING_MASK_PG_ERROR = 1334; static const uint64_t IDX_CEN_RX_FIR_TRAINING_MASK_PG_PG_STATIC_SPARE_DEPLOYED_MASK = 1335; static const uint64_t IDX_CEN_RX_FIR_TRAINING_MASK_PG_PG_STATIC_MAX_SPARES_EXCEEDED_MASK = 1336; static const uint64_t IDX_CEN_RX_FIR_TRAINING_MASK_PG_PG_DYNAMIC_REPAIR_ERROR_MASK = 1337; static const uint64_t IDX_CEN_RX_FIR_TRAINING_MASK_PG_PG_DYNAMIC_SPARE_DEPLOYED_MASK = 1338; static const uint64_t IDX_CEN_RX_FIR_TRAINING_MASK_PG_PG_DYNAMIC_MAX_SPARES_EXCEEDED_MASK = 1339; static const uint64_t IDX_CEN_RX_FIR_TRAINING_MASK_PG_PG_RECAL_ERROR_MASK = 1340; static const uint64_t IDX_CEN_RX_FIR_TRAINING_MASK_PG_PG_RECAL_SPARE_DEPLOYED_MASK = 1341; static const uint64_t IDX_CEN_RX_FIR_TRAINING_MASK_PG_PG_RECAL_MAX_SPARES_EXCEEDED_MASK = 1342; static const uint64_t IDX_CEN_RX_FIR_TRAINING_MASK_PG_PG_TOO_MANY_BUS_ERRORS_MASK = 1343; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL1_PG_EO_OFFSET_SEL = 1344; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL1_PG_EO_OFFSET_SEL_LEN = 1345; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL1_PG_EO_AMP_SEL = 1346; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL1_PG_EO_AMP_SEL_LEN = 1347; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL1_PG_EO_CTLE_SEL = 1348; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL1_PG_EO_CTLE_SEL_LEN = 1349; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL1_PG_EO_H1AP_SEL = 1350; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL1_PG_EO_H1AP_SEL_LEN = 1351; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL1_PG_EO_DDC_SEL = 1352; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL1_PG_EO_DDC_SEL_LEN = 1353; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL1_PG_EO_FINAL_L2U_SEL = 1354; static const uint64_t IDX_CEN_RX_LANE_BAD_VEC_0_15_PG_15 = 1355; static const uint64_t IDX_CEN_RX_LANE_BAD_VEC_0_15_PG_15_LEN = 1356; static const uint64_t IDX_CEN_RX_LANE_BAD_VEC_16_31_PG_31 = 1357; static const uint64_t IDX_CEN_RX_LANE_BAD_VEC_16_31_PG_31_LEN = 1358; static const uint64_t IDX_CEN_RX_LANE_DISABLED_VEC_0_15_PG_15 = 1359; static const uint64_t IDX_CEN_RX_LANE_DISABLED_VEC_0_15_PG_15_LEN = 1360; static const uint64_t IDX_CEN_RX_LANE_DISABLED_VEC_16_31_PG_31 = 1361; static const uint64_t IDX_CEN_RX_LANE_DISABLED_VEC_16_31_PG_31_LEN = 1362; static const uint64_t IDX_CEN_RX_LANE_SWAPPED_VEC_0_15_PG_15 = 1363; static const uint64_t IDX_CEN_RX_LANE_SWAPPED_VEC_0_15_PG_15_LEN = 1364; static const uint64_t IDX_CEN_RX_LANE_SWAPPED_VEC_16_31_PG_31 = 1365; static const uint64_t IDX_CEN_RX_LANE_SWAPPED_VEC_16_31_PG_31_LEN = 1366; static const uint64_t IDX_CEN_RX_WIRETEST_LANEINFO_PG_WTR_MAX_BAD_LANES = 1367; static const uint64_t IDX_CEN_RX_WIRETEST_LANEINFO_PG_WTR_MAX_BAD_LANES_LEN = 1368; static const uint64_t IDX_CEN_RX_WIRETEST_GCRMSG_PG_WT_PREV_DONE_GCRMSG = 1369; static const uint64_t IDX_CEN_RX_WIRETEST_GCRMSG_PG_WT_ALL_DONE_GCRMSG = 1370; static const uint64_t IDX_CEN_RX_WIRETEST_GCRMSG_PG_CD_PREV_DONE_GCRMSG = 1371; static const uint64_t IDX_CEN_RX_WIRETEST_GCRMSG_PG_CD_ALL_DONE_GCRMSG = 1372; static const uint64_t IDX_CEN_RX_WIRETEST_GCRMSG_PG_CNTLS_PREV_LDED_GCRMSG = 1373; static const uint64_t IDX_CEN_RX_DESKEW_GCRMSG_PG_SEQ = 1374; static const uint64_t IDX_CEN_RX_DESKEW_GCRMSG_PG_SEQ_LEN = 1375; static const uint64_t IDX_CEN_RX_DESKEW_GCRMSG_PG_SKMIN = 1376; static const uint64_t IDX_CEN_RX_DESKEW_GCRMSG_PG_SKMIN_LEN = 1377; static const uint64_t IDX_CEN_RX_DESKEW_GCRMSG_PG_SKMAX = 1378; static const uint64_t IDX_CEN_RX_DESKEW_GCRMSG_PG_SKMAX_LEN = 1379; static const uint64_t IDX_CEN_RX_DESKEW_MODE_PG_MAX_LIMIT = 1380; static const uint64_t IDX_CEN_RX_DESKEW_MODE_PG_MAX_LIMIT_LEN = 1381; static const uint64_t IDX_CEN_RX_DESKEW_STATUS_PG_MINSKEW_GRP = 1382; static const uint64_t IDX_CEN_RX_DESKEW_STATUS_PG_MINSKEW_GRP_LEN = 1383; static const uint64_t IDX_CEN_RX_DESKEW_STATUS_PG_MAXSKEW_GRP = 1384; static const uint64_t IDX_CEN_RX_DESKEW_STATUS_PG_MAXSKEW_GRP_LEN = 1385; static const uint64_t IDX_CEN_RX_BAD_LANE_ENC_GCRMSG_PG_LANE1_GCRMSG = 1386; static const uint64_t IDX_CEN_RX_BAD_LANE_ENC_GCRMSG_PG_LANE1_GCRMSG_LEN = 1387; static const uint64_t IDX_CEN_RX_BAD_LANE_ENC_GCRMSG_PG_LANE2_GCRMSG = 1388; static const uint64_t IDX_CEN_RX_BAD_LANE_ENC_GCRMSG_PG_LANE2_GCRMSG_LEN = 1389; static const uint64_t IDX_CEN_RX_BAD_LANE_ENC_GCRMSG_PG_CODE_GCRMSG = 1390; static const uint64_t IDX_CEN_RX_BAD_LANE_ENC_GCRMSG_PG_CODE_GCRMSG_LEN = 1391; static const uint64_t IDX_CEN_RX_TX_BUS_INFO_PG_WIDTH = 1392; static const uint64_t IDX_CEN_RX_TX_BUS_INFO_PG_WIDTH_LEN = 1393; static const uint64_t IDX_CEN_RX_TX_BUS_INFO_PG_BUS_WIDTH = 1394; static const uint64_t IDX_CEN_RX_TX_BUS_INFO_PG_BUS_WIDTH_LEN = 1395; static const uint64_t IDX_CEN_RX_SLS_LANE_ENC_GCRMSG_PG_GCRMSG = 1396; static const uint64_t IDX_CEN_RX_SLS_LANE_ENC_GCRMSG_PG_GCRMSG_LEN = 1397; static const uint64_t IDX_CEN_RX_SLS_LANE_ENC_GCRMSG_PG_VAL_GCRMSG = 1398; static const uint64_t IDX_CEN_RX_FENCE_PG_FENCE = 1399; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL2_PG_FUNC_MODE_SEL = 1400; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL2_PG_FUNC_MODE_SEL_LEN = 1401; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL2_PG_RC_SLOWDOWN_SEL = 1402; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL2_PG_RC_SLOWDOWN_SEL_LEN = 1403; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL2_PG_PUP_LITE_WAIT_SEL = 1404; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL2_PG_PUP_LITE_WAIT_SEL_LEN = 1405; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL2_PG_EO_L2U_WD_SEL = 1406; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL2_PG_EO_L2U_WD_SEL_LEN = 1407; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL2_PG_EO_VGA_WD_SEL = 1408; static const uint64_t IDX_CEN_RX_TIMEOUT_SEL2_PG_EO_VGA_WD_SEL_LEN = 1409; static const uint64_t IDX_CEN_RX_MISC_ANALOG_PG_C4_SEL = 1410; static const uint64_t IDX_CEN_RX_MISC_ANALOG_PG_C4_SEL_LEN = 1411; static const uint64_t IDX_CEN_RX_MISC_ANALOG_PG_NEGZ_EN = 1412; static const uint64_t IDX_CEN_RX_MISC_ANALOG_PG_PROT_SPEED_SLCT = 1413; static const uint64_t IDX_CEN_RX_MISC_ANALOG_PG_IREF_BC = 1414; static const uint64_t IDX_CEN_RX_MISC_ANALOG_PG_IREF_BC_LEN = 1415; static const uint64_t IDX_CEN_RX_DYN_RPR_GCRMSG_PG_REQ = 1416; static const uint64_t IDX_CEN_RX_DYN_RPR_GCRMSG_PG_LANE2RPR = 1417; static const uint64_t IDX_CEN_RX_DYN_RPR_GCRMSG_PG_LANE2RPR_LEN = 1418; static const uint64_t IDX_CEN_RX_DYN_RPR_GCRMSG_PG_IP = 1419; static const uint64_t IDX_CEN_RX_DYN_RPR_GCRMSG_PG_COMPLETE = 1420; static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING1_PG_BAD_LANE_MAX = 1421; static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING1_PG_BAD_LANE_MAX_LEN = 1422; static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING1_PG_CNTR1_DURATION = 1423; static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING1_PG_CNTR1_DURATION_LEN = 1424; static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING1_PG_CLR_CNTR1 = 1425; static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING1_PG_DISABLE = 1426; static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING1_PG_ENC_BAD_DATA_LANE_WIDTH = 1427; static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING1_PG_ENC_BAD_DATA_LANE_WIDTH_LEN = 1428; static const uint64_t IDX_CEN_RX_EO_FINAL_L2U_GCRMSG_PG_DLY_SEQ = 1429; static const uint64_t IDX_CEN_RX_EO_FINAL_L2U_GCRMSG_PG_DLY_SEQ_LEN = 1430; static const uint64_t IDX_CEN_RX_EO_FINAL_L2U_GCRMSG_PG_DLY_MAXCHG = 1431; static const uint64_t IDX_CEN_RX_EO_FINAL_L2U_GCRMSG_PG_DLY_MAXCHG_LEN = 1432; static const uint64_t IDX_CEN_RX_DYN_RECAL_PG_SERVO_RECAL_IP = 1433; static const uint64_t IDX_CEN_RX_WT_CLK_STATUS_PG_LANE_INVERTED = 1434; static const uint64_t IDX_CEN_RX_WT_CLK_STATUS_PG_LANE_BAD_CODE = 1435; static const uint64_t IDX_CEN_RX_WT_CLK_STATUS_PG_LANE_BAD_CODE_LEN = 1436; static const uint64_t IDX_CEN_RX_DYN_RECAL_CONFIG_PG_OVERALL_TIMEOUT_SEL = 1437; static const uint64_t IDX_CEN_RX_DYN_RECAL_CONFIG_PG_OVERALL_TIMEOUT_SEL_LEN = 1438; static const uint64_t IDX_CEN_RX_DYN_RECAL_CONFIG_PG_SUSPEND = 1439; static const uint64_t IDX_CEN_RX_DYN_RECAL_GCRMSG_PG_IP = 1440; static const uint64_t IDX_CEN_RX_DYN_RECAL_GCRMSG_PG_FAILED = 1441; static const uint64_t IDX_CEN_RX_DYN_RECAL_GCRMSG_PG_RIPPLE = 1442; static const uint64_t IDX_CEN_RX_DYN_RECAL_GCRMSG_PG_TIMEOUT = 1443; static const uint64_t IDX_CEN_RX_WIRETEST_PLL_CNTL_PG_WT_CU_PLL_PGOOD = 1444; static const uint64_t IDX_CEN_RX_WIRETEST_PLL_CNTL_PG_WT_CU_PLL_RESET = 1445; static const uint64_t IDX_CEN_RX_WIRETEST_PLL_CNTL_PG_WT_CU_PLL_PGOODDLY = 1446; static const uint64_t IDX_CEN_RX_WIRETEST_PLL_CNTL_PG_WT_CU_PLL_PGOODDLY_LEN = 1447; static const uint64_t IDX_CEN_RX_WIRETEST_PLL_CNTL_PG_WT_PLL_REFCLKSEL = 1448; static const uint64_t IDX_CEN_RX_WIRETEST_PLL_CNTL_PG_PLL_REFCLKSEL_SCOM_EN = 1449; static const uint64_t IDX_CEN_RX_EO_STEP_CNTL_PG_ENABLE_LATCH_OFFSET_CAL = 1450; static const uint64_t IDX_CEN_RX_EO_STEP_CNTL_PG_ENABLE_CTLE_CAL = 1451; static const uint64_t IDX_CEN_RX_EO_STEP_CNTL_PG_ENABLE_VGA_CAL = 1452; static const uint64_t IDX_CEN_RX_EO_STEP_CNTL_PG_ENABLE_DFE_H1_CAL = 1453; static const uint64_t IDX_CEN_RX_EO_STEP_CNTL_PG_ENABLE_H1AP_TWEAK = 1454; static const uint64_t IDX_CEN_RX_EO_STEP_CNTL_PG_ENABLE_DDC = 1455; static const uint64_t IDX_CEN_RX_EO_STEP_CNTL_PG_ENABLE_FINAL_L2U_ADJ = 1456; static const uint64_t IDX_CEN_RX_EO_STEP_CNTL_PG_ENABLE_BER_TEST = 1457; static const uint64_t IDX_CEN_RX_EO_STEP_CNTL_PG_ENABLE_RESULT_CHECK = 1458; static const uint64_t IDX_CEN_RX_EO_STEP_CNTL_PG_ENABLE_CTLE_EDGE_TRACK_ONLY = 1459; static const uint64_t IDX_CEN_RX_EO_STEP_STAT_PG_LATCH_OFFSET_DONE = 1460; static const uint64_t IDX_CEN_RX_EO_STEP_STAT_PG_CTLE_DONE = 1461; static const uint64_t IDX_CEN_RX_EO_STEP_STAT_PG_VGA_DONE = 1462; static const uint64_t IDX_CEN_RX_EO_STEP_STAT_PG_H1AP_TWEAK_DONE = 1463; static const uint64_t IDX_CEN_RX_EO_STEP_STAT_PG_DDC_DONE = 1464; static const uint64_t IDX_CEN_RX_EO_STEP_STAT_PG_FINAL_L2U_ADJ_DONE = 1465; static const uint64_t IDX_CEN_RX_EO_STEP_STAT_PG_DFE_FLAG = 1466; static const uint64_t IDX_CEN_RX_EO_STEP_STAT_PG_BER_TEST_DONE = 1467; static const uint64_t IDX_CEN_RX_EO_STEP_STAT_PG_RESULT_CHECK_DONE = 1468; static const uint64_t IDX_CEN_RX_AP_PG_EVEN_WORK = 1469; static const uint64_t IDX_CEN_RX_AP_PG_EVEN_WORK_LEN = 1470; static const uint64_t IDX_CEN_RX_AP_PG_ODD_WORK = 1471; static const uint64_t IDX_CEN_RX_AP_PG_ODD_WORK_LEN = 1472; static const uint64_t IDX_CEN_RX_AN_PG_EVEN_WORK = 1473; static const uint64_t IDX_CEN_RX_AN_PG_EVEN_WORK_LEN = 1474; static const uint64_t IDX_CEN_RX_AN_PG_ODD_WORK = 1475; static const uint64_t IDX_CEN_RX_AN_PG_ODD_WORK_LEN = 1476; static const uint64_t IDX_CEN_RX_AMIN_PG_EVEN_WORK = 1477; static const uint64_t IDX_CEN_RX_AMIN_PG_EVEN_WORK_LEN = 1478; static const uint64_t IDX_CEN_RX_AMIN_PG_ODD_WORK = 1479; static const uint64_t IDX_CEN_RX_AMIN_PG_ODD_WORK_LEN = 1480; static const uint64_t IDX_CEN_RX_AMAX_PG_HIGH = 1481; static const uint64_t IDX_CEN_RX_AMAX_PG_HIGH_LEN = 1482; static const uint64_t IDX_CEN_RX_AMAX_PG_LOW = 1483; static const uint64_t IDX_CEN_RX_AMAX_PG_LOW_LEN = 1484; static const uint64_t IDX_CEN_RX_AMP_VAL_PG_PEAK_WORK = 1485; static const uint64_t IDX_CEN_RX_AMP_VAL_PG_PEAK_WORK_LEN = 1486; static const uint64_t IDX_CEN_RX_AMP_VAL_PG_GAIN_WORK = 1487; static const uint64_t IDX_CEN_RX_AMP_VAL_PG_GAIN_WORK_LEN = 1488; static const uint64_t IDX_CEN_RX_AMP_VAL_PG_OFFSET_WORK = 1489; static const uint64_t IDX_CEN_RX_AMP_VAL_PG_OFFSET_WORK_LEN = 1490; static const uint64_t IDX_CEN_RX_AMP_OFFSET_PG_MAX = 1491; static const uint64_t IDX_CEN_RX_AMP_OFFSET_PG_MAX_LEN = 1492; static const uint64_t IDX_CEN_RX_AMP_OFFSET_PG_MIN = 1493; static const uint64_t IDX_CEN_RX_AMP_OFFSET_PG_MIN_LEN = 1494; static const uint64_t IDX_CEN_RX_EO_CONVERGENCE_PG_CONVERGED_COUNT = 1495; static const uint64_t IDX_CEN_RX_EO_CONVERGENCE_PG_CONVERGED_COUNT_LEN = 1496; static const uint64_t IDX_CEN_RX_EO_CONVERGENCE_PG_CONVERGED_END_COUNT = 1497; static const uint64_t IDX_CEN_RX_EO_CONVERGENCE_PG_CONVERGED_END_COUNT_LEN = 1498; static const uint64_t IDX_CEN_RX_SLS_RCVY_PG_DISABLE = 1499; static const uint64_t IDX_CEN_RX_SLS_RCVY_GCRMSG_PG_REQ = 1500; static const uint64_t IDX_CEN_RX_SLS_RCVY_GCRMSG_PG_IP = 1501; static const uint64_t IDX_CEN_RX_SLS_RCVY_GCRMSG_PG_DONE = 1502; static const uint64_t IDX_CEN_RX_TX_LANE_INFO_GCRMSG_PG_BAD_CNTR_GCRMSG = 1503; static const uint64_t IDX_CEN_RX_TX_LANE_INFO_GCRMSG_PG_BAD_CNTR_GCRMSG_LEN = 1504; static const uint64_t IDX_CEN_RX_ERR_TALLYING_GCRMSG_PG_DIS_SYND_TALLYING_GCRMSG = 1505; static const uint64_t IDX_CEN_RX_TRACE_PG_TRC_MODE = 1506; static const uint64_t IDX_CEN_RX_TRACE_PG_TRC_MODE_LEN = 1507; static const uint64_t IDX_CEN_RX_TRACE_PG_TRC_GRP = 1508; static const uint64_t IDX_CEN_RX_TRACE_PG_TRC_GRP_LEN = 1509; static const uint64_t IDX_CEN_RX_RC_STEP_CNTL_PG_ENABLE_LATCH_OFFSET_CAL = 1510; static const uint64_t IDX_CEN_RX_RC_STEP_CNTL_PG_ENABLE_CTLE_CAL = 1511; static const uint64_t IDX_CEN_RX_RC_STEP_CNTL_PG_ENABLE_VGA_CAL = 1512; static const uint64_t IDX_CEN_RX_RC_STEP_CNTL_PG_ENABLE_DFE_H1_CAL = 1513; static const uint64_t IDX_CEN_RX_RC_STEP_CNTL_PG_ENABLE_H1AP_TWEAK = 1514; static const uint64_t IDX_CEN_RX_RC_STEP_CNTL_PG_ENABLE_DDC = 1515; static const uint64_t IDX_CEN_RX_RC_STEP_CNTL_PG_ENABLE_BER_TEST = 1516; static const uint64_t IDX_CEN_RX_RC_STEP_CNTL_PG_ENABLE_RESULT_CHECK = 1517; static const uint64_t IDX_CEN_RX_RC_STEP_CNTL_PG_ENABLE_CTLE_EDGE_TRACK_ONLY = 1518; static const uint64_t IDX_CEN_RX_SERVO_BER_COUNT_PG_WORK = 1519; static const uint64_t IDX_CEN_RX_SERVO_BER_COUNT_PG_WORK_LEN = 1520; static const uint64_t IDX_CEN_RX_DYN_RPR_DEBUG_PG_ENC_BAD_DATA_LANE = 1521; static const uint64_t IDX_CEN_RX_DYN_RPR_DEBUG_PG_ENC_BAD_DATA_LANE_LEN = 1522; static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING2_PG_BAD_BUS_MAX = 1523; static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING2_PG_BAD_BUS_MAX_LEN = 1524; static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING2_PG_CNTR2_DURATION = 1525; static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING2_PG_CNTR2_DURATION_LEN = 1526; static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING2_PG_CLR_CNTR2 = 1527; static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING2_PG_DISABLE2 = 1528; static const uint64_t IDX_CEN_RX_RESULT_CHK_PG_MIN_EYE_WIDTH = 1529; static const uint64_t IDX_CEN_RX_RESULT_CHK_PG_MIN_EYE_WIDTH_LEN = 1530; static const uint64_t IDX_CEN_RX_RESULT_CHK_PG_MIN_EYE_HEIGHT = 1531; static const uint64_t IDX_CEN_RX_RESULT_CHK_PG_MIN_EYE_HEIGHT_LEN = 1532; static const uint64_t IDX_CEN_RX_BER_CHK_PG_MAX_CHECK_COUNT = 1533; static const uint64_t IDX_CEN_RX_BER_CHK_PG_MAX_CHECK_COUNT_LEN = 1534; static const uint64_t IDX_CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_SHDW_DONE_FIN_GCRMSG = 1535; static const uint64_t IDX_CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_SHDW_NOP_FIN_GCRMSG = 1536; static const uint64_t IDX_CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_SHDW_RPR_DONE_FIN_GCRMSG = 1537; static const uint64_t IDX_CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_SHDW_RPR_NOP_FIN_GCRMSG = 1538; static const uint64_t IDX_CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_UNSHDW_DONE_FIN_GCRMSG = 1539; static const uint64_t IDX_CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_UNSHDW_NOP_FIN_GCRMSG = 1540; static const uint64_t IDX_CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_UNSHDW_RPR_DONE_FIN_GCRMSG = 1541; static const uint64_t IDX_CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_UNSHDW_RPR_NOP_FIN_GCRMSG = 1542; static const uint64_t IDX_CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_RECAL_DONE_NOP_FIN_GCRMSG = 1543; static const uint64_t IDX_CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_RECAL_FAIL_NOP_FIN_GCRMSG = 1544; static const uint64_t IDX_CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_RECAL_FRESULTS_FIN_GCRMSG = 1545; static const uint64_t IDX_CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_RECAL_ABORT_ACK_FIN_GCRMSG = 1546; static const uint64_t IDX_CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_RECAL_ABORT_MNOP_FIN_GCRMSG = 1547; static const uint64_t IDX_CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_RECAL_ABORT_SNOP_FIN_GCRMSG = 1548; static const uint64_t IDX_CEN_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE = 1549; static const uint64_t IDX_CEN_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE_LEN = 1550; static const uint64_t IDX_CEN_RX_MODE1_PP_PRBS_SCRAMBLE_MODE = 1551; static const uint64_t IDX_CEN_RX_MODE1_PP_PRBS_SCRAMBLE_MODE_LEN = 1552; static const uint64_t IDX_CEN_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL = 1553; static const uint64_t IDX_CEN_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL_LEN = 1554; static const uint64_t IDX_CEN_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL = 1555; static const uint64_t IDX_CEN_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL_LEN = 1556; static const uint64_t IDX_CEN_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL = 1557; static const uint64_t IDX_CEN_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL_LEN = 1558; static const uint64_t IDX_CEN_RX_MODE1_PP_ENABLE_DFE_V1 = 1559; static const uint64_t IDX_CEN_RX_MODE1_PP_AMIN_ALL = 1560; static const uint64_t IDX_CEN_RX_CNTL_FAST_PP_PRBS_CHECK_SYNC = 1561; static const uint64_t IDX_CEN_RX_CNTL_FAST_PP_ENABLE_REDUCED_SCRAMBLE = 1562; static const uint64_t IDX_CEN_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL = 1563; static const uint64_t IDX_CEN_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN = 1564; static const uint64_t IDX_CEN_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL = 1565; static const uint64_t IDX_CEN_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN = 1566; static const uint64_t IDX_CEN_RX_BER_CNTL_PP_EN = 1567; static const uint64_t IDX_CEN_RX_BER_MODE_PP_TIMER_FREEZE_EN = 1568; static const uint64_t IDX_CEN_RX_BER_MODE_PP_COUNT_FREEZE_EN = 1569; static const uint64_t IDX_CEN_RX_BER_MODE_PP_COUNT_SEL = 1570; static const uint64_t IDX_CEN_RX_BER_MODE_PP_COUNT_SEL_LEN = 1571; static const uint64_t IDX_CEN_RX_BER_MODE_PP_TIMER_SEL = 1572; static const uint64_t IDX_CEN_RX_BER_MODE_PP_TIMER_SEL_LEN = 1573; static const uint64_t IDX_CEN_RX_BER_MODE_PP_CLR_COUNT_ON_READ_EN = 1574; static const uint64_t IDX_CEN_RX_BER_MODE_PP_CLR_TIMER_ON_READ_EN = 1575; static const uint64_t IDX_CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_A = 1576; static const uint64_t IDX_CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_A_LEN = 1577; static const uint64_t IDX_CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_B = 1578; static const uint64_t IDX_CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_B_LEN = 1579; static const uint64_t IDX_CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_C = 1580; static const uint64_t IDX_CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_C_LEN = 1581; static const uint64_t IDX_CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_D = 1582; static const uint64_t IDX_CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_D_LEN = 1583; static const uint64_t IDX_CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_E = 1584; static const uint64_t IDX_CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_E_LEN = 1585; static const uint64_t IDX_CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_F = 1586; static const uint64_t IDX_CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_F_LEN = 1587; static const uint64_t IDX_CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_G = 1588; static const uint64_t IDX_CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_G_LEN = 1589; static const uint64_t IDX_CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_H = 1590; static const uint64_t IDX_CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_H_LEN = 1591; static const uint64_t IDX_CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_I = 1592; static const uint64_t IDX_CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_I_LEN = 1593; static const uint64_t IDX_CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_J = 1594; static const uint64_t IDX_CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_J_LEN = 1595; static const uint64_t IDX_CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_K = 1596; static const uint64_t IDX_CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_K_LEN = 1597; static const uint64_t IDX_CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_L = 1598; static const uint64_t IDX_CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_L_LEN = 1599; static const uint64_t IDX_CEN_RX_DFE_CONFIG_PP_PEAK_CFG = 1600; static const uint64_t IDX_CEN_RX_DFE_CONFIG_PP_PEAK_CFG_LEN = 1601; static const uint64_t IDX_CEN_RX_DFE_CONFIG_PP_AMIN_CFG = 1602; static const uint64_t IDX_CEN_RX_DFE_CONFIG_PP_AMIN_CFG_LEN = 1603; static const uint64_t IDX_CEN_RX_DFE_CONFIG_PP_ANAP_CFG = 1604; static const uint64_t IDX_CEN_RX_DFE_CONFIG_PP_ANAP_CFG_LEN = 1605; static const uint64_t IDX_CEN_RX_DFE_CONFIG_PP_H1_CFG = 1606; static const uint64_t IDX_CEN_RX_DFE_CONFIG_PP_H1_CFG_LEN = 1607; static const uint64_t IDX_CEN_RX_DFE_CONFIG_PP_H1AP_CFG = 1608; static const uint64_t IDX_CEN_RX_DFE_CONFIG_PP_H1AP_CFG_LEN = 1609; static const uint64_t IDX_CEN_RX_DFE_CONFIG_PP_CA_CFG = 1610; static const uint64_t IDX_CEN_RX_DFE_CONFIG_PP_CA_CFG_LEN = 1611; static const uint64_t IDX_CEN_RX_DFE_CONFIG_PP_SPMUX_CFG = 1612; static const uint64_t IDX_CEN_RX_DFE_CONFIG_PP_SPMUX_CFG_LEN = 1613; static const uint64_t IDX_CEN_RX_DFE_TIMERS_PP_INIT_TMR_CFG = 1614; static const uint64_t IDX_CEN_RX_DFE_TIMERS_PP_INIT_TMR_CFG_LEN = 1615; static const uint64_t IDX_CEN_RX_DFE_TIMERS_PP_BER_CFG = 1616; static const uint64_t IDX_CEN_RX_DFE_TIMERS_PP_BER_CFG_LEN = 1617; static const uint64_t IDX_CEN_RX_DFE_TIMERS_PP_FIFO_DLY_CFG = 1618; static const uint64_t IDX_CEN_RX_DFE_TIMERS_PP_FIFO_DLY_CFG_LEN = 1619; static const uint64_t IDX_CEN_RX_DFE_TIMERS_PP_DDC_CFG = 1620; static const uint64_t IDX_CEN_RX_DFE_TIMERS_PP_DDC_CFG_LEN = 1621; static const uint64_t IDX_CEN_RX_DFE_TIMERS_PP_DAC_BO_CFG = 1622; static const uint64_t IDX_CEN_RX_DFE_TIMERS_PP_DAC_BO_CFG_LEN = 1623; static const uint64_t IDX_CEN_RX_DFE_TIMERS_PP_PROT_CFG = 1624; static const uint64_t IDX_CEN_RX_DFE_TIMERS_PP_PROT_CFG_LEN = 1625; static const uint64_t IDX_CEN_RX_RESET_CFG_PP_HLD = 1626; static const uint64_t IDX_CEN_RX_RESET_CFG_PP_HLD_LEN = 1627; static const uint64_t IDX_CEN_RX_RECAL_TO1_PP_TIMEOUT_SEL_A = 1628; static const uint64_t IDX_CEN_RX_RECAL_TO1_PP_TIMEOUT_SEL_A_LEN = 1629; static const uint64_t IDX_CEN_RX_RECAL_TO1_PP_TIMEOUT_SEL_B = 1630; static const uint64_t IDX_CEN_RX_RECAL_TO1_PP_TIMEOUT_SEL_B_LEN = 1631; static const uint64_t IDX_CEN_RX_RECAL_TO2_PP_TIMEOUT_SEL_E = 1632; static const uint64_t IDX_CEN_RX_RECAL_TO2_PP_TIMEOUT_SEL_E_LEN = 1633; static const uint64_t IDX_CEN_RX_RECAL_TO2_PP_TIMEOUT_SEL_G = 1634; static const uint64_t IDX_CEN_RX_RECAL_TO2_PP_TIMEOUT_SEL_G_LEN = 1635; static const uint64_t IDX_CEN_RX_RECAL_TO2_PP_TIMEOUT_SEL_H = 1636; static const uint64_t IDX_CEN_RX_RECAL_TO2_PP_TIMEOUT_SEL_H_LEN = 1637; static const uint64_t IDX_CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_I = 1638; static const uint64_t IDX_CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_I_LEN = 1639; static const uint64_t IDX_CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_J = 1640; static const uint64_t IDX_CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_J_LEN = 1641; static const uint64_t IDX_CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_K = 1642; static const uint64_t IDX_CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_K_LEN = 1643; static const uint64_t IDX_CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_L = 1644; static const uint64_t IDX_CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_L_LEN = 1645; static const uint64_t IDX_CEN_RX_MODE2_PP_PP_TRC_EN = 1646; static const uint64_t IDX_CEN_RX_MODE2_PP_PP_TRC_MODE = 1647; static const uint64_t IDX_CEN_RX_MODE2_PP_PP_TRC_MODE_LEN = 1648; static const uint64_t IDX_CEN_RX_MODE2_PP_BIST_JITTER_PULSE_SEL = 1649; static const uint64_t IDX_CEN_RX_MODE2_PP_BIST_JITTER_PULSE_SEL_LEN = 1650; static const uint64_t IDX_CEN_RX_MODE2_PP_BIST_MIN_EYE_WIDTH = 1651; static const uint64_t IDX_CEN_RX_MODE2_PP_BIST_MIN_EYE_WIDTH_LEN = 1652; static const uint64_t IDX_CEN_RX_MODE2_PP_WT_PATTERN_LENGTH = 1653; static const uint64_t IDX_CEN_RX_MODE2_PP_WT_PATTERN_LENGTH_LEN = 1654; static const uint64_t IDX_CEN_RX_BIST_GCRMSG_PP_EN = 1655; static const uint64_t IDX_CEN_RX_SCOPE_CNTL_PP_CONTROL = 1656; static const uint64_t IDX_CEN_RX_SCOPE_CNTL_PP_CONTROL_LEN = 1657; static const uint64_t IDX_CEN_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG = 1658; static const uint64_t IDX_CEN_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG_LEN = 1659; static const uint64_t IDX_CEN_RX_MODE3_PP_BIST_STEP_INTERVAL_EN = 1660; static const uint64_t IDX_CEN_RX_MODE3_PP_BIST_STEP_INTERVAL = 1661; static const uint64_t IDX_CEN_RX_MODE3_PP_BIST_STEP_INTERVAL_LEN = 1662; static const uint64_t IDX_CEN_RX_MODE3_PP_BIST_PHASEROT_OFFSET_EN = 1663; static const uint64_t IDX_CEN_RX_MODE3_PP_BIST_PHASEROT_OFFSET = 1664; static const uint64_t IDX_CEN_RX_MODE3_PP_BIST_PHASEROT_OFFSET_LEN = 1665; static const uint64_t IDX_CEN_RX_MODE3_PP_BIST_BUFFER_SEL = 1666; static const uint64_t IDX_CEN_RX_MODE3_PP_BIST_BUFFER_SEL_LEN = 1667; static const uint64_t IDX_CEN_RX_STOP_CNTL_STAT_PG_STATE_ENABLE = 1668; static const uint64_t IDX_CEN_RX_STOP_CNTL_STAT_PG_ADDR_MSB = 1669; static const uint64_t IDX_CEN_RX_STOP_CNTL_STAT_PG_ADDR_MSB_LEN = 1670; static const uint64_t IDX_CEN_RX_STOP_CNTL_STAT_PG_MASK_MSB = 1671; static const uint64_t IDX_CEN_RX_STOP_CNTL_STAT_PG_MASK_MSB_LEN = 1672; static const uint64_t IDX_CEN_RX_STOP_ADDR_LSB_PG_LSB = 1673; static const uint64_t IDX_CEN_RX_STOP_ADDR_LSB_PG_LSB_LEN = 1674; static const uint64_t IDX_CEN_RX_STOP_MASK_LSB_PG_LSB = 1675; static const uint64_t IDX_CEN_RX_STOP_MASK_LSB_PG_LSB_LEN = 1676; static const uint64_t IDX_CEN_RX_WT_CONFIG_PG_CHECK_COUNT = 1677; static const uint64_t IDX_CEN_RX_WT_CONFIG_PG_CHECK_COUNT_LEN = 1678; static const uint64_t IDX_CEN_RX_WT_CONFIG_PG_CHECK_LANES = 1679; static const uint64_t IDX_CEN_RX_WT_CONFIG_PG_CHECK_LANES_LEN = 1680; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE = 1681; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE_LEN = 1682; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE1_PP_PRBS_SCRAMBLE_MODE = 1683; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE1_PP_PRBS_SCRAMBLE_MODE_LEN = 1684; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL = 1685; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL_LEN = 1686; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL = 1687; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL_LEN = 1688; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL = 1689; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL_LEN = 1690; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE1_PP_ENABLE_DFE_V1 = 1691; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE1_PP_AMIN_ALL = 1692; static const uint64_t IDX_CEN_TXPACKS0_RX_CNTL_FAST_PP_PRBS_CHECK_SYNC = 1693; static const uint64_t IDX_CEN_TXPACKS0_RX_CNTL_FAST_PP_ENABLE_REDUCED_SCRAMBLE = 1694; static const uint64_t IDX_CEN_TXPACKS0_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL = 1695; static const uint64_t IDX_CEN_TXPACKS0_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN = 1696; static const uint64_t IDX_CEN_TXPACKS0_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL = 1697; static const uint64_t IDX_CEN_TXPACKS0_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN = 1698; static const uint64_t IDX_CEN_TXPACKS0_RX_BER_CNTL_PP_EN = 1699; static const uint64_t IDX_CEN_TXPACKS0_RX_BER_MODE_PP_TIMER_FREEZE_EN = 1700; static const uint64_t IDX_CEN_TXPACKS0_RX_BER_MODE_PP_COUNT_FREEZE_EN = 1701; static const uint64_t IDX_CEN_TXPACKS0_RX_BER_MODE_PP_COUNT_SEL = 1702; static const uint64_t IDX_CEN_TXPACKS0_RX_BER_MODE_PP_COUNT_SEL_LEN = 1703; static const uint64_t IDX_CEN_TXPACKS0_RX_BER_MODE_PP_TIMER_SEL = 1704; static const uint64_t IDX_CEN_TXPACKS0_RX_BER_MODE_PP_TIMER_SEL_LEN = 1705; static const uint64_t IDX_CEN_TXPACKS0_RX_BER_MODE_PP_CLR_COUNT_ON_READ_EN = 1706; static const uint64_t IDX_CEN_TXPACKS0_RX_BER_MODE_PP_CLR_TIMER_ON_READ_EN = 1707; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_A = 1708; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_A_LEN = 1709; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_B = 1710; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_B_LEN = 1711; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_C = 1712; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_C_LEN = 1713; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_D = 1714; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_D_LEN = 1715; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_E = 1716; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_E_LEN = 1717; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_F = 1718; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_F_LEN = 1719; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_G = 1720; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_G_LEN = 1721; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_H = 1722; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_H_LEN = 1723; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_I = 1724; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_I_LEN = 1725; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_J = 1726; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_J_LEN = 1727; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_K = 1728; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_K_LEN = 1729; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_L = 1730; static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_L_LEN = 1731; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_CONFIG_PP_PEAK_CFG = 1732; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_CONFIG_PP_PEAK_CFG_LEN = 1733; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_CONFIG_PP_AMIN_CFG = 1734; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_CONFIG_PP_AMIN_CFG_LEN = 1735; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_CONFIG_PP_ANAP_CFG = 1736; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_CONFIG_PP_ANAP_CFG_LEN = 1737; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_CONFIG_PP_H1_CFG = 1738; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_CONFIG_PP_H1_CFG_LEN = 1739; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_CONFIG_PP_H1AP_CFG = 1740; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_CONFIG_PP_H1AP_CFG_LEN = 1741; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_CONFIG_PP_CA_CFG = 1742; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_CONFIG_PP_CA_CFG_LEN = 1743; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_CONFIG_PP_SPMUX_CFG = 1744; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_CONFIG_PP_SPMUX_CFG_LEN = 1745; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_TIMERS_PP_INIT_TMR_CFG = 1746; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_TIMERS_PP_INIT_TMR_CFG_LEN = 1747; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_TIMERS_PP_BER_CFG = 1748; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_TIMERS_PP_BER_CFG_LEN = 1749; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_TIMERS_PP_FIFO_DLY_CFG = 1750; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_TIMERS_PP_FIFO_DLY_CFG_LEN = 1751; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_TIMERS_PP_DDC_CFG = 1752; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_TIMERS_PP_DDC_CFG_LEN = 1753; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_TIMERS_PP_DAC_BO_CFG = 1754; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_TIMERS_PP_DAC_BO_CFG_LEN = 1755; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_TIMERS_PP_PROT_CFG = 1756; static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_TIMERS_PP_PROT_CFG_LEN = 1757; static const uint64_t IDX_CEN_TXPACKS0_RX_RESET_CFG_PP_HLD = 1758; static const uint64_t IDX_CEN_TXPACKS0_RX_RESET_CFG_PP_HLD_LEN = 1759; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO1_PP_TIMEOUT_SEL_A = 1760; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO1_PP_TIMEOUT_SEL_A_LEN = 1761; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO1_PP_TIMEOUT_SEL_B = 1762; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO1_PP_TIMEOUT_SEL_B_LEN = 1763; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO2_PP_TIMEOUT_SEL_E = 1764; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO2_PP_TIMEOUT_SEL_E_LEN = 1765; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO2_PP_TIMEOUT_SEL_G = 1766; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO2_PP_TIMEOUT_SEL_G_LEN = 1767; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO2_PP_TIMEOUT_SEL_H = 1768; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO2_PP_TIMEOUT_SEL_H_LEN = 1769; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_I = 1770; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_I_LEN = 1771; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_J = 1772; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_J_LEN = 1773; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_K = 1774; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_K_LEN = 1775; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_L = 1776; static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_L_LEN = 1777; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE2_PP_PP_TRC_EN = 1778; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE2_PP_PP_TRC_MODE = 1779; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE2_PP_PP_TRC_MODE_LEN = 1780; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE2_PP_BIST_JITTER_PULSE_SEL = 1781; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE2_PP_BIST_JITTER_PULSE_SEL_LEN = 1782; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE2_PP_BIST_MIN_EYE_WIDTH = 1783; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE2_PP_BIST_MIN_EYE_WIDTH_LEN = 1784; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE2_PP_WT_PATTERN_LENGTH = 1785; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE2_PP_WT_PATTERN_LENGTH_LEN = 1786; static const uint64_t IDX_CEN_TXPACKS0_RX_BIST_GCRMSG_PP_EN = 1787; static const uint64_t IDX_CEN_TXPACKS0_RX_SCOPE_CNTL_PP_CONTROL = 1788; static const uint64_t IDX_CEN_TXPACKS0_RX_SCOPE_CNTL_PP_CONTROL_LEN = 1789; static const uint64_t IDX_CEN_TXPACKS0_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG = 1790; static const uint64_t IDX_CEN_TXPACKS0_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG_LEN = 1791; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE3_PP_BIST_STEP_INTERVAL_EN = 1792; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE3_PP_BIST_STEP_INTERVAL = 1793; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE3_PP_BIST_STEP_INTERVAL_LEN = 1794; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE3_PP_BIST_PHASEROT_OFFSET_EN = 1795; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE3_PP_BIST_PHASEROT_OFFSET = 1796; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE3_PP_BIST_PHASEROT_OFFSET_LEN = 1797; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE3_PP_BIST_BUFFER_SEL = 1798; static const uint64_t IDX_CEN_TXPACKS0_RX_MODE3_PP_BIST_BUFFER_SEL_LEN = 1799; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_MODE_PL_LANE_PDWN = 1800; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 1801; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_CNTL_PL_BLOCK_LOCK_LANE = 1802; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_CNTL_PL_CHECK_SKEW_LANE = 1803; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_CNTL_PL_PDWN_LITE = 1804; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_CNTL_PL_OFFCAL_MODE = 1805; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_0 = 1806; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_1 = 1807; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_2 = 1808; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_3 = 1809; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_4 = 1810; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_5 = 1811; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_6 = 1812; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_7 = 1813; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_BIST_STAT_PL_ERR = 1814; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_OFFSET_EVEN_PL_SAMP1 = 1815; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_OFFSET_EVEN_PL_SAMP1_LEN = 1816; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_OFFSET_EVEN_PL_SAMP0 = 1817; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_OFFSET_EVEN_PL_SAMP0_LEN = 1818; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_OFFSET_ODD_PL_SAMP1 = 1819; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_OFFSET_ODD_PL_SAMP1_LEN = 1820; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_OFFSET_ODD_PL_SAMP0 = 1821; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_OFFSET_ODD_PL_SAMP0_LEN = 1822; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AMP_VAL_PL_PEAK = 1823; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AMP_VAL_PL_PEAK_LEN = 1824; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AMP_VAL_PL_GAIN = 1825; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AMP_VAL_PL_GAIN_LEN = 1826; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AMP_VAL_PL_OFFSET = 1827; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AMP_VAL_PL_OFFSET_LEN = 1828; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AMP_CNTL_PL_ADJ_DONE = 1829; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET = 1830; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 1831; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_FIFO_STAT_PL_L2U_DLY = 1832; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_FIFO_STAT_PL_L2U_DLY_LEN = 1833; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AP_PL_EVEN_SAMP = 1834; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AP_PL_EVEN_SAMP_LEN = 1835; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AP_PL_ODD_SAMP = 1836; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AP_PL_ODD_SAMP_LEN = 1837; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AN_PL_EVEN_SAMP = 1838; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AN_PL_EVEN_SAMP_LEN = 1839; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AN_PL_ODD_SAMP = 1840; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AN_PL_ODD_SAMP_LEN = 1841; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AMIN_PL_EVEN = 1842; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AMIN_PL_EVEN_LEN = 1843; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AMIN_PL_ODD = 1844; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AMIN_PL_ODD_LEN = 1845; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_H1_EVEN_PL_SAMP1 = 1846; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_H1_EVEN_PL_SAMP1_LEN = 1847; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_H1_EVEN_PL_SAMP0 = 1848; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_H1_EVEN_PL_SAMP0_LEN = 1849; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_H1_ODD_PL_SAMP1 = 1850; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_H1_ODD_PL_SAMP1_LEN = 1851; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_H1_ODD_PL_SAMP0 = 1852; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_H1_ODD_PL_SAMP0_LEN = 1853; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_PRBS_MODE_PL_TAP_ID = 1854; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_PRBS_MODE_PL_TAP_ID_LEN = 1855; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 1856; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_DESKEW_STAT_PL_BAD_SKEW = 1857; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_DESKEW_STAT_PL_BAD = 1858; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_FIR_PL_ERRS = 1859; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_FIR_PL_ERRS_LEN = 1860; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_FIR_MASK_PL_ERRS = 1861; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_FIR_MASK_PL_ERRS_LEN = 1862; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 1863; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 1864; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SLS_PL_LANE_SEL = 1865; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SLS_PL_9TH_PATTERN_EN = 1866; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_WT_STATUS_PL_LANE_DISABLED = 1867; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_WT_STATUS_PL_LANE_INVERTED = 1868; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE = 1869; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 1870; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SERVO_CNTL_PL_OP_DONE = 1871; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SERVO_CNTL_PL_OP = 1872; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SERVO_CNTL_PL_OP_LEN = 1873; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ = 1874; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 1875; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_TRACE_PL_LN_TRC_EN = 1876; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_EYE_OPT_STAT_PL_BAD_BER = 1877; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 1878; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 1879; static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_EYE_OPT_STAT_PL_BAD_DDC = 1880; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_MODE_PL_LANE_PDWN = 1881; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 1882; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_CNTL_PL_BLOCK_LOCK_LANE = 1883; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_CNTL_PL_CHECK_SKEW_LANE = 1884; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_CNTL_PL_PDWN_LITE = 1885; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_CNTL_PL_OFFCAL_MODE = 1886; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_0 = 1887; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_1 = 1888; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_2 = 1889; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_3 = 1890; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_4 = 1891; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_5 = 1892; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_6 = 1893; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_7 = 1894; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_BIST_STAT_PL_ERR = 1895; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_OFFSET_EVEN_PL_SAMP1 = 1896; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_OFFSET_EVEN_PL_SAMP1_LEN = 1897; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_OFFSET_EVEN_PL_SAMP0 = 1898; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_OFFSET_EVEN_PL_SAMP0_LEN = 1899; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_OFFSET_ODD_PL_SAMP1 = 1900; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_OFFSET_ODD_PL_SAMP1_LEN = 1901; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_OFFSET_ODD_PL_SAMP0 = 1902; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_OFFSET_ODD_PL_SAMP0_LEN = 1903; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AMP_VAL_PL_PEAK = 1904; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AMP_VAL_PL_PEAK_LEN = 1905; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AMP_VAL_PL_GAIN = 1906; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AMP_VAL_PL_GAIN_LEN = 1907; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AMP_VAL_PL_OFFSET = 1908; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AMP_VAL_PL_OFFSET_LEN = 1909; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AMP_CNTL_PL_ADJ_DONE = 1910; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET = 1911; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 1912; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_FIFO_STAT_PL_L2U_DLY = 1913; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_FIFO_STAT_PL_L2U_DLY_LEN = 1914; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AP_PL_EVEN_SAMP = 1915; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AP_PL_EVEN_SAMP_LEN = 1916; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AP_PL_ODD_SAMP = 1917; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AP_PL_ODD_SAMP_LEN = 1918; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AN_PL_EVEN_SAMP = 1919; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AN_PL_EVEN_SAMP_LEN = 1920; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AN_PL_ODD_SAMP = 1921; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AN_PL_ODD_SAMP_LEN = 1922; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AMIN_PL_EVEN = 1923; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AMIN_PL_EVEN_LEN = 1924; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AMIN_PL_ODD = 1925; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AMIN_PL_ODD_LEN = 1926; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_H1_EVEN_PL_SAMP1 = 1927; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_H1_EVEN_PL_SAMP1_LEN = 1928; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_H1_EVEN_PL_SAMP0 = 1929; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_H1_EVEN_PL_SAMP0_LEN = 1930; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_H1_ODD_PL_SAMP1 = 1931; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_H1_ODD_PL_SAMP1_LEN = 1932; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_H1_ODD_PL_SAMP0 = 1933; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_H1_ODD_PL_SAMP0_LEN = 1934; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_PRBS_MODE_PL_TAP_ID = 1935; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_PRBS_MODE_PL_TAP_ID_LEN = 1936; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 1937; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_DESKEW_STAT_PL_BAD_SKEW = 1938; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_DESKEW_STAT_PL_BAD = 1939; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_FIR_PL_ERRS = 1940; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_FIR_PL_ERRS_LEN = 1941; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_FIR_MASK_PL_ERRS = 1942; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_FIR_MASK_PL_ERRS_LEN = 1943; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 1944; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 1945; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SLS_PL_LANE_SEL = 1946; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SLS_PL_9TH_PATTERN_EN = 1947; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_WT_STATUS_PL_LANE_DISABLED = 1948; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_WT_STATUS_PL_LANE_INVERTED = 1949; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE = 1950; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 1951; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SERVO_CNTL_PL_OP_DONE = 1952; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SERVO_CNTL_PL_OP = 1953; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SERVO_CNTL_PL_OP_LEN = 1954; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ = 1955; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 1956; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_TRACE_PL_LN_TRC_EN = 1957; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_EYE_OPT_STAT_PL_BAD_BER = 1958; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 1959; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 1960; static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_EYE_OPT_STAT_PL_BAD_DDC = 1961; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_MODE_PL_LANE_PDWN = 1962; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 1963; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_CNTL_PL_BLOCK_LOCK_LANE = 1964; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_CNTL_PL_CHECK_SKEW_LANE = 1965; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_CNTL_PL_PDWN_LITE = 1966; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_CNTL_PL_OFFCAL_MODE = 1967; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_0 = 1968; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_1 = 1969; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_2 = 1970; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_3 = 1971; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_4 = 1972; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_5 = 1973; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_6 = 1974; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_7 = 1975; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_BIST_STAT_PL_ERR = 1976; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_OFFSET_EVEN_PL_SAMP1 = 1977; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_OFFSET_EVEN_PL_SAMP1_LEN = 1978; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_OFFSET_EVEN_PL_SAMP0 = 1979; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_OFFSET_EVEN_PL_SAMP0_LEN = 1980; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_OFFSET_ODD_PL_SAMP1 = 1981; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_OFFSET_ODD_PL_SAMP1_LEN = 1982; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_OFFSET_ODD_PL_SAMP0 = 1983; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_OFFSET_ODD_PL_SAMP0_LEN = 1984; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AMP_VAL_PL_PEAK = 1985; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AMP_VAL_PL_PEAK_LEN = 1986; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AMP_VAL_PL_GAIN = 1987; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AMP_VAL_PL_GAIN_LEN = 1988; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AMP_VAL_PL_OFFSET = 1989; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AMP_VAL_PL_OFFSET_LEN = 1990; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AMP_CNTL_PL_ADJ_DONE = 1991; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET = 1992; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 1993; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_FIFO_STAT_PL_L2U_DLY = 1994; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_FIFO_STAT_PL_L2U_DLY_LEN = 1995; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AP_PL_EVEN_SAMP = 1996; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AP_PL_EVEN_SAMP_LEN = 1997; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AP_PL_ODD_SAMP = 1998; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AP_PL_ODD_SAMP_LEN = 1999; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AN_PL_EVEN_SAMP = 2000; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AN_PL_EVEN_SAMP_LEN = 2001; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AN_PL_ODD_SAMP = 2002; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AN_PL_ODD_SAMP_LEN = 2003; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AMIN_PL_EVEN = 2004; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AMIN_PL_EVEN_LEN = 2005; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AMIN_PL_ODD = 2006; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AMIN_PL_ODD_LEN = 2007; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_H1_EVEN_PL_SAMP1 = 2008; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_H1_EVEN_PL_SAMP1_LEN = 2009; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_H1_EVEN_PL_SAMP0 = 2010; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_H1_EVEN_PL_SAMP0_LEN = 2011; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_H1_ODD_PL_SAMP1 = 2012; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_H1_ODD_PL_SAMP1_LEN = 2013; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_H1_ODD_PL_SAMP0 = 2014; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_H1_ODD_PL_SAMP0_LEN = 2015; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_PRBS_MODE_PL_TAP_ID = 2016; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_PRBS_MODE_PL_TAP_ID_LEN = 2017; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 2018; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_DESKEW_STAT_PL_BAD_SKEW = 2019; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_DESKEW_STAT_PL_BAD = 2020; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_FIR_PL_ERRS = 2021; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_FIR_PL_ERRS_LEN = 2022; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_FIR_MASK_PL_ERRS = 2023; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_FIR_MASK_PL_ERRS_LEN = 2024; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 2025; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 2026; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SLS_PL_LANE_SEL = 2027; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SLS_PL_9TH_PATTERN_EN = 2028; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_WT_STATUS_PL_LANE_DISABLED = 2029; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_WT_STATUS_PL_LANE_INVERTED = 2030; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE = 2031; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 2032; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SERVO_CNTL_PL_OP_DONE = 2033; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SERVO_CNTL_PL_OP = 2034; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SERVO_CNTL_PL_OP_LEN = 2035; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ = 2036; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 2037; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_TRACE_PL_LN_TRC_EN = 2038; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_EYE_OPT_STAT_PL_BAD_BER = 2039; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 2040; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 2041; static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_EYE_OPT_STAT_PL_BAD_DDC = 2042; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_MODE_PL_LANE_PDWN = 2043; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 2044; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_CNTL_PL_BLOCK_LOCK_LANE = 2045; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_CNTL_PL_CHECK_SKEW_LANE = 2046; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_CNTL_PL_PDWN_LITE = 2047; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_CNTL_PL_OFFCAL_MODE = 2048; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_0 = 2049; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_1 = 2050; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_2 = 2051; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_3 = 2052; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_4 = 2053; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_5 = 2054; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_6 = 2055; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_7 = 2056; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_BIST_STAT_PL_ERR = 2057; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_OFFSET_EVEN_PL_SAMP1 = 2058; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_OFFSET_EVEN_PL_SAMP1_LEN = 2059; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_OFFSET_EVEN_PL_SAMP0 = 2060; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_OFFSET_EVEN_PL_SAMP0_LEN = 2061; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_OFFSET_ODD_PL_SAMP1 = 2062; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_OFFSET_ODD_PL_SAMP1_LEN = 2063; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_OFFSET_ODD_PL_SAMP0 = 2064; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_OFFSET_ODD_PL_SAMP0_LEN = 2065; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AMP_VAL_PL_PEAK = 2066; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AMP_VAL_PL_PEAK_LEN = 2067; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AMP_VAL_PL_GAIN = 2068; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AMP_VAL_PL_GAIN_LEN = 2069; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AMP_VAL_PL_OFFSET = 2070; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AMP_VAL_PL_OFFSET_LEN = 2071; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AMP_CNTL_PL_ADJ_DONE = 2072; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET = 2073; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 2074; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_FIFO_STAT_PL_L2U_DLY = 2075; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_FIFO_STAT_PL_L2U_DLY_LEN = 2076; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AP_PL_EVEN_SAMP = 2077; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AP_PL_EVEN_SAMP_LEN = 2078; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AP_PL_ODD_SAMP = 2079; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AP_PL_ODD_SAMP_LEN = 2080; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AN_PL_EVEN_SAMP = 2081; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AN_PL_EVEN_SAMP_LEN = 2082; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AN_PL_ODD_SAMP = 2083; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AN_PL_ODD_SAMP_LEN = 2084; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AMIN_PL_EVEN = 2085; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AMIN_PL_EVEN_LEN = 2086; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AMIN_PL_ODD = 2087; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AMIN_PL_ODD_LEN = 2088; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_H1_EVEN_PL_SAMP1 = 2089; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_H1_EVEN_PL_SAMP1_LEN = 2090; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_H1_EVEN_PL_SAMP0 = 2091; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_H1_EVEN_PL_SAMP0_LEN = 2092; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_H1_ODD_PL_SAMP1 = 2093; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_H1_ODD_PL_SAMP1_LEN = 2094; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_H1_ODD_PL_SAMP0 = 2095; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_H1_ODD_PL_SAMP0_LEN = 2096; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_PRBS_MODE_PL_TAP_ID = 2097; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_PRBS_MODE_PL_TAP_ID_LEN = 2098; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 2099; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_DESKEW_STAT_PL_BAD_SKEW = 2100; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_DESKEW_STAT_PL_BAD = 2101; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_FIR_PL_ERRS = 2102; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_FIR_PL_ERRS_LEN = 2103; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_FIR_MASK_PL_ERRS = 2104; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_FIR_MASK_PL_ERRS_LEN = 2105; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 2106; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 2107; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SLS_PL_LANE_SEL = 2108; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SLS_PL_9TH_PATTERN_EN = 2109; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_WT_STATUS_PL_LANE_DISABLED = 2110; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_WT_STATUS_PL_LANE_INVERTED = 2111; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE = 2112; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 2113; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SERVO_CNTL_PL_OP_DONE = 2114; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SERVO_CNTL_PL_OP = 2115; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SERVO_CNTL_PL_OP_LEN = 2116; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ = 2117; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 2118; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_TRACE_PL_LN_TRC_EN = 2119; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_EYE_OPT_STAT_PL_BAD_BER = 2120; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 2121; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 2122; static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_EYE_OPT_STAT_PL_BAD_DDC = 2123; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE = 2124; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE_LEN = 2125; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE1_PP_PRBS_SCRAMBLE_MODE = 2126; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE1_PP_PRBS_SCRAMBLE_MODE_LEN = 2127; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL = 2128; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL_LEN = 2129; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL = 2130; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL_LEN = 2131; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL = 2132; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL_LEN = 2133; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE1_PP_ENABLE_DFE_V1 = 2134; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE1_PP_AMIN_ALL = 2135; static const uint64_t IDX_CEN_TXPACKS1_RX_CNTL_FAST_PP_PRBS_CHECK_SYNC = 2136; static const uint64_t IDX_CEN_TXPACKS1_RX_CNTL_FAST_PP_ENABLE_REDUCED_SCRAMBLE = 2137; static const uint64_t IDX_CEN_TXPACKS1_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL = 2138; static const uint64_t IDX_CEN_TXPACKS1_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN = 2139; static const uint64_t IDX_CEN_TXPACKS1_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL = 2140; static const uint64_t IDX_CEN_TXPACKS1_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN = 2141; static const uint64_t IDX_CEN_TXPACKS1_RX_BER_CNTL_PP_EN = 2142; static const uint64_t IDX_CEN_TXPACKS1_RX_BER_MODE_PP_TIMER_FREEZE_EN = 2143; static const uint64_t IDX_CEN_TXPACKS1_RX_BER_MODE_PP_COUNT_FREEZE_EN = 2144; static const uint64_t IDX_CEN_TXPACKS1_RX_BER_MODE_PP_COUNT_SEL = 2145; static const uint64_t IDX_CEN_TXPACKS1_RX_BER_MODE_PP_COUNT_SEL_LEN = 2146; static const uint64_t IDX_CEN_TXPACKS1_RX_BER_MODE_PP_TIMER_SEL = 2147; static const uint64_t IDX_CEN_TXPACKS1_RX_BER_MODE_PP_TIMER_SEL_LEN = 2148; static const uint64_t IDX_CEN_TXPACKS1_RX_BER_MODE_PP_CLR_COUNT_ON_READ_EN = 2149; static const uint64_t IDX_CEN_TXPACKS1_RX_BER_MODE_PP_CLR_TIMER_ON_READ_EN = 2150; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_A = 2151; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_A_LEN = 2152; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_B = 2153; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_B_LEN = 2154; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_C = 2155; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_C_LEN = 2156; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_D = 2157; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_D_LEN = 2158; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_E = 2159; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_E_LEN = 2160; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_F = 2161; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_F_LEN = 2162; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_G = 2163; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_G_LEN = 2164; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_H = 2165; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_H_LEN = 2166; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_I = 2167; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_I_LEN = 2168; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_J = 2169; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_J_LEN = 2170; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_K = 2171; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_K_LEN = 2172; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_L = 2173; static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_L_LEN = 2174; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_CONFIG_PP_PEAK_CFG = 2175; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_CONFIG_PP_PEAK_CFG_LEN = 2176; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_CONFIG_PP_AMIN_CFG = 2177; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_CONFIG_PP_AMIN_CFG_LEN = 2178; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_CONFIG_PP_ANAP_CFG = 2179; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_CONFIG_PP_ANAP_CFG_LEN = 2180; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_CONFIG_PP_H1_CFG = 2181; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_CONFIG_PP_H1_CFG_LEN = 2182; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_CONFIG_PP_H1AP_CFG = 2183; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_CONFIG_PP_H1AP_CFG_LEN = 2184; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_CONFIG_PP_CA_CFG = 2185; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_CONFIG_PP_CA_CFG_LEN = 2186; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_CONFIG_PP_SPMUX_CFG = 2187; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_CONFIG_PP_SPMUX_CFG_LEN = 2188; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_TIMERS_PP_INIT_TMR_CFG = 2189; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_TIMERS_PP_INIT_TMR_CFG_LEN = 2190; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_TIMERS_PP_BER_CFG = 2191; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_TIMERS_PP_BER_CFG_LEN = 2192; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_TIMERS_PP_FIFO_DLY_CFG = 2193; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_TIMERS_PP_FIFO_DLY_CFG_LEN = 2194; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_TIMERS_PP_DDC_CFG = 2195; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_TIMERS_PP_DDC_CFG_LEN = 2196; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_TIMERS_PP_DAC_BO_CFG = 2197; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_TIMERS_PP_DAC_BO_CFG_LEN = 2198; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_TIMERS_PP_PROT_CFG = 2199; static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_TIMERS_PP_PROT_CFG_LEN = 2200; static const uint64_t IDX_CEN_TXPACKS1_RX_RESET_CFG_PP_HLD = 2201; static const uint64_t IDX_CEN_TXPACKS1_RX_RESET_CFG_PP_HLD_LEN = 2202; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO1_PP_TIMEOUT_SEL_A = 2203; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO1_PP_TIMEOUT_SEL_A_LEN = 2204; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO1_PP_TIMEOUT_SEL_B = 2205; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO1_PP_TIMEOUT_SEL_B_LEN = 2206; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO2_PP_TIMEOUT_SEL_E = 2207; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO2_PP_TIMEOUT_SEL_E_LEN = 2208; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO2_PP_TIMEOUT_SEL_G = 2209; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO2_PP_TIMEOUT_SEL_G_LEN = 2210; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO2_PP_TIMEOUT_SEL_H = 2211; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO2_PP_TIMEOUT_SEL_H_LEN = 2212; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_I = 2213; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_I_LEN = 2214; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_J = 2215; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_J_LEN = 2216; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_K = 2217; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_K_LEN = 2218; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_L = 2219; static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_L_LEN = 2220; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE2_PP_PP_TRC_EN = 2221; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE2_PP_PP_TRC_MODE = 2222; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE2_PP_PP_TRC_MODE_LEN = 2223; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE2_PP_BIST_JITTER_PULSE_SEL = 2224; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE2_PP_BIST_JITTER_PULSE_SEL_LEN = 2225; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE2_PP_BIST_MIN_EYE_WIDTH = 2226; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE2_PP_BIST_MIN_EYE_WIDTH_LEN = 2227; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE2_PP_WT_PATTERN_LENGTH = 2228; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE2_PP_WT_PATTERN_LENGTH_LEN = 2229; static const uint64_t IDX_CEN_TXPACKS1_RX_BIST_GCRMSG_PP_EN = 2230; static const uint64_t IDX_CEN_TXPACKS1_RX_SCOPE_CNTL_PP_CONTROL = 2231; static const uint64_t IDX_CEN_TXPACKS1_RX_SCOPE_CNTL_PP_CONTROL_LEN = 2232; static const uint64_t IDX_CEN_TXPACKS1_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG = 2233; static const uint64_t IDX_CEN_TXPACKS1_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG_LEN = 2234; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE3_PP_BIST_STEP_INTERVAL_EN = 2235; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE3_PP_BIST_STEP_INTERVAL = 2236; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE3_PP_BIST_STEP_INTERVAL_LEN = 2237; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE3_PP_BIST_PHASEROT_OFFSET_EN = 2238; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE3_PP_BIST_PHASEROT_OFFSET = 2239; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE3_PP_BIST_PHASEROT_OFFSET_LEN = 2240; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE3_PP_BIST_BUFFER_SEL = 2241; static const uint64_t IDX_CEN_TXPACKS1_RX_MODE3_PP_BIST_BUFFER_SEL_LEN = 2242; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_MODE_PL_LANE_PDWN = 2243; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 2244; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_CNTL_PL_BLOCK_LOCK_LANE = 2245; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_CNTL_PL_CHECK_SKEW_LANE = 2246; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_CNTL_PL_PDWN_LITE = 2247; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_CNTL_PL_OFFCAL_MODE = 2248; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_0 = 2249; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_1 = 2250; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_2 = 2251; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_3 = 2252; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_4 = 2253; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_5 = 2254; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_6 = 2255; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_7 = 2256; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_BIST_STAT_PL_ERR = 2257; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_OFFSET_EVEN_PL_SAMP1 = 2258; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_OFFSET_EVEN_PL_SAMP1_LEN = 2259; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_OFFSET_EVEN_PL_SAMP0 = 2260; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_OFFSET_EVEN_PL_SAMP0_LEN = 2261; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_OFFSET_ODD_PL_SAMP1 = 2262; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_OFFSET_ODD_PL_SAMP1_LEN = 2263; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_OFFSET_ODD_PL_SAMP0 = 2264; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_OFFSET_ODD_PL_SAMP0_LEN = 2265; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AMP_VAL_PL_PEAK = 2266; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AMP_VAL_PL_PEAK_LEN = 2267; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AMP_VAL_PL_GAIN = 2268; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AMP_VAL_PL_GAIN_LEN = 2269; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AMP_VAL_PL_OFFSET = 2270; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AMP_VAL_PL_OFFSET_LEN = 2271; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AMP_CNTL_PL_ADJ_DONE = 2272; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET = 2273; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 2274; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_FIFO_STAT_PL_L2U_DLY = 2275; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_FIFO_STAT_PL_L2U_DLY_LEN = 2276; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AP_PL_EVEN_SAMP = 2277; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AP_PL_EVEN_SAMP_LEN = 2278; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AP_PL_ODD_SAMP = 2279; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AP_PL_ODD_SAMP_LEN = 2280; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AN_PL_EVEN_SAMP = 2281; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AN_PL_EVEN_SAMP_LEN = 2282; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AN_PL_ODD_SAMP = 2283; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AN_PL_ODD_SAMP_LEN = 2284; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AMIN_PL_EVEN = 2285; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AMIN_PL_EVEN_LEN = 2286; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AMIN_PL_ODD = 2287; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AMIN_PL_ODD_LEN = 2288; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_H1_EVEN_PL_SAMP1 = 2289; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_H1_EVEN_PL_SAMP1_LEN = 2290; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_H1_EVEN_PL_SAMP0 = 2291; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_H1_EVEN_PL_SAMP0_LEN = 2292; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_H1_ODD_PL_SAMP1 = 2293; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_H1_ODD_PL_SAMP1_LEN = 2294; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_H1_ODD_PL_SAMP0 = 2295; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_H1_ODD_PL_SAMP0_LEN = 2296; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_PRBS_MODE_PL_TAP_ID = 2297; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_PRBS_MODE_PL_TAP_ID_LEN = 2298; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 2299; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_DESKEW_STAT_PL_BAD_SKEW = 2300; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_DESKEW_STAT_PL_BAD = 2301; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_FIR_PL_ERRS = 2302; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_FIR_PL_ERRS_LEN = 2303; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_FIR_MASK_PL_ERRS = 2304; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_FIR_MASK_PL_ERRS_LEN = 2305; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 2306; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 2307; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SLS_PL_LANE_SEL = 2308; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SLS_PL_9TH_PATTERN_EN = 2309; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_WT_STATUS_PL_LANE_DISABLED = 2310; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_WT_STATUS_PL_LANE_INVERTED = 2311; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE = 2312; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 2313; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SERVO_CNTL_PL_OP_DONE = 2314; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SERVO_CNTL_PL_OP = 2315; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SERVO_CNTL_PL_OP_LEN = 2316; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ = 2317; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 2318; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_TRACE_PL_LN_TRC_EN = 2319; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_EYE_OPT_STAT_PL_BAD_BER = 2320; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 2321; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 2322; static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_EYE_OPT_STAT_PL_BAD_DDC = 2323; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_MODE_PL_LANE_PDWN = 2324; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 2325; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_CNTL_PL_BLOCK_LOCK_LANE = 2326; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_CNTL_PL_CHECK_SKEW_LANE = 2327; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_CNTL_PL_PDWN_LITE = 2328; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_CNTL_PL_OFFCAL_MODE = 2329; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_0 = 2330; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_1 = 2331; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_2 = 2332; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_3 = 2333; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_4 = 2334; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_5 = 2335; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_6 = 2336; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_7 = 2337; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_BIST_STAT_PL_ERR = 2338; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_OFFSET_EVEN_PL_SAMP1 = 2339; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_OFFSET_EVEN_PL_SAMP1_LEN = 2340; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_OFFSET_EVEN_PL_SAMP0 = 2341; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_OFFSET_EVEN_PL_SAMP0_LEN = 2342; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_OFFSET_ODD_PL_SAMP1 = 2343; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_OFFSET_ODD_PL_SAMP1_LEN = 2344; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_OFFSET_ODD_PL_SAMP0 = 2345; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_OFFSET_ODD_PL_SAMP0_LEN = 2346; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AMP_VAL_PL_PEAK = 2347; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AMP_VAL_PL_PEAK_LEN = 2348; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AMP_VAL_PL_GAIN = 2349; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AMP_VAL_PL_GAIN_LEN = 2350; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AMP_VAL_PL_OFFSET = 2351; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AMP_VAL_PL_OFFSET_LEN = 2352; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AMP_CNTL_PL_ADJ_DONE = 2353; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET = 2354; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 2355; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_FIFO_STAT_PL_L2U_DLY = 2356; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_FIFO_STAT_PL_L2U_DLY_LEN = 2357; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AP_PL_EVEN_SAMP = 2358; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AP_PL_EVEN_SAMP_LEN = 2359; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AP_PL_ODD_SAMP = 2360; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AP_PL_ODD_SAMP_LEN = 2361; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AN_PL_EVEN_SAMP = 2362; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AN_PL_EVEN_SAMP_LEN = 2363; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AN_PL_ODD_SAMP = 2364; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AN_PL_ODD_SAMP_LEN = 2365; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AMIN_PL_EVEN = 2366; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AMIN_PL_EVEN_LEN = 2367; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AMIN_PL_ODD = 2368; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AMIN_PL_ODD_LEN = 2369; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_H1_EVEN_PL_SAMP1 = 2370; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_H1_EVEN_PL_SAMP1_LEN = 2371; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_H1_EVEN_PL_SAMP0 = 2372; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_H1_EVEN_PL_SAMP0_LEN = 2373; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_H1_ODD_PL_SAMP1 = 2374; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_H1_ODD_PL_SAMP1_LEN = 2375; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_H1_ODD_PL_SAMP0 = 2376; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_H1_ODD_PL_SAMP0_LEN = 2377; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_PRBS_MODE_PL_TAP_ID = 2378; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_PRBS_MODE_PL_TAP_ID_LEN = 2379; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 2380; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_DESKEW_STAT_PL_BAD_SKEW = 2381; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_DESKEW_STAT_PL_BAD = 2382; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_FIR_PL_ERRS = 2383; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_FIR_PL_ERRS_LEN = 2384; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_FIR_MASK_PL_ERRS = 2385; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_FIR_MASK_PL_ERRS_LEN = 2386; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 2387; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 2388; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SLS_PL_LANE_SEL = 2389; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SLS_PL_9TH_PATTERN_EN = 2390; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_WT_STATUS_PL_LANE_DISABLED = 2391; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_WT_STATUS_PL_LANE_INVERTED = 2392; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE = 2393; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 2394; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SERVO_CNTL_PL_OP_DONE = 2395; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SERVO_CNTL_PL_OP = 2396; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SERVO_CNTL_PL_OP_LEN = 2397; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ = 2398; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 2399; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_TRACE_PL_LN_TRC_EN = 2400; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_EYE_OPT_STAT_PL_BAD_BER = 2401; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 2402; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 2403; static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_EYE_OPT_STAT_PL_BAD_DDC = 2404; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_MODE_PL_LANE_PDWN = 2405; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 2406; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_CNTL_PL_BLOCK_LOCK_LANE = 2407; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_CNTL_PL_CHECK_SKEW_LANE = 2408; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_CNTL_PL_PDWN_LITE = 2409; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_CNTL_PL_OFFCAL_MODE = 2410; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_0 = 2411; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_1 = 2412; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_2 = 2413; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_3 = 2414; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_4 = 2415; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_5 = 2416; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_6 = 2417; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_7 = 2418; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_BIST_STAT_PL_ERR = 2419; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_OFFSET_EVEN_PL_SAMP1 = 2420; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_OFFSET_EVEN_PL_SAMP1_LEN = 2421; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_OFFSET_EVEN_PL_SAMP0 = 2422; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_OFFSET_EVEN_PL_SAMP0_LEN = 2423; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_OFFSET_ODD_PL_SAMP1 = 2424; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_OFFSET_ODD_PL_SAMP1_LEN = 2425; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_OFFSET_ODD_PL_SAMP0 = 2426; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_OFFSET_ODD_PL_SAMP0_LEN = 2427; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AMP_VAL_PL_PEAK = 2428; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AMP_VAL_PL_PEAK_LEN = 2429; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AMP_VAL_PL_GAIN = 2430; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AMP_VAL_PL_GAIN_LEN = 2431; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AMP_VAL_PL_OFFSET = 2432; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AMP_VAL_PL_OFFSET_LEN = 2433; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AMP_CNTL_PL_ADJ_DONE = 2434; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET = 2435; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 2436; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_FIFO_STAT_PL_L2U_DLY = 2437; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_FIFO_STAT_PL_L2U_DLY_LEN = 2438; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AP_PL_EVEN_SAMP = 2439; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AP_PL_EVEN_SAMP_LEN = 2440; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AP_PL_ODD_SAMP = 2441; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AP_PL_ODD_SAMP_LEN = 2442; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AN_PL_EVEN_SAMP = 2443; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AN_PL_EVEN_SAMP_LEN = 2444; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AN_PL_ODD_SAMP = 2445; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AN_PL_ODD_SAMP_LEN = 2446; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AMIN_PL_EVEN = 2447; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AMIN_PL_EVEN_LEN = 2448; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AMIN_PL_ODD = 2449; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AMIN_PL_ODD_LEN = 2450; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_H1_EVEN_PL_SAMP1 = 2451; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_H1_EVEN_PL_SAMP1_LEN = 2452; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_H1_EVEN_PL_SAMP0 = 2453; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_H1_EVEN_PL_SAMP0_LEN = 2454; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_H1_ODD_PL_SAMP1 = 2455; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_H1_ODD_PL_SAMP1_LEN = 2456; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_H1_ODD_PL_SAMP0 = 2457; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_H1_ODD_PL_SAMP0_LEN = 2458; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_PRBS_MODE_PL_TAP_ID = 2459; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_PRBS_MODE_PL_TAP_ID_LEN = 2460; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 2461; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_DESKEW_STAT_PL_BAD_SKEW = 2462; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_DESKEW_STAT_PL_BAD = 2463; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_FIR_PL_ERRS = 2464; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_FIR_PL_ERRS_LEN = 2465; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_FIR_MASK_PL_ERRS = 2466; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_FIR_MASK_PL_ERRS_LEN = 2467; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 2468; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 2469; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SLS_PL_LANE_SEL = 2470; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SLS_PL_9TH_PATTERN_EN = 2471; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_WT_STATUS_PL_LANE_DISABLED = 2472; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_WT_STATUS_PL_LANE_INVERTED = 2473; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE = 2474; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 2475; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SERVO_CNTL_PL_OP_DONE = 2476; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SERVO_CNTL_PL_OP = 2477; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SERVO_CNTL_PL_OP_LEN = 2478; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ = 2479; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 2480; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_TRACE_PL_LN_TRC_EN = 2481; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_EYE_OPT_STAT_PL_BAD_BER = 2482; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 2483; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 2484; static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_EYE_OPT_STAT_PL_BAD_DDC = 2485; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_MODE_PL_LANE_PDWN = 2486; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 2487; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_CNTL_PL_BLOCK_LOCK_LANE = 2488; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_CNTL_PL_CHECK_SKEW_LANE = 2489; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_CNTL_PL_PDWN_LITE = 2490; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_CNTL_PL_OFFCAL_MODE = 2491; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_0 = 2492; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_1 = 2493; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_2 = 2494; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_3 = 2495; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_4 = 2496; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_5 = 2497; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_6 = 2498; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_7 = 2499; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_BIST_STAT_PL_ERR = 2500; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_OFFSET_EVEN_PL_SAMP1 = 2501; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_OFFSET_EVEN_PL_SAMP1_LEN = 2502; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_OFFSET_EVEN_PL_SAMP0 = 2503; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_OFFSET_EVEN_PL_SAMP0_LEN = 2504; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_OFFSET_ODD_PL_SAMP1 = 2505; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_OFFSET_ODD_PL_SAMP1_LEN = 2506; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_OFFSET_ODD_PL_SAMP0 = 2507; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_OFFSET_ODD_PL_SAMP0_LEN = 2508; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AMP_VAL_PL_PEAK = 2509; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AMP_VAL_PL_PEAK_LEN = 2510; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AMP_VAL_PL_GAIN = 2511; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AMP_VAL_PL_GAIN_LEN = 2512; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AMP_VAL_PL_OFFSET = 2513; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AMP_VAL_PL_OFFSET_LEN = 2514; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AMP_CNTL_PL_ADJ_DONE = 2515; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET = 2516; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 2517; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_FIFO_STAT_PL_L2U_DLY = 2518; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_FIFO_STAT_PL_L2U_DLY_LEN = 2519; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AP_PL_EVEN_SAMP = 2520; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AP_PL_EVEN_SAMP_LEN = 2521; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AP_PL_ODD_SAMP = 2522; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AP_PL_ODD_SAMP_LEN = 2523; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AN_PL_EVEN_SAMP = 2524; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AN_PL_EVEN_SAMP_LEN = 2525; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AN_PL_ODD_SAMP = 2526; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AN_PL_ODD_SAMP_LEN = 2527; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AMIN_PL_EVEN = 2528; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AMIN_PL_EVEN_LEN = 2529; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AMIN_PL_ODD = 2530; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AMIN_PL_ODD_LEN = 2531; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_H1_EVEN_PL_SAMP1 = 2532; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_H1_EVEN_PL_SAMP1_LEN = 2533; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_H1_EVEN_PL_SAMP0 = 2534; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_H1_EVEN_PL_SAMP0_LEN = 2535; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_H1_ODD_PL_SAMP1 = 2536; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_H1_ODD_PL_SAMP1_LEN = 2537; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_H1_ODD_PL_SAMP0 = 2538; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_H1_ODD_PL_SAMP0_LEN = 2539; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_PRBS_MODE_PL_TAP_ID = 2540; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_PRBS_MODE_PL_TAP_ID_LEN = 2541; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 2542; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_DESKEW_STAT_PL_BAD_SKEW = 2543; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_DESKEW_STAT_PL_BAD = 2544; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_FIR_PL_ERRS = 2545; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_FIR_PL_ERRS_LEN = 2546; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_FIR_MASK_PL_ERRS = 2547; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_FIR_MASK_PL_ERRS_LEN = 2548; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 2549; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 2550; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SLS_PL_LANE_SEL = 2551; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SLS_PL_9TH_PATTERN_EN = 2552; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_WT_STATUS_PL_LANE_DISABLED = 2553; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_WT_STATUS_PL_LANE_INVERTED = 2554; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE = 2555; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 2556; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SERVO_CNTL_PL_OP_DONE = 2557; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SERVO_CNTL_PL_OP = 2558; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SERVO_CNTL_PL_OP_LEN = 2559; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ = 2560; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 2561; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_TRACE_PL_LN_TRC_EN = 2562; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_EYE_OPT_STAT_PL_BAD_BER = 2563; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 2564; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 2565; static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_EYE_OPT_STAT_PL_BAD_DDC = 2566; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE = 2567; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE_LEN = 2568; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE1_PP_PRBS_SCRAMBLE_MODE = 2569; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE1_PP_PRBS_SCRAMBLE_MODE_LEN = 2570; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL = 2571; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL_LEN = 2572; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL = 2573; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL_LEN = 2574; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL = 2575; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL_LEN = 2576; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE1_PP_ENABLE_DFE_V1 = 2577; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE1_PP_AMIN_ALL = 2578; static const uint64_t IDX_CEN_TXPACKS2_RX_CNTL_FAST_PP_PRBS_CHECK_SYNC = 2579; static const uint64_t IDX_CEN_TXPACKS2_RX_CNTL_FAST_PP_ENABLE_REDUCED_SCRAMBLE = 2580; static const uint64_t IDX_CEN_TXPACKS2_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL = 2581; static const uint64_t IDX_CEN_TXPACKS2_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN = 2582; static const uint64_t IDX_CEN_TXPACKS2_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL = 2583; static const uint64_t IDX_CEN_TXPACKS2_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN = 2584; static const uint64_t IDX_CEN_TXPACKS2_RX_BER_CNTL_PP_EN = 2585; static const uint64_t IDX_CEN_TXPACKS2_RX_BER_MODE_PP_TIMER_FREEZE_EN = 2586; static const uint64_t IDX_CEN_TXPACKS2_RX_BER_MODE_PP_COUNT_FREEZE_EN = 2587; static const uint64_t IDX_CEN_TXPACKS2_RX_BER_MODE_PP_COUNT_SEL = 2588; static const uint64_t IDX_CEN_TXPACKS2_RX_BER_MODE_PP_COUNT_SEL_LEN = 2589; static const uint64_t IDX_CEN_TXPACKS2_RX_BER_MODE_PP_TIMER_SEL = 2590; static const uint64_t IDX_CEN_TXPACKS2_RX_BER_MODE_PP_TIMER_SEL_LEN = 2591; static const uint64_t IDX_CEN_TXPACKS2_RX_BER_MODE_PP_CLR_COUNT_ON_READ_EN = 2592; static const uint64_t IDX_CEN_TXPACKS2_RX_BER_MODE_PP_CLR_TIMER_ON_READ_EN = 2593; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_A = 2594; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_A_LEN = 2595; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_B = 2596; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_B_LEN = 2597; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_C = 2598; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_C_LEN = 2599; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_D = 2600; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_D_LEN = 2601; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_E = 2602; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_E_LEN = 2603; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_F = 2604; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_F_LEN = 2605; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_G = 2606; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_G_LEN = 2607; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_H = 2608; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_H_LEN = 2609; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_I = 2610; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_I_LEN = 2611; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_J = 2612; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_J_LEN = 2613; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_K = 2614; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_K_LEN = 2615; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_L = 2616; static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_L_LEN = 2617; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_CONFIG_PP_PEAK_CFG = 2618; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_CONFIG_PP_PEAK_CFG_LEN = 2619; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_CONFIG_PP_AMIN_CFG = 2620; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_CONFIG_PP_AMIN_CFG_LEN = 2621; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_CONFIG_PP_ANAP_CFG = 2622; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_CONFIG_PP_ANAP_CFG_LEN = 2623; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_CONFIG_PP_H1_CFG = 2624; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_CONFIG_PP_H1_CFG_LEN = 2625; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_CONFIG_PP_H1AP_CFG = 2626; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_CONFIG_PP_H1AP_CFG_LEN = 2627; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_CONFIG_PP_CA_CFG = 2628; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_CONFIG_PP_CA_CFG_LEN = 2629; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_CONFIG_PP_SPMUX_CFG = 2630; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_CONFIG_PP_SPMUX_CFG_LEN = 2631; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_TIMERS_PP_INIT_TMR_CFG = 2632; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_TIMERS_PP_INIT_TMR_CFG_LEN = 2633; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_TIMERS_PP_BER_CFG = 2634; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_TIMERS_PP_BER_CFG_LEN = 2635; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_TIMERS_PP_FIFO_DLY_CFG = 2636; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_TIMERS_PP_FIFO_DLY_CFG_LEN = 2637; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_TIMERS_PP_DDC_CFG = 2638; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_TIMERS_PP_DDC_CFG_LEN = 2639; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_TIMERS_PP_DAC_BO_CFG = 2640; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_TIMERS_PP_DAC_BO_CFG_LEN = 2641; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_TIMERS_PP_PROT_CFG = 2642; static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_TIMERS_PP_PROT_CFG_LEN = 2643; static const uint64_t IDX_CEN_TXPACKS2_RX_RESET_CFG_PP_HLD = 2644; static const uint64_t IDX_CEN_TXPACKS2_RX_RESET_CFG_PP_HLD_LEN = 2645; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO1_PP_TIMEOUT_SEL_A = 2646; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO1_PP_TIMEOUT_SEL_A_LEN = 2647; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO1_PP_TIMEOUT_SEL_B = 2648; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO1_PP_TIMEOUT_SEL_B_LEN = 2649; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO2_PP_TIMEOUT_SEL_E = 2650; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO2_PP_TIMEOUT_SEL_E_LEN = 2651; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO2_PP_TIMEOUT_SEL_G = 2652; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO2_PP_TIMEOUT_SEL_G_LEN = 2653; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO2_PP_TIMEOUT_SEL_H = 2654; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO2_PP_TIMEOUT_SEL_H_LEN = 2655; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_I = 2656; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_I_LEN = 2657; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_J = 2658; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_J_LEN = 2659; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_K = 2660; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_K_LEN = 2661; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_L = 2662; static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_L_LEN = 2663; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE2_PP_PP_TRC_EN = 2664; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE2_PP_PP_TRC_MODE = 2665; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE2_PP_PP_TRC_MODE_LEN = 2666; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE2_PP_BIST_JITTER_PULSE_SEL = 2667; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE2_PP_BIST_JITTER_PULSE_SEL_LEN = 2668; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE2_PP_BIST_MIN_EYE_WIDTH = 2669; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE2_PP_BIST_MIN_EYE_WIDTH_LEN = 2670; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE2_PP_WT_PATTERN_LENGTH = 2671; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE2_PP_WT_PATTERN_LENGTH_LEN = 2672; static const uint64_t IDX_CEN_TXPACKS2_RX_BIST_GCRMSG_PP_EN = 2673; static const uint64_t IDX_CEN_TXPACKS2_RX_SCOPE_CNTL_PP_CONTROL = 2674; static const uint64_t IDX_CEN_TXPACKS2_RX_SCOPE_CNTL_PP_CONTROL_LEN = 2675; static const uint64_t IDX_CEN_TXPACKS2_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG = 2676; static const uint64_t IDX_CEN_TXPACKS2_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG_LEN = 2677; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE3_PP_BIST_STEP_INTERVAL_EN = 2678; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE3_PP_BIST_STEP_INTERVAL = 2679; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE3_PP_BIST_STEP_INTERVAL_LEN = 2680; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE3_PP_BIST_PHASEROT_OFFSET_EN = 2681; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE3_PP_BIST_PHASEROT_OFFSET = 2682; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE3_PP_BIST_PHASEROT_OFFSET_LEN = 2683; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE3_PP_BIST_BUFFER_SEL = 2684; static const uint64_t IDX_CEN_TXPACKS2_RX_MODE3_PP_BIST_BUFFER_SEL_LEN = 2685; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_MODE_PL_LANE_PDWN = 2686; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 2687; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_CNTL_PL_BLOCK_LOCK_LANE = 2688; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_CNTL_PL_CHECK_SKEW_LANE = 2689; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_CNTL_PL_PDWN_LITE = 2690; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_CNTL_PL_OFFCAL_MODE = 2691; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_0 = 2692; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_1 = 2693; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_2 = 2694; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_3 = 2695; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_4 = 2696; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_5 = 2697; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_6 = 2698; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_7 = 2699; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_BIST_STAT_PL_ERR = 2700; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_OFFSET_EVEN_PL_SAMP1 = 2701; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_OFFSET_EVEN_PL_SAMP1_LEN = 2702; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_OFFSET_EVEN_PL_SAMP0 = 2703; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_OFFSET_EVEN_PL_SAMP0_LEN = 2704; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_OFFSET_ODD_PL_SAMP1 = 2705; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_OFFSET_ODD_PL_SAMP1_LEN = 2706; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_OFFSET_ODD_PL_SAMP0 = 2707; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_OFFSET_ODD_PL_SAMP0_LEN = 2708; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AMP_VAL_PL_PEAK = 2709; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AMP_VAL_PL_PEAK_LEN = 2710; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AMP_VAL_PL_GAIN = 2711; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AMP_VAL_PL_GAIN_LEN = 2712; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AMP_VAL_PL_OFFSET = 2713; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AMP_VAL_PL_OFFSET_LEN = 2714; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AMP_CNTL_PL_ADJ_DONE = 2715; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET = 2716; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 2717; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_FIFO_STAT_PL_L2U_DLY = 2718; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_FIFO_STAT_PL_L2U_DLY_LEN = 2719; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AP_PL_EVEN_SAMP = 2720; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AP_PL_EVEN_SAMP_LEN = 2721; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AP_PL_ODD_SAMP = 2722; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AP_PL_ODD_SAMP_LEN = 2723; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AN_PL_EVEN_SAMP = 2724; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AN_PL_EVEN_SAMP_LEN = 2725; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AN_PL_ODD_SAMP = 2726; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AN_PL_ODD_SAMP_LEN = 2727; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AMIN_PL_EVEN = 2728; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AMIN_PL_EVEN_LEN = 2729; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AMIN_PL_ODD = 2730; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AMIN_PL_ODD_LEN = 2731; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_H1_EVEN_PL_SAMP1 = 2732; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_H1_EVEN_PL_SAMP1_LEN = 2733; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_H1_EVEN_PL_SAMP0 = 2734; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_H1_EVEN_PL_SAMP0_LEN = 2735; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_H1_ODD_PL_SAMP1 = 2736; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_H1_ODD_PL_SAMP1_LEN = 2737; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_H1_ODD_PL_SAMP0 = 2738; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_H1_ODD_PL_SAMP0_LEN = 2739; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_PRBS_MODE_PL_TAP_ID = 2740; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_PRBS_MODE_PL_TAP_ID_LEN = 2741; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 2742; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_DESKEW_STAT_PL_BAD_SKEW = 2743; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_DESKEW_STAT_PL_BAD = 2744; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_FIR_PL_ERRS = 2745; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_FIR_PL_ERRS_LEN = 2746; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_FIR_MASK_PL_ERRS = 2747; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_FIR_MASK_PL_ERRS_LEN = 2748; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 2749; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 2750; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SLS_PL_LANE_SEL = 2751; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SLS_PL_9TH_PATTERN_EN = 2752; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_WT_STATUS_PL_LANE_DISABLED = 2753; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_WT_STATUS_PL_LANE_INVERTED = 2754; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE = 2755; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 2756; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SERVO_CNTL_PL_OP_DONE = 2757; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SERVO_CNTL_PL_OP = 2758; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SERVO_CNTL_PL_OP_LEN = 2759; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ = 2760; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 2761; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_TRACE_PL_LN_TRC_EN = 2762; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_EYE_OPT_STAT_PL_BAD_BER = 2763; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 2764; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 2765; static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_EYE_OPT_STAT_PL_BAD_DDC = 2766; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_MODE_PL_LANE_PDWN = 2767; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 2768; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_CNTL_PL_BLOCK_LOCK_LANE = 2769; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_CNTL_PL_CHECK_SKEW_LANE = 2770; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_CNTL_PL_PDWN_LITE = 2771; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_CNTL_PL_OFFCAL_MODE = 2772; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_0 = 2773; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_1 = 2774; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_2 = 2775; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_3 = 2776; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_4 = 2777; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_5 = 2778; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_6 = 2779; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_7 = 2780; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_BIST_STAT_PL_ERR = 2781; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_OFFSET_EVEN_PL_SAMP1 = 2782; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_OFFSET_EVEN_PL_SAMP1_LEN = 2783; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_OFFSET_EVEN_PL_SAMP0 = 2784; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_OFFSET_EVEN_PL_SAMP0_LEN = 2785; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_OFFSET_ODD_PL_SAMP1 = 2786; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_OFFSET_ODD_PL_SAMP1_LEN = 2787; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_OFFSET_ODD_PL_SAMP0 = 2788; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_OFFSET_ODD_PL_SAMP0_LEN = 2789; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AMP_VAL_PL_PEAK = 2790; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AMP_VAL_PL_PEAK_LEN = 2791; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AMP_VAL_PL_GAIN = 2792; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AMP_VAL_PL_GAIN_LEN = 2793; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AMP_VAL_PL_OFFSET = 2794; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AMP_VAL_PL_OFFSET_LEN = 2795; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AMP_CNTL_PL_ADJ_DONE = 2796; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET = 2797; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 2798; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_FIFO_STAT_PL_L2U_DLY = 2799; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_FIFO_STAT_PL_L2U_DLY_LEN = 2800; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AP_PL_EVEN_SAMP = 2801; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AP_PL_EVEN_SAMP_LEN = 2802; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AP_PL_ODD_SAMP = 2803; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AP_PL_ODD_SAMP_LEN = 2804; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AN_PL_EVEN_SAMP = 2805; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AN_PL_EVEN_SAMP_LEN = 2806; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AN_PL_ODD_SAMP = 2807; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AN_PL_ODD_SAMP_LEN = 2808; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AMIN_PL_EVEN = 2809; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AMIN_PL_EVEN_LEN = 2810; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AMIN_PL_ODD = 2811; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AMIN_PL_ODD_LEN = 2812; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_H1_EVEN_PL_SAMP1 = 2813; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_H1_EVEN_PL_SAMP1_LEN = 2814; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_H1_EVEN_PL_SAMP0 = 2815; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_H1_EVEN_PL_SAMP0_LEN = 2816; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_H1_ODD_PL_SAMP1 = 2817; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_H1_ODD_PL_SAMP1_LEN = 2818; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_H1_ODD_PL_SAMP0 = 2819; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_H1_ODD_PL_SAMP0_LEN = 2820; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_PRBS_MODE_PL_TAP_ID = 2821; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_PRBS_MODE_PL_TAP_ID_LEN = 2822; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 2823; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_DESKEW_STAT_PL_BAD_SKEW = 2824; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_DESKEW_STAT_PL_BAD = 2825; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_FIR_PL_ERRS = 2826; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_FIR_PL_ERRS_LEN = 2827; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_FIR_MASK_PL_ERRS = 2828; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_FIR_MASK_PL_ERRS_LEN = 2829; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 2830; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 2831; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SLS_PL_LANE_SEL = 2832; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SLS_PL_9TH_PATTERN_EN = 2833; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_WT_STATUS_PL_LANE_DISABLED = 2834; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_WT_STATUS_PL_LANE_INVERTED = 2835; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE = 2836; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 2837; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SERVO_CNTL_PL_OP_DONE = 2838; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SERVO_CNTL_PL_OP = 2839; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SERVO_CNTL_PL_OP_LEN = 2840; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ = 2841; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 2842; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_TRACE_PL_LN_TRC_EN = 2843; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_EYE_OPT_STAT_PL_BAD_BER = 2844; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 2845; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 2846; static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_EYE_OPT_STAT_PL_BAD_DDC = 2847; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_MODE_PL_LANE_PDWN = 2848; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 2849; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_CNTL_PL_BLOCK_LOCK_LANE = 2850; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_CNTL_PL_CHECK_SKEW_LANE = 2851; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_CNTL_PL_PDWN_LITE = 2852; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_CNTL_PL_OFFCAL_MODE = 2853; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_0 = 2854; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_1 = 2855; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_2 = 2856; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_3 = 2857; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_4 = 2858; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_5 = 2859; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_6 = 2860; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_7 = 2861; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_BIST_STAT_PL_ERR = 2862; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_OFFSET_EVEN_PL_SAMP1 = 2863; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_OFFSET_EVEN_PL_SAMP1_LEN = 2864; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_OFFSET_EVEN_PL_SAMP0 = 2865; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_OFFSET_EVEN_PL_SAMP0_LEN = 2866; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_OFFSET_ODD_PL_SAMP1 = 2867; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_OFFSET_ODD_PL_SAMP1_LEN = 2868; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_OFFSET_ODD_PL_SAMP0 = 2869; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_OFFSET_ODD_PL_SAMP0_LEN = 2870; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AMP_VAL_PL_PEAK = 2871; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AMP_VAL_PL_PEAK_LEN = 2872; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AMP_VAL_PL_GAIN = 2873; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AMP_VAL_PL_GAIN_LEN = 2874; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AMP_VAL_PL_OFFSET = 2875; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AMP_VAL_PL_OFFSET_LEN = 2876; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AMP_CNTL_PL_ADJ_DONE = 2877; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET = 2878; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 2879; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_FIFO_STAT_PL_L2U_DLY = 2880; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_FIFO_STAT_PL_L2U_DLY_LEN = 2881; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AP_PL_EVEN_SAMP = 2882; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AP_PL_EVEN_SAMP_LEN = 2883; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AP_PL_ODD_SAMP = 2884; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AP_PL_ODD_SAMP_LEN = 2885; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AN_PL_EVEN_SAMP = 2886; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AN_PL_EVEN_SAMP_LEN = 2887; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AN_PL_ODD_SAMP = 2888; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AN_PL_ODD_SAMP_LEN = 2889; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AMIN_PL_EVEN = 2890; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AMIN_PL_EVEN_LEN = 2891; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AMIN_PL_ODD = 2892; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AMIN_PL_ODD_LEN = 2893; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_H1_EVEN_PL_SAMP1 = 2894; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_H1_EVEN_PL_SAMP1_LEN = 2895; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_H1_EVEN_PL_SAMP0 = 2896; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_H1_EVEN_PL_SAMP0_LEN = 2897; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_H1_ODD_PL_SAMP1 = 2898; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_H1_ODD_PL_SAMP1_LEN = 2899; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_H1_ODD_PL_SAMP0 = 2900; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_H1_ODD_PL_SAMP0_LEN = 2901; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_PRBS_MODE_PL_TAP_ID = 2902; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_PRBS_MODE_PL_TAP_ID_LEN = 2903; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 2904; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_DESKEW_STAT_PL_BAD_SKEW = 2905; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_DESKEW_STAT_PL_BAD = 2906; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_FIR_PL_ERRS = 2907; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_FIR_PL_ERRS_LEN = 2908; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_FIR_MASK_PL_ERRS = 2909; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_FIR_MASK_PL_ERRS_LEN = 2910; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 2911; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 2912; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SLS_PL_LANE_SEL = 2913; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SLS_PL_9TH_PATTERN_EN = 2914; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_WT_STATUS_PL_LANE_DISABLED = 2915; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_WT_STATUS_PL_LANE_INVERTED = 2916; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE = 2917; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 2918; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SERVO_CNTL_PL_OP_DONE = 2919; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SERVO_CNTL_PL_OP = 2920; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SERVO_CNTL_PL_OP_LEN = 2921; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ = 2922; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 2923; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_TRACE_PL_LN_TRC_EN = 2924; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_EYE_OPT_STAT_PL_BAD_BER = 2925; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 2926; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 2927; static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_EYE_OPT_STAT_PL_BAD_DDC = 2928; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_MODE_PL_LANE_PDWN = 2929; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 2930; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_CNTL_PL_BLOCK_LOCK_LANE = 2931; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_CNTL_PL_CHECK_SKEW_LANE = 2932; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_CNTL_PL_PDWN_LITE = 2933; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_CNTL_PL_OFFCAL_MODE = 2934; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_0 = 2935; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_1 = 2936; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_2 = 2937; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_3 = 2938; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_4 = 2939; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_5 = 2940; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_6 = 2941; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_7 = 2942; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_BIST_STAT_PL_ERR = 2943; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_OFFSET_EVEN_PL_SAMP1 = 2944; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_OFFSET_EVEN_PL_SAMP1_LEN = 2945; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_OFFSET_EVEN_PL_SAMP0 = 2946; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_OFFSET_EVEN_PL_SAMP0_LEN = 2947; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_OFFSET_ODD_PL_SAMP1 = 2948; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_OFFSET_ODD_PL_SAMP1_LEN = 2949; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_OFFSET_ODD_PL_SAMP0 = 2950; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_OFFSET_ODD_PL_SAMP0_LEN = 2951; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AMP_VAL_PL_PEAK = 2952; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AMP_VAL_PL_PEAK_LEN = 2953; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AMP_VAL_PL_GAIN = 2954; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AMP_VAL_PL_GAIN_LEN = 2955; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AMP_VAL_PL_OFFSET = 2956; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AMP_VAL_PL_OFFSET_LEN = 2957; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AMP_CNTL_PL_ADJ_DONE = 2958; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET = 2959; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 2960; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_FIFO_STAT_PL_L2U_DLY = 2961; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_FIFO_STAT_PL_L2U_DLY_LEN = 2962; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AP_PL_EVEN_SAMP = 2963; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AP_PL_EVEN_SAMP_LEN = 2964; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AP_PL_ODD_SAMP = 2965; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AP_PL_ODD_SAMP_LEN = 2966; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AN_PL_EVEN_SAMP = 2967; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AN_PL_EVEN_SAMP_LEN = 2968; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AN_PL_ODD_SAMP = 2969; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AN_PL_ODD_SAMP_LEN = 2970; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AMIN_PL_EVEN = 2971; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AMIN_PL_EVEN_LEN = 2972; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AMIN_PL_ODD = 2973; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AMIN_PL_ODD_LEN = 2974; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_H1_EVEN_PL_SAMP1 = 2975; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_H1_EVEN_PL_SAMP1_LEN = 2976; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_H1_EVEN_PL_SAMP0 = 2977; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_H1_EVEN_PL_SAMP0_LEN = 2978; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_H1_ODD_PL_SAMP1 = 2979; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_H1_ODD_PL_SAMP1_LEN = 2980; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_H1_ODD_PL_SAMP0 = 2981; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_H1_ODD_PL_SAMP0_LEN = 2982; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_PRBS_MODE_PL_TAP_ID = 2983; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_PRBS_MODE_PL_TAP_ID_LEN = 2984; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 2985; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_DESKEW_STAT_PL_BAD_SKEW = 2986; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_DESKEW_STAT_PL_BAD = 2987; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_FIR_PL_ERRS = 2988; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_FIR_PL_ERRS_LEN = 2989; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_FIR_MASK_PL_ERRS = 2990; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_FIR_MASK_PL_ERRS_LEN = 2991; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 2992; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 2993; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SLS_PL_LANE_SEL = 2994; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SLS_PL_9TH_PATTERN_EN = 2995; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_WT_STATUS_PL_LANE_DISABLED = 2996; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_WT_STATUS_PL_LANE_INVERTED = 2997; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE = 2998; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 2999; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SERVO_CNTL_PL_OP_DONE = 3000; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SERVO_CNTL_PL_OP = 3001; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SERVO_CNTL_PL_OP_LEN = 3002; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ = 3003; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 3004; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_TRACE_PL_LN_TRC_EN = 3005; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_EYE_OPT_STAT_PL_BAD_BER = 3006; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 3007; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 3008; static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_EYE_OPT_STAT_PL_BAD_DDC = 3009; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE = 3010; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE_LEN = 3011; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE1_PP_PRBS_SCRAMBLE_MODE = 3012; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE1_PP_PRBS_SCRAMBLE_MODE_LEN = 3013; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL = 3014; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL_LEN = 3015; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL = 3016; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL_LEN = 3017; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL = 3018; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL_LEN = 3019; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE1_PP_ENABLE_DFE_V1 = 3020; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE1_PP_AMIN_ALL = 3021; static const uint64_t IDX_CEN_TXPACKS3_RX_CNTL_FAST_PP_PRBS_CHECK_SYNC = 3022; static const uint64_t IDX_CEN_TXPACKS3_RX_CNTL_FAST_PP_ENABLE_REDUCED_SCRAMBLE = 3023; static const uint64_t IDX_CEN_TXPACKS3_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL = 3024; static const uint64_t IDX_CEN_TXPACKS3_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN = 3025; static const uint64_t IDX_CEN_TXPACKS3_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL = 3026; static const uint64_t IDX_CEN_TXPACKS3_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN = 3027; static const uint64_t IDX_CEN_TXPACKS3_RX_BER_CNTL_PP_EN = 3028; static const uint64_t IDX_CEN_TXPACKS3_RX_BER_MODE_PP_TIMER_FREEZE_EN = 3029; static const uint64_t IDX_CEN_TXPACKS3_RX_BER_MODE_PP_COUNT_FREEZE_EN = 3030; static const uint64_t IDX_CEN_TXPACKS3_RX_BER_MODE_PP_COUNT_SEL = 3031; static const uint64_t IDX_CEN_TXPACKS3_RX_BER_MODE_PP_COUNT_SEL_LEN = 3032; static const uint64_t IDX_CEN_TXPACKS3_RX_BER_MODE_PP_TIMER_SEL = 3033; static const uint64_t IDX_CEN_TXPACKS3_RX_BER_MODE_PP_TIMER_SEL_LEN = 3034; static const uint64_t IDX_CEN_TXPACKS3_RX_BER_MODE_PP_CLR_COUNT_ON_READ_EN = 3035; static const uint64_t IDX_CEN_TXPACKS3_RX_BER_MODE_PP_CLR_TIMER_ON_READ_EN = 3036; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_A = 3037; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_A_LEN = 3038; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_B = 3039; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_B_LEN = 3040; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_C = 3041; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_C_LEN = 3042; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_D = 3043; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_D_LEN = 3044; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_E = 3045; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_E_LEN = 3046; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_F = 3047; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_F_LEN = 3048; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_G = 3049; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_G_LEN = 3050; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_H = 3051; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_H_LEN = 3052; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_I = 3053; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_I_LEN = 3054; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_J = 3055; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_J_LEN = 3056; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_K = 3057; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_K_LEN = 3058; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_L = 3059; static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_L_LEN = 3060; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_CONFIG_PP_PEAK_CFG = 3061; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_CONFIG_PP_PEAK_CFG_LEN = 3062; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_CONFIG_PP_AMIN_CFG = 3063; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_CONFIG_PP_AMIN_CFG_LEN = 3064; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_CONFIG_PP_ANAP_CFG = 3065; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_CONFIG_PP_ANAP_CFG_LEN = 3066; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_CONFIG_PP_H1_CFG = 3067; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_CONFIG_PP_H1_CFG_LEN = 3068; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_CONFIG_PP_H1AP_CFG = 3069; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_CONFIG_PP_H1AP_CFG_LEN = 3070; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_CONFIG_PP_CA_CFG = 3071; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_CONFIG_PP_CA_CFG_LEN = 3072; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_CONFIG_PP_SPMUX_CFG = 3073; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_CONFIG_PP_SPMUX_CFG_LEN = 3074; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_TIMERS_PP_INIT_TMR_CFG = 3075; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_TIMERS_PP_INIT_TMR_CFG_LEN = 3076; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_TIMERS_PP_BER_CFG = 3077; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_TIMERS_PP_BER_CFG_LEN = 3078; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_TIMERS_PP_FIFO_DLY_CFG = 3079; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_TIMERS_PP_FIFO_DLY_CFG_LEN = 3080; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_TIMERS_PP_DDC_CFG = 3081; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_TIMERS_PP_DDC_CFG_LEN = 3082; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_TIMERS_PP_DAC_BO_CFG = 3083; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_TIMERS_PP_DAC_BO_CFG_LEN = 3084; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_TIMERS_PP_PROT_CFG = 3085; static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_TIMERS_PP_PROT_CFG_LEN = 3086; static const uint64_t IDX_CEN_TXPACKS3_RX_RESET_CFG_PP_HLD = 3087; static const uint64_t IDX_CEN_TXPACKS3_RX_RESET_CFG_PP_HLD_LEN = 3088; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO1_PP_TIMEOUT_SEL_A = 3089; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO1_PP_TIMEOUT_SEL_A_LEN = 3090; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO1_PP_TIMEOUT_SEL_B = 3091; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO1_PP_TIMEOUT_SEL_B_LEN = 3092; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO2_PP_TIMEOUT_SEL_E = 3093; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO2_PP_TIMEOUT_SEL_E_LEN = 3094; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO2_PP_TIMEOUT_SEL_G = 3095; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO2_PP_TIMEOUT_SEL_G_LEN = 3096; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO2_PP_TIMEOUT_SEL_H = 3097; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO2_PP_TIMEOUT_SEL_H_LEN = 3098; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_I = 3099; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_I_LEN = 3100; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_J = 3101; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_J_LEN = 3102; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_K = 3103; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_K_LEN = 3104; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_L = 3105; static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_L_LEN = 3106; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE2_PP_PP_TRC_EN = 3107; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE2_PP_PP_TRC_MODE = 3108; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE2_PP_PP_TRC_MODE_LEN = 3109; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE2_PP_BIST_JITTER_PULSE_SEL = 3110; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE2_PP_BIST_JITTER_PULSE_SEL_LEN = 3111; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE2_PP_BIST_MIN_EYE_WIDTH = 3112; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE2_PP_BIST_MIN_EYE_WIDTH_LEN = 3113; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE2_PP_WT_PATTERN_LENGTH = 3114; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE2_PP_WT_PATTERN_LENGTH_LEN = 3115; static const uint64_t IDX_CEN_TXPACKS3_RX_BIST_GCRMSG_PP_EN = 3116; static const uint64_t IDX_CEN_TXPACKS3_RX_SCOPE_CNTL_PP_CONTROL = 3117; static const uint64_t IDX_CEN_TXPACKS3_RX_SCOPE_CNTL_PP_CONTROL_LEN = 3118; static const uint64_t IDX_CEN_TXPACKS3_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG = 3119; static const uint64_t IDX_CEN_TXPACKS3_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG_LEN = 3120; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE3_PP_BIST_STEP_INTERVAL_EN = 3121; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE3_PP_BIST_STEP_INTERVAL = 3122; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE3_PP_BIST_STEP_INTERVAL_LEN = 3123; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE3_PP_BIST_PHASEROT_OFFSET_EN = 3124; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE3_PP_BIST_PHASEROT_OFFSET = 3125; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE3_PP_BIST_PHASEROT_OFFSET_LEN = 3126; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE3_PP_BIST_BUFFER_SEL = 3127; static const uint64_t IDX_CEN_TXPACKS3_RX_MODE3_PP_BIST_BUFFER_SEL_LEN = 3128; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_MODE_PL_LANE_PDWN = 3129; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 3130; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_CNTL_PL_BLOCK_LOCK_LANE = 3131; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_CNTL_PL_CHECK_SKEW_LANE = 3132; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_CNTL_PL_PDWN_LITE = 3133; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_CNTL_PL_OFFCAL_MODE = 3134; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_0 = 3135; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_1 = 3136; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_2 = 3137; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_3 = 3138; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_4 = 3139; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_5 = 3140; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_6 = 3141; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_7 = 3142; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_BIST_STAT_PL_ERR = 3143; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_OFFSET_EVEN_PL_SAMP1 = 3144; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_OFFSET_EVEN_PL_SAMP1_LEN = 3145; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_OFFSET_EVEN_PL_SAMP0 = 3146; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_OFFSET_EVEN_PL_SAMP0_LEN = 3147; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_OFFSET_ODD_PL_SAMP1 = 3148; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_OFFSET_ODD_PL_SAMP1_LEN = 3149; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_OFFSET_ODD_PL_SAMP0 = 3150; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_OFFSET_ODD_PL_SAMP0_LEN = 3151; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AMP_VAL_PL_PEAK = 3152; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AMP_VAL_PL_PEAK_LEN = 3153; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AMP_VAL_PL_GAIN = 3154; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AMP_VAL_PL_GAIN_LEN = 3155; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AMP_VAL_PL_OFFSET = 3156; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AMP_VAL_PL_OFFSET_LEN = 3157; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AMP_CNTL_PL_ADJ_DONE = 3158; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET = 3159; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 3160; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_FIFO_STAT_PL_L2U_DLY = 3161; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_FIFO_STAT_PL_L2U_DLY_LEN = 3162; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AP_PL_EVEN_SAMP = 3163; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AP_PL_EVEN_SAMP_LEN = 3164; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AP_PL_ODD_SAMP = 3165; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AP_PL_ODD_SAMP_LEN = 3166; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AN_PL_EVEN_SAMP = 3167; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AN_PL_EVEN_SAMP_LEN = 3168; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AN_PL_ODD_SAMP = 3169; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AN_PL_ODD_SAMP_LEN = 3170; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AMIN_PL_EVEN = 3171; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AMIN_PL_EVEN_LEN = 3172; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AMIN_PL_ODD = 3173; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AMIN_PL_ODD_LEN = 3174; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_H1_EVEN_PL_SAMP1 = 3175; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_H1_EVEN_PL_SAMP1_LEN = 3176; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_H1_EVEN_PL_SAMP0 = 3177; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_H1_EVEN_PL_SAMP0_LEN = 3178; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_H1_ODD_PL_SAMP1 = 3179; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_H1_ODD_PL_SAMP1_LEN = 3180; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_H1_ODD_PL_SAMP0 = 3181; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_H1_ODD_PL_SAMP0_LEN = 3182; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_PRBS_MODE_PL_TAP_ID = 3183; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_PRBS_MODE_PL_TAP_ID_LEN = 3184; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 3185; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_DESKEW_STAT_PL_BAD_SKEW = 3186; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_DESKEW_STAT_PL_BAD = 3187; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_FIR_PL_ERRS = 3188; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_FIR_PL_ERRS_LEN = 3189; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_FIR_MASK_PL_ERRS = 3190; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_FIR_MASK_PL_ERRS_LEN = 3191; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 3192; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 3193; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SLS_PL_LANE_SEL = 3194; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SLS_PL_9TH_PATTERN_EN = 3195; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_WT_STATUS_PL_LANE_DISABLED = 3196; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_WT_STATUS_PL_LANE_INVERTED = 3197; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE = 3198; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 3199; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SERVO_CNTL_PL_OP_DONE = 3200; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SERVO_CNTL_PL_OP = 3201; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SERVO_CNTL_PL_OP_LEN = 3202; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ = 3203; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 3204; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_TRACE_PL_LN_TRC_EN = 3205; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_EYE_OPT_STAT_PL_BAD_BER = 3206; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 3207; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 3208; static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_EYE_OPT_STAT_PL_BAD_DDC = 3209; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_MODE_PL_LANE_PDWN = 3210; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 3211; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_CNTL_PL_BLOCK_LOCK_LANE = 3212; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_CNTL_PL_CHECK_SKEW_LANE = 3213; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_CNTL_PL_PDWN_LITE = 3214; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_CNTL_PL_OFFCAL_MODE = 3215; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_0 = 3216; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_1 = 3217; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_2 = 3218; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_3 = 3219; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_4 = 3220; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_5 = 3221; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_6 = 3222; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_7 = 3223; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_BIST_STAT_PL_ERR = 3224; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_OFFSET_EVEN_PL_SAMP1 = 3225; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_OFFSET_EVEN_PL_SAMP1_LEN = 3226; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_OFFSET_EVEN_PL_SAMP0 = 3227; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_OFFSET_EVEN_PL_SAMP0_LEN = 3228; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_OFFSET_ODD_PL_SAMP1 = 3229; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_OFFSET_ODD_PL_SAMP1_LEN = 3230; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_OFFSET_ODD_PL_SAMP0 = 3231; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_OFFSET_ODD_PL_SAMP0_LEN = 3232; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AMP_VAL_PL_PEAK = 3233; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AMP_VAL_PL_PEAK_LEN = 3234; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AMP_VAL_PL_GAIN = 3235; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AMP_VAL_PL_GAIN_LEN = 3236; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AMP_VAL_PL_OFFSET = 3237; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AMP_VAL_PL_OFFSET_LEN = 3238; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AMP_CNTL_PL_ADJ_DONE = 3239; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET = 3240; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 3241; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_FIFO_STAT_PL_L2U_DLY = 3242; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_FIFO_STAT_PL_L2U_DLY_LEN = 3243; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AP_PL_EVEN_SAMP = 3244; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AP_PL_EVEN_SAMP_LEN = 3245; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AP_PL_ODD_SAMP = 3246; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AP_PL_ODD_SAMP_LEN = 3247; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AN_PL_EVEN_SAMP = 3248; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AN_PL_EVEN_SAMP_LEN = 3249; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AN_PL_ODD_SAMP = 3250; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AN_PL_ODD_SAMP_LEN = 3251; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AMIN_PL_EVEN = 3252; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AMIN_PL_EVEN_LEN = 3253; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AMIN_PL_ODD = 3254; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AMIN_PL_ODD_LEN = 3255; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_H1_EVEN_PL_SAMP1 = 3256; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_H1_EVEN_PL_SAMP1_LEN = 3257; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_H1_EVEN_PL_SAMP0 = 3258; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_H1_EVEN_PL_SAMP0_LEN = 3259; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_H1_ODD_PL_SAMP1 = 3260; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_H1_ODD_PL_SAMP1_LEN = 3261; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_H1_ODD_PL_SAMP0 = 3262; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_H1_ODD_PL_SAMP0_LEN = 3263; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_PRBS_MODE_PL_TAP_ID = 3264; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_PRBS_MODE_PL_TAP_ID_LEN = 3265; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 3266; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_DESKEW_STAT_PL_BAD_SKEW = 3267; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_DESKEW_STAT_PL_BAD = 3268; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_FIR_PL_ERRS = 3269; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_FIR_PL_ERRS_LEN = 3270; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_FIR_MASK_PL_ERRS = 3271; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_FIR_MASK_PL_ERRS_LEN = 3272; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 3273; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 3274; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SLS_PL_LANE_SEL = 3275; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SLS_PL_9TH_PATTERN_EN = 3276; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_WT_STATUS_PL_LANE_DISABLED = 3277; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_WT_STATUS_PL_LANE_INVERTED = 3278; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE = 3279; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 3280; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SERVO_CNTL_PL_OP_DONE = 3281; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SERVO_CNTL_PL_OP = 3282; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SERVO_CNTL_PL_OP_LEN = 3283; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ = 3284; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 3285; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_TRACE_PL_LN_TRC_EN = 3286; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_EYE_OPT_STAT_PL_BAD_BER = 3287; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 3288; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 3289; static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_EYE_OPT_STAT_PL_BAD_DDC = 3290; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_MODE_PL_LANE_PDWN = 3291; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 3292; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_CNTL_PL_BLOCK_LOCK_LANE = 3293; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_CNTL_PL_CHECK_SKEW_LANE = 3294; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_CNTL_PL_PDWN_LITE = 3295; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_CNTL_PL_OFFCAL_MODE = 3296; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_0 = 3297; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_1 = 3298; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_2 = 3299; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_3 = 3300; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_4 = 3301; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_5 = 3302; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_6 = 3303; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_7 = 3304; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_BIST_STAT_PL_ERR = 3305; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_OFFSET_EVEN_PL_SAMP1 = 3306; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_OFFSET_EVEN_PL_SAMP1_LEN = 3307; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_OFFSET_EVEN_PL_SAMP0 = 3308; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_OFFSET_EVEN_PL_SAMP0_LEN = 3309; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_OFFSET_ODD_PL_SAMP1 = 3310; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_OFFSET_ODD_PL_SAMP1_LEN = 3311; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_OFFSET_ODD_PL_SAMP0 = 3312; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_OFFSET_ODD_PL_SAMP0_LEN = 3313; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AMP_VAL_PL_PEAK = 3314; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AMP_VAL_PL_PEAK_LEN = 3315; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AMP_VAL_PL_GAIN = 3316; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AMP_VAL_PL_GAIN_LEN = 3317; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AMP_VAL_PL_OFFSET = 3318; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AMP_VAL_PL_OFFSET_LEN = 3319; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AMP_CNTL_PL_ADJ_DONE = 3320; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET = 3321; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 3322; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_FIFO_STAT_PL_L2U_DLY = 3323; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_FIFO_STAT_PL_L2U_DLY_LEN = 3324; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AP_PL_EVEN_SAMP = 3325; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AP_PL_EVEN_SAMP_LEN = 3326; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AP_PL_ODD_SAMP = 3327; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AP_PL_ODD_SAMP_LEN = 3328; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AN_PL_EVEN_SAMP = 3329; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AN_PL_EVEN_SAMP_LEN = 3330; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AN_PL_ODD_SAMP = 3331; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AN_PL_ODD_SAMP_LEN = 3332; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AMIN_PL_EVEN = 3333; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AMIN_PL_EVEN_LEN = 3334; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AMIN_PL_ODD = 3335; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AMIN_PL_ODD_LEN = 3336; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_H1_EVEN_PL_SAMP1 = 3337; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_H1_EVEN_PL_SAMP1_LEN = 3338; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_H1_EVEN_PL_SAMP0 = 3339; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_H1_EVEN_PL_SAMP0_LEN = 3340; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_H1_ODD_PL_SAMP1 = 3341; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_H1_ODD_PL_SAMP1_LEN = 3342; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_H1_ODD_PL_SAMP0 = 3343; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_H1_ODD_PL_SAMP0_LEN = 3344; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_PRBS_MODE_PL_TAP_ID = 3345; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_PRBS_MODE_PL_TAP_ID_LEN = 3346; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 3347; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_DESKEW_STAT_PL_BAD_SKEW = 3348; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_DESKEW_STAT_PL_BAD = 3349; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_FIR_PL_ERRS = 3350; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_FIR_PL_ERRS_LEN = 3351; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_FIR_MASK_PL_ERRS = 3352; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_FIR_MASK_PL_ERRS_LEN = 3353; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 3354; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 3355; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SLS_PL_LANE_SEL = 3356; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SLS_PL_9TH_PATTERN_EN = 3357; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_WT_STATUS_PL_LANE_DISABLED = 3358; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_WT_STATUS_PL_LANE_INVERTED = 3359; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE = 3360; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 3361; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SERVO_CNTL_PL_OP_DONE = 3362; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SERVO_CNTL_PL_OP = 3363; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SERVO_CNTL_PL_OP_LEN = 3364; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ = 3365; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 3366; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_TRACE_PL_LN_TRC_EN = 3367; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_EYE_OPT_STAT_PL_BAD_BER = 3368; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 3369; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 3370; static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_EYE_OPT_STAT_PL_BAD_DDC = 3371; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_MODE_PL_LANE_PDWN = 3372; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 3373; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_CNTL_PL_BLOCK_LOCK_LANE = 3374; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_CNTL_PL_CHECK_SKEW_LANE = 3375; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_CNTL_PL_PDWN_LITE = 3376; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_CNTL_PL_OFFCAL_MODE = 3377; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_0 = 3378; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_1 = 3379; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_2 = 3380; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_3 = 3381; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_4 = 3382; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_5 = 3383; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_6 = 3384; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_7 = 3385; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_BIST_STAT_PL_ERR = 3386; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_OFFSET_EVEN_PL_SAMP1 = 3387; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_OFFSET_EVEN_PL_SAMP1_LEN = 3388; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_OFFSET_EVEN_PL_SAMP0 = 3389; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_OFFSET_EVEN_PL_SAMP0_LEN = 3390; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_OFFSET_ODD_PL_SAMP1 = 3391; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_OFFSET_ODD_PL_SAMP1_LEN = 3392; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_OFFSET_ODD_PL_SAMP0 = 3393; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_OFFSET_ODD_PL_SAMP0_LEN = 3394; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AMP_VAL_PL_PEAK = 3395; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AMP_VAL_PL_PEAK_LEN = 3396; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AMP_VAL_PL_GAIN = 3397; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AMP_VAL_PL_GAIN_LEN = 3398; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AMP_VAL_PL_OFFSET = 3399; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AMP_VAL_PL_OFFSET_LEN = 3400; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AMP_CNTL_PL_ADJ_DONE = 3401; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET = 3402; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 3403; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_FIFO_STAT_PL_L2U_DLY = 3404; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_FIFO_STAT_PL_L2U_DLY_LEN = 3405; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AP_PL_EVEN_SAMP = 3406; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AP_PL_EVEN_SAMP_LEN = 3407; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AP_PL_ODD_SAMP = 3408; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AP_PL_ODD_SAMP_LEN = 3409; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AN_PL_EVEN_SAMP = 3410; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AN_PL_EVEN_SAMP_LEN = 3411; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AN_PL_ODD_SAMP = 3412; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AN_PL_ODD_SAMP_LEN = 3413; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AMIN_PL_EVEN = 3414; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AMIN_PL_EVEN_LEN = 3415; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AMIN_PL_ODD = 3416; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AMIN_PL_ODD_LEN = 3417; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_H1_EVEN_PL_SAMP1 = 3418; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_H1_EVEN_PL_SAMP1_LEN = 3419; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_H1_EVEN_PL_SAMP0 = 3420; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_H1_EVEN_PL_SAMP0_LEN = 3421; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_H1_ODD_PL_SAMP1 = 3422; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_H1_ODD_PL_SAMP1_LEN = 3423; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_H1_ODD_PL_SAMP0 = 3424; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_H1_ODD_PL_SAMP0_LEN = 3425; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_PRBS_MODE_PL_TAP_ID = 3426; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_PRBS_MODE_PL_TAP_ID_LEN = 3427; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 3428; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_DESKEW_STAT_PL_BAD_SKEW = 3429; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_DESKEW_STAT_PL_BAD = 3430; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_FIR_PL_ERRS = 3431; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_FIR_PL_ERRS_LEN = 3432; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_FIR_MASK_PL_ERRS = 3433; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_FIR_MASK_PL_ERRS_LEN = 3434; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 3435; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 3436; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SLS_PL_LANE_SEL = 3437; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SLS_PL_9TH_PATTERN_EN = 3438; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_WT_STATUS_PL_LANE_DISABLED = 3439; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_WT_STATUS_PL_LANE_INVERTED = 3440; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE = 3441; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 3442; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SERVO_CNTL_PL_OP_DONE = 3443; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SERVO_CNTL_PL_OP = 3444; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SERVO_CNTL_PL_OP_LEN = 3445; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ = 3446; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 3447; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_TRACE_PL_LN_TRC_EN = 3448; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_EYE_OPT_STAT_PL_BAD_BER = 3449; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 3450; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 3451; static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_EYE_OPT_STAT_PL_BAD_DDC = 3452; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE = 3453; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE_LEN = 3454; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_PRBS_SCRAMBLE_MODE = 3455; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_PRBS_SCRAMBLE_MODE_LEN = 3456; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL = 3457; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL_LEN = 3458; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL = 3459; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL_LEN = 3460; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL = 3461; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL_LEN = 3462; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_ENABLE_DFE_V1 = 3463; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_AMIN_ALL = 3464; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_CNTL_FAST_PP_PRBS_CHECK_SYNC = 3465; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_CNTL_FAST_PP_ENABLE_REDUCED_SCRAMBLE = 3466; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL = 3467; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN = 3468; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL = 3469; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN = 3470; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_BER_CNTL_PP_EN = 3471; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_TIMER_FREEZE_EN = 3472; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_COUNT_FREEZE_EN = 3473; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_COUNT_SEL = 3474; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_COUNT_SEL_LEN = 3475; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_TIMER_SEL = 3476; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_TIMER_SEL_LEN = 3477; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_CLR_COUNT_ON_READ_EN = 3478; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_CLR_TIMER_ON_READ_EN = 3479; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_A = 3480; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_A_LEN = 3481; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_B = 3482; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_B_LEN = 3483; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_C = 3484; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_C_LEN = 3485; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_D = 3486; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_D_LEN = 3487; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_E = 3488; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_E_LEN = 3489; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_F = 3490; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_F_LEN = 3491; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_G = 3492; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_G_LEN = 3493; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_H = 3494; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_H_LEN = 3495; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_I = 3496; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_I_LEN = 3497; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_J = 3498; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_J_LEN = 3499; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_K = 3500; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_K_LEN = 3501; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_L = 3502; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_L_LEN = 3503; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_PEAK_CFG = 3504; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_PEAK_CFG_LEN = 3505; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_AMIN_CFG = 3506; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_AMIN_CFG_LEN = 3507; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_ANAP_CFG = 3508; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_ANAP_CFG_LEN = 3509; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_H1_CFG = 3510; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_H1_CFG_LEN = 3511; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_H1AP_CFG = 3512; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_H1AP_CFG_LEN = 3513; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_CA_CFG = 3514; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_CA_CFG_LEN = 3515; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_SPMUX_CFG = 3516; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_SPMUX_CFG_LEN = 3517; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_INIT_TMR_CFG = 3518; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_INIT_TMR_CFG_LEN = 3519; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_BER_CFG = 3520; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_BER_CFG_LEN = 3521; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_FIFO_DLY_CFG = 3522; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_FIFO_DLY_CFG_LEN = 3523; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_DDC_CFG = 3524; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_DDC_CFG_LEN = 3525; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_DAC_BO_CFG = 3526; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_DAC_BO_CFG_LEN = 3527; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_PROT_CFG = 3528; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_PROT_CFG_LEN = 3529; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RESET_CFG_PP_HLD = 3530; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RESET_CFG_PP_HLD_LEN = 3531; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO1_PP_TIMEOUT_SEL_A = 3532; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO1_PP_TIMEOUT_SEL_A_LEN = 3533; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO1_PP_TIMEOUT_SEL_B = 3534; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO1_PP_TIMEOUT_SEL_B_LEN = 3535; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO2_PP_TIMEOUT_SEL_E = 3536; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO2_PP_TIMEOUT_SEL_E_LEN = 3537; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO2_PP_TIMEOUT_SEL_G = 3538; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO2_PP_TIMEOUT_SEL_G_LEN = 3539; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO2_PP_TIMEOUT_SEL_H = 3540; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO2_PP_TIMEOUT_SEL_H_LEN = 3541; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_I = 3542; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_I_LEN = 3543; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_J = 3544; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_J_LEN = 3545; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_K = 3546; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_K_LEN = 3547; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_L = 3548; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_L_LEN = 3549; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_PP_TRC_EN = 3550; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_PP_TRC_MODE = 3551; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_PP_TRC_MODE_LEN = 3552; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_BIST_JITTER_PULSE_SEL = 3553; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_BIST_JITTER_PULSE_SEL_LEN = 3554; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_BIST_MIN_EYE_WIDTH = 3555; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_BIST_MIN_EYE_WIDTH_LEN = 3556; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_WT_PATTERN_LENGTH = 3557; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_WT_PATTERN_LENGTH_LEN = 3558; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_BIST_GCRMSG_PP_EN = 3559; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SCOPE_CNTL_PP_CONTROL = 3560; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SCOPE_CNTL_PP_CONTROL_LEN = 3561; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG = 3562; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG_LEN = 3563; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_STEP_INTERVAL_EN = 3564; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_STEP_INTERVAL = 3565; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_STEP_INTERVAL_LEN = 3566; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_PHASEROT_OFFSET_EN = 3567; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_PHASEROT_OFFSET = 3568; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_PHASEROT_OFFSET_LEN = 3569; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_BUFFER_SEL = 3570; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_BUFFER_SEL_LEN = 3571; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_MODE_PL_LANE_PDWN = 3572; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 3573; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_CNTL_PL_BLOCK_LOCK_LANE = 3574; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_CNTL_PL_CHECK_SKEW_LANE = 3575; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_CNTL_PL_PDWN_LITE = 3576; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_CNTL_PL_OFFCAL_MODE = 3577; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_0 = 3578; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_1 = 3579; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_2 = 3580; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_3 = 3581; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_RX_PL_SPARE_MODE = 3582; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_5 = 3583; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_6 = 3584; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_7 = 3585; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_BIST_STAT_PL_ERR = 3586; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_EVEN_PL_SAMP1 = 3587; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_EVEN_PL_SAMP1_LEN = 3588; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_EVEN_PL_SAMP0 = 3589; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_EVEN_PL_SAMP0_LEN = 3590; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_ODD_PL_SAMP1 = 3591; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_ODD_PL_SAMP1_LEN = 3592; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_ODD_PL_SAMP0 = 3593; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_ODD_PL_SAMP0_LEN = 3594; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_VAL_PL_PEAK = 3595; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_VAL_PL_PEAK_LEN = 3596; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_VAL_PL_GAIN = 3597; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_VAL_PL_GAIN_LEN = 3598; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_VAL_PL_OFFSET = 3599; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_VAL_PL_OFFSET_LEN = 3600; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_CNTL_PL_ADJ_DONE = 3601; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET = 3602; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 3603; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIFO_STAT_PL_L2U_DLY = 3604; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIFO_STAT_PL_L2U_DLY_LEN = 3605; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AP_PL_EVEN_SAMP = 3606; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AP_PL_EVEN_SAMP_LEN = 3607; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AP_PL_ODD_SAMP = 3608; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AP_PL_ODD_SAMP_LEN = 3609; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AN_PL_EVEN_SAMP = 3610; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AN_PL_EVEN_SAMP_LEN = 3611; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AN_PL_ODD_SAMP = 3612; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AN_PL_ODD_SAMP_LEN = 3613; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMIN_PL_EVEN = 3614; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMIN_PL_EVEN_LEN = 3615; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMIN_PL_ODD = 3616; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMIN_PL_ODD_LEN = 3617; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_EVEN_PL_SAMP1 = 3618; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_EVEN_PL_SAMP1_LEN = 3619; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_EVEN_PL_SAMP0 = 3620; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_EVEN_PL_SAMP0_LEN = 3621; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_ODD_PL_SAMP1 = 3622; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_ODD_PL_SAMP1_LEN = 3623; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_ODD_PL_SAMP0 = 3624; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_ODD_PL_SAMP0_LEN = 3625; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_PRBS_MODE_PL_TAP_ID = 3626; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_PRBS_MODE_PL_TAP_ID_LEN = 3627; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 3628; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_DESKEW_STAT_PL_BAD_SKEW = 3629; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_DESKEW_STAT_PL_BAD = 3630; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIR_PL_ERRS = 3631; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIR_PL_ERRS_LEN = 3632; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIR_MASK_PL_ERRS = 3633; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIR_MASK_PL_ERRS_LEN = 3634; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 3635; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 3636; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SLS_PL_LANE_SEL = 3637; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SLS_PL_9TH_PATTERN_EN = 3638; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_WT_STATUS_PL_LANE_DISABLED = 3639; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_WT_STATUS_PL_LANE_INVERTED = 3640; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE = 3641; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 3642; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SERVO_CNTL_PL_OP_DONE = 3643; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SERVO_CNTL_PL_OP = 3644; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SERVO_CNTL_PL_OP_LEN = 3645; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ = 3646; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 3647; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_TRACE_PL_LN_TRC_EN = 3648; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_EYE_OPT_STAT_PL_BAD_BER = 3649; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 3650; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 3651; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_EYE_OPT_STAT_PL_BAD_DDC = 3652; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_MODE_PL_LANE_PDWN = 3653; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_MODE_PL_LANE_SCRAMBLE_DISABLE = 3654; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_CNTL_PL_BLOCK_LOCK_LANE = 3655; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_CNTL_PL_CHECK_SKEW_LANE = 3656; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_CNTL_PL_PDWN_LITE = 3657; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_CNTL_PL_OFFCAL_MODE = 3658; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_0 = 3659; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_1 = 3660; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_2 = 3661; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_3 = 3662; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_RX_PL_SPARE_MODE = 3663; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_5 = 3664; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_6 = 3665; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_7 = 3666; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_BIST_STAT_PL_ERR = 3667; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_EVEN_PL_SAMP1 = 3668; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_EVEN_PL_SAMP1_LEN = 3669; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_EVEN_PL_SAMP0 = 3670; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_EVEN_PL_SAMP0_LEN = 3671; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_ODD_PL_SAMP1 = 3672; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_ODD_PL_SAMP1_LEN = 3673; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_ODD_PL_SAMP0 = 3674; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_ODD_PL_SAMP0_LEN = 3675; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_VAL_PL_PEAK = 3676; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_VAL_PL_PEAK_LEN = 3677; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_VAL_PL_GAIN = 3678; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_VAL_PL_GAIN_LEN = 3679; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_VAL_PL_OFFSET = 3680; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_VAL_PL_OFFSET_LEN = 3681; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_CNTL_PL_ADJ_DONE = 3682; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET = 3683; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN = 3684; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIFO_STAT_PL_L2U_DLY = 3685; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIFO_STAT_PL_L2U_DLY_LEN = 3686; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AP_PL_EVEN_SAMP = 3687; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AP_PL_EVEN_SAMP_LEN = 3688; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AP_PL_ODD_SAMP = 3689; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AP_PL_ODD_SAMP_LEN = 3690; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AN_PL_EVEN_SAMP = 3691; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AN_PL_EVEN_SAMP_LEN = 3692; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AN_PL_ODD_SAMP = 3693; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AN_PL_ODD_SAMP_LEN = 3694; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMIN_PL_EVEN = 3695; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMIN_PL_EVEN_LEN = 3696; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMIN_PL_ODD = 3697; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMIN_PL_ODD_LEN = 3698; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_EVEN_PL_SAMP1 = 3699; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_EVEN_PL_SAMP1_LEN = 3700; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_EVEN_PL_SAMP0 = 3701; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_EVEN_PL_SAMP0_LEN = 3702; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_ODD_PL_SAMP1 = 3703; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_ODD_PL_SAMP1_LEN = 3704; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_ODD_PL_SAMP0 = 3705; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_ODD_PL_SAMP0_LEN = 3706; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_PRBS_MODE_PL_TAP_ID = 3707; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_PRBS_MODE_PL_TAP_ID_LEN = 3708; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK = 3709; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_DESKEW_STAT_PL_BAD_SKEW = 3710; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_DESKEW_STAT_PL_BAD = 3711; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIR_PL_ERRS = 3712; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIR_PL_ERRS_LEN = 3713; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIR_MASK_PL_ERRS = 3714; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIR_MASK_PL_ERRS_LEN = 3715; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ = 3716; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN = 3717; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SLS_PL_LANE_SEL = 3718; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SLS_PL_9TH_PATTERN_EN = 3719; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_WT_STATUS_PL_LANE_DISABLED = 3720; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_WT_STATUS_PL_LANE_INVERTED = 3721; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE = 3722; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN = 3723; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SERVO_CNTL_PL_OP_DONE = 3724; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SERVO_CNTL_PL_OP = 3725; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SERVO_CNTL_PL_OP_LEN = 3726; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ = 3727; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ_LEN = 3728; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_TRACE_PL_LN_TRC_EN = 3729; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_EYE_OPT_STAT_PL_BAD_BER = 3730; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_EYE_OPT_STAT_PL_BAD_WIDTH = 3731; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_EYE_OPT_STAT_PL_BAD_HEIGHT = 3732; static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_EYE_OPT_STAT_PL_BAD_DDC = 3733; static const uint64_t IDX_CEN_SCOM_MODE_PB_GCR_TEST = 3734; static const uint64_t IDX_CEN_SCOM_MODE_PB_ENABLE_GCR_OFL_BUFF = 3735; static const uint64_t IDX_CEN_SCOM_MODE_PB_IORESET_HARD_BUS0 = 3736; static const uint64_t IDX_CEN_SCOM_MODE_PB_IORESET_HARD_BUS0_LEN = 3737; static const uint64_t IDX_CEN_SCOM_MODE_PB_GCR_HANG_DET_SEL = 3738; static const uint64_t IDX_CEN_SCOM_MODE_PB_GCR_HANG_DET_SEL_LEN = 3739; static const uint64_t IDX_CEN_SCOM_MODE_PB_GCR_BUFFER_ENABLED_RO_SIGNAL = 3740; static const uint64_t IDX_CEN_SCOM_MODE_PB_GCR_HANG_ERROR_MASK = 3741; static const uint64_t IDX_CEN_SCOM_MODE_PB_GCR_HANG_ERROR_INJ = 3742; static const uint64_t IDX_CEN_SCOM_MODE_PB_SPARES = 3743; static const uint64_t IDX_CEN_SCOM_MODE_PB_SPARES_LEN = 3744; static const uint64_t IDX_CEN_FIR_REG_RX_INVALID_STATE_OR_PARITY_ERROR = 3745; static const uint64_t IDX_CEN_FIR_REG_TX_INVALID_STATE_OR_PARITY_ERROR = 3746; static const uint64_t IDX_CEN_FIR_REG_GCR_HANG_ERROR = 3747; static const uint64_t IDX_CEN_FIR_REG_RESERVED3_7 = 3748; static const uint64_t IDX_CEN_FIR_REG_RESERVED3_7_LEN = 3749; static const uint64_t IDX_CEN_FIR_REG_RX_BUS0_TRAINING_ERROR = 3750; static const uint64_t IDX_CEN_FIR_REG_RX_BUS0_SPARE_DEPLOYED = 3751; static const uint64_t IDX_CEN_FIR_REG_RX_BUS0_MAX_SPARES_EXCEEDED = 3752; static const uint64_t IDX_CEN_FIR_REG_RX_BUS0_RECAL_OR_DYN_REPAIR_ERROR = 3753; static const uint64_t IDX_CEN_FIR_REG_RX_BUS0_TOO_MANY_BUS_ERRORS = 3754; static const uint64_t IDX_CEN_FIR_REG_RESERVED13_15 = 3755; static const uint64_t IDX_CEN_FIR_REG_RESERVED13_15_LEN = 3756; static const uint64_t IDX_CEN_FIR_REG_RX_BUS1_TRAINING_ERROR = 3757; static const uint64_t IDX_CEN_FIR_REG_RX_BUS1_SPARE_DEPLOYED = 3758; static const uint64_t IDX_CEN_FIR_REG_RX_BUS1_MAX_SPARES_EXCEEDED = 3759; static const uint64_t IDX_CEN_FIR_REG_RX_BUS1_RECAL_OR_DYN_REPAIR_ERROR = 3760; static const uint64_t IDX_CEN_FIR_REG_RX_BUS1_TOO_MANY_BUS_ERRORS = 3761; static const uint64_t IDX_CEN_FIR_REG_RESERVED21_23 = 3762; static const uint64_t IDX_CEN_FIR_REG_RESERVED21_23_LEN = 3763; static const uint64_t IDX_CEN_FIR_REG_RX_BUS2_TRAINING_ERROR = 3764; static const uint64_t IDX_CEN_FIR_REG_RX_BUS2_SPARE_DEPLOYED = 3765; static const uint64_t IDX_CEN_FIR_REG_RX_BUS2_MAX_SPARES_EXCEEDED = 3766; static const uint64_t IDX_CEN_FIR_REG_RX_BUS2_RECAL_OR_DYN_REPAIR_ERROR = 3767; static const uint64_t IDX_CEN_FIR_REG_RX_BUS2_TOO_MANY_BUS_ERRORS = 3768; static const uint64_t IDX_CEN_FIR_REG_RESERVED29_31 = 3769; static const uint64_t IDX_CEN_FIR_REG_RESERVED29_31_LEN = 3770; static const uint64_t IDX_CEN_FIR_REG_RX_BUS3_TRAINING_ERROR = 3771; static const uint64_t IDX_CEN_FIR_REG_RX_BUS3_SPARE_DEPLOYED = 3772; static const uint64_t IDX_CEN_FIR_REG_RX_BUS3_MAX_SPARES_EXCEEDED = 3773; static const uint64_t IDX_CEN_FIR_REG_RX_BUS3_RECAL_OR_DYN_REPAIR_ERROR = 3774; static const uint64_t IDX_CEN_FIR_REG_RX_BUS3_TOO_MANY_BUS_ERRORS = 3775; static const uint64_t IDX_CEN_FIR_REG_RESERVED37_39 = 3776; static const uint64_t IDX_CEN_FIR_REG_RESERVED37_39_LEN = 3777; static const uint64_t IDX_CEN_FIR_REG_RX_BUS4_TRAINING_ERROR = 3778; static const uint64_t IDX_CEN_FIR_REG_RX_BUS4_SPARE_DEPLOYED = 3779; static const uint64_t IDX_CEN_FIR_REG_RX_BUS4_MAX_SPARES_EXCEEDED = 3780; static const uint64_t IDX_CEN_FIR_REG_RX_BUS4_RECAL_OR_DYN_REPAIR_ERROR = 3781; static const uint64_t IDX_CEN_FIR_REG_RX_BUS4_TOO_MANY_BUS_ERRORS = 3782; static const uint64_t IDX_CEN_FIR_REG_RESERVED45_47 = 3783; static const uint64_t IDX_CEN_FIR_REG_RESERVED45_47_LEN = 3784; static const uint64_t IDX_CEN_FIR_REG_SCOMFIR_ERROR = 3785; static const uint64_t IDX_CEN_FIR_REG_SCOMFIR_ERROR_CLONE = 3786; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_INVALID_STATE_OR_PARITY_ERROR = 3787; static const uint64_t IDX_CEN_FIR_MASK_REG_TX_INVALID_STATE_OR_PARITY_ERROR = 3788; static const uint64_t IDX_CEN_FIR_MASK_REG_GCR_HANG_ERROR = 3789; static const uint64_t IDX_CEN_FIR_MASK_REG_RESERVED3_7 = 3790; static const uint64_t IDX_CEN_FIR_MASK_REG_RESERVED3_7_LEN = 3791; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS0_TRAINING_ERROR = 3792; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS0_SPARE_DEPLOYED = 3793; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS0_MAX_SPARES_EXCEEDED = 3794; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS0_RECAL_OR_DYN_REPAIR_ERROR = 3795; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS0_TOO_MANY_BUS_ERRORS = 3796; static const uint64_t IDX_CEN_FIR_MASK_REG_RESERVED13_15 = 3797; static const uint64_t IDX_CEN_FIR_MASK_REG_RESERVED13_15_LEN = 3798; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS1_TRAINING_ERROR = 3799; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS1_SPARE_DEPLOYED = 3800; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS1_MAX_SPARES_EXCEEDED = 3801; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS1_RECAL_OR_DYN_REPAIR_ERROR = 3802; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS1_TOO_MANY_BUS_ERRORS = 3803; static const uint64_t IDX_CEN_FIR_MASK_REG_RESERVED21_23 = 3804; static const uint64_t IDX_CEN_FIR_MASK_REG_RESERVED21_23_LEN = 3805; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS2_TRAINING_ERROR = 3806; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS2_SPARE_DEPLOYED = 3807; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS2_MAX_SPARES_EXCEEDED = 3808; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS2_RECAL_OR_DYN_REPAIR_ERROR = 3809; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS2_TOO_MANY_BUS_ERRORS = 3810; static const uint64_t IDX_CEN_FIR_MASK_REG_RESERVED29_31 = 3811; static const uint64_t IDX_CEN_FIR_MASK_REG_RESERVED29_31_LEN = 3812; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS3_TRAINING_ERROR = 3813; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS3_SPARE_DEPLOYED = 3814; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS3_MAX_SPARES_EXCEEDED = 3815; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS3_RECAL_OR_DYN_REPAIR_ERROR = 3816; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS3_TOO_MANY_BUS_ERRORS = 3817; static const uint64_t IDX_CEN_FIR_MASK_REG_RESERVED37_39 = 3818; static const uint64_t IDX_CEN_FIR_MASK_REG_RESERVED37_39_LEN = 3819; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS4_TRAINING_ERROR = 3820; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS4_SPARE_DEPLOYED = 3821; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS4_MAX_SPARES_EXCEEDED = 3822; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS4_RECAL_OR_DYN_REPAIR_ERROR = 3823; static const uint64_t IDX_CEN_FIR_MASK_REG_RX_BUS4_TOO_MANY_BUS_ERRORS = 3824; static const uint64_t IDX_CEN_FIR_MASK_REG_RESERVED45_47 = 3825; static const uint64_t IDX_CEN_FIR_MASK_REG_RESERVED45_47_LEN = 3826; static const uint64_t IDX_CEN_FIR_MASK_REG_INTERNAL_SCOM_ERROR = 3827; static const uint64_t IDX_CEN_FIR_MASK_REG_INTERNAL_SCOM_ERROR_CLONE = 3828; static const uint64_t IDX_CEN_FIR_ACTION0_REG_ACTION0 = 3829; static const uint64_t IDX_CEN_FIR_ACTION0_REG_ACTION0_LEN = 3830; static const uint64_t IDX_CEN_FIR_ACTION1_REG_ACTION1 = 3831; static const uint64_t IDX_CEN_FIR_ACTION1_REG_ACTION1_LEN = 3832; static const uint64_t IDX_CEN_TX_IMPCAL_NVAL_PB_ZCAL_N = 3833; static const uint64_t IDX_CEN_TX_IMPCAL_NVAL_PB_ZCAL_N_LEN = 3834; static const uint64_t IDX_CEN_TX_IMPCAL_PVAL_PB_ZCAL_P = 3835; static const uint64_t IDX_CEN_TX_IMPCAL_PVAL_PB_ZCAL_P_LEN = 3836; static const uint64_t IDX_CEN_TX_IMPCAL_P_4X_PB_ZCAL_P_4X = 3837; static const uint64_t IDX_CEN_TX_IMPCAL_P_4X_PB_ZCAL_P_4X_LEN = 3838; static const uint64_t IDX_CEN_TX_IMPCAL_SWO1_PB_ZCAL_SWO_EN = 3839; static const uint64_t IDX_CEN_TX_IMPCAL_SWO1_PB_ZCAL_SWO_CAL_SEGS = 3840; static const uint64_t IDX_CEN_TX_IMPCAL_SWO1_PB_ZCAL_SWO_CMP_INV = 3841; static const uint64_t IDX_CEN_TX_IMPCAL_SWO1_PB_ZCAL_SWO_CMP_OFFSET = 3842; static const uint64_t IDX_CEN_TX_IMPCAL_SWO1_PB_ZCAL_SWO_CMP_RESET = 3843; static const uint64_t IDX_CEN_TX_IMPCAL_SWO1_PB_ZCAL_SWO_POWERDOWN = 3844; static const uint64_t IDX_CEN_TX_IMPCAL_SWO1_PB_ZCAL_CYA_DATA_INV = 3845; static const uint64_t IDX_CEN_TX_IMPCAL_SWO1_PB_ZCAL_TEST_OVR_2R = 3846; static const uint64_t IDX_CEN_TX_IMPCAL_SWO1_PB_ZCAL_DEBUG_MODE = 3847; static const uint64_t IDX_CEN_TX_IMPCAL_SWO1_PB_ZCAL_DEBUG_MODE_LEN = 3848; static const uint64_t IDX_CEN_TX_IMPCAL_SWO2_PB_ZCAL_SM_MIN_VAL = 3849; static const uint64_t IDX_CEN_TX_IMPCAL_SWO2_PB_ZCAL_SM_MIN_VAL_LEN = 3850; static const uint64_t IDX_CEN_TX_IMPCAL_SWO2_PB_ZCAL_SM_MAX_VAL = 3851; static const uint64_t IDX_CEN_TX_IMPCAL_SWO2_PB_ZCAL_SM_MAX_VAL_LEN = 3852; static const uint64_t IDX_CEN_TX_ANALOG_IREF_PB_IREF_BC = 3853; static const uint64_t IDX_CEN_TX_ANALOG_IREF_PB_IREF_BC_LEN = 3854; static const uint64_t IDX_CEN_TX_MINIKERF_PB_MINIKERF = 3855; static const uint64_t IDX_CEN_TX_MINIKERF_PB_MINIKERF_LEN = 3856; static const uint64_t IDX_CEN_TX_INIT_VERSION_PB_VERSION = 3857; static const uint64_t IDX_CEN_TX_INIT_VERSION_PB_VERSION_LEN = 3858; static const uint64_t IDX_CEN_TX_SCRATCH_REG_PB_REG = 3859; static const uint64_t IDX_CEN_TX_SCRATCH_REG_PB_REG_LEN = 3860; static const uint64_t IDX_CEN_RX_FIR_RESET_PB_PB_CLR_PAR_ERRS = 3861; static const uint64_t IDX_CEN_RX_FIR_RESET_PB_RESET = 3862; static const uint64_t IDX_CEN_RX_FIR_PB_ERRS = 3863; static const uint64_t IDX_CEN_RX_FIR_PB_ERRS_LEN = 3864; static const uint64_t IDX_CEN_RX_FIR_MASK_PB_ERRS = 3865; static const uint64_t IDX_CEN_RX_FIR_MASK_PB_ERRS_LEN = 3866; static const uint64_t IDX_CEN_RX_FIR_ERROR_INJECT_PB_PB_ERRS_INJ = 3867; static const uint64_t IDX_CEN_RX_FIR_ERROR_INJECT_PB_PB_ERRS_INJ_LEN = 3868; static const uint64_t IDX_CEN_MBCCFGQ_CACHE_ENABLE = 3869; static const uint64_t IDX_CEN_MBCCFGQ_CFG_DYN_WHAP_EN = 3870; static const uint64_t IDX_CEN_MBCCFGQ_CLEANER_ENABLE = 3871; static const uint64_t IDX_CEN_MBCCFGQ_CACHE_ONLY_ENABLE = 3872; static const uint64_t IDX_CEN_MBCCFGQ_LRU_DMAP_EN = 3873; static const uint64_t IDX_CEN_MBCCFGQ_LRU_RANDOM_EN = 3874; static const uint64_t IDX_CEN_MBCCFGQ_LRU_SINGLE_MEM_EN = 3875; static const uint64_t IDX_CEN_MBCCFGQ_CFG_SRW_DELETE_UE_EN = 3876; static const uint64_t IDX_CEN_MBCCFGQ_SRW_LINE_DELETE_NEXT_CE_EN = 3877; static const uint64_t IDX_CEN_MBCCFGQ_ONLY_LOG_ECC_UE = 3878; static const uint64_t IDX_CEN_MBCCFGQ_ONLY_LOG_ECC_CE = 3879; static const uint64_t IDX_CEN_MBCCFGQ_SRW_PREFETCH_DIS = 3880; static const uint64_t IDX_CEN_MBCCFGQ_PRQ_PREFETCH_DIS = 3881; static const uint64_t IDX_CEN_MBCCFGQ_CLN_PAGE_MODE_BUNDLE_MAX_CNT_0_3 = 3882; static const uint64_t IDX_CEN_MBCCFGQ_CLN_PAGE_MODE_BUNDLE_MAX_CNT_0_3_LEN = 3883; static const uint64_t IDX_CEN_MBCCFGQ_CLN_WRQ_TGT_ALLOC_0_5 = 3884; static const uint64_t IDX_CEN_MBCCFGQ_CLN_WRQ_TGT_ALLOC_0_5_LEN = 3885; static const uint64_t IDX_CEN_MBCCFGQ_CLN_WR_PRIORITY_WRQ_HWMARK_0_5 = 3886; static const uint64_t IDX_CEN_MBCCFGQ_CLN_WR_PRIORITY_WRQ_HWMARK_0_5_LEN = 3887; static const uint64_t IDX_CEN_MBCCFGQ_CLN_WR_PRIORITY_WRQ_LWMARK_0_5 = 3888; static const uint64_t IDX_CEN_MBCCFGQ_CLN_WR_PRIORITY_WRQ_LWMARK_0_5_LEN = 3889; static const uint64_t IDX_CEN_MBCCFGQ_CLN_WR_PRIORITY_DV_HWMARK_0_13 = 3890; static const uint64_t IDX_CEN_MBCCFGQ_CLN_WR_PRIORITY_DV_HWMARK_0_13_LEN = 3891; static const uint64_t IDX_CEN_MBCCFGQ_CLN_WR_PRIORITY_DV_LWMARK_0_13 = 3892; static const uint64_t IDX_CEN_MBCCFGQ_CLN_WR_PRIORITY_DV_LWMARK_0_13_LEN = 3893; static const uint64_t IDX_CEN_MBCCFGQ_MBS_WAT_TRIGGER = 3894; static const uint64_t IDX_CEN_MBCDCPMQ_MBCD0_CP_UTIL_EN_DC = 3895; static const uint64_t IDX_CEN_MBCDCPMQ_MBCD0_CP_UTIL_SEL_DC_0_1 = 3896; static const uint64_t IDX_CEN_MBCDCPMQ_MBCD0_CP_UTIL_SEL_DC_0_1_LEN = 3897; static const uint64_t IDX_CEN_MBCDCPMQ_MBCD0_CP_UTIL_EXT_SEL_0_2 = 3898; static const uint64_t IDX_CEN_MBCDCPMQ_MBCD0_CP_UTIL_EXT_SEL_0_2_LEN = 3899; static const uint64_t IDX_CEN_MBCDCPMQ_MBCD0_CP_UTIL_MON_BITS_0_5 = 3900; static const uint64_t IDX_CEN_MBCDCPMQ_MBCD0_CP_UTIL_MON_BITS_0_5_LEN = 3901; static const uint64_t IDX_CEN_MBCDCPMQ_MBCD1_CP_UTIL_EN_DC = 3902; static const uint64_t IDX_CEN_MBCDCPMQ_MBCD1_CP_UTIL_SEL_DC_0_1 = 3903; static const uint64_t IDX_CEN_MBCDCPMQ_MBCD1_CP_UTIL_SEL_DC_0_1_LEN = 3904; static const uint64_t IDX_CEN_MBCDCPMQ_MBCD1_CP_UTIL_EXT_SEL_0_2 = 3905; static const uint64_t IDX_CEN_MBCDCPMQ_MBCD1_CP_UTIL_EXT_SEL_0_2_LEN = 3906; static const uint64_t IDX_CEN_MBCDCPMQ_MBCD1_CP_UTIL_MON_BITS_0_5 = 3907; static const uint64_t IDX_CEN_MBCDCPMQ_MBCD1_CP_UTIL_MON_BITS_0_5_LEN = 3908; static const uint64_t IDX_CEN_MBCELOGQ_VALID_ECC_ERR = 3909; static const uint64_t IDX_CEN_MBCELOGQ_CE = 3910; static const uint64_t IDX_CEN_MBCELOGQ_UE = 3911; static const uint64_t IDX_CEN_MBCELOGQ_SUE = 3912; static const uint64_t IDX_CEN_MBCELOGQ_MBCD_READ_PORT = 3913; static const uint64_t IDX_CEN_MBCELOGQ_ECC_SYNDROME = 3914; static const uint64_t IDX_CEN_MBCELOGQ_ECC_SYNDROME_LEN = 3915; static const uint64_t IDX_CEN_MBCELOGQ_CEUE_PERSISTENT = 3916; static const uint64_t IDX_CEN_MBCELOGQ_CEUE_WINDOW_CLEAR = 3917; static const uint64_t IDX_CEN_MBCELOGQ_RSVD = 3918; static const uint64_t IDX_CEN_MBCELOGQ_EDRAM_BNK_3 = 3919; static const uint64_t IDX_CEN_MBCELOGQ_EDRAM_CA_0_2 = 3920; static const uint64_t IDX_CEN_MBCELOGQ_EDRAM_CA_0_2_LEN = 3921; static const uint64_t IDX_CEN_MBCELOGQ_EDRAM_RA_2_9 = 3922; static const uint64_t IDX_CEN_MBCELOGQ_EDRAM_RA_2_9_LEN = 3923; static const uint64_t IDX_CEN_MBCELOGQ_EDRAM_RA_0_1 = 3924; static const uint64_t IDX_CEN_MBCELOGQ_EDRAM_RA_0_1_LEN = 3925; static const uint64_t IDX_CEN_MBCELOGQ_EDRAM_BNK_0_2 = 3926; static const uint64_t IDX_CEN_MBCELOGQ_EDRAM_BNK_0_2_LEN = 3927; static const uint64_t IDX_CEN_MBCELOGQ_EDRAM_DW = 3928; static const uint64_t IDX_CEN_MBCELOGQ_EDRAM_DW_LEN = 3929; static const uint64_t IDX_CEN_MBCPGQ_CFG_MBC_MEMBER_DIS = 3930; static const uint64_t IDX_CEN_MBCPGQ_CFG_MBC_MEMBER_DIS_LEN = 3931; static const uint64_t IDX_CEN_MBCPGQ_CFG_MBC_PARTIAL_GOOD_DIS = 3932; static const uint64_t IDX_CEN_MBCPGQ_EVEN_DIS = 3933; static const uint64_t IDX_CEN_MBCPGQ_ODD_DIS = 3934; static const uint64_t IDX_CEN_MBCPRGQ_PURGE_ENTIRE_CACHE = 3935; static const uint64_t IDX_CEN_MBCPRGQ_PURGE_CACHE_RANGE = 3936; static const uint64_t IDX_CEN_MBCPRGQ_PURGE_SINGLE_MEMBER_AND_INVALIDATE = 3937; static const uint64_t IDX_CEN_MBCPRGQ_PURGE_SINGLE_MEMBER_AND_DELETE = 3938; static const uint64_t IDX_CEN_MBCPRGQ_PURGE_CACHE_START_MEMBER = 3939; static const uint64_t IDX_CEN_MBCPRGQ_PURGE_CACHE_START_MEMBER_LEN = 3940; static const uint64_t IDX_CEN_MBCPRGQ_PURGE_CACHE_START_CGC = 3941; static const uint64_t IDX_CEN_MBCPRGQ_PURGE_CACHE_START_CGC_LEN = 3942; static const uint64_t IDX_CEN_MBCPRGQ_PURGE_CACHE_END_MEMBER = 3943; static const uint64_t IDX_CEN_MBCPRGQ_PURGE_CACHE_END_MEMBER_LEN = 3944; static const uint64_t IDX_CEN_MBCPRGQ_PURGE_CACHE_END_CGC = 3945; static const uint64_t IDX_CEN_MBCPRGQ_PURGE_CACHE_END_CGC_LEN = 3946; static const uint64_t IDX_CEN_MBCPRGSQ_MAX_DELETED_MEMBERS = 3947; static const uint64_t IDX_CEN_MBCPRGSQ_MAX_DELETED_MEMBERS_LEN = 3948; static const uint64_t IDX_CEN_MBCPRGSQ_PURGE_ENGINE_IS_BUSY = 3949; static const uint64_t IDX_CEN_MBCPRGSQ_PURGE_CMD_ERROR = 3950; static const uint64_t IDX_CEN_MBCPRGSQ_PURGE_CACHE_ADDRESS_16_32 = 3951; static const uint64_t IDX_CEN_MBCPRGSQ_PURGE_CACHE_ADDRESS_16_32_LEN = 3952; static const uint64_t IDX_CEN_MBCPRGSQ_RSVD = 3953; static const uint64_t IDX_CEN_MBSACUMQ_HCA_DECAY_UPDATE_EVENDW = 3954; static const uint64_t IDX_CEN_MBSACUMQ_HCA_DECAY_UPDATE_EVENDW_LEN = 3955; static const uint64_t IDX_CEN_MBSACUMQ_HCA_DECAY_UPDATE_ODDDW = 3956; static const uint64_t IDX_CEN_MBSACUMQ_HCA_DECAY_UPDATE_ODDDW_LEN = 3957; static const uint64_t IDX_CEN_MBSCERR1Q_MBCD0_RP0_CE = 3958; static const uint64_t IDX_CEN_MBSCERR1Q_MBCD0_RP0_UE = 3959; static const uint64_t IDX_CEN_MBSCERR1Q_MBCD0_RP0_SUE = 3960; static const uint64_t IDX_CEN_MBSCERR1Q_MBCD1_RP0_CE = 3961; static const uint64_t IDX_CEN_MBSCERR1Q_MBCD1_RP0_UE = 3962; static const uint64_t IDX_CEN_MBSCERR1Q_MBCD1_RP0_SUE = 3963; static const uint64_t IDX_CEN_MBSCERR1Q_MBCD0_RP1_CE = 3964; static const uint64_t IDX_CEN_MBSCERR1Q_MBCD0_RP1_UE = 3965; static const uint64_t IDX_CEN_MBSCERR1Q_MBCD0_RP1_SUE = 3966; static const uint64_t IDX_CEN_MBSCERR1Q_MBCD1_RP1_CE = 3967; static const uint64_t IDX_CEN_MBSCERR1Q_MBCD1_RP1_UE = 3968; static const uint64_t IDX_CEN_MBSCERR1Q_MBCD1_RP1_SUE = 3969; static const uint64_t IDX_CEN_MBSCERR1Q_SRB_RP0_EVEN_CE = 3970; static const uint64_t IDX_CEN_MBSCERR1Q_SRB_RP0_EVEN_UE = 3971; static const uint64_t IDX_CEN_MBSCERR1Q_SRB_RP0_EVEN_SUE = 3972; static const uint64_t IDX_CEN_MBSCERR1Q_SRB_RP0_ODD_CE = 3973; static const uint64_t IDX_CEN_MBSCERR1Q_SRB_RP0_ODD_UE = 3974; static const uint64_t IDX_CEN_MBSCERR1Q_SRB_RP0_ODD_SUE = 3975; static const uint64_t IDX_CEN_MBSCERR1Q_SRB_RP1_EVEN_CE = 3976; static const uint64_t IDX_CEN_MBSCERR1Q_SRB_RP1_EVEN_UE = 3977; static const uint64_t IDX_CEN_MBSCERR1Q_SRB_RP1_EVEN_SUE = 3978; static const uint64_t IDX_CEN_MBSCERR1Q_SRB_RP1_ODD_CE = 3979; static const uint64_t IDX_CEN_MBSCERR1Q_SRB_RP1_ODD_UE = 3980; static const uint64_t IDX_CEN_MBSCERR1Q_SRB_RP1_ODD_SUE = 3981; static const uint64_t IDX_CEN_MBSCERR1Q_PFB0_CE = 3982; static const uint64_t IDX_CEN_MBSCERR1Q_PFB0_UE = 3983; static const uint64_t IDX_CEN_MBSCERR1Q_PFB0_SUE = 3984; static const uint64_t IDX_CEN_MBSCERR1Q_PFB1_CE = 3985; static const uint64_t IDX_CEN_MBSCERR1Q_PFB1_UE = 3986; static const uint64_t IDX_CEN_MBSCERR1Q_PFB1_SUE = 3987; static const uint64_t IDX_CEN_MBSCERR1Q_PFB2_CE = 3988; static const uint64_t IDX_CEN_MBSCERR1Q_PFB2_UE = 3989; static const uint64_t IDX_CEN_MBSCERR1Q_PFB2_SUE = 3990; static const uint64_t IDX_CEN_MBSCERR1Q_PFB3_CE = 3991; static const uint64_t IDX_CEN_MBSCERR1Q_PFB3_UE = 3992; static const uint64_t IDX_CEN_MBSCERR1Q_PFB3_SUE = 3993; static const uint64_t IDX_CEN_MBSCERR1Q_WRQA01_PE = 3994; static const uint64_t IDX_CEN_MBSCERR1Q_WRQA23_PE = 3995; static const uint64_t IDX_CEN_MBSCERR1Q_SRWADD_PE = 3996; static const uint64_t IDX_CEN_MBSCERR1Q_DADDP_PE = 3997; static const uint64_t IDX_CEN_MBSCERR1Q_SWPAB_PE = 3998; static const uint64_t IDX_CEN_MBSCERR1Q_SWB_EVEN_CE = 3999; static const uint64_t IDX_CEN_MBSCERR1Q_SWB_EVEN_UE = 4000; static const uint64_t IDX_CEN_MBSCERR1Q_SWB_EVEN_SUE = 4001; static const uint64_t IDX_CEN_MBSCERR1Q_SWB_ODD_CE = 4002; static const uint64_t IDX_CEN_MBSCERR1Q_SWB_ODD_UE = 4003; static const uint64_t IDX_CEN_MBSCERR1Q_SWB_ODD_SUE = 4004; static const uint64_t IDX_CEN_MBSCERR1Q_SRW_PWRT_SIZE_ERR = 4005; static const uint64_t IDX_CEN_MBSCERR1Q_WBMGR_WRQ01_IDX_ERR = 4006; static const uint64_t IDX_CEN_MBSCERR1Q_WBMGR_WRQ23_IDX_ERR = 4007; static const uint64_t IDX_CEN_MBSCERR1Q_CLNFSM_TIMEOUT_ERR = 4008; static const uint64_t IDX_CEN_MBSCERR1Q_COADD_ADDR_ERR = 4009; static const uint64_t IDX_CEN_MBSCERR1Q_DIR_ADDR_PARITY_ERR = 4010; static const uint64_t IDX_CEN_MBSCERR1Q_DISP_INVALID_DS_CMD_ERR = 4011; static const uint64_t IDX_CEN_MBSCERR1Q_DISP_INVALID_ADDR_ERR = 4012; static const uint64_t IDX_CEN_MBSCERR1Q_DISP_INVALID_CAC_ONLY_ERR = 4013; static const uint64_t IDX_CEN_MBSCERR1Q_DISP_LRU_ID_ERR = 4014; static const uint64_t IDX_CEN_MBSCERR1Q_DISP_RRQ01_CNT_PARITY_ERR = 4015; static const uint64_t IDX_CEN_MBSCERR1Q_DISP_RRQ23_CNT_PARITY_ERR = 4016; static const uint64_t IDX_CEN_MBSCERR1Q_DISP_RRQ01_OVERFLOW_ERR = 4017; static const uint64_t IDX_CEN_MBSCERR1Q_DISP_RRQ23_OVERFLOW_ERR = 4018; static const uint64_t IDX_CEN_MBSCERR1Q_RESERVED_61_63 = 4019; static const uint64_t IDX_CEN_MBSCERR1Q_RESERVED_61_63_LEN = 4020; static const uint64_t IDX_CEN_MBSCERR2Q_PFFSM_TIMEOUT = 4021; static const uint64_t IDX_CEN_MBSCERR2Q_PRQ_PROTOCOL_ERR = 4022; static const uint64_t IDX_CEN_MBSCERR2Q_PFFSM_PROTOCOL_ERR = 4023; static const uint64_t IDX_CEN_MBSCERR2Q_PFARB_PROTOCOL_ERR = 4024; static const uint64_t IDX_CEN_MBSCERR2Q_SRWFSM_UNEXPECTED_DS_CRESP = 4025; static const uint64_t IDX_CEN_MBSCERR2Q_SRWFSM_UNEXPECTED_DS_CMD = 4026; static const uint64_t IDX_CEN_MBSCERR2Q_SRWFSM_EXT_TIMOUT = 4027; static const uint64_t IDX_CEN_MBSCERR2Q_SRWFSM_INT_TIMEOUT = 4028; static const uint64_t IDX_CEN_MBSCERR2Q_SRWFSM_PURGE_LINE_DEL = 4029; static const uint64_t IDX_CEN_MBSCERR2Q_SRWFSM_PURGE_CLEAN_UE = 4030; static const uint64_t IDX_CEN_MBSCERR2Q_SRWFSM_PURGE_DIRTY_UE = 4031; static const uint64_t IDX_CEN_MBSCERR2Q_SWDONE_WDONE_P_ERR = 4032; static const uint64_t IDX_CEN_MBSCERR2Q_SWPAB_DS_TSIZE_ERR_HOLD = 4033; static const uint64_t IDX_CEN_MBSCERR2Q_SWB_DS_WDATA_ERR0_HOLD = 4034; static const uint64_t IDX_CEN_MBSCERR2Q_SWB_DS_WDATA_ERR1_HOLD = 4035; static const uint64_t IDX_CEN_MBSCERR2Q_MBX_MBS_RDTAG_PERR = 4036; static const uint64_t IDX_CEN_MBSCERR2Q_RDTAG_FIFO_PERR = 4037; static const uint64_t IDX_CEN_MBSCERR2Q_DS_FRAME_SEG_ERR = 4038; static const uint64_t IDX_CEN_MBSCERR2Q_DS_INVALID_DATA_SUE_ERR = 4039; static const uint64_t IDX_CEN_MBSCERR2Q_US_READ_DATA_PERR = 4040; static const uint64_t IDX_CEN_MBSCERR2Q_US_READ_DATA_INFO_PERR = 4041; static const uint64_t IDX_CEN_MBSCERR2Q_IBB_CE = 4042; static const uint64_t IDX_CEN_MBSCERR2Q_IBB_UE = 4043; static const uint64_t IDX_CEN_MBSCERR2Q_IBB_SUE = 4044; static const uint64_t IDX_CEN_MBSCERR2Q_IBB_DS_CE = 4045; static const uint64_t IDX_CEN_MBSCERR2Q_IBB_DS_PROTOCOL_ERR = 4046; static const uint64_t IDX_CEN_MBSCERR2Q_CLNFSM_SCOMFIR_CERR_HOLD = 4047; static const uint64_t IDX_CEN_MBSCERR2Q_SPARE = 4048; static const uint64_t IDX_CEN_MBSCERR2Q_RXLT_SIR_PERR = 4049; static const uint64_t IDX_CEN_MBSCERR2Q_CACTL_ADDRESS_ERR = 4050; static const uint64_t IDX_CEN_MBSCERR2Q_EMER_THROTTLE_CERR = 4051; static const uint64_t IDX_CEN_MBSCERR2Q_MAX_LINE_DEL_ERR = 4052; static const uint64_t IDX_CEN_MBSCERR2Q_MBCD0_DW02_13BNK_DRAM_ERR = 4053; static const uint64_t IDX_CEN_MBSCERR2Q_MBCD0_DW46_57BNK_ERR = 4054; static const uint64_t IDX_CEN_MBSCERR2Q_MBCD0_DW8A_9BBNK_ERR = 4055; static const uint64_t IDX_CEN_MBSCERR2Q_MBCD0_DWCE_DFBNK_ERR = 4056; static const uint64_t IDX_CEN_MBSCERR2Q_MBCD1_DW02_13BNK_ERR = 4057; static const uint64_t IDX_CEN_MBSCERR2Q_MBCD1_DW46_57BNK_ERR = 4058; static const uint64_t IDX_CEN_MBSCERR2Q_MBCD1_DW8A_9BBNK_ERR = 4059; static const uint64_t IDX_CEN_MBSCERR2Q_MBCD1_DWCE_DFBNK_ERR = 4060; static const uint64_t IDX_CEN_MBSCERR2Q_RXLAT_PERR = 4061; static const uint64_t IDX_CEN_MBSCERR2Q_CLNADD_PERR = 4062; static const uint64_t IDX_CEN_MBSCERR2Q_COADDR_PERR = 4063; static const uint64_t IDX_CEN_MBSCERR2Q_PFADDR_PERR = 4064; static const uint64_t IDX_CEN_MBSCERR2Q_PRQADDR_PERR = 4065; static const uint64_t IDX_CEN_MBSCERR2Q_WDF_SWB_DW0_CE = 4066; static const uint64_t IDX_CEN_MBSCERR2Q_WDF_SWB_DW0_UE = 4067; static const uint64_t IDX_CEN_MBSCERR2Q_WDF_SWB_DW0_SUE = 4068; static const uint64_t IDX_CEN_MBSCERR2Q_WDF_SWB_DW1_CE = 4069; static const uint64_t IDX_CEN_MBSCERR2Q_WDF_SWB_DW1_UE = 4070; static const uint64_t IDX_CEN_MBSCERR2Q_WDF_SWB_DW1_SUE = 4071; static const uint64_t IDX_CEN_MBSCERR2Q_WDF_SRB_DW0_CE = 4072; static const uint64_t IDX_CEN_MBSCERR2Q_WDF_SRB_DW0_UE = 4073; static const uint64_t IDX_CEN_MBSCERR2Q_WDF_SRB_DW0_SUE = 4074; static const uint64_t IDX_CEN_MBSCERR2Q_WDF_SRB_DW1_CE = 4075; static const uint64_t IDX_CEN_MBSCERR2Q_WDF_SRB_DW1_UE = 4076; static const uint64_t IDX_CEN_MBSCERR2Q_WDF_SRB_DW1_SUE = 4077; static const uint64_t IDX_CEN_MBSCERR2Q_US_DTAG_PERR = 4078; static const uint64_t IDX_CEN_MBSCERR2Q_US_DONE_PERR = 4079; static const uint64_t IDX_CEN_MBSCERR2Q_DS_WDAT0_PERR = 4080; static const uint64_t IDX_CEN_MBSCERR2Q_DS_WDAT1_PERR = 4081; static const uint64_t IDX_CEN_MBSCERR2Q_DIR_DCECK_PERR = 4082; static const uint64_t IDX_CEN_MBSCERR2Q_SRB_INFO_PERR = 4083; static const uint64_t IDX_CEN_MBSCERR2Q_RESERVED_63 = 4084; static const uint64_t IDX_CEN_MBSCFGQ_ECCBP_EXIT_SEL = 4085; static const uint64_t IDX_CEN_MBSCFGQ_DRAM_ECC_BYPASS_DIS = 4086; static const uint64_t IDX_CEN_MBSCFGQ_MBS_SCOM_WAT_TRIGGER = 4087; static const uint64_t IDX_CEN_MBSCFGQ_MBS_PRQ_REF_AVOIDANCE_EN = 4088; static const uint64_t IDX_CEN_MBSCFGQ_RSV4_6 = 4089; static const uint64_t IDX_CEN_MBSCFGQ_RSV4_6_LEN = 4090; static const uint64_t IDX_CEN_MBSCFGQ_OCC_DEADMAN_TIMER_SEL = 4091; static const uint64_t IDX_CEN_MBSCFGQ_OCC_DEADMAN_TIMER_SEL_LEN = 4092; static const uint64_t IDX_CEN_MBSCFGQ_SYNC_FSYNC_MBA_STROBE_EN = 4093; static const uint64_t IDX_CEN_MBSCFGQ_HCA_TIMEBASE_OP_MODE = 4094; static const uint64_t IDX_CEN_MBSCFGQ_HCA_LOCAL_TIMER_INC_SELECT = 4095; static const uint64_t IDX_CEN_MBSCFGQ_HCA_LOCAL_TIMER_INC_SELECT_LEN = 4096; static const uint64_t IDX_CEN_MBSCFGQ_MBS_01_RDTAG_DELAY = 4097; static const uint64_t IDX_CEN_MBSCFGQ_MBS_01_RDTAG_DELAY_LEN = 4098; static const uint64_t IDX_CEN_MBSCFGQ_MBS_01_RDTAG_FORCE_DEAD_CYCLE = 4099; static const uint64_t IDX_CEN_MBSCFGQ_SYNC_LAT_POL_01 = 4100; static const uint64_t IDX_CEN_MBSCFGQ_SYNC_LAT_ADJ_01 = 4101; static const uint64_t IDX_CEN_MBSCFGQ_SYNC_LAT_ADJ_01_LEN = 4102; static const uint64_t IDX_CEN_MBSCFGQ_MBS_23_RDTAG_DELAY = 4103; static const uint64_t IDX_CEN_MBSCFGQ_MBS_23_RDTAG_DELAY_LEN = 4104; static const uint64_t IDX_CEN_MBSCFGQ_MBS_23_RDTAG_FORCE_DEAD_CYCLE = 4105; static const uint64_t IDX_CEN_MBSCFGQ_SYNC_LAT_POL_23 = 4106; static const uint64_t IDX_CEN_MBSCFGQ_SYNC_LAT_ADJ_23 = 4107; static const uint64_t IDX_CEN_MBSCFGQ_SYNC_LAT_ADJ_23_LEN = 4108; static const uint64_t IDX_CEN_MBSDBG0CTLQ_DEBUG_SOURCE = 4109; static const uint64_t IDX_CEN_MBSDBG0CTLQ_DEBUG_SOURCE_LEN = 4110; static const uint64_t IDX_CEN_MBSDBG0CTLQ_PENDING_SEL = 4111; static const uint64_t IDX_CEN_MBSDBG0CTLQ_PENDING_SEL_LEN = 4112; static const uint64_t IDX_CEN_MBSDBG0CTLQ_DEBUG_ENABLE = 4113; static const uint64_t IDX_CEN_MBSDBG0DATQ_DEBUG_DATA = 4114; static const uint64_t IDX_CEN_MBSDBG0DATQ_DEBUG_DATA_LEN = 4115; static const uint64_t IDX_CEN_MBSDBG1CTLQ_DEBUG_SOURCE = 4116; static const uint64_t IDX_CEN_MBSDBG1CTLQ_DEBUG_SOURCE_LEN = 4117; static const uint64_t IDX_CEN_MBSDBG1DATQ_DEBUG_DATA = 4118; static const uint64_t IDX_CEN_MBSDBG1DATQ_DEBUG_DATA_LEN = 4119; static const uint64_t IDX_CEN_MBSDBGXDATQ_DEBUG0_EXTENDED = 4120; static const uint64_t IDX_CEN_MBSDBGXDATQ_DEBUG0_EXTENDED_LEN = 4121; static const uint64_t IDX_CEN_MBSDBGXDATQ_DEBUG1_EXTENDED = 4122; static const uint64_t IDX_CEN_MBSDBGXDATQ_DEBUG1_EXTENDED_LEN = 4123; static const uint64_t IDX_CEN_MBSEINJQ_CACHE_WP0_ERR_INJECT_MODE = 4124; static const uint64_t IDX_CEN_MBSEINJQ_CACHE_WP0_ERR_INJECT_CE = 4125; static const uint64_t IDX_CEN_MBSEINJQ_CACHE_WP0_ERR_INJECT_UE = 4126; static const uint64_t IDX_CEN_MBSEINJQ_CACHE_WP0_ERR_INJECT_SUE = 4127; static const uint64_t IDX_CEN_MBSEINJQ_DIRECTORY_ERR_INJECT_MODE = 4128; static const uint64_t IDX_CEN_MBSEINJQ_DIRECTORY_ERR_INJECT_CE = 4129; static const uint64_t IDX_CEN_MBSEINJQ_DIRECTORY_ERR_INJECT_UE = 4130; static const uint64_t IDX_CEN_MBSEINJQ_SWB_ERR_INJECT_MODE = 4131; static const uint64_t IDX_CEN_MBSEINJQ_SWB_ERR_INJECT_CE = 4132; static const uint64_t IDX_CEN_MBSEINJQ_SWB_ERR_INJECT_UE = 4133; static const uint64_t IDX_CEN_MBSEINJQ_SRB_RP0_ERR_INJECT_MODE = 4134; static const uint64_t IDX_CEN_MBSEINJQ_SRB_RP0_ERR_INJECT_CE = 4135; static const uint64_t IDX_CEN_MBSEINJQ_SRB_RP0_ERR_INJECT_UE = 4136; static const uint64_t IDX_CEN_MBSEINJQ_SRB_RP1_ERROR_INJECT_MODE = 4137; static const uint64_t IDX_CEN_MBSEINJQ_SRB_RP1_ERROR_INJECT_CE = 4138; static const uint64_t IDX_CEN_MBSEINJQ_SRB_RP1_ERROR_INJECT_UE = 4139; static const uint64_t IDX_CEN_MBSEINJQ_PFB_ERR_INJECT_MODE = 4140; static const uint64_t IDX_CEN_MBSEINJQ_PFB_ERR_INJECT_CE = 4141; static const uint64_t IDX_CEN_MBSEINJQ_PFB_ERR_INJECT_UE = 4142; static const uint64_t IDX_CEN_MBSEINJQ_SPWA_ERR_INJECT_MODE = 4143; static const uint64_t IDX_CEN_MBSEINJQ_SPWA_ERR_INJECT_PERR = 4144; static const uint64_t IDX_CEN_MBSEINJQ_CO_ERR_INJECT_MODE = 4145; static const uint64_t IDX_CEN_MBSEINJQ_CO_ERR_INJECT_CE = 4146; static const uint64_t IDX_CEN_MBSEINJQ_CO_ERR_INJECT_UE = 4147; static const uint64_t IDX_CEN_MBSEINJQ_INT_RESET_KEEPER = 4148; static const uint64_t IDX_CEN_MBSEINJQ_RESERVED_25 = 4149; static const uint64_t IDX_CEN_MBSEINJQ_RESERVED_26 = 4150; static const uint64_t IDX_CEN_MBSEINJQ_IB_BFR_ERR_INJECT_MODE = 4151; static const uint64_t IDX_CEN_MBSEINJQ_IB_BFR_ERR_INJECT_CE = 4152; static const uint64_t IDX_CEN_MBSEINJQ_IB_BFR_ERR_INJECT_UE = 4153; static const uint64_t IDX_CEN_MBSEINJQ_DIRECTORY_ERR_INJECT_ADDR_PERR = 4154; static const uint64_t IDX_CEN_MBSEINJQ_RRQ_POP_INJECT = 4155; static const uint64_t IDX_CEN_MBSEINJQ_RRQ_POP_INJECT_PERR = 4156; static const uint64_t IDX_CEN_MBSEINJQ_SHORT_HANG_TIMER = 4157; static const uint64_t IDX_CEN_MBSEINJQ_LRU_ERR_INJ = 4158; static const uint64_t IDX_CEN_MBSEMERTHROQ_EMERGENCY_THROTTLE_IN_PROGRESS = 4159; static const uint64_t IDX_CEN_MBSIBERR0Q_IB_HOST_ADDRESS = 4160; static const uint64_t IDX_CEN_MBSIBERR0Q_IB_HOST_ADDRESS_LEN = 4161; static const uint64_t IDX_CEN_MBSIBERR0Q_IB_HOST_ERROR_VALID = 4162; static const uint64_t IDX_CEN_MBSIBERR0Q_IB_HOST_ERROR_STATUS = 4163; static const uint64_t IDX_CEN_MBSIBERR0Q_IB_HOST_ERROR_STATUS_LEN = 4164; static const uint64_t IDX_CEN_MBSIBERR0Q_IB_HOST_WRITE_NOT_READ = 4165; static const uint64_t IDX_CEN_MBSIBERR1Q_OCC_IB_ADDRESS = 4166; static const uint64_t IDX_CEN_MBSIBERR1Q_OCC_IB_ADDRESS_LEN = 4167; static const uint64_t IDX_CEN_MBSIBERR1Q_OCC_IB_ERROR_VALID = 4168; static const uint64_t IDX_CEN_MBSIBERR1Q_OCC_IB_ERROR_STATUS = 4169; static const uint64_t IDX_CEN_MBSIBERR1Q_OCC_IB_ERROR_STATUS_LEN = 4170; static const uint64_t IDX_CEN_MBSIBERR1Q_OCC_IB_WRITE_NOT_READ = 4171; static const uint64_t IDX_CEN_MBSIBWRSTATQ_SPARE0 = 4172; static const uint64_t IDX_CEN_MBSIBWRSTATQ_SPARE0_LEN = 4173; static const uint64_t IDX_CEN_MBSOCC01HQ_OCC_01_RD_HIT = 4174; static const uint64_t IDX_CEN_MBSOCC01HQ_OCC_01_RD_HIT_LEN = 4175; static const uint64_t IDX_CEN_MBSOCC01HQ_OCC_01_WR_HIT = 4176; static const uint64_t IDX_CEN_MBSOCC01HQ_OCC_01_WR_HIT_LEN = 4177; static const uint64_t IDX_CEN_MBSOCC23HQ_OCC_23_RD_HIT = 4178; static const uint64_t IDX_CEN_MBSOCC23HQ_OCC_23_RD_HIT_LEN = 4179; static const uint64_t IDX_CEN_MBSOCC23HQ_OCC_23_WR_HIT = 4180; static const uint64_t IDX_CEN_MBSOCC23HQ_OCC_23_WR_HIT_LEN = 4181; static const uint64_t IDX_CEN_MBSOCCITCQ_OCC_CENT_IDLE_TH_CNT = 4182; static const uint64_t IDX_CEN_MBSOCCITCQ_OCC_CENT_IDLE_TH_CNT_LEN = 4183; static const uint64_t IDX_CEN_MBSOCCSCANQ_OCC_01_SPEC_CAN = 4184; static const uint64_t IDX_CEN_MBSOCCSCANQ_OCC_01_SPEC_CAN_LEN = 4185; static const uint64_t IDX_CEN_MBSOCCSCANQ_OCC_23_SPEC_CAN = 4186; static const uint64_t IDX_CEN_MBSOCCSCANQ_OCC_23_SPEC_CAN_LEN = 4187; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER0_ENABLE = 4188; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER1_ENABLE = 4189; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER2_ENABLE = 4190; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER3_ENABLE = 4191; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_PRESCALER_SEL = 4192; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_PRESCALER_SEL_LEN = 4193; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER_FREEZE_MODE = 4194; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER_RESET_MODE = 4195; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER0_EVENT_SEL = 4196; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER0_EVENT_SEL_LEN = 4197; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER0_POSEDGE_SEL = 4198; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER0_BIT_PAIR_SEL = 4199; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER0_BIT_PAIR_SEL_LEN = 4200; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER1_EVENT_SEL = 4201; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER1_EVENT_SEL_LEN = 4202; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER1_POSEDGE_SEL = 4203; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER1_BIT_PAIR_SEL = 4204; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER1_BIT_PAIR_SEL_LEN = 4205; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER2_EVENT_SEL = 4206; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER2_EVENT_SEL_LEN = 4207; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER2_POSEDGE_SEL = 4208; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER2_BIT_PAIR_SEL = 4209; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER2_BIT_PAIR_SEL_LEN = 4210; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER3_EVENT_SEL = 4211; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER3_EVENT_SEL_LEN = 4212; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER3_POSEDGE_SEL = 4213; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER3_BIT_PAIR_SEL = 4214; static const uint64_t IDX_CEN_MBSPMU0CFGQ_PMU0_COUNTER3_BIT_PAIR_SEL_LEN = 4215; static const uint64_t IDX_CEN_MBSPMU0CNTQ_PMU0_CNT0 = 4216; static const uint64_t IDX_CEN_MBSPMU0CNTQ_PMU0_CNT0_LEN = 4217; static const uint64_t IDX_CEN_MBSPMU0CNTQ_PMU0_CNT1 = 4218; static const uint64_t IDX_CEN_MBSPMU0CNTQ_PMU0_CNT1_LEN = 4219; static const uint64_t IDX_CEN_MBSPMU0CNTQ_PMU0_CNT2 = 4220; static const uint64_t IDX_CEN_MBSPMU0CNTQ_PMU0_CNT2_LEN = 4221; static const uint64_t IDX_CEN_MBSPMU0CNTQ_PMU0_CNT3 = 4222; static const uint64_t IDX_CEN_MBSPMU0CNTQ_PMU0_CNT3_LEN = 4223; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT0_IN_SEL = 4224; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT0_IN_SEL_LEN = 4225; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT1_IN_SEL = 4226; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT1_IN_SEL_LEN = 4227; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT2_IN_SEL = 4228; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT2_IN_SEL_LEN = 4229; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT3_IN_SEL = 4230; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT3_IN_SEL_LEN = 4231; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT4_IN_SEL = 4232; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT4_IN_SEL_LEN = 4233; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT5_SIN_EL = 4234; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT5_SIN_EL_LEN = 4235; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT6_IN_SEL = 4236; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT6_IN_SEL_LEN = 4237; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT7_IN_SEL = 4238; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_EVENT7_IN_SEL_LEN = 4239; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_RANK_FILTER_EN = 4240; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_RANK_FILTER = 4241; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_RANK_FILTER_LEN = 4242; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_SPARE = 4243; static const uint64_t IDX_CEN_MBSPMUSELQ_PMU_SPARE_LEN = 4244; static const uint64_t IDX_CEN_MBSSQ_ALL_QUEUES_EMPTY = 4245; static const uint64_t IDX_CEN_MBSSQ_ECCBP_EXIT1_SELECTED = 4246; static const uint64_t IDX_CEN_MBSSQ_IML_COMPLETE = 4247; static const uint64_t IDX_CEN_MBS_FIR_ACTION0_REG_ACTION0 = 4248; static const uint64_t IDX_CEN_MBS_FIR_ACTION0_REG_ACTION0_LEN = 4249; static const uint64_t IDX_CEN_MBS_FIR_ACTION1_REG_ACTION1 = 4250; static const uint64_t IDX_CEN_MBS_FIR_ACTION1_REG_ACTION1_LEN = 4251; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_HOST_PROTOCOL_ERROR = 4252; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_INT_PROTOCOL_ERROR = 4253; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_INVALID_ADDRESS_ERROR = 4254; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_EXTERNAL_TIMEOUT = 4255; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_INTERNAL_TIMEOUT = 4256; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_INT_BUFFER_CE = 4257; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_INT_BUFFER_UE = 4258; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_INT_BUFFER_SUE = 4259; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_INT_PARITY_ERROR = 4260; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_CACHE_SRW_CE = 4261; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_CACHE_SRW_UE = 4262; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_CACHE_SRW_SUE = 4263; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_CACHE_CO_CE = 4264; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_CACHE_CO_UE = 4265; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_CACHE_CO_SUE = 4266; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_DIR_CE = 4267; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_DIR_UE = 4268; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_DIR_MEMBER_DELETED = 4269; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_DIR_ALL_MEMBERS_DELETED = 4270; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_LRU_ERROR = 4271; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_EDRAM_ERROR = 4272; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_EMERGENCY_THROTTLE_SET = 4273; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_HOST_INBAND_READ_ERROR = 4274; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_HOST_INBAND_WRITE_ERROR = 4275; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_OCC_INBAND_READ_ERROR = 4276; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_OCC_INBAND_WRITE_ERROR = 4277; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_SRB_BUFFER_CE = 4278; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_SRB_BUFFER_UE = 4279; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_SRB_BUFFER_SUE = 4280; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_DIR_PURGE_CE = 4281; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_PROXIMAL_CE_UE = 4282; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_SPARE_FIR31 = 4283; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_SPARE_FIR32 = 4284; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_INTERNAL_SCOM_ERROR = 4285; static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_INTERNAL_SCOM_ERROR_COPY = 4286; static const uint64_t IDX_CEN_MBS_FIR_REG_HOST_PROTOCOL_ERROR = 4287; static const uint64_t IDX_CEN_MBS_FIR_REG_INT_PROTOCOL_ERROR = 4288; static const uint64_t IDX_CEN_MBS_FIR_REG_INVALID_ADDRESS_ERROR = 4289; static const uint64_t IDX_CEN_MBS_FIR_REG_EXTERNAL_TIMEOUT = 4290; static const uint64_t IDX_CEN_MBS_FIR_REG_INTERNAL_TIMEOUT = 4291; static const uint64_t IDX_CEN_MBS_FIR_REG_INT_BUFFER_CE = 4292; static const uint64_t IDX_CEN_MBS_FIR_REG_INT_BUFFER_UE = 4293; static const uint64_t IDX_CEN_MBS_FIR_REG_INT_BUFFER_SUE = 4294; static const uint64_t IDX_CEN_MBS_FIR_REG_INT_PARITY_ERROR = 4295; static const uint64_t IDX_CEN_MBS_FIR_REG_CACHE_SRW_CE = 4296; static const uint64_t IDX_CEN_MBS_FIR_REG_CACHE_SRW_UE = 4297; static const uint64_t IDX_CEN_MBS_FIR_REG_CACHE_SRW_SUE = 4298; static const uint64_t IDX_CEN_MBS_FIR_REG_CACHE_CO_CE = 4299; static const uint64_t IDX_CEN_MBS_FIR_REG_CACHE_CO_UE = 4300; static const uint64_t IDX_CEN_MBS_FIR_REG_CACHE_CO_SUE = 4301; static const uint64_t IDX_CEN_MBS_FIR_REG_DIR_CE = 4302; static const uint64_t IDX_CEN_MBS_FIR_REG_DIR_UE = 4303; static const uint64_t IDX_CEN_MBS_FIR_REG_DIR_MEMBER_DELETED = 4304; static const uint64_t IDX_CEN_MBS_FIR_REG_DIR_ALL_MEMBERS_DELETED = 4305; static const uint64_t IDX_CEN_MBS_FIR_REG_LRU_ERROR = 4306; static const uint64_t IDX_CEN_MBS_FIR_REG_EDRAM_ERROR = 4307; static const uint64_t IDX_CEN_MBS_FIR_REG_EMERGENCY_THROTTLE_SET = 4308; static const uint64_t IDX_CEN_MBS_FIR_REG_HOST_INBAND_READ_ERROR = 4309; static const uint64_t IDX_CEN_MBS_FIR_REG_HOST_INBAND_WRITE_ERROR = 4310; static const uint64_t IDX_CEN_MBS_FIR_REG_OCC_INBAND_READ_ERROR = 4311; static const uint64_t IDX_CEN_MBS_FIR_REG_OCC_INBAND_WRITE_ERROR = 4312; static const uint64_t IDX_CEN_MBS_FIR_REG_SRB_BUFFER_CE = 4313; static const uint64_t IDX_CEN_MBS_FIR_REG_SRB_BUFFER_UE = 4314; static const uint64_t IDX_CEN_MBS_FIR_REG_SRB_BUFFER_SUE = 4315; static const uint64_t IDX_CEN_MBS_FIR_REG_DIR_PURGE_CE = 4316; static const uint64_t IDX_CEN_MBS_FIR_REG_PROXIMAL_CE_UE = 4317; static const uint64_t IDX_CEN_MBS_FIR_REG_SPARE_FIR31 = 4318; static const uint64_t IDX_CEN_MBS_FIR_REG_SPARE_FIR32 = 4319; static const uint64_t IDX_CEN_MBS_FIR_REG_INTERNAL_SCOM_ERROR = 4320; static const uint64_t IDX_CEN_MBS_FIR_REG_INTERNAL_SCOM_ERROR_COPY = 4321; static const uint64_t IDX_CEN_MBS_FIR_WOF_WOF = 4322; static const uint64_t IDX_CEN_MBS_FIR_WOF_WOF_LEN = 4323; static const uint64_t IDX_CEN_MBAXCR01Q_MBA01_CONFIG_TYPE = 4324; static const uint64_t IDX_CEN_MBAXCR01Q_MBA01_CONFIG_TYPE_LEN = 4325; static const uint64_t IDX_CEN_MBAXCR01Q_MBA01_CONFIG_SUBTYPE = 4326; static const uint64_t IDX_CEN_MBAXCR01Q_MBA01_CONFIG_SUBTYPE_LEN = 4327; static const uint64_t IDX_CEN_MBAXCR01Q_MBA01_DRAM_SIZE = 4328; static const uint64_t IDX_CEN_MBAXCR01Q_MBA01_DRAM_SIZE_LEN = 4329; static const uint64_t IDX_CEN_MBAXCR01Q_MBA01_CONFIGURATION = 4330; static const uint64_t IDX_CEN_MBAXCR01Q_MBA01_DRAM_WIDTH = 4331; static const uint64_t IDX_CEN_MBAXCR01Q_MBA01_HASH_MODE = 4332; static const uint64_t IDX_CEN_MBAXCR01Q_MBA01_HASH_MODE_LEN = 4333; static const uint64_t IDX_CEN_MBAXCR01Q_MBA01_INTERLEAVE_MODE = 4334; static const uint64_t IDX_CEN_MBAXCR01Q_MBA01_SLOT1_ONLY = 4335; static const uint64_t IDX_CEN_MBAXCR23Q_MBA23_CONFIG_TYPE = 4336; static const uint64_t IDX_CEN_MBAXCR23Q_MBA23_CONFIG_TYPE_LEN = 4337; static const uint64_t IDX_CEN_MBAXCR23Q_MBA23_CONFIG_SUBTYPE = 4338; static const uint64_t IDX_CEN_MBAXCR23Q_MBA23_CONFIG_SUBTYPE_LEN = 4339; static const uint64_t IDX_CEN_MBAXCR23Q_MBA23_DRAM_SIZE = 4340; static const uint64_t IDX_CEN_MBAXCR23Q_MBA23_DRAM_SIZE_LEN = 4341; static const uint64_t IDX_CEN_MBAXCR23Q_MBA23_CONFIGURATION = 4342; static const uint64_t IDX_CEN_MBAXCR23Q_MBA23_DRAM_WIDTH = 4343; static const uint64_t IDX_CEN_MBAXCR23Q_MBA23_HASH_MODE = 4344; static const uint64_t IDX_CEN_MBAXCR23Q_MBA23_HASH_MODE_LEN = 4345; static const uint64_t IDX_CEN_MBAXCR23Q_MBA23_INTERLEAVE_MODE = 4346; static const uint64_t IDX_CEN_MBAXCR23Q_MBA23_SLOT1_ONLY = 4347; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_MASTER_RANK_0_SELECT = 4348; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_MASTER_RANK_0_SELECT_LEN = 4349; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_MASTER_RANK_1_SELECT = 4350; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_MASTER_RANK_1_SELECT_LEN = 4351; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_MASTER_RANK_2_SELECT = 4352; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_MASTER_RANK_2_SELECT_LEN = 4353; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_SLAVE_RANK_0_SELECT = 4354; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_SLAVE_RANK_0_SELECT_LEN = 4355; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_SLAVE_RANK_1_SELECT = 4356; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_SLAVE_RANK_1_SELECT_LEN = 4357; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_SLAVE_RANK_2_SELECT = 4358; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_SLAVE_RANK_2_SELECT_LEN = 4359; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_B2_DDR3_B0_DDR4_SELECT = 4360; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_B2_DDR3_B0_DDR4_SELECT_LEN = 4361; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_B0_DDR3_B1_DDR4_SELECT = 4362; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA01_B0_DDR3_B1_DDR4_SELECT_LEN = 4363; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_MASTER_RANK_0_SELECT = 4364; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_MASTER_RANK_0_SELECT_LEN = 4365; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_MASTER_RANK_1_SELECT = 4366; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_MASTER_RANK_1_SELECT_LEN = 4367; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_MASTER_RANK_2_SELECT = 4368; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_MASTER_RANK_2_SELECT_LEN = 4369; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_SLAVE_RANK_0_SELECT = 4370; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_SLAVE_RANK_0_SELECT_LEN = 4371; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_SLAVE_RANK_1_SELECT = 4372; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_SLAVE_RANK_1_SELECT_LEN = 4373; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_SLAVE_RANK_2_SELECT = 4374; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_SLAVE_RANK_2_SELECT_LEN = 4375; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_B2_DDR3_B0_DDR4_SELECT = 4376; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_B2_DDR3_B0_DDR4_SELECT_LEN = 4377; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_B0_DDR3_B1_DDR4_SELECT = 4378; static const uint64_t IDX_CEN_MBAXCRMSQ_MBA23_B0_DDR3_B1_DDR4_SELECT_LEN = 4379; static const uint64_t IDX_CEN_MBSSIRACT0_ACTION_0 = 4380; static const uint64_t IDX_CEN_MBSSIRACT0_ACTION_0_LEN = 4381; static const uint64_t IDX_CEN_MBSSIRACT1_ACTION_1 = 4382; static const uint64_t IDX_CEN_MBSSIRACT1_ACTION_1_LEN = 4383; static const uint64_t IDX_CEN_MBSSIRMASK_INVALID_MBSXCR_ACCESS = 4384; static const uint64_t IDX_CEN_MBSSIRMASK_INVALID_MBAXCR01_ACCESS = 4385; static const uint64_t IDX_CEN_MBSSIRMASK_INVALID_MBAXCR23_ACCESS = 4386; static const uint64_t IDX_CEN_MBSSIRMASK_INVALID_MBAXCRMS_ACCRESS = 4387; static const uint64_t IDX_CEN_MBSSIRMASK_SPARE = 4388; static const uint64_t IDX_CEN_MBSSIRMASK_INVALID_SIR_MASK_OR_ACTION_REGISTER_ACCESS = 4389; static const uint64_t IDX_CEN_MBSSIRQ_INVALID_MBSXCR_ACCESS = 4390; static const uint64_t IDX_CEN_MBSSIRQ_INVALID_MBAXCR01_ACCESS = 4391; static const uint64_t IDX_CEN_MBSSIRQ_INVALID_MBAXCR23_ACCESS = 4392; static const uint64_t IDX_CEN_MBSSIRQ_INVALID_MBAXCRMS_ACCRESS = 4393; static const uint64_t IDX_CEN_MBSSIRQ_SPARE = 4394; static const uint64_t IDX_CEN_MBSSIRQ_INVALID_SIR_MASK_OR_ACTION_REGISTER_ACCESS = 4395; static const uint64_t IDX_CEN_MBSXCRQ_MBA_ADDRESS_INTERLEAVE_MODE = 4396; static const uint64_t IDX_CEN_MBSXCRQ_MBA_ADDRESS_INTERLEAVE_MODE_LEN = 4397; static const uint64_t IDX_CEN_MBSXCRQ_Z_MODE_CENTAUR_ADDR4_SELECT = 4398; static const uint64_t IDX_CEN_MBSXCRQ_USE_ALT_CLEANER_CONFIG = 4399; static const uint64_t IDX_CEN_MBSXCRQ_ALT_CLEANER_RANK_TYPE = 4400; static const uint64_t IDX_CEN_MBSXCRQ_ALT_CLEANER_RANK_TYPE_LEN = 4401; static const uint64_t IDX_CEN_MBSXCRQ_ALT_CLEANER_MRANK0 = 4402; static const uint64_t IDX_CEN_MBSXCRQ_ALT_CLEANER_MRANK0_LEN = 4403; static const uint64_t IDX_CEN_MBSXCRQ_ALT_CLEANER_MRANK1 = 4404; static const uint64_t IDX_CEN_MBSXCRQ_ALT_CLEANER_MRANK1_LEN = 4405; static const uint64_t IDX_CEN_MBSXCRQ_USE_ALT_PREFETCH_CONFIG = 4406; static const uint64_t IDX_CEN_MBSXCRQ_ALT_PREFETCH_RANK_LOCATION = 4407; static const uint64_t IDX_CEN_MBSXCRQ_ALT_PREFETCH_RANK_LOCATION_LEN = 4408; static const uint64_t IDX_CEN_MBSXCRQ_ALT_PREFETCH_RANK_TYPE = 4409; static const uint64_t IDX_CEN_MBSXCRQ_ALT_PREFETCH_RANK_TYPE_LEN = 4410; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_0 = 4411; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_1 = 4412; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_2 = 4413; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_3 = 4414; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_4 = 4415; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_5 = 4416; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_6 = 4417; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_22 = 4418; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_30 = 4419; static const uint64_t IDX_CEN_MBSXCRQ_RESERVED_30_31 = 4420; static const uint64_t IDX_CEN_MBSXCRQ_RESERVED_30_31_LEN = 4421; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDR2_SELECT = 4422; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDR2_SELECT_LEN = 4423; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDR3_SELECT = 4424; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDR3_SELECT_LEN = 4425; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDR4_SELECT = 4426; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDR4_SELECT_LEN = 4427; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDR5_SELECT = 4428; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDR5_SELECT_LEN = 4429; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDR6_SELECT = 4430; static const uint64_t IDX_CEN_MBSXCRQ_CENTAUR_ADDR6_SELECT_LEN = 4431; static const uint64_t IDX_CEN_MCBISTS01_MBMPERQ_RD_MPE_MASTER_RANK0 = 4432; static const uint64_t IDX_CEN_MCBISTS01_MBMPERQ_RD_MPE_DIMM_SELECT = 4433; static const uint64_t IDX_CEN_MCBISTS01_MBMPERQ_RD_MPE_MASTER_RANK1 = 4434; static const uint64_t IDX_CEN_MCBISTS01_MBMPERQ_RD_MPE_MASTER_RANK2 = 4435; static const uint64_t IDX_CEN_MCBISTS01_MBMPERQ_RD_MPE_SLAVE_RANK = 4436; static const uint64_t IDX_CEN_MCBISTS01_MBMPERQ_RD_MPE_SLAVE_RANK_LEN = 4437; static const uint64_t IDX_CEN_MCBISTS01_MBMPERQ_RD_MPE_BANK = 4438; static const uint64_t IDX_CEN_MCBISTS01_MBMPERQ_RD_MPE_BANK_LEN = 4439; static const uint64_t IDX_CEN_MCBISTS01_MBMPERQ_RD_MPE_ROW = 4440; static const uint64_t IDX_CEN_MCBISTS01_MBMPERQ_RD_MPE_ROW_LEN = 4441; static const uint64_t IDX_CEN_MCBISTS01_MBMPERQ_RD_MPE_COL = 4442; static const uint64_t IDX_CEN_MCBISTS01_MBMPERQ_RD_MPE_COL_LEN = 4443; static const uint64_t IDX_CEN_MCBISTS01_MBMPERQ_RD_MPE_ERR_OCCURRED_AFTER_UE_RETRY = 4444; static const uint64_t IDX_CEN_MCBISTS01_MBMPERQ_RD_MPE_ROW17 = 4445; static const uint64_t IDX_CEN_MCBISTS01_MBNCERQ_RD_NCE_MASTER_RANK0 = 4446; static const uint64_t IDX_CEN_MCBISTS01_MBNCERQ_RD_NCE_DIMM_SELECT = 4447; static const uint64_t IDX_CEN_MCBISTS01_MBNCERQ_RD_NCE_MASTER_RANK1 = 4448; static const uint64_t IDX_CEN_MCBISTS01_MBNCERQ_RD_NCE_MASTER_RANK2 = 4449; static const uint64_t IDX_CEN_MCBISTS01_MBNCERQ_RD_NCE_SLAVE_RANK = 4450; static const uint64_t IDX_CEN_MCBISTS01_MBNCERQ_RD_NCE_SLAVE_RANK_LEN = 4451; static const uint64_t IDX_CEN_MCBISTS01_MBNCERQ_RD_NCE_BANK = 4452; static const uint64_t IDX_CEN_MCBISTS01_MBNCERQ_RD_NCE_BANK_LEN = 4453; static const uint64_t IDX_CEN_MCBISTS01_MBNCERQ_RD_NCE_ROW = 4454; static const uint64_t IDX_CEN_MCBISTS01_MBNCERQ_RD_NCE_ROW_LEN = 4455; static const uint64_t IDX_CEN_MCBISTS01_MBNCERQ_RD_NCE_COL = 4456; static const uint64_t IDX_CEN_MCBISTS01_MBNCERQ_RD_NCE_COL_LEN = 4457; static const uint64_t IDX_CEN_MCBISTS01_MBNCERQ_RD_NCE_ERR_OCCURRED__AFTER_UE_RETRY = 4458; static const uint64_t IDX_CEN_MCBISTS01_MBNCERQ_RD_NCE_ROW17 = 4459; static const uint64_t IDX_CEN_MCBISTS01_MBRCERQ_RD_RCE_MASTER_RANK0 = 4460; static const uint64_t IDX_CEN_MCBISTS01_MBRCERQ_RD_RCE_DIMM_SELECT = 4461; static const uint64_t IDX_CEN_MCBISTS01_MBRCERQ_RD_RCE_MASTER_RANK1 = 4462; static const uint64_t IDX_CEN_MCBISTS01_MBRCERQ_RD_RCE_MASTER_RANK2 = 4463; static const uint64_t IDX_CEN_MCBISTS01_MBRCERQ_RD_RCE_SLAVE_RANK = 4464; static const uint64_t IDX_CEN_MCBISTS01_MBRCERQ_RD_RCE_SLAVE_RANK_LEN = 4465; static const uint64_t IDX_CEN_MCBISTS01_MBRCERQ_RD_RCE_BANK = 4466; static const uint64_t IDX_CEN_MCBISTS01_MBRCERQ_RD_RCE_BANK_LEN = 4467; static const uint64_t IDX_CEN_MCBISTS01_MBRCERQ_RD_RCE_ROW = 4468; static const uint64_t IDX_CEN_MCBISTS01_MBRCERQ_RD_RCE_ROW_LEN = 4469; static const uint64_t IDX_CEN_MCBISTS01_MBRCERQ_RD_RCE_COL = 4470; static const uint64_t IDX_CEN_MCBISTS01_MBRCERQ_RD_RCE_COL_LEN = 4471; static const uint64_t IDX_CEN_MCBISTS01_MBRCERQ_RD_RCE_ERR_OCCURRED_AFTER_UE_RETRY = 4472; static const uint64_t IDX_CEN_MCBISTS01_MBRCERQ_RD_RCE_ROW17 = 4473; static const uint64_t IDX_CEN_MCBISTS01_MBSEC0Q_SOFT_CE_COUNT = 4474; static const uint64_t IDX_CEN_MCBISTS01_MBSEC0Q_SOFT_CE_COUNT_LEN = 4475; static const uint64_t IDX_CEN_MCBISTS01_MBSEC0Q_INTERMITTENT_CE_COUNT = 4476; static const uint64_t IDX_CEN_MCBISTS01_MBSEC0Q_INTERMITTENT_CE_COUNT_LEN = 4477; static const uint64_t IDX_CEN_MCBISTS01_MBSEC0Q_HARD_CE_COUNT = 4478; static const uint64_t IDX_CEN_MCBISTS01_MBSEC0Q_HARD_CE_COUNT_LEN = 4479; static const uint64_t IDX_CEN_MCBISTS01_MBSEC0Q_SCE_COUNT = 4480; static const uint64_t IDX_CEN_MCBISTS01_MBSEC0Q_SCE_COUNT_LEN = 4481; static const uint64_t IDX_CEN_MCBISTS01_MBSEC0Q_MCE_COUNT = 4482; static const uint64_t IDX_CEN_MCBISTS01_MBSEC0Q_MCE_COUNT_LEN = 4483; static const uint64_t IDX_CEN_MCBISTS01_MBSEC1Q_RCE_COUNT = 4484; static const uint64_t IDX_CEN_MCBISTS01_MBSEC1Q_RCE_COUNT_LEN = 4485; static const uint64_t IDX_CEN_MCBISTS01_MBSEC1Q_MPE_COUNT = 4486; static const uint64_t IDX_CEN_MCBISTS01_MBSEC1Q_MPE_COUNT_LEN = 4487; static const uint64_t IDX_CEN_MCBISTS01_MBSEC1Q_UE_COUNT = 4488; static const uint64_t IDX_CEN_MCBISTS01_MBSEC1Q_UE_COUNT_LEN = 4489; static const uint64_t IDX_CEN_MCBISTS01_MBSEVRQ_ERR_VECTOR0 = 4490; static const uint64_t IDX_CEN_MCBISTS01_MBSEVRQ_ERR_VECTOR0_LEN = 4491; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRACT0_SCOM_PAR_ERRORS = 4492; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRACT0_MBX_PAR_ERRORS = 4493; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRACT0_RESERVED_2_14 = 4494; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRACT0_RESERVED_2_14_LEN = 4495; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRACT0_INTERNAL_SCOM_ERROR = 4496; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRACT0_INTERNAL_SCOM_ERROR_CLONE = 4497; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRACT1_SCOM_PAR_ERRORS = 4498; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRACT1_MBX_PAR_ERRORS = 4499; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRACT1_RESERVED_2_14 = 4500; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRACT1_RESERVED_2_14_LEN = 4501; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRACT1_INTERNAL_SCOM_ERROR = 4502; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRACT1_INTERNAL_SCOM_ERROR_CLONE = 4503; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRMASK_SCOM_PAR_ERRORS = 4504; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRMASK_MBX_PAR_ERRORS = 4505; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRMASK_RESERVED_2_14 = 4506; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRMASK_RESERVED_2_14_LEN = 4507; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRMASK_INTERNAL_SCOM_ERROR = 4508; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRMASK_INTERNAL_SCOM_ERROR_CLONE = 4509; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRQ_SCOM_PAR_ERRORS = 4510; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRQ_MBX_PAR_ERRORS = 4511; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRQ_DRAM_EVENTN_BIT0 = 4512; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRQ_DRAM_EVENTN_BIT1 = 4513; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRQ_RESERVED_4_14 = 4514; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRQ_RESERVED_4_14_LEN = 4515; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRQ_INTERNAL_SCOM_ERROR = 4516; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRQ_INTERNAL_SCOM_ERROR_CLONE = 4517; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRWOF_SCOM_PAR_ERRORS = 4518; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRWOF_MBX_PAR_ERRORS = 4519; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRWOF_RESERVED_2_14 = 4520; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRWOF_RESERVED_2_14_LEN = 4521; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRWOF_INTERNAL_SCOM_ERROR = 4522; static const uint64_t IDX_CEN_MCBISTS01_MBSFIRWOF_INTERNAL_SCOM_ERROR_CLONE = 4523; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_0_ERROR_COUNT = 4524; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_0_ERROR_COUNT_LEN = 4525; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_1_ERROR_COUNT = 4526; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_1_ERROR_COUNT_LEN = 4527; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_2_ERROR_COUNT = 4528; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_2_ERROR_COUNT_LEN = 4529; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_3_ERROR_COUNT = 4530; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_3_ERROR_COUNT_LEN = 4531; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_4_ERROR_COUNT = 4532; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_4_ERROR_COUNT_LEN = 4533; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_5_ERROR_COUNT = 4534; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_5_ERROR_COUNT_LEN = 4535; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_6_ERROR_COUNT = 4536; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_6_ERROR_COUNT_LEN = 4537; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_7_ERROR_COUNT = 4538; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_7_ERROR_COUNT_LEN = 4539; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_8_ERROR_COUNT = 4540; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_8_ERROR_COUNT_LEN = 4541; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_9_ERROR_COUNT = 4542; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_9_ERROR_COUNT_LEN = 4543; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_10_ERROR_COUNT = 4544; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_10_ERROR_COUNT_LEN = 4545; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_11_ERROR_COUNT = 4546; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_11_ERROR_COUNT_LEN = 4547; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_12_ERROR_COUNT = 4548; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_12_ERROR_COUNT_LEN = 4549; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_13_ERROR_COUNT = 4550; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_13_ERROR_COUNT_LEN = 4551; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_14_ERROR_COUNT = 4552; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_14_ERROR_COUNT_LEN = 4553; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_15_ERROR_COUNT = 4554; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_15_ERROR_COUNT_LEN = 4555; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_16_ERROR_COUNT = 4556; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_16_ERROR_COUNT_LEN = 4557; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_17_ERROR_COUNT = 4558; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_17_ERROR_COUNT_LEN = 4559; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_18_ERROR_COUNT = 4560; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_18_ERROR_COUNT_LEN = 4561; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_19_ERROR_COUNT = 4562; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_19_ERROR_COUNT_LEN = 4563; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_20_ERROR_COUNT = 4564; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_20_ERROR_COUNT_LEN = 4565; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_21_ERROR_COUNT = 4566; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_21_ERROR_COUNT_LEN = 4567; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_22_ERROR_COUNT = 4568; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_22_ERROR_COUNT_LEN = 4569; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_23_ERROR_COUNT = 4570; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_23_ERROR_COUNT_LEN = 4571; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_24_ERROR_COUNT = 4572; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_24_ERROR_COUNT_LEN = 4573; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_25_ERROR_COUNT = 4574; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_25_ERROR_COUNT_LEN = 4575; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_26_ERROR_COUNT = 4576; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_26_ERROR_COUNT_LEN = 4577; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_27_ERROR_COUNT = 4578; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_27_ERROR_COUNT_LEN = 4579; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_28_ERROR_COUNT = 4580; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_28_ERROR_COUNT_LEN = 4581; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_29_ERROR_COUNT = 4582; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_29_ERROR_COUNT_LEN = 4583; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_30_ERROR_COUNT = 4584; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_30_ERROR_COUNT_LEN = 4585; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_31_ERROR_COUNT = 4586; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_31_ERROR_COUNT_LEN = 4587; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_32_ERROR_COUNT = 4588; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_32_ERROR_COUNT_LEN = 4589; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_33_ERROR_COUNT = 4590; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_33_ERROR_COUNT_LEN = 4591; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_34_ERROR_COUNT = 4592; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_34_ERROR_COUNT_LEN = 4593; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_35_ERROR_COUNT = 4594; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_35_ERROR_COUNT_LEN = 4595; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_36_ERROR_COUNT = 4596; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_36_ERROR_COUNT_LEN = 4597; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_37_ERROR_COUNT = 4598; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_37_ERROR_COUNT_LEN = 4599; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_38ERROR_COUNT = 4600; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_38ERROR_COUNT_LEN = 4601; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_39_ERROR_COUNT = 4602; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_39_ERROR_COUNT_LEN = 4603; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_40_ERROR_COUNT = 4604; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_40_ERROR_COUNT_LEN = 4605; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_41_ERROR_COUNT = 4606; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_41_ERROR_COUNT_LEN = 4607; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_42_ERROR_COUNT = 4608; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_42_ERROR_COUNT_LEN = 4609; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_43_ERROR_COUNT = 4610; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_43_ERROR_COUNT_LEN = 4611; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_44_ERROR_COUNT = 4612; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_44_ERROR_COUNT_LEN = 4613; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_45_ERROR_COUNT = 4614; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_45_ERROR_COUNT_LEN = 4615; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_46_ERROR_COUNT = 4616; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_46_ERROR_COUNT_LEN = 4617; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_47_ERROR_COUNT = 4618; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_47_ERROR_COUNT_LEN = 4619; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_48_ERROR_COUNT = 4620; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_48_ERROR_COUNT_LEN = 4621; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_49_ERROR_COUNT = 4622; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_49_ERROR_COUNT_LEN = 4623; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_50_ERROR_COUNT = 4624; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_50_ERROR_COUNT_LEN = 4625; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_51_ERROR_COUNT = 4626; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_51_ERROR_COUNT_LEN = 4627; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_52_ERROR_COUNT = 4628; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_52_ERROR_COUNT_LEN = 4629; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_53_ERROR_COUNT = 4630; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_53_ERROR_COUNT_LEN = 4631; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_54_ERROR_COUNT = 4632; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_54_ERROR_COUNT_LEN = 4633; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_55_ERROR_COUNT = 4634; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_55_ERROR_COUNT_LEN = 4635; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_56_ERROR_COUNT = 4636; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_56_ERROR_COUNT_LEN = 4637; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_57_ERROR_COUNT = 4638; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_57_ERROR_COUNT_LEN = 4639; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_58_ERROR_COUNT = 4640; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_58_ERROR_COUNT_LEN = 4641; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_59_ERROR_COUNT = 4642; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_59_ERROR_COUNT_LEN = 4643; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_60_ERROR_COUNT = 4644; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_60_ERROR_COUNT_LEN = 4645; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_61_ERROR_COUNT = 4646; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_61_ERROR_COUNT_LEN = 4647; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_62_ERROR_COUNT = 4648; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_62_ERROR_COUNT_LEN = 4649; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_63_ERROR_COUNT = 4650; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_63_ERROR_COUNT_LEN = 4651; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_64_ERROR_COUNT = 4652; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_64_ERROR_COUNT_LEN = 4653; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_65_ERROR_COUNT = 4654; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_65_ERROR_COUNT_LEN = 4655; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_66_ERROR_COUNT = 4656; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_66_ERROR_COUNT_LEN = 4657; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_67_ERROR_COUNT = 4658; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_67_ERROR_COUNT_LEN = 4659; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_68_ERROR_COUNT = 4660; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_68_ERROR_COUNT_LEN = 4661; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_69_ERROR_COUNT = 4662; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_69_ERROR_COUNT_LEN = 4663; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_70_ERROR_COUNT = 4664; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_70_ERROR_COUNT_LEN = 4665; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_71_ERROR_COUNT = 4666; static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_71_ERROR_COUNT_LEN = 4667; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_SOFT_CE_COUNT_THRESHOLD_ATTN_STOP = 4668; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_INTERMITTENT_CE_COUNT_THRESHOLD_ATTN_STOP = 4669; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_HARD_CE_COUNT_THRESHOLD_ATTN_STOP = 4670; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_RCE_COUNT_THRESHOLD_ATTN_STOP = 4671; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_SOFT_CE_COUNT_THRESHOLD = 4672; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_SOFT_CE_COUNT_THRESHOLD_LEN = 4673; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_INTERMITTENT_CE_COUNT_THRESHOLD = 4674; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_INTERMITTENT_CE_COUNT_THRESHOLD_LEN = 4675; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_HARD_CE_COUNT_THRESHOLD = 4676; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_HARD_CE_COUNT_THRESHOLD_LEN = 4677; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_RETRY_CE_COUNT_THRESHOLD = 4678; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_RETRY_CE_COUNT_THRESHOLD_LEN = 4679; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_RESET_KEEPER = 4680; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_RESET_ALL_ERROR_COUNT_REGISTERS = 4681; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_DISABLE_RESET_ERROR_REG_RANK_END = 4682; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_SOFT_CE_INCR_SYMBOL_COUNT = 4683; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_INTERMIT_INCR_SYMBOL_COUNT = 4684; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_HARD_CE_INCR_SYMBOL_COUNT = 4685; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_MCE_INCR_SYMBOL_COUNT = 4686; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_UE_TRAP = 4687; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_CFG_MAINT_RCE_WITH_CE = 4688; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_RESERVED_61 = 4689; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_INTERMITTENT_NCE_INJECT = 4690; static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ_RESERVED_63 = 4691; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBDRCRQ_CFG_DATA_ROT = 4692; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBDRCRQ_CFG_DATA_ROT_LEN = 4693; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBDRCRQ_CFG_DATA_ROT_SEED = 4694; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBDRCRQ_CFG_DATA_ROT_SEED_LEN = 4695; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBDRCRQ_CFG_INVERT_DATA = 4696; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBDRCRQ_DD2_HW234828_ROUTE_NONMAINT_DATA_TO_MAINTBUFF_EN = 4697; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBDRCRQ_RESERVED_22_63 = 4698; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBDRCRQ_RESERVED_22_63_LEN = 4699; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBDRSRQ_CFG_DATA_ROT_SEED = 4700; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBDRSRQ_CFG_DATA_ROT_SEED_LEN = 4701; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD0Q_CFG_FIXED_SEED = 4702; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD0Q_CFG_FIXED_SEED_LEN = 4703; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD1Q_CFG_FIXED_SEED = 4704; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD1Q_CFG_FIXED_SEED_LEN = 4705; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD2Q_CFG_FIXED_SEED = 4706; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD2Q_CFG_FIXED_SEED_LEN = 4707; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD3Q_CFG_FIXED_SEED = 4708; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD3Q_CFG_FIXED_SEED_LEN = 4709; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD4Q_CFG_FIXED_SEED = 4710; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD4Q_CFG_FIXED_SEED_LEN = 4711; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD5Q_CFG_FIXED_SEED = 4712; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD5Q_CFG_FIXED_SEED_LEN = 4713; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD6Q_CFG_FIXED_SEED = 4714; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD6Q_CFG_FIXED_SEED_LEN = 4715; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD7Q_CFG_FIXED_SEED = 4716; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD7Q_CFG_FIXED_SEED_LEN = 4717; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED1 = 4718; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED1_LEN = 4719; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED2 = 4720; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED2_LEN = 4721; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED3 = 4722; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED3_LEN = 4723; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED4 = 4724; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED4_LEN = 4725; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED5 = 4726; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED5_LEN = 4727; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED6 = 4728; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED6_LEN = 4729; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED7 = 4730; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED7_LEN = 4731; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED8 = 4732; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED8_LEN = 4733; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED1 = 4734; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED1_LEN = 4735; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED2 = 4736; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED2_LEN = 4737; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED3 = 4738; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED3_LEN = 4739; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED4 = 4740; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED4_LEN = 4741; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED5 = 4742; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED5_LEN = 4743; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED6 = 4744; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED6_LEN = 4745; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED7 = 4746; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED7_LEN = 4747; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED8 = 4748; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED8_LEN = 4749; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED0 = 4750; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED0_LEN = 4751; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED1 = 4752; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED1_LEN = 4753; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED2 = 4754; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED2_LEN = 4755; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED3 = 4756; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED3_LEN = 4757; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED4 = 4758; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED4_LEN = 4759; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED5 = 4760; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED5_LEN = 4761; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED6 = 4762; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED6_LEN = 4763; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED7 = 4764; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED7_LEN = 4765; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED0 = 4766; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED0_LEN = 4767; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED1 = 4768; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED1_LEN = 4769; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED2 = 4770; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED2_LEN = 4771; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED3 = 4772; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED3_LEN = 4773; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED4 = 4774; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED4_LEN = 4775; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED5 = 4776; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED5_LEN = 4777; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED6 = 4778; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED6_LEN = 4779; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED7 = 4780; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED7_LEN = 4781; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED0 = 4782; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED0_LEN = 4783; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED1 = 4784; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED1_LEN = 4785; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED2 = 4786; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED2_LEN = 4787; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED3 = 4788; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED3_LEN = 4789; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED4 = 4790; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED4_LEN = 4791; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED5 = 4792; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED5_LEN = 4793; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED6 = 4794; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED6_LEN = 4795; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED7 = 4796; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED7_LEN = 4797; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED0 = 4798; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED0_LEN = 4799; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED1 = 4800; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED1_LEN = 4801; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED2 = 4802; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED2_LEN = 4803; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED3 = 4804; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED3_LEN = 4805; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED4 = 4806; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED4_LEN = 4807; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED5 = 4808; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED5_LEN = 4809; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED6 = 4810; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED6_LEN = 4811; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED7 = 4812; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED7_LEN = 4813; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED0 = 4814; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED0_LEN = 4815; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED1 = 4816; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED1_LEN = 4817; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED2 = 4818; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED2_LEN = 4819; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED3 = 4820; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED3_LEN = 4821; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED4 = 4822; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED4_LEN = 4823; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED5 = 4824; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED5_LEN = 4825; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED6 = 4826; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED6_LEN = 4827; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED7 = 4828; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED7_LEN = 4829; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED0 = 4830; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED0_LEN = 4831; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED1 = 4832; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED1_LEN = 4833; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED2 = 4834; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED2_LEN = 4835; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED3 = 4836; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED3_LEN = 4837; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED4 = 4838; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED4_LEN = 4839; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED5 = 4840; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED5_LEN = 4841; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED6 = 4842; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED6_LEN = 4843; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED7 = 4844; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED7_LEN = 4845; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED0 = 4846; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED0_LEN = 4847; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED1 = 4848; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED1_LEN = 4849; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED2 = 4850; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED2_LEN = 4851; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED3 = 4852; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED3_LEN = 4853; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED4 = 4854; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED4_LEN = 4855; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED5 = 4856; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED5_LEN = 4857; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED6 = 4858; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED6_LEN = 4859; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED7 = 4860; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED7_LEN = 4861; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED0 = 4862; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED0_LEN = 4863; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED1 = 4864; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED1_LEN = 4865; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED2 = 4866; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED2_LEN = 4867; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED3 = 4868; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED3_LEN = 4869; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED4 = 4870; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED4_LEN = 4871; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED5 = 4872; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED5_LEN = 4873; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED6 = 4874; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED6_LEN = 4875; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED7 = 4876; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED7_LEN = 4877; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED0 = 4878; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED0_LEN = 4879; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED1 = 4880; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED1_LEN = 4881; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED2 = 4882; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED2_LEN = 4883; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED3 = 4884; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED3_LEN = 4885; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED4 = 4886; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED4_LEN = 4887; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED5 = 4888; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED5_LEN = 4889; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED6 = 4890; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED6_LEN = 4891; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED7 = 4892; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED7_LEN = 4893; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED0 = 4894; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED0_LEN = 4895; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED1 = 4896; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED1_LEN = 4897; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED2 = 4898; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED2_LEN = 4899; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED3 = 4900; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED3_LEN = 4901; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED4 = 4902; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED4_LEN = 4903; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED5 = 4904; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED5_LEN = 4905; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED6 = 4906; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED6_LEN = 4907; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED7 = 4908; static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED7_LEN = 4909; static const uint64_t IDX_CEN_MCBISTS01_MBUERQ_RD_UE_MASTER_RANK0 = 4910; static const uint64_t IDX_CEN_MCBISTS01_MBUERQ_RD_UE_DIMM_SELECT = 4911; static const uint64_t IDX_CEN_MCBISTS01_MBUERQ_RD_UE_MASTER_RANK1 = 4912; static const uint64_t IDX_CEN_MCBISTS01_MBUERQ_RD_UE_MASTER_RANK2 = 4913; static const uint64_t IDX_CEN_MCBISTS01_MBUERQ_RD_UE_SLAVE_RANK = 4914; static const uint64_t IDX_CEN_MCBISTS01_MBUERQ_RD_UE_SLAVE_RANK_LEN = 4915; static const uint64_t IDX_CEN_MCBISTS01_MBUERQ_RD_UE_BANK = 4916; static const uint64_t IDX_CEN_MCBISTS01_MBUERQ_RD_UE_BANK_LEN = 4917; static const uint64_t IDX_CEN_MCBISTS01_MBUERQ_RD_UE_ROW = 4918; static const uint64_t IDX_CEN_MCBISTS01_MBUERQ_RD_UE_ROW_LEN = 4919; static const uint64_t IDX_CEN_MCBISTS01_MBUERQ_RD_UE_COL = 4920; static const uint64_t IDX_CEN_MCBISTS01_MBUERQ_RD_UE_COL_LEN = 4921; static const uint64_t IDX_CEN_MCBISTS01_MBUERQ_RESERVED_40 = 4922; static const uint64_t IDX_CEN_MCBISTS01_MBUERQ_RD_UE_ROW17 = 4923; static const uint64_t IDX_CEN_MCBISTS01_MBXERRINJQ_RCMD_ERR_INJ_MODE = 4924; static const uint64_t IDX_CEN_MCBISTS01_MBXERRINJQ_RCMD_ERR_INJ = 4925; static const uint64_t IDX_CEN_MCBISTS01_MBXERRINJQ_WRD_CE_ERR_INJ_MODE = 4926; static const uint64_t IDX_CEN_MCBISTS01_MBXERRINJQ_WRD_CE_ERR_INJ = 4927; static const uint64_t IDX_CEN_MCBISTS01_MBXERRINJQ_WRD_UE_ERR_INJ_MODE = 4928; static const uint64_t IDX_CEN_MCBISTS01_MBXERRINJQ_WRD_UE_ERR_INJ = 4929; static const uint64_t IDX_CEN_MCBISTS01_MBXERRINJQ_MAINT_CE_ERR_INJ_MODE = 4930; static const uint64_t IDX_CEN_MCBISTS01_MBXERRINJQ_MAINT_CE_ERR_INJ = 4931; static const uint64_t IDX_CEN_MCBISTS01_MBXERRINJQ_MAINT_UE_ERR_INJ_MODE = 4932; static const uint64_t IDX_CEN_MCBISTS01_MBXERRINJQ_MAINT_UE_ERR_INJ = 4933; static const uint64_t IDX_CEN_MCBISTS01_MBXERRINJQ_SCOM_PE_ERR_INJ_MODE = 4934; static const uint64_t IDX_CEN_MCBISTS01_MBXERRINJQ_SCOM_PE_ERR_INJ = 4935; static const uint64_t IDX_CEN_MCBISTS01_MBXERRINJQ_RESERVED_12_63 = 4936; static const uint64_t IDX_CEN_MCBISTS01_MBXERRINJQ_RESERVED_12_63_LEN = 4937; static const uint64_t IDX_CEN_MCBISTS01_MBXERRSTATQ_WDONE_PAR_ERROR = 4938; static const uint64_t IDX_CEN_MCBISTS01_MBXERRSTATQ_RDTAG_RDCHECK_ERROR = 4939; static const uint64_t IDX_CEN_MCBISTS01_MBXERRSTATQ_RDTAG_PAR_ERROR = 4940; static const uint64_t IDX_CEN_MCBISTS01_MBXERRSTATQ_RDTAG_PAR_RC_ERROR = 4941; static const uint64_t IDX_CEN_MCBISTS01_MBXERRSTATQ_RESERVED_4_63 = 4942; static const uint64_t IDX_CEN_MCBISTS01_MBXERRSTATQ_RESERVED_4_63_LEN = 4943; static const uint64_t IDX_CEN_MCBISTS01_MCBCMA1Q_COMPARE_MASK_A = 4944; static const uint64_t IDX_CEN_MCBISTS01_MCBCMA1Q_COMPARE_MASK_A_LEN = 4945; static const uint64_t IDX_CEN_MCBISTS01_MCBCMABQ_COMPARE_MASK_A = 4946; static const uint64_t IDX_CEN_MCBISTS01_MCBCMABQ_COMPARE_MASK_A_LEN = 4947; static const uint64_t IDX_CEN_MCBISTS01_MCBCMABQ_COMPARE_MASK_B = 4948; static const uint64_t IDX_CEN_MCBISTS01_MCBCMABQ_COMPARE_MASK_B_LEN = 4949; static const uint64_t IDX_CEN_MCBISTS01_MCBCMABQ_CFG_STORE_FAIL = 4950; static const uint64_t IDX_CEN_MCBISTS01_MCBCMABQ_MCBIST_ENABLE_CE_TRAP = 4951; static const uint64_t IDX_CEN_MCBISTS01_MCBCMABQ_MCBIST_ENABLE_MPE_TRAP = 4952; static const uint64_t IDX_CEN_MCBISTS01_MCBCMABQ_ENABLE_UE_TRAP = 4953; static const uint64_t IDX_CEN_MCBISTS01_MCBCMABQ_MCBIST_STOP_ON_NTH_FAIL = 4954; static const uint64_t IDX_CEN_MCBISTS01_MCBCMABQ_ARRAY_READ_ENABLE = 4955; static const uint64_t IDX_CEN_MCBISTS01_MCBCMABQ_RESERVED_38_63 = 4956; static const uint64_t IDX_CEN_MCBISTS01_MCBCMABQ_RESERVED_38_63_LEN = 4957; static const uint64_t IDX_CEN_MCBISTS01_MCBCMB1Q_COMPARE_MASK_B = 4958; static const uint64_t IDX_CEN_MCBISTS01_MCBCMB1Q_COMPARE_MASK_B_LEN = 4959; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA1Q_ERROR_MAP_PORTA_RNK0 = 4960; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA1Q_ERROR_MAP_PORTA_RNK0_LEN = 4961; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA1Q_ERROR_MAP_PORTA_RNK1 = 4962; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA1Q_ERROR_MAP_PORTA_RNK1_LEN = 4963; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA1Q_ERROR_MAP_PORTA_RNK2 = 4964; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA1Q_ERROR_MAP_PORTA_RNK2_LEN = 4965; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA1Q_RESERVED_60_63 = 4966; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA1Q_RESERVED_60_63_LEN = 4967; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA2Q_ERROR_MAP_PORTA_RNK3 = 4968; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA2Q_ERROR_MAP_PORTA_RNK3_LEN = 4969; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA2Q_ERROR_MAP_PORTA_RNK4 = 4970; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA2Q_ERROR_MAP_PORTA_RNK4_LEN = 4971; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA2Q_ERROR_MAP_PORTA_RNK5 = 4972; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA2Q_ERROR_MAP_PORTA_RNK5_LEN = 4973; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA2Q_RESERVED_60_63 = 4974; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA2Q_RESERVED_60_63_LEN = 4975; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA3Q_ERROR_MAP_PORTA_RNK6 = 4976; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA3Q_ERROR_MAP_PORTA_RNK6_LEN = 4977; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA3Q_ERROR_MAP_PORTA_RNK7 = 4978; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA3Q_ERROR_MAP_PORTA_RNK7_LEN = 4979; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA3Q_RESERVED_40_63 = 4980; static const uint64_t IDX_CEN_MCBISTS01_MCBEMA3Q_RESERVED_40_63_LEN = 4981; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB1Q_ERROR_MAP_PORTB_RNK0 = 4982; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB1Q_ERROR_MAP_PORTB_RNK0_LEN = 4983; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB1Q_ERROR_MAP_PORTB_RNK1 = 4984; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB1Q_ERROR_MAP_PORTB_RNK1_LEN = 4985; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB1Q_ERROR_MAP_PORTB_RNK2 = 4986; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB1Q_ERROR_MAP_PORTB_RNK2_LEN = 4987; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB1Q_RESERVED_60_63 = 4988; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB1Q_RESERVED_60_63_LEN = 4989; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB2Q_ERROR_MAP_PORTB_RNK3 = 4990; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB2Q_ERROR_MAP_PORTB_RNK3_LEN = 4991; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB2Q_ERROR_MAP_PORTB_RNK4 = 4992; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB2Q_ERROR_MAP_PORTB_RNK4_LEN = 4993; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB2Q_ERROR_MAP_PORTB_RNK5 = 4994; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB2Q_ERROR_MAP_PORTB_RNK5_LEN = 4995; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB2Q_RESERVED_60_63 = 4996; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB2Q_RESERVED_60_63_LEN = 4997; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB3Q_ERROR_MAP_PORTB_RNK6 = 4998; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB3Q_ERROR_MAP_PORTB_RNK6_LEN = 4999; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB3Q_ERROR_MAP_PORTB_RNK7 = 5000; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB3Q_ERROR_MAP_PORTB_RNK7_LEN = 5001; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB3Q_RESERVED_40_63 = 5002; static const uint64_t IDX_CEN_MCBISTS01_MCBEMB3Q_RESERVED_40_63_LEN = 5003; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATAQ_PORTA_CE_ERR = 5004; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATAQ_PORTA_UE_ERR = 5005; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATAQ_PORTA_ERR_TRAP_OVERFLOW = 5006; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATAQ_PORTA_CNTL_TRAP_SUBTST_NUM = 5007; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATAQ_PORTA_CNTL_TRAP_SUBTST_NUM_LEN = 5008; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATAQ_PORTA_ERR_LOG_PTR = 5009; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATAQ_PORTA_ERR_LOG_PTR_LEN = 5010; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATAQ_RESERVED_11_23 = 5011; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATAQ_RESERVED_11_23_LEN = 5012; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATBQ_PORTB_CE_ERR = 5013; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATBQ_PORTB_UE_ERR = 5014; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATBQ_PORTB_ERR_TRAP_OVERFLOW = 5015; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATBQ_PORTB_CNTL_TRAP_SUBTST_NUM = 5016; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATBQ_PORTB_CNTL_TRAP_SUBTST_NUM_LEN = 5017; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATBQ_PORTB_ERR_LOG_PTR = 5018; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATBQ_PORTB_ERR_LOG_PTR_LEN = 5019; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATBQ_RESERVED_11_23 = 5020; static const uint64_t IDX_CEN_MCBISTS01_MCBSTATBQ_RESERVED_11_23_LEN = 5021; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR0 = 5022; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR0_LEN = 5023; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR1 = 5024; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR1_LEN = 5025; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR2 = 5026; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR2_LEN = 5027; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR3 = 5028; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR3_LEN = 5029; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR4 = 5030; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR4_LEN = 5031; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR5 = 5032; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR5_LEN = 5033; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR6 = 5034; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR6_LEN = 5035; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR7 = 5036; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR7_LEN = 5037; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR8 = 5038; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR8_LEN = 5039; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q_RESERVED_63 = 5040; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR9 = 5041; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR9_LEN = 5042; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR10 = 5043; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR10_LEN = 5044; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR11 = 5045; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR11_LEN = 5046; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR12 = 5047; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR12_LEN = 5048; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR13 = 5049; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR13_LEN = 5050; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR14 = 5051; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR14_LEN = 5052; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR15 = 5053; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR15_LEN = 5054; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR16 = 5055; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR16_LEN = 5056; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR17 = 5057; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR17_LEN = 5058; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q_ERR_CNTR_OVERFLOW = 5059; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR18 = 5060; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR18_LEN = 5061; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR19 = 5062; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR19_LEN = 5063; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA3Q_RESERVED_14_63 = 5064; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA3Q_RESERVED_14_63_LEN = 5065; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR0 = 5066; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR0_LEN = 5067; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR1 = 5068; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR1_LEN = 5069; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR2 = 5070; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR2_LEN = 5071; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR3 = 5072; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR3_LEN = 5073; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR4 = 5074; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR4_LEN = 5075; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR5 = 5076; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR5_LEN = 5077; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR6 = 5078; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR6_LEN = 5079; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR7 = 5080; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR7_LEN = 5081; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR8 = 5082; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR8_LEN = 5083; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q_RESERVED_63 = 5084; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR9 = 5085; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR9_LEN = 5086; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR10 = 5087; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR10_LEN = 5088; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR11 = 5089; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR11_LEN = 5090; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR12 = 5091; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR12_LEN = 5092; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR13 = 5093; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR13_LEN = 5094; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR14 = 5095; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR14_LEN = 5096; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR15 = 5097; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR15_LEN = 5098; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR16 = 5099; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR16_LEN = 5100; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR17 = 5101; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR17_LEN = 5102; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q_ERR_CNTR_OVERFLOW = 5103; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR18 = 5104; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR18_LEN = 5105; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR19 = 5106; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR19_LEN = 5107; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB3Q_RESERVED_14_63 = 5108; static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB3Q_RESERVED_14_63_LEN = 5109; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG = 5110; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG_LEN = 5111; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG = 5112; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG_LEN = 5113; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG = 5114; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG_LEN = 5115; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG = 5116; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG_LEN = 5117; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG = 5118; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG_LEN = 5119; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG = 5120; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG_LEN = 5121; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG = 5122; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG_LEN = 5123; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG = 5124; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG_LEN = 5125; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG = 5126; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG_LEN = 5127; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG = 5128; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG_LEN = 5129; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG = 5130; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG_LEN = 5131; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG = 5132; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG_LEN = 5133; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG = 5134; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG_LEN = 5135; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG = 5136; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG_LEN = 5137; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG = 5138; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG_LEN = 5139; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG = 5140; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG_LEN = 5141; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS = 5142; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS_LEN = 5143; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS = 5144; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS_LEN = 5145; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS = 5146; static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS_LEN = 5147; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MEMORY_MPE_RANK_0_7 = 5148; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MEMORY_MPE_RANK_0_7_LEN = 5149; static const uint64_t IDX_CEN_ECC01_MBECCFIR_RESERVED_8_15 = 5150; static const uint64_t IDX_CEN_ECC01_MBECCFIR_RESERVED_8_15_LEN = 5151; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MEMORY_NCE = 5152; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MEMORY_RCE = 5153; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MEMORY_SUE = 5154; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MEMORY_UE = 5155; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MAINT_MPE_RANK_0_7 = 5156; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MAINT_MPE_RANK_0_7_LEN = 5157; static const uint64_t IDX_CEN_ECC01_MBECCFIR_RESERVED_28_35 = 5158; static const uint64_t IDX_CEN_ECC01_MBECCFIR_RESERVED_28_35_LEN = 5159; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MAINTENANCE_NCE = 5160; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MAINTENANCE_SCE = 5161; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MAINTENANCE_MCE = 5162; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MAINTENANCE_RCE = 5163; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MAINTENANCE_SUE = 5164; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MAINTENANCE_UE = 5165; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MPE_DURING_USE_MAINTENANCE_MARK_MODE = 5166; static const uint64_t IDX_CEN_ECC01_MBECCFIR_PREFETCH_MEMORY_UE = 5167; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MEMORY_RCD_PARITY_ERROR = 5168; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MAINTENANCE_RCD_PARITY_ERROR = 5169; static const uint64_t IDX_CEN_ECC01_MBECCFIR_RECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR = 5170; static const uint64_t IDX_CEN_ECC01_MBECCFIR_UNRECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR = 5171; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MASKABLE_CONFIGURATION_REGISTER_PARITY_ERROR = 5172; static const uint64_t IDX_CEN_ECC01_MBECCFIR_ECC_DATAPATH_PARITY_ERROR = 5173; static const uint64_t IDX_CEN_ECC01_MBECCFIR_INTERNAL_SCOM_ERROR = 5174; static const uint64_t IDX_CEN_ECC01_MBECCFIR_INTERNAL_SCOM_ERROR_COPY = 5175; static const uint64_t IDX_CEN_ECC01_MBECCFIR_ACTION0_FIR = 5176; static const uint64_t IDX_CEN_ECC01_MBECCFIR_ACTION0_FIR_LEN = 5177; static const uint64_t IDX_CEN_ECC01_MBECCFIR_ACTION1_FIR = 5178; static const uint64_t IDX_CEN_ECC01_MBECCFIR_ACTION1_FIR_LEN = 5179; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MASK_FIR = 5180; static const uint64_t IDX_CEN_ECC01_MBECCFIR_MASK_FIR_LEN = 5181; static const uint64_t IDX_CEN_ECC01_MBECCFIR_WOF_FIR = 5182; static const uint64_t IDX_CEN_ECC01_MBECCFIR_WOF_FIR_LEN = 5183; static const uint64_t IDX_CEN_ECC01_MBMMRQ_SYMBOL_MAINTENANCE_MARK_VALUE = 5184; static const uint64_t IDX_CEN_ECC01_MBMMRQ_SYMBOL_MAINTENANCE_MARK_VALUE_LEN = 5185; static const uint64_t IDX_CEN_ECC01_MBMMRQ_CHIP_MAINTENANCE_MARK_VALUE = 5186; static const uint64_t IDX_CEN_ECC01_MBMMRQ_CHIP_MAINTENANCE_MARK_VALUE_LEN = 5187; static const uint64_t IDX_CEN_ECC01_MBMS0_SYMBOL_MARK_VALUE_FOR_RANKX = 5188; static const uint64_t IDX_CEN_ECC01_MBMS0_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5189; static const uint64_t IDX_CEN_ECC01_MBMS0_CHIP_MARK_VALUE_FOR_RANKX = 5190; static const uint64_t IDX_CEN_ECC01_MBMS0_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5191; static const uint64_t IDX_CEN_ECC01_MBMS1_SYMBOL_MARK_VALUE_FOR_RANKX = 5192; static const uint64_t IDX_CEN_ECC01_MBMS1_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5193; static const uint64_t IDX_CEN_ECC01_MBMS1_CHIP_MARK_VALUE_FOR_RANKX = 5194; static const uint64_t IDX_CEN_ECC01_MBMS1_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5195; static const uint64_t IDX_CEN_ECC01_MBMS2_SYMBOL_MARK_VALUE_FOR_RANKX = 5196; static const uint64_t IDX_CEN_ECC01_MBMS2_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5197; static const uint64_t IDX_CEN_ECC01_MBMS2_CHIP_MARK_VALUE_FOR_RANKX = 5198; static const uint64_t IDX_CEN_ECC01_MBMS2_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5199; static const uint64_t IDX_CEN_ECC01_MBMS3_SYMBOL_MARK_VALUE_FOR_RANKX = 5200; static const uint64_t IDX_CEN_ECC01_MBMS3_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5201; static const uint64_t IDX_CEN_ECC01_MBMS3_CHIP_MARK_VALUE_FOR_RANKX = 5202; static const uint64_t IDX_CEN_ECC01_MBMS3_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5203; static const uint64_t IDX_CEN_ECC01_MBMS4_SYMBOL_MARK_VALUE_FOR_RANKX = 5204; static const uint64_t IDX_CEN_ECC01_MBMS4_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5205; static const uint64_t IDX_CEN_ECC01_MBMS4_CHIP_MARK_VALUE_FOR_RANKX = 5206; static const uint64_t IDX_CEN_ECC01_MBMS4_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5207; static const uint64_t IDX_CEN_ECC01_MBMS5_SYMBOL_MARK_VALUE_FOR_RANKX = 5208; static const uint64_t IDX_CEN_ECC01_MBMS5_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5209; static const uint64_t IDX_CEN_ECC01_MBMS5_CHIP_MARK_VALUE_FOR_RANKX = 5210; static const uint64_t IDX_CEN_ECC01_MBMS5_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5211; static const uint64_t IDX_CEN_ECC01_MBMS6_SYMBOL_MARK_VALUE_FOR_RANKX = 5212; static const uint64_t IDX_CEN_ECC01_MBMS6_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5213; static const uint64_t IDX_CEN_ECC01_MBMS6_CHIP_MARK_VALUE_FOR_RANKX = 5214; static const uint64_t IDX_CEN_ECC01_MBMS6_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5215; static const uint64_t IDX_CEN_ECC01_MBMS7_SYMBOL_MARK_VALUE_FOR_RANKX = 5216; static const uint64_t IDX_CEN_ECC01_MBMS7_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5217; static const uint64_t IDX_CEN_ECC01_MBMS7_CHIP_MARK_VALUE_FOR_RANKX = 5218; static const uint64_t IDX_CEN_ECC01_MBMS7_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5219; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_ADDRESS = 5220; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_ADDRESS_LEN = 5221; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_ENABLE_RCE_INJECT = 5222; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_ENABLE_SCRUB_INJECT = 5223; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_READ1_ERROR_TYPE = 5224; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_READ1_ERROR_TYPE_LEN = 5225; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_READ2_ERROR_TYPE = 5226; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_READ2_ERROR_TYPE_LEN = 5227; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_READ3_ERROR_TYPE = 5228; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_READ3_ERROR_TYPE_LEN = 5229; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_BANK_MASK_SELECT = 5230; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_BANK_MASK_SELECT_LEN = 5231; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_ROW_MASK_SELECT = 5232; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_ROW_MASK_SELECT_LEN = 5233; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_COLUMN_MASK_SELECT = 5234; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_COLUMN_MASK_SELECT_LEN = 5235; static const uint64_t IDX_CEN_ECC01_MBRCEICRQ_ROW17_ADDRESS = 5236; static const uint64_t IDX_CEN_ECC01_MBSBS0_READ_BIT_STEER_MUX_SELECT_0 = 5237; static const uint64_t IDX_CEN_ECC01_MBSBS0_READ_BIT_STEER_MUX_SELECT_0_LEN = 5238; static const uint64_t IDX_CEN_ECC01_MBSBS0_READ_BIT_STEER_MUX_SELECT_1 = 5239; static const uint64_t IDX_CEN_ECC01_MBSBS0_READ_BIT_STEER_MUX_SELECT_1_LEN = 5240; static const uint64_t IDX_CEN_ECC01_MBSBS0_READ_BIT_STEER_MUX_SELECT_2 = 5241; static const uint64_t IDX_CEN_ECC01_MBSBS0_READ_BIT_STEER_MUX_SELECT_2_LEN = 5242; static const uint64_t IDX_CEN_ECC01_MBSBS1_READ_BIT_STEER_MUX_SELECT_0 = 5243; static const uint64_t IDX_CEN_ECC01_MBSBS1_READ_BIT_STEER_MUX_SELECT_0_LEN = 5244; static const uint64_t IDX_CEN_ECC01_MBSBS1_READ_BIT_STEER_MUX_SELECT_1 = 5245; static const uint64_t IDX_CEN_ECC01_MBSBS1_READ_BIT_STEER_MUX_SELECT_1_LEN = 5246; static const uint64_t IDX_CEN_ECC01_MBSBS1_READ_BIT_STEER_MUX_SELECT_2 = 5247; static const uint64_t IDX_CEN_ECC01_MBSBS1_READ_BIT_STEER_MUX_SELECT_2_LEN = 5248; static const uint64_t IDX_CEN_ECC01_MBSBS2_READ_BIT_STEER_MUX_SELECT_0 = 5249; static const uint64_t IDX_CEN_ECC01_MBSBS2_READ_BIT_STEER_MUX_SELECT_0_LEN = 5250; static const uint64_t IDX_CEN_ECC01_MBSBS2_READ_BIT_STEER_MUX_SELECT_1 = 5251; static const uint64_t IDX_CEN_ECC01_MBSBS2_READ_BIT_STEER_MUX_SELECT_1_LEN = 5252; static const uint64_t IDX_CEN_ECC01_MBSBS2_READ_BIT_STEER_MUX_SELECT_2 = 5253; static const uint64_t IDX_CEN_ECC01_MBSBS2_READ_BIT_STEER_MUX_SELECT_2_LEN = 5254; static const uint64_t IDX_CEN_ECC01_MBSBS3_READ_BIT_STEER_MUX_SELECT_0 = 5255; static const uint64_t IDX_CEN_ECC01_MBSBS3_READ_BIT_STEER_MUX_SELECT_0_LEN = 5256; static const uint64_t IDX_CEN_ECC01_MBSBS3_READ_BIT_STEER_MUX_SELECT_1 = 5257; static const uint64_t IDX_CEN_ECC01_MBSBS3_READ_BIT_STEER_MUX_SELECT_1_LEN = 5258; static const uint64_t IDX_CEN_ECC01_MBSBS3_READ_BIT_STEER_MUX_SELECT_2 = 5259; static const uint64_t IDX_CEN_ECC01_MBSBS3_READ_BIT_STEER_MUX_SELECT_2_LEN = 5260; static const uint64_t IDX_CEN_ECC01_MBSBS4_READ_BIT_STEER_MUX_SELECT_0 = 5261; static const uint64_t IDX_CEN_ECC01_MBSBS4_READ_BIT_STEER_MUX_SELECT_0_LEN = 5262; static const uint64_t IDX_CEN_ECC01_MBSBS4_READ_BIT_STEER_MUX_SELECT_1 = 5263; static const uint64_t IDX_CEN_ECC01_MBSBS4_READ_BIT_STEER_MUX_SELECT_1_LEN = 5264; static const uint64_t IDX_CEN_ECC01_MBSBS4_READ_BIT_STEER_MUX_SELECT_2 = 5265; static const uint64_t IDX_CEN_ECC01_MBSBS4_READ_BIT_STEER_MUX_SELECT_2_LEN = 5266; static const uint64_t IDX_CEN_ECC01_MBSBS5_READ_BIT_STEER_MUX_SELECT_0 = 5267; static const uint64_t IDX_CEN_ECC01_MBSBS5_READ_BIT_STEER_MUX_SELECT_0_LEN = 5268; static const uint64_t IDX_CEN_ECC01_MBSBS5_READ_BIT_STEER_MUX_SELECT_1 = 5269; static const uint64_t IDX_CEN_ECC01_MBSBS5_READ_BIT_STEER_MUX_SELECT_1_LEN = 5270; static const uint64_t IDX_CEN_ECC01_MBSBS5_READ_BIT_STEER_MUX_SELECT_2 = 5271; static const uint64_t IDX_CEN_ECC01_MBSBS5_READ_BIT_STEER_MUX_SELECT_2_LEN = 5272; static const uint64_t IDX_CEN_ECC01_MBSBS6_READ_BIT_STEER_MUX_SELECT_0 = 5273; static const uint64_t IDX_CEN_ECC01_MBSBS6_READ_BIT_STEER_MUX_SELECT_0_LEN = 5274; static const uint64_t IDX_CEN_ECC01_MBSBS6_READ_BIT_STEER_MUX_SELECT_1 = 5275; static const uint64_t IDX_CEN_ECC01_MBSBS6_READ_BIT_STEER_MUX_SELECT_1_LEN = 5276; static const uint64_t IDX_CEN_ECC01_MBSBS6_READ_BIT_STEER_MUX_SELECT_2 = 5277; static const uint64_t IDX_CEN_ECC01_MBSBS6_READ_BIT_STEER_MUX_SELECT_2_LEN = 5278; static const uint64_t IDX_CEN_ECC01_MBSBS7_READ_BIT_STEER_MUX_SELECT_0 = 5279; static const uint64_t IDX_CEN_ECC01_MBSBS7_READ_BIT_STEER_MUX_SELECT_0_LEN = 5280; static const uint64_t IDX_CEN_ECC01_MBSBS7_READ_BIT_STEER_MUX_SELECT_1 = 5281; static const uint64_t IDX_CEN_ECC01_MBSBS7_READ_BIT_STEER_MUX_SELECT_1_LEN = 5282; static const uint64_t IDX_CEN_ECC01_MBSBS7_READ_BIT_STEER_MUX_SELECT_2 = 5283; static const uint64_t IDX_CEN_ECC01_MBSBS7_READ_BIT_STEER_MUX_SELECT_2_LEN = 5284; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS0_CHIP_PARITY = 5285; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS0_SYMBOL_PARITY = 5286; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS0_PARITY = 5287; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS1_CHIP_PARITY = 5288; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS1_SYMBOL_PARITY = 5289; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS1_PARITY = 5290; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS2_CHIP_PARITY = 5291; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS2_SYMBOL_PARITY = 5292; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS2_PARITY = 5293; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS3_CHIP_PARITY = 5294; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS3_SYMBOL_PARITY = 5295; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS3_PARITY = 5296; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS4_CHIP_PARITY = 5297; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS4_SYMBOL_PARITY = 5298; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS4_PARITY = 5299; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS5_CHIP_PARITY = 5300; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS5_SYMBOL_PARITY = 5301; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS5_PARITY = 5302; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS6_CHIP_PARITY = 5303; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS6_SYMBOL_PARITY = 5304; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS6_PARITY = 5305; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS7_CHIP_PARITY = 5306; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS7_SYMBOL_PARITY = 5307; static const uint64_t IDX_CEN_ECC01_MBSECCERR0_MBMS7_PARITY = 5308; static const uint64_t IDX_CEN_ECC01_MBSECCERR1_MEMORY_BIT_STEER_PARITY = 5309; static const uint64_t IDX_CEN_ECC01_MBSECCERR1_MEMORY_BIT_STEER_PARITY_LEN = 5310; static const uint64_t IDX_CEN_ECC01_MBSECCERR1_MBMMR_PARITY = 5311; static const uint64_t IDX_CEN_ECC01_MBSECCERR1_MBRCEICR_PARITY = 5312; static const uint64_t IDX_CEN_ECC01_MBSECCQ_DISABLE_MEMORY_ECC_CHECK_CORRECT = 5313; static const uint64_t IDX_CEN_ECC01_MBSECCQ_DISABLE_MEMORY_ECC_CORRECT = 5314; static const uint64_t IDX_CEN_ECC01_MBSECCQ_RESERVED_2 = 5315; static const uint64_t IDX_CEN_ECC01_MBSECCQ_ENABLE_64BYTE_DATA_CHECKBIT_INVERSION = 5316; static const uint64_t IDX_CEN_ECC01_MBSECCQ_USE_MAINTENANCE_MARK = 5317; static const uint64_t IDX_CEN_ECC01_MBSECCQ_DISABLE_MARK_STORE_WRITE = 5318; static const uint64_t IDX_CEN_ECC01_MBSECCQ_ENABLE_FIRST_SHADOW_READ_UE = 5319; static const uint64_t IDX_CEN_ECC01_MBSECCQ_ECC_METADATA_MODE = 5320; static const uint64_t IDX_CEN_ECC01_MBSECCQ_ECC_METADATA_MODE_LEN = 5321; static const uint64_t IDX_CEN_ECC01_MBSECCQ_SINGLE_WIRE_MODE = 5322; static const uint64_t IDX_CEN_ECC01_MBSECCQ_INT_RESET_KEEPER = 5323; static const uint64_t IDX_CEN_ECC01_MBSECCQ_INJECT_SCOM_PARITY_ERROR = 5324; static const uint64_t IDX_CEN_ECC01_MBSECCQ_INJECT_MARK_STORE_SYMBOL_PARITY_ERROR = 5325; static const uint64_t IDX_CEN_ECC01_MBSECCQ_INJECT_MARK_STORE_CHIP_PARITY_ERROR = 5326; static const uint64_t IDX_CEN_ECC01_MBSECCQ_MBRCEICRQ_DATAPATH_PARITY_ERROR_INJECT = 5327; static const uint64_t IDX_CEN_ECC01_MBSECCQ_REPORT_RCE_ON_CORRECTIONS = 5328; static const uint64_t IDX_CEN_ECC01_MBSECCQ_RESERVED_17_23 = 5329; static const uint64_t IDX_CEN_ECC01_MBSECCQ_RESERVED_17_23_LEN = 5330; static const uint64_t IDX_CEN_ECC01_MBSMSRQ_MARK_VALUE = 5331; static const uint64_t IDX_CEN_ECC01_MBSMSRQ_MARK_VALUE_LEN = 5332; static const uint64_t IDX_CEN_ECC01_MBSMSRQ_MARK_SHADOW_RANK = 5333; static const uint64_t IDX_CEN_ECC01_MBSMSRQ_MARK_SHADOW_RANK_LEN = 5334; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MEMORY_MPE_RANK_0_7 = 5335; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MEMORY_MPE_RANK_0_7_LEN = 5336; static const uint64_t IDX_CEN_ECC23_MBECCFIR_RESERVED_8_15 = 5337; static const uint64_t IDX_CEN_ECC23_MBECCFIR_RESERVED_8_15_LEN = 5338; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MEMORY_NCE = 5339; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MEMORY_RCE = 5340; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MEMORY_SUE = 5341; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MEMORY_UE = 5342; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MAINT_MPE_RANK_0_7 = 5343; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MAINT_MPE_RANK_0_7_LEN = 5344; static const uint64_t IDX_CEN_ECC23_MBECCFIR_RESERVED_28_35 = 5345; static const uint64_t IDX_CEN_ECC23_MBECCFIR_RESERVED_28_35_LEN = 5346; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MAINTENANCE_NCE = 5347; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MAINTENANCE_SCE = 5348; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MAINTENANCE_MCE = 5349; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MAINTENANCE_RCE = 5350; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MAINTENANCE_SUE = 5351; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MAINTENANCE_UE = 5352; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MPE_DURING_USE_MAINTENANCE_MARK_MODE = 5353; static const uint64_t IDX_CEN_ECC23_MBECCFIR_PREFETCH_MEMORY_UE = 5354; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MEMORY_RCD_PARITY_ERROR = 5355; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MAINTENANCE_RCD_PARITY_ERROR = 5356; static const uint64_t IDX_CEN_ECC23_MBECCFIR_RECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR = 5357; static const uint64_t IDX_CEN_ECC23_MBECCFIR_UNRECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR = 5358; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MASKABLE_CONFIGURATION_REGISTER_PARITY_ERROR = 5359; static const uint64_t IDX_CEN_ECC23_MBECCFIR_ECC_DATAPATH_PARITY_ERROR = 5360; static const uint64_t IDX_CEN_ECC23_MBECCFIR_INTERNAL_SCOM_ERROR = 5361; static const uint64_t IDX_CEN_ECC23_MBECCFIR_INTERNAL_SCOM_ERROR_COPY = 5362; static const uint64_t IDX_CEN_ECC23_MBECCFIR_ACTION0_FIR = 5363; static const uint64_t IDX_CEN_ECC23_MBECCFIR_ACTION0_FIR_LEN = 5364; static const uint64_t IDX_CEN_ECC23_MBECCFIR_ACTION1_FIR = 5365; static const uint64_t IDX_CEN_ECC23_MBECCFIR_ACTION1_FIR_LEN = 5366; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MASK_FIR = 5367; static const uint64_t IDX_CEN_ECC23_MBECCFIR_MASK_FIR_LEN = 5368; static const uint64_t IDX_CEN_ECC23_MBECCFIR_WOF_FIR = 5369; static const uint64_t IDX_CEN_ECC23_MBECCFIR_WOF_FIR_LEN = 5370; static const uint64_t IDX_CEN_ECC23_MBMMRQ_SYMBOL_MAINTENANCE_MARK_VALUE = 5371; static const uint64_t IDX_CEN_ECC23_MBMMRQ_SYMBOL_MAINTENANCE_MARK_VALUE_LEN = 5372; static const uint64_t IDX_CEN_ECC23_MBMMRQ_CHIP_MAINTENANCE_MARK_VALUE = 5373; static const uint64_t IDX_CEN_ECC23_MBMMRQ_CHIP_MAINTENANCE_MARK_VALUE_LEN = 5374; static const uint64_t IDX_CEN_ECC23_MBMS0_SYMBOL_MARK_VALUE_FOR_RANKX = 5375; static const uint64_t IDX_CEN_ECC23_MBMS0_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5376; static const uint64_t IDX_CEN_ECC23_MBMS0_CHIP_MARK_VALUE_FOR_RANKX = 5377; static const uint64_t IDX_CEN_ECC23_MBMS0_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5378; static const uint64_t IDX_CEN_ECC23_MBMS1_SYMBOL_MARK_VALUE_FOR_RANKX = 5379; static const uint64_t IDX_CEN_ECC23_MBMS1_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5380; static const uint64_t IDX_CEN_ECC23_MBMS1_CHIP_MARK_VALUE_FOR_RANKX = 5381; static const uint64_t IDX_CEN_ECC23_MBMS1_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5382; static const uint64_t IDX_CEN_ECC23_MBMS2_SYMBOL_MARK_VALUE_FOR_RANKX = 5383; static const uint64_t IDX_CEN_ECC23_MBMS2_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5384; static const uint64_t IDX_CEN_ECC23_MBMS2_CHIP_MARK_VALUE_FOR_RANKX = 5385; static const uint64_t IDX_CEN_ECC23_MBMS2_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5386; static const uint64_t IDX_CEN_ECC23_MBMS3_SYMBOL_MARK_VALUE_FOR_RANKX = 5387; static const uint64_t IDX_CEN_ECC23_MBMS3_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5388; static const uint64_t IDX_CEN_ECC23_MBMS3_CHIP_MARK_VALUE_FOR_RANKX = 5389; static const uint64_t IDX_CEN_ECC23_MBMS3_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5390; static const uint64_t IDX_CEN_ECC23_MBMS4_SYMBOL_MARK_VALUE_FOR_RANKX = 5391; static const uint64_t IDX_CEN_ECC23_MBMS4_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5392; static const uint64_t IDX_CEN_ECC23_MBMS4_CHIP_MARK_VALUE_FOR_RANKX = 5393; static const uint64_t IDX_CEN_ECC23_MBMS4_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5394; static const uint64_t IDX_CEN_ECC23_MBMS5_SYMBOL_MARK_VALUE_FOR_RANKX = 5395; static const uint64_t IDX_CEN_ECC23_MBMS5_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5396; static const uint64_t IDX_CEN_ECC23_MBMS5_CHIP_MARK_VALUE_FOR_RANKX = 5397; static const uint64_t IDX_CEN_ECC23_MBMS5_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5398; static const uint64_t IDX_CEN_ECC23_MBMS6_SYMBOL_MARK_VALUE_FOR_RANKX = 5399; static const uint64_t IDX_CEN_ECC23_MBMS6_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5400; static const uint64_t IDX_CEN_ECC23_MBMS6_CHIP_MARK_VALUE_FOR_RANKX = 5401; static const uint64_t IDX_CEN_ECC23_MBMS6_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5402; static const uint64_t IDX_CEN_ECC23_MBMS7_SYMBOL_MARK_VALUE_FOR_RANKX = 5403; static const uint64_t IDX_CEN_ECC23_MBMS7_SYMBOL_MARK_VALUE_FOR_RANKX_LEN = 5404; static const uint64_t IDX_CEN_ECC23_MBMS7_CHIP_MARK_VALUE_FOR_RANKX = 5405; static const uint64_t IDX_CEN_ECC23_MBMS7_CHIP_MARK_VALUE_FOR_RANKX_LEN = 5406; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_ADDRESS = 5407; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_ADDRESS_LEN = 5408; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_ENABLE_RCE_INJECT = 5409; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_ENABLE_SCRUB_INJECT = 5410; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_READ1_ERROR_TYPE = 5411; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_READ1_ERROR_TYPE_LEN = 5412; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_READ2_ERROR_TYPE = 5413; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_READ2_ERROR_TYPE_LEN = 5414; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_READ3_ERROR_TYPE = 5415; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_READ3_ERROR_TYPE_LEN = 5416; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_BANK_MASK_SELECT = 5417; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_BANK_MASK_SELECT_LEN = 5418; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_ROW_MASK_SELECT = 5419; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_ROW_MASK_SELECT_LEN = 5420; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_COLUMN_MASK_SELECT = 5421; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_COLUMN_MASK_SELECT_LEN = 5422; static const uint64_t IDX_CEN_ECC23_MBRCEICRQ_ROW17_ADDRESS = 5423; static const uint64_t IDX_CEN_ECC23_MBSBS0_READ_BIT_STEER_MUX_SELECT_0 = 5424; static const uint64_t IDX_CEN_ECC23_MBSBS0_READ_BIT_STEER_MUX_SELECT_0_LEN = 5425; static const uint64_t IDX_CEN_ECC23_MBSBS0_READ_BIT_STEER_MUX_SELECT_1 = 5426; static const uint64_t IDX_CEN_ECC23_MBSBS0_READ_BIT_STEER_MUX_SELECT_1_LEN = 5427; static const uint64_t IDX_CEN_ECC23_MBSBS0_READ_BIT_STEER_MUX_SELECT_2 = 5428; static const uint64_t IDX_CEN_ECC23_MBSBS0_READ_BIT_STEER_MUX_SELECT_2_LEN = 5429; static const uint64_t IDX_CEN_ECC23_MBSBS1_READ_BIT_STEER_MUX_SELECT_0 = 5430; static const uint64_t IDX_CEN_ECC23_MBSBS1_READ_BIT_STEER_MUX_SELECT_0_LEN = 5431; static const uint64_t IDX_CEN_ECC23_MBSBS1_READ_BIT_STEER_MUX_SELECT_1 = 5432; static const uint64_t IDX_CEN_ECC23_MBSBS1_READ_BIT_STEER_MUX_SELECT_1_LEN = 5433; static const uint64_t IDX_CEN_ECC23_MBSBS1_READ_BIT_STEER_MUX_SELECT_2 = 5434; static const uint64_t IDX_CEN_ECC23_MBSBS1_READ_BIT_STEER_MUX_SELECT_2_LEN = 5435; static const uint64_t IDX_CEN_ECC23_MBSBS2_READ_BIT_STEER_MUX_SELECT_0 = 5436; static const uint64_t IDX_CEN_ECC23_MBSBS2_READ_BIT_STEER_MUX_SELECT_0_LEN = 5437; static const uint64_t IDX_CEN_ECC23_MBSBS2_READ_BIT_STEER_MUX_SELECT_1 = 5438; static const uint64_t IDX_CEN_ECC23_MBSBS2_READ_BIT_STEER_MUX_SELECT_1_LEN = 5439; static const uint64_t IDX_CEN_ECC23_MBSBS2_READ_BIT_STEER_MUX_SELECT_2 = 5440; static const uint64_t IDX_CEN_ECC23_MBSBS2_READ_BIT_STEER_MUX_SELECT_2_LEN = 5441; static const uint64_t IDX_CEN_ECC23_MBSBS3_READ_BIT_STEER_MUX_SELECT_0 = 5442; static const uint64_t IDX_CEN_ECC23_MBSBS3_READ_BIT_STEER_MUX_SELECT_0_LEN = 5443; static const uint64_t IDX_CEN_ECC23_MBSBS3_READ_BIT_STEER_MUX_SELECT_1 = 5444; static const uint64_t IDX_CEN_ECC23_MBSBS3_READ_BIT_STEER_MUX_SELECT_1_LEN = 5445; static const uint64_t IDX_CEN_ECC23_MBSBS3_READ_BIT_STEER_MUX_SELECT_2 = 5446; static const uint64_t IDX_CEN_ECC23_MBSBS3_READ_BIT_STEER_MUX_SELECT_2_LEN = 5447; static const uint64_t IDX_CEN_ECC23_MBSBS4_READ_BIT_STEER_MUX_SELECT_0 = 5448; static const uint64_t IDX_CEN_ECC23_MBSBS4_READ_BIT_STEER_MUX_SELECT_0_LEN = 5449; static const uint64_t IDX_CEN_ECC23_MBSBS4_READ_BIT_STEER_MUX_SELECT_1 = 5450; static const uint64_t IDX_CEN_ECC23_MBSBS4_READ_BIT_STEER_MUX_SELECT_1_LEN = 5451; static const uint64_t IDX_CEN_ECC23_MBSBS4_READ_BIT_STEER_MUX_SELECT_2 = 5452; static const uint64_t IDX_CEN_ECC23_MBSBS4_READ_BIT_STEER_MUX_SELECT_2_LEN = 5453; static const uint64_t IDX_CEN_ECC23_MBSBS5_READ_BIT_STEER_MUX_SELECT_0 = 5454; static const uint64_t IDX_CEN_ECC23_MBSBS5_READ_BIT_STEER_MUX_SELECT_0_LEN = 5455; static const uint64_t IDX_CEN_ECC23_MBSBS5_READ_BIT_STEER_MUX_SELECT_1 = 5456; static const uint64_t IDX_CEN_ECC23_MBSBS5_READ_BIT_STEER_MUX_SELECT_1_LEN = 5457; static const uint64_t IDX_CEN_ECC23_MBSBS5_READ_BIT_STEER_MUX_SELECT_2 = 5458; static const uint64_t IDX_CEN_ECC23_MBSBS5_READ_BIT_STEER_MUX_SELECT_2_LEN = 5459; static const uint64_t IDX_CEN_ECC23_MBSBS6_READ_BIT_STEER_MUX_SELECT_0 = 5460; static const uint64_t IDX_CEN_ECC23_MBSBS6_READ_BIT_STEER_MUX_SELECT_0_LEN = 5461; static const uint64_t IDX_CEN_ECC23_MBSBS6_READ_BIT_STEER_MUX_SELECT_1 = 5462; static const uint64_t IDX_CEN_ECC23_MBSBS6_READ_BIT_STEER_MUX_SELECT_1_LEN = 5463; static const uint64_t IDX_CEN_ECC23_MBSBS6_READ_BIT_STEER_MUX_SELECT_2 = 5464; static const uint64_t IDX_CEN_ECC23_MBSBS6_READ_BIT_STEER_MUX_SELECT_2_LEN = 5465; static const uint64_t IDX_CEN_ECC23_MBSBS7_READ_BIT_STEER_MUX_SELECT_0 = 5466; static const uint64_t IDX_CEN_ECC23_MBSBS7_READ_BIT_STEER_MUX_SELECT_0_LEN = 5467; static const uint64_t IDX_CEN_ECC23_MBSBS7_READ_BIT_STEER_MUX_SELECT_1 = 5468; static const uint64_t IDX_CEN_ECC23_MBSBS7_READ_BIT_STEER_MUX_SELECT_1_LEN = 5469; static const uint64_t IDX_CEN_ECC23_MBSBS7_READ_BIT_STEER_MUX_SELECT_2 = 5470; static const uint64_t IDX_CEN_ECC23_MBSBS7_READ_BIT_STEER_MUX_SELECT_2_LEN = 5471; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS0_CHIP_PARITY = 5472; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS0_SYMBOL_PARITY = 5473; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS0_PARITY = 5474; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS1_CHIP_PARITY = 5475; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS1_SYMBOL_PARITY = 5476; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS1_PARITY = 5477; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS2_CHIP_PARITY = 5478; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS2_SYMBOL_PARITY = 5479; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS2_PARITY = 5480; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS3_CHIP_PARITY = 5481; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS3_SYMBOL_PARITY = 5482; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS3_PARITY = 5483; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS4_CHIP_PARITY = 5484; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS4_SYMBOL_PARITY = 5485; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS4_PARITY = 5486; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS5_CHIP_PARITY = 5487; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS5_SYMBOL_PARITY = 5488; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS5_PARITY = 5489; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS6_CHIP_PARITY = 5490; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS6_SYMBOL_PARITY = 5491; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS6_PARITY = 5492; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS7_CHIP_PARITY = 5493; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS7_SYMBOL_PARITY = 5494; static const uint64_t IDX_CEN_ECC23_MBSECCERR0_MBMS7_PARITY = 5495; static const uint64_t IDX_CEN_ECC23_MBSECCERR1_MEMORY_BIT_STEER_PARITY = 5496; static const uint64_t IDX_CEN_ECC23_MBSECCERR1_MEMORY_BIT_STEER_PARITY_LEN = 5497; static const uint64_t IDX_CEN_ECC23_MBSECCERR1_MBMMR_PARITY = 5498; static const uint64_t IDX_CEN_ECC23_MBSECCERR1_MBRCEICR_PARITY = 5499; static const uint64_t IDX_CEN_ECC23_MBSECCQ_DISABLE_MEMORY_ECC_CHECK_CORRECT = 5500; static const uint64_t IDX_CEN_ECC23_MBSECCQ_DISABLE_MEMORY_ECC_CORRECT = 5501; static const uint64_t IDX_CEN_ECC23_MBSECCQ_RESERVED_2 = 5502; static const uint64_t IDX_CEN_ECC23_MBSECCQ_ENABLE_64BYTE_DATA_CHECKBIT_INVERSION = 5503; static const uint64_t IDX_CEN_ECC23_MBSECCQ_USE_MAINTENANCE_MARK = 5504; static const uint64_t IDX_CEN_ECC23_MBSECCQ_DISABLE_MARK_STORE_WRITE = 5505; static const uint64_t IDX_CEN_ECC23_MBSECCQ_ENABLE_FIRST_SHADOW_READ_UE = 5506; static const uint64_t IDX_CEN_ECC23_MBSECCQ_ECC_METADATA_MODE = 5507; static const uint64_t IDX_CEN_ECC23_MBSECCQ_ECC_METADATA_MODE_LEN = 5508; static const uint64_t IDX_CEN_ECC23_MBSECCQ_SINGLE_WIRE_MODE = 5509; static const uint64_t IDX_CEN_ECC23_MBSECCQ_INT_RESET_KEEPER = 5510; static const uint64_t IDX_CEN_ECC23_MBSECCQ_INJECT_SCOM_PARITY_ERROR = 5511; static const uint64_t IDX_CEN_ECC23_MBSECCQ_INJECT_MARK_STORE_SYMBOL_PARITY_ERROR = 5512; static const uint64_t IDX_CEN_ECC23_MBSECCQ_INJECT_MARK_STORE_CHIP_PARITY_ERROR = 5513; static const uint64_t IDX_CEN_ECC23_MBSECCQ_MBRCEICRQ_DATAPATH_PARITY_ERROR_INJECT = 5514; static const uint64_t IDX_CEN_ECC23_MBSECCQ_REPORT_RCE_ON_CORRECTIONS = 5515; static const uint64_t IDX_CEN_ECC23_MBSECCQ_RESERVED_17_23 = 5516; static const uint64_t IDX_CEN_ECC23_MBSECCQ_RESERVED_17_23_LEN = 5517; static const uint64_t IDX_CEN_ECC23_MBSMSRQ_MARK_VALUE = 5518; static const uint64_t IDX_CEN_ECC23_MBSMSRQ_MARK_VALUE_LEN = 5519; static const uint64_t IDX_CEN_ECC23_MBSMSRQ_MARK_SHADOW_RANK = 5520; static const uint64_t IDX_CEN_ECC23_MBSMSRQ_MARK_SHADOW_RANK_LEN = 5521; static const uint64_t IDX_CEN_MCBISTS23_MBMPERQ_RD_MPE_MASTER_RANK0 = 5522; static const uint64_t IDX_CEN_MCBISTS23_MBMPERQ_RD_MPE_DIMM_SELECT = 5523; static const uint64_t IDX_CEN_MCBISTS23_MBMPERQ_RD_MPE_MASTER_RANK1 = 5524; static const uint64_t IDX_CEN_MCBISTS23_MBMPERQ_RD_MPE_MASTER_RANK2 = 5525; static const uint64_t IDX_CEN_MCBISTS23_MBMPERQ_RD_MPE_SLAVE_RANK = 5526; static const uint64_t IDX_CEN_MCBISTS23_MBMPERQ_RD_MPE_SLAVE_RANK_LEN = 5527; static const uint64_t IDX_CEN_MCBISTS23_MBMPERQ_RD_MPE_BANK = 5528; static const uint64_t IDX_CEN_MCBISTS23_MBMPERQ_RD_MPE_BANK_LEN = 5529; static const uint64_t IDX_CEN_MCBISTS23_MBMPERQ_RD_MPE_ROW = 5530; static const uint64_t IDX_CEN_MCBISTS23_MBMPERQ_RD_MPE_ROW_LEN = 5531; static const uint64_t IDX_CEN_MCBISTS23_MBMPERQ_RD_MPE_COL = 5532; static const uint64_t IDX_CEN_MCBISTS23_MBMPERQ_RD_MPE_COL_LEN = 5533; static const uint64_t IDX_CEN_MCBISTS23_MBMPERQ_RD_MPE_ERR_OCCURRED_AFTER_UE_RETRY = 5534; static const uint64_t IDX_CEN_MCBISTS23_MBMPERQ_RD_MPE_ROW17 = 5535; static const uint64_t IDX_CEN_MCBISTS23_MBNCERQ_RD_NCE_MASTER_RANK0 = 5536; static const uint64_t IDX_CEN_MCBISTS23_MBNCERQ_RD_NCE_DIMM_SELECT = 5537; static const uint64_t IDX_CEN_MCBISTS23_MBNCERQ_RD_NCE_MASTER_RANK1 = 5538; static const uint64_t IDX_CEN_MCBISTS23_MBNCERQ_RD_NCE_MASTER_RANK2 = 5539; static const uint64_t IDX_CEN_MCBISTS23_MBNCERQ_RD_NCE_SLAVE_RANK = 5540; static const uint64_t IDX_CEN_MCBISTS23_MBNCERQ_RD_NCE_SLAVE_RANK_LEN = 5541; static const uint64_t IDX_CEN_MCBISTS23_MBNCERQ_RD_NCE_BANK = 5542; static const uint64_t IDX_CEN_MCBISTS23_MBNCERQ_RD_NCE_BANK_LEN = 5543; static const uint64_t IDX_CEN_MCBISTS23_MBNCERQ_RD_NCE_ROW = 5544; static const uint64_t IDX_CEN_MCBISTS23_MBNCERQ_RD_NCE_ROW_LEN = 5545; static const uint64_t IDX_CEN_MCBISTS23_MBNCERQ_RD_NCE_COL = 5546; static const uint64_t IDX_CEN_MCBISTS23_MBNCERQ_RD_NCE_COL_LEN = 5547; static const uint64_t IDX_CEN_MCBISTS23_MBNCERQ_RD_NCE_ERR_OCCURRED__AFTER_UE_RETRY = 5548; static const uint64_t IDX_CEN_MCBISTS23_MBNCERQ_RD_NCE_ROW17 = 5549; static const uint64_t IDX_CEN_MCBISTS23_MBRCERQ_RD_RCE_MASTER_RANK0 = 5550; static const uint64_t IDX_CEN_MCBISTS23_MBRCERQ_RD_RCE_DIMM_SELECT = 5551; static const uint64_t IDX_CEN_MCBISTS23_MBRCERQ_RD_RCE_MASTER_RANK1 = 5552; static const uint64_t IDX_CEN_MCBISTS23_MBRCERQ_RD_RCE_MASTER_RANK2 = 5553; static const uint64_t IDX_CEN_MCBISTS23_MBRCERQ_RD_RCE_SLAVE_RANK = 5554; static const uint64_t IDX_CEN_MCBISTS23_MBRCERQ_RD_RCE_SLAVE_RANK_LEN = 5555; static const uint64_t IDX_CEN_MCBISTS23_MBRCERQ_RD_RCE_BANK = 5556; static const uint64_t IDX_CEN_MCBISTS23_MBRCERQ_RD_RCE_BANK_LEN = 5557; static const uint64_t IDX_CEN_MCBISTS23_MBRCERQ_RD_RCE_ROW = 5558; static const uint64_t IDX_CEN_MCBISTS23_MBRCERQ_RD_RCE_ROW_LEN = 5559; static const uint64_t IDX_CEN_MCBISTS23_MBRCERQ_RD_RCE_COL = 5560; static const uint64_t IDX_CEN_MCBISTS23_MBRCERQ_RD_RCE_COL_LEN = 5561; static const uint64_t IDX_CEN_MCBISTS23_MBRCERQ_RD_RCE_ERR_OCCURRED_AFTER_UE_RETRY = 5562; static const uint64_t IDX_CEN_MCBISTS23_MBRCERQ_RD_RCE_ROW17 = 5563; static const uint64_t IDX_CEN_MCBISTS23_MBSEC0Q_SOFT_CE_COUNT = 5564; static const uint64_t IDX_CEN_MCBISTS23_MBSEC0Q_SOFT_CE_COUNT_LEN = 5565; static const uint64_t IDX_CEN_MCBISTS23_MBSEC0Q_INTERMITTENT_CE_COUNT = 5566; static const uint64_t IDX_CEN_MCBISTS23_MBSEC0Q_INTERMITTENT_CE_COUNT_LEN = 5567; static const uint64_t IDX_CEN_MCBISTS23_MBSEC0Q_HARD_CE_COUNT = 5568; static const uint64_t IDX_CEN_MCBISTS23_MBSEC0Q_HARD_CE_COUNT_LEN = 5569; static const uint64_t IDX_CEN_MCBISTS23_MBSEC0Q_SCE_COUNT = 5570; static const uint64_t IDX_CEN_MCBISTS23_MBSEC0Q_SCE_COUNT_LEN = 5571; static const uint64_t IDX_CEN_MCBISTS23_MBSEC0Q_MCE_COUNT = 5572; static const uint64_t IDX_CEN_MCBISTS23_MBSEC0Q_MCE_COUNT_LEN = 5573; static const uint64_t IDX_CEN_MCBISTS23_MBSEC1Q_RCE_COUNT = 5574; static const uint64_t IDX_CEN_MCBISTS23_MBSEC1Q_RCE_COUNT_LEN = 5575; static const uint64_t IDX_CEN_MCBISTS23_MBSEC1Q_MPE_COUNT = 5576; static const uint64_t IDX_CEN_MCBISTS23_MBSEC1Q_MPE_COUNT_LEN = 5577; static const uint64_t IDX_CEN_MCBISTS23_MBSEC1Q_UE_COUNT = 5578; static const uint64_t IDX_CEN_MCBISTS23_MBSEC1Q_UE_COUNT_LEN = 5579; static const uint64_t IDX_CEN_MCBISTS23_MBSEVRQ_ERR_VECTOR0 = 5580; static const uint64_t IDX_CEN_MCBISTS23_MBSEVRQ_ERR_VECTOR0_LEN = 5581; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRACT0_SCOM_PAR_ERRORS = 5582; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRACT0_MBX_PAR_ERRORS = 5583; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRACT0_RESERVED_2_14 = 5584; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRACT0_RESERVED_2_14_LEN = 5585; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRACT0_INTERNAL_SCOM_ERROR = 5586; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRACT0_INTERNAL_SCOM_ERROR_CLONE = 5587; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRACT1_SCOM_PAR_ERRORS = 5588; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRACT1_MBX_PAR_ERRORS = 5589; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRACT1_RESERVED_2_14 = 5590; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRACT1_RESERVED_2_14_LEN = 5591; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRACT1_INTERNAL_SCOM_ERROR = 5592; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRACT1_INTERNAL_SCOM_ERROR_CLONE = 5593; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRMASK_SCOM_PAR_ERRORS = 5594; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRMASK_MBX_PAR_ERRORS = 5595; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRMASK_RESERVED_2_14 = 5596; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRMASK_RESERVED_2_14_LEN = 5597; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRMASK_INTERNAL_SCOM_ERROR = 5598; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRMASK_INTERNAL_SCOM_ERROR_CLONE = 5599; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRQ_SCOM_PAR_ERRORS = 5600; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRQ_MBX_PAR_ERRORS = 5601; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRQ_DRAM_EVENTN_BIT0 = 5602; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRQ_DRAM_EVENTN_BIT1 = 5603; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRQ_RESERVED_4_14 = 5604; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRQ_RESERVED_4_14_LEN = 5605; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRQ_INTERNAL_SCOM_ERROR = 5606; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRQ_INTERNAL_SCOM_ERROR_CLONE = 5607; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRWOF_SCOM_PAR_ERRORS = 5608; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRWOF_MBX_PAR_ERRORS = 5609; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRWOF_RESERVED_2_14 = 5610; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRWOF_RESERVED_2_14_LEN = 5611; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRWOF_INTERNAL_SCOM_ERROR = 5612; static const uint64_t IDX_CEN_MCBISTS23_MBSFIRWOF_INTERNAL_SCOM_ERROR_CLONE = 5613; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_0_ERROR_COUNT = 5614; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_0_ERROR_COUNT_LEN = 5615; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_1_ERROR_COUNT = 5616; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_1_ERROR_COUNT_LEN = 5617; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_2_ERROR_COUNT = 5618; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_2_ERROR_COUNT_LEN = 5619; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_3_ERROR_COUNT = 5620; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_3_ERROR_COUNT_LEN = 5621; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_4_ERROR_COUNT = 5622; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_4_ERROR_COUNT_LEN = 5623; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_5_ERROR_COUNT = 5624; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_5_ERROR_COUNT_LEN = 5625; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_6_ERROR_COUNT = 5626; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_6_ERROR_COUNT_LEN = 5627; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_7_ERROR_COUNT = 5628; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_7_ERROR_COUNT_LEN = 5629; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_8_ERROR_COUNT = 5630; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_8_ERROR_COUNT_LEN = 5631; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_9_ERROR_COUNT = 5632; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_9_ERROR_COUNT_LEN = 5633; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_10_ERROR_COUNT = 5634; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_10_ERROR_COUNT_LEN = 5635; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_11_ERROR_COUNT = 5636; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_11_ERROR_COUNT_LEN = 5637; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_12_ERROR_COUNT = 5638; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_12_ERROR_COUNT_LEN = 5639; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_13_ERROR_COUNT = 5640; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_13_ERROR_COUNT_LEN = 5641; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_14_ERROR_COUNT = 5642; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_14_ERROR_COUNT_LEN = 5643; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_15_ERROR_COUNT = 5644; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_15_ERROR_COUNT_LEN = 5645; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_16_ERROR_COUNT = 5646; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_16_ERROR_COUNT_LEN = 5647; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_17_ERROR_COUNT = 5648; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_17_ERROR_COUNT_LEN = 5649; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_18_ERROR_COUNT = 5650; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_18_ERROR_COUNT_LEN = 5651; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_19_ERROR_COUNT = 5652; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_19_ERROR_COUNT_LEN = 5653; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_20_ERROR_COUNT = 5654; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_20_ERROR_COUNT_LEN = 5655; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_21_ERROR_COUNT = 5656; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_21_ERROR_COUNT_LEN = 5657; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_22_ERROR_COUNT = 5658; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_22_ERROR_COUNT_LEN = 5659; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_23_ERROR_COUNT = 5660; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_23_ERROR_COUNT_LEN = 5661; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_24_ERROR_COUNT = 5662; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_24_ERROR_COUNT_LEN = 5663; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_25_ERROR_COUNT = 5664; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_25_ERROR_COUNT_LEN = 5665; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_26_ERROR_COUNT = 5666; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_26_ERROR_COUNT_LEN = 5667; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_27_ERROR_COUNT = 5668; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_27_ERROR_COUNT_LEN = 5669; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_28_ERROR_COUNT = 5670; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_28_ERROR_COUNT_LEN = 5671; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_29_ERROR_COUNT = 5672; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_29_ERROR_COUNT_LEN = 5673; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_30_ERROR_COUNT = 5674; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_30_ERROR_COUNT_LEN = 5675; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_31_ERROR_COUNT = 5676; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_31_ERROR_COUNT_LEN = 5677; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_32_ERROR_COUNT = 5678; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_32_ERROR_COUNT_LEN = 5679; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_33_ERROR_COUNT = 5680; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_33_ERROR_COUNT_LEN = 5681; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_34_ERROR_COUNT = 5682; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_34_ERROR_COUNT_LEN = 5683; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_35_ERROR_COUNT = 5684; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_35_ERROR_COUNT_LEN = 5685; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_36_ERROR_COUNT = 5686; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_36_ERROR_COUNT_LEN = 5687; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_37_ERROR_COUNT = 5688; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_37_ERROR_COUNT_LEN = 5689; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_38ERROR_COUNT = 5690; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_38ERROR_COUNT_LEN = 5691; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_39_ERROR_COUNT = 5692; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_39_ERROR_COUNT_LEN = 5693; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_40_ERROR_COUNT = 5694; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_40_ERROR_COUNT_LEN = 5695; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_41_ERROR_COUNT = 5696; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_41_ERROR_COUNT_LEN = 5697; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_42_ERROR_COUNT = 5698; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_42_ERROR_COUNT_LEN = 5699; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_43_ERROR_COUNT = 5700; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_43_ERROR_COUNT_LEN = 5701; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_44_ERROR_COUNT = 5702; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_44_ERROR_COUNT_LEN = 5703; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_45_ERROR_COUNT = 5704; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_45_ERROR_COUNT_LEN = 5705; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_46_ERROR_COUNT = 5706; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_46_ERROR_COUNT_LEN = 5707; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_47_ERROR_COUNT = 5708; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_47_ERROR_COUNT_LEN = 5709; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_48_ERROR_COUNT = 5710; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_48_ERROR_COUNT_LEN = 5711; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_49_ERROR_COUNT = 5712; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_49_ERROR_COUNT_LEN = 5713; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_50_ERROR_COUNT = 5714; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_50_ERROR_COUNT_LEN = 5715; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_51_ERROR_COUNT = 5716; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_51_ERROR_COUNT_LEN = 5717; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_52_ERROR_COUNT = 5718; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_52_ERROR_COUNT_LEN = 5719; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_53_ERROR_COUNT = 5720; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_53_ERROR_COUNT_LEN = 5721; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_54_ERROR_COUNT = 5722; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_54_ERROR_COUNT_LEN = 5723; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_55_ERROR_COUNT = 5724; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_55_ERROR_COUNT_LEN = 5725; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_56_ERROR_COUNT = 5726; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_56_ERROR_COUNT_LEN = 5727; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_57_ERROR_COUNT = 5728; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_57_ERROR_COUNT_LEN = 5729; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_58_ERROR_COUNT = 5730; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_58_ERROR_COUNT_LEN = 5731; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_59_ERROR_COUNT = 5732; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_59_ERROR_COUNT_LEN = 5733; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_60_ERROR_COUNT = 5734; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_60_ERROR_COUNT_LEN = 5735; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_61_ERROR_COUNT = 5736; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_61_ERROR_COUNT_LEN = 5737; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_62_ERROR_COUNT = 5738; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_62_ERROR_COUNT_LEN = 5739; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_63_ERROR_COUNT = 5740; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_63_ERROR_COUNT_LEN = 5741; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_64_ERROR_COUNT = 5742; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_64_ERROR_COUNT_LEN = 5743; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_65_ERROR_COUNT = 5744; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_65_ERROR_COUNT_LEN = 5745; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_66_ERROR_COUNT = 5746; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_66_ERROR_COUNT_LEN = 5747; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_67_ERROR_COUNT = 5748; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_67_ERROR_COUNT_LEN = 5749; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_68_ERROR_COUNT = 5750; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_68_ERROR_COUNT_LEN = 5751; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_69_ERROR_COUNT = 5752; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_69_ERROR_COUNT_LEN = 5753; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_70_ERROR_COUNT = 5754; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_70_ERROR_COUNT_LEN = 5755; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_71_ERROR_COUNT = 5756; static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_71_ERROR_COUNT_LEN = 5757; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_SOFT_CE_COUNT_THRESHOLD_ATTN_STOP = 5758; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_INTERMITTENT_CE_COUNT_THRESHOLD_ATTN_STOP = 5759; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_HARD_CE_COUNT_THRESHOLD_ATTN_STOP = 5760; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_RCE_COUNT_THRESHOLD_ATTN_STOP = 5761; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_SOFT_CE_COUNT_THRESHOLD = 5762; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_SOFT_CE_COUNT_THRESHOLD_LEN = 5763; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_INTERMITTENT_CE_COUNT_THRESHOLD = 5764; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_INTERMITTENT_CE_COUNT_THRESHOLD_LEN = 5765; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_HARD_CE_COUNT_THRESHOLD = 5766; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_HARD_CE_COUNT_THRESHOLD_LEN = 5767; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_RETRY_CE_COUNT_THRESHOLD = 5768; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_RETRY_CE_COUNT_THRESHOLD_LEN = 5769; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_RESET_KEEPER = 5770; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_RESET_ALL_ERROR_COUNT_REGISTERS = 5771; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_DISABLE_RESET_ERROR_REG_RANK_END = 5772; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_SOFT_CE_INCR_SYMBOL_COUNT = 5773; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_INTERMIT_INCR_SYMBOL_COUNT = 5774; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_HARD_CE_INCR_SYMBOL_COUNT = 5775; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_MCE_INCR_SYMBOL_COUNT = 5776; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_UE_TRAP = 5777; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_CFG_MAINT_RCE_WITH_CE = 5778; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_RESERVED_61 = 5779; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_INTERMITTENT_NCE_INJECT = 5780; static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ_RESERVED_63 = 5781; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBDRCRQ_CFG_DATA_ROT = 5782; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBDRCRQ_CFG_DATA_ROT_LEN = 5783; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBDRCRQ_CFG_DATA_ROT_SEED = 5784; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBDRCRQ_CFG_DATA_ROT_SEED_LEN = 5785; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBDRCRQ_CFG_INVERT_DATA = 5786; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBDRCRQ_DD2_HW234828_ROUTE_NONMAINT_DATA_TO_MAINTBUFF_EN = 5787; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBDRCRQ_RESERVED_22_63 = 5788; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBDRCRQ_RESERVED_22_63_LEN = 5789; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBDRSRQ_CFG_DATA_ROT_SEED = 5790; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBDRSRQ_CFG_DATA_ROT_SEED_LEN = 5791; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD0Q_CFG_FIXED_SEED = 5792; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD0Q_CFG_FIXED_SEED_LEN = 5793; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD1Q_CFG_FIXED_SEED = 5794; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD1Q_CFG_FIXED_SEED_LEN = 5795; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD2Q_CFG_FIXED_SEED = 5796; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD2Q_CFG_FIXED_SEED_LEN = 5797; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD3Q_CFG_FIXED_SEED = 5798; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD3Q_CFG_FIXED_SEED_LEN = 5799; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD4Q_CFG_FIXED_SEED = 5800; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD4Q_CFG_FIXED_SEED_LEN = 5801; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD5Q_CFG_FIXED_SEED = 5802; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD5Q_CFG_FIXED_SEED_LEN = 5803; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD6Q_CFG_FIXED_SEED = 5804; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD6Q_CFG_FIXED_SEED_LEN = 5805; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD7Q_CFG_FIXED_SEED = 5806; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD7Q_CFG_FIXED_SEED_LEN = 5807; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED1 = 5808; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED1_LEN = 5809; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED2 = 5810; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED2_LEN = 5811; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED3 = 5812; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED3_LEN = 5813; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED4 = 5814; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED4_LEN = 5815; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED5 = 5816; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED5_LEN = 5817; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED6 = 5818; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED6_LEN = 5819; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED7 = 5820; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED7_LEN = 5821; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED8 = 5822; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED8_LEN = 5823; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED1 = 5824; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED1_LEN = 5825; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED2 = 5826; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED2_LEN = 5827; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED3 = 5828; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED3_LEN = 5829; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED4 = 5830; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED4_LEN = 5831; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED5 = 5832; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED5_LEN = 5833; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED6 = 5834; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED6_LEN = 5835; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED7 = 5836; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED7_LEN = 5837; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED8 = 5838; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED8_LEN = 5839; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED0 = 5840; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED0_LEN = 5841; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED1 = 5842; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED1_LEN = 5843; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED2 = 5844; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED2_LEN = 5845; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED3 = 5846; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED3_LEN = 5847; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED4 = 5848; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED4_LEN = 5849; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED5 = 5850; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED5_LEN = 5851; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED6 = 5852; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED6_LEN = 5853; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED7 = 5854; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED7_LEN = 5855; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED0 = 5856; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED0_LEN = 5857; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED1 = 5858; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED1_LEN = 5859; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED2 = 5860; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED2_LEN = 5861; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED3 = 5862; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED3_LEN = 5863; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED4 = 5864; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED4_LEN = 5865; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED5 = 5866; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED5_LEN = 5867; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED6 = 5868; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED6_LEN = 5869; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED7 = 5870; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED7_LEN = 5871; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED0 = 5872; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED0_LEN = 5873; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED1 = 5874; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED1_LEN = 5875; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED2 = 5876; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED2_LEN = 5877; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED3 = 5878; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED3_LEN = 5879; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED4 = 5880; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED4_LEN = 5881; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED5 = 5882; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED5_LEN = 5883; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED6 = 5884; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED6_LEN = 5885; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED7 = 5886; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED7_LEN = 5887; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED0 = 5888; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED0_LEN = 5889; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED1 = 5890; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED1_LEN = 5891; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED2 = 5892; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED2_LEN = 5893; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED3 = 5894; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED3_LEN = 5895; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED4 = 5896; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED4_LEN = 5897; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED5 = 5898; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED5_LEN = 5899; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED6 = 5900; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED6_LEN = 5901; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED7 = 5902; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED7_LEN = 5903; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED0 = 5904; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED0_LEN = 5905; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED1 = 5906; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED1_LEN = 5907; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED2 = 5908; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED2_LEN = 5909; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED3 = 5910; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED3_LEN = 5911; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED4 = 5912; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED4_LEN = 5913; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED5 = 5914; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED5_LEN = 5915; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED6 = 5916; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED6_LEN = 5917; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED7 = 5918; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED7_LEN = 5919; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED0 = 5920; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED0_LEN = 5921; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED1 = 5922; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED1_LEN = 5923; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED2 = 5924; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED2_LEN = 5925; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED3 = 5926; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED3_LEN = 5927; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED4 = 5928; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED4_LEN = 5929; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED5 = 5930; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED5_LEN = 5931; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED6 = 5932; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED6_LEN = 5933; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED7 = 5934; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED7_LEN = 5935; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED0 = 5936; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED0_LEN = 5937; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED1 = 5938; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED1_LEN = 5939; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED2 = 5940; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED2_LEN = 5941; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED3 = 5942; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED3_LEN = 5943; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED4 = 5944; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED4_LEN = 5945; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED5 = 5946; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED5_LEN = 5947; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED6 = 5948; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED6_LEN = 5949; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED7 = 5950; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED7_LEN = 5951; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED0 = 5952; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED0_LEN = 5953; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED1 = 5954; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED1_LEN = 5955; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED2 = 5956; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED2_LEN = 5957; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED3 = 5958; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED3_LEN = 5959; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED4 = 5960; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED4_LEN = 5961; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED5 = 5962; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED5_LEN = 5963; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED6 = 5964; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED6_LEN = 5965; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED7 = 5966; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED7_LEN = 5967; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED0 = 5968; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED0_LEN = 5969; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED1 = 5970; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED1_LEN = 5971; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED2 = 5972; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED2_LEN = 5973; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED3 = 5974; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED3_LEN = 5975; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED4 = 5976; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED4_LEN = 5977; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED5 = 5978; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED5_LEN = 5979; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED6 = 5980; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED6_LEN = 5981; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED7 = 5982; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED7_LEN = 5983; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED0 = 5984; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED0_LEN = 5985; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED1 = 5986; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED1_LEN = 5987; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED2 = 5988; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED2_LEN = 5989; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED3 = 5990; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED3_LEN = 5991; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED4 = 5992; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED4_LEN = 5993; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED5 = 5994; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED5_LEN = 5995; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED6 = 5996; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED6_LEN = 5997; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED7 = 5998; static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED7_LEN = 5999; static const uint64_t IDX_CEN_MCBISTS23_MBUERQ_RD_UE_MASTER_RANK0 = 6000; static const uint64_t IDX_CEN_MCBISTS23_MBUERQ_RD_UE_DIMM_SELECT = 6001; static const uint64_t IDX_CEN_MCBISTS23_MBUERQ_RD_UE_MASTER_RANK1 = 6002; static const uint64_t IDX_CEN_MCBISTS23_MBUERQ_RD_UE_MASTER_RANK2 = 6003; static const uint64_t IDX_CEN_MCBISTS23_MBUERQ_RD_UE_SLAVE_RANK = 6004; static const uint64_t IDX_CEN_MCBISTS23_MBUERQ_RD_UE_SLAVE_RANK_LEN = 6005; static const uint64_t IDX_CEN_MCBISTS23_MBUERQ_RD_UE_BANK = 6006; static const uint64_t IDX_CEN_MCBISTS23_MBUERQ_RD_UE_BANK_LEN = 6007; static const uint64_t IDX_CEN_MCBISTS23_MBUERQ_RD_UE_ROW = 6008; static const uint64_t IDX_CEN_MCBISTS23_MBUERQ_RD_UE_ROW_LEN = 6009; static const uint64_t IDX_CEN_MCBISTS23_MBUERQ_RD_UE_COL = 6010; static const uint64_t IDX_CEN_MCBISTS23_MBUERQ_RD_UE_COL_LEN = 6011; static const uint64_t IDX_CEN_MCBISTS23_MBUERQ_RESERVED_40 = 6012; static const uint64_t IDX_CEN_MCBISTS23_MBUERQ_RD_UE_ROW17 = 6013; static const uint64_t IDX_CEN_MCBISTS23_MBXERRINJQ_RCMD_ERR_INJ_MODE = 6014; static const uint64_t IDX_CEN_MCBISTS23_MBXERRINJQ_RCMD_ERR_INJ = 6015; static const uint64_t IDX_CEN_MCBISTS23_MBXERRINJQ_WRD_CE_ERR_INJ_MODE = 6016; static const uint64_t IDX_CEN_MCBISTS23_MBXERRINJQ_WRD_CE_ERR_INJ = 6017; static const uint64_t IDX_CEN_MCBISTS23_MBXERRINJQ_WRD_UE_ERR_INJ_MODE = 6018; static const uint64_t IDX_CEN_MCBISTS23_MBXERRINJQ_WRD_UE_ERR_INJ = 6019; static const uint64_t IDX_CEN_MCBISTS23_MBXERRINJQ_MAINT_CE_ERR_INJ_MODE = 6020; static const uint64_t IDX_CEN_MCBISTS23_MBXERRINJQ_MAINT_CE_ERR_INJ = 6021; static const uint64_t IDX_CEN_MCBISTS23_MBXERRINJQ_MAINT_UE_ERR_INJ_MODE = 6022; static const uint64_t IDX_CEN_MCBISTS23_MBXERRINJQ_MAINT_UE_ERR_INJ = 6023; static const uint64_t IDX_CEN_MCBISTS23_MBXERRINJQ_SCOM_PE_ERR_INJ_MODE = 6024; static const uint64_t IDX_CEN_MCBISTS23_MBXERRINJQ_SCOM_PE_ERR_INJ = 6025; static const uint64_t IDX_CEN_MCBISTS23_MBXERRINJQ_RESERVED_12_63 = 6026; static const uint64_t IDX_CEN_MCBISTS23_MBXERRINJQ_RESERVED_12_63_LEN = 6027; static const uint64_t IDX_CEN_MCBISTS23_MBXERRSTATQ_WDONE_PAR_ERROR = 6028; static const uint64_t IDX_CEN_MCBISTS23_MBXERRSTATQ_RDTAG_RDCHECK_ERROR = 6029; static const uint64_t IDX_CEN_MCBISTS23_MBXERRSTATQ_RDTAG_PAR_ERROR = 6030; static const uint64_t IDX_CEN_MCBISTS23_MBXERRSTATQ_RDTAG_PAR_RC_ERROR = 6031; static const uint64_t IDX_CEN_MCBISTS23_MBXERRSTATQ_RESERVED_4_63 = 6032; static const uint64_t IDX_CEN_MCBISTS23_MBXERRSTATQ_RESERVED_4_63_LEN = 6033; static const uint64_t IDX_CEN_MCBISTS23_MCBCMA1Q_COMPARE_MASK_A = 6034; static const uint64_t IDX_CEN_MCBISTS23_MCBCMA1Q_COMPARE_MASK_A_LEN = 6035; static const uint64_t IDX_CEN_MCBISTS23_MCBCMABQ_COMPARE_MASK_A = 6036; static const uint64_t IDX_CEN_MCBISTS23_MCBCMABQ_COMPARE_MASK_A_LEN = 6037; static const uint64_t IDX_CEN_MCBISTS23_MCBCMABQ_COMPARE_MASK_B = 6038; static const uint64_t IDX_CEN_MCBISTS23_MCBCMABQ_COMPARE_MASK_B_LEN = 6039; static const uint64_t IDX_CEN_MCBISTS23_MCBCMABQ_CFG_STORE_FAIL = 6040; static const uint64_t IDX_CEN_MCBISTS23_MCBCMABQ_MCBIST_ENABLE_CE_TRAP = 6041; static const uint64_t IDX_CEN_MCBISTS23_MCBCMABQ_MCBIST_ENABLE_MPE_TRAP = 6042; static const uint64_t IDX_CEN_MCBISTS23_MCBCMABQ_ENABLE_UE_TRAP = 6043; static const uint64_t IDX_CEN_MCBISTS23_MCBCMABQ_MCBIST_STOP_ON_NTH_FAIL = 6044; static const uint64_t IDX_CEN_MCBISTS23_MCBCMABQ_ARRAY_READ_ENABLE = 6045; static const uint64_t IDX_CEN_MCBISTS23_MCBCMABQ_RESERVED_38_63 = 6046; static const uint64_t IDX_CEN_MCBISTS23_MCBCMABQ_RESERVED_38_63_LEN = 6047; static const uint64_t IDX_CEN_MCBISTS23_MCBCMB1Q_COMPARE_MASK_B = 6048; static const uint64_t IDX_CEN_MCBISTS23_MCBCMB1Q_COMPARE_MASK_B_LEN = 6049; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA1Q_ERROR_MAP_PORTA_RNK0 = 6050; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA1Q_ERROR_MAP_PORTA_RNK0_LEN = 6051; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA1Q_ERROR_MAP_PORTA_RNK1 = 6052; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA1Q_ERROR_MAP_PORTA_RNK1_LEN = 6053; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA1Q_ERROR_MAP_PORTA_RNK2 = 6054; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA1Q_ERROR_MAP_PORTA_RNK2_LEN = 6055; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA1Q_RESERVED_60_63 = 6056; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA1Q_RESERVED_60_63_LEN = 6057; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA2Q_ERROR_MAP_PORTA_RNK3 = 6058; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA2Q_ERROR_MAP_PORTA_RNK3_LEN = 6059; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA2Q_ERROR_MAP_PORTA_RNK4 = 6060; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA2Q_ERROR_MAP_PORTA_RNK4_LEN = 6061; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA2Q_ERROR_MAP_PORTA_RNK5 = 6062; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA2Q_ERROR_MAP_PORTA_RNK5_LEN = 6063; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA2Q_RESERVED_60_63 = 6064; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA2Q_RESERVED_60_63_LEN = 6065; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA3Q_ERROR_MAP_PORTA_RNK6 = 6066; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA3Q_ERROR_MAP_PORTA_RNK6_LEN = 6067; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA3Q_ERROR_MAP_PORTA_RNK7 = 6068; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA3Q_ERROR_MAP_PORTA_RNK7_LEN = 6069; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA3Q_RESERVED_40_63 = 6070; static const uint64_t IDX_CEN_MCBISTS23_MCBEMA3Q_RESERVED_40_63_LEN = 6071; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB1Q_ERROR_MAP_PORTB_RNK0 = 6072; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB1Q_ERROR_MAP_PORTB_RNK0_LEN = 6073; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB1Q_ERROR_MAP_PORTB_RNK1 = 6074; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB1Q_ERROR_MAP_PORTB_RNK1_LEN = 6075; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB1Q_ERROR_MAP_PORTB_RNK2 = 6076; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB1Q_ERROR_MAP_PORTB_RNK2_LEN = 6077; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB1Q_RESERVED_60_63 = 6078; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB1Q_RESERVED_60_63_LEN = 6079; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB2Q_ERROR_MAP_PORTB_RNK3 = 6080; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB2Q_ERROR_MAP_PORTB_RNK3_LEN = 6081; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB2Q_ERROR_MAP_PORTB_RNK4 = 6082; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB2Q_ERROR_MAP_PORTB_RNK4_LEN = 6083; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB2Q_ERROR_MAP_PORTB_RNK5 = 6084; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB2Q_ERROR_MAP_PORTB_RNK5_LEN = 6085; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB2Q_RESERVED_60_63 = 6086; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB2Q_RESERVED_60_63_LEN = 6087; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB3Q_ERROR_MAP_PORTB_RNK6 = 6088; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB3Q_ERROR_MAP_PORTB_RNK6_LEN = 6089; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB3Q_ERROR_MAP_PORTB_RNK7 = 6090; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB3Q_ERROR_MAP_PORTB_RNK7_LEN = 6091; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB3Q_RESERVED_40_63 = 6092; static const uint64_t IDX_CEN_MCBISTS23_MCBEMB3Q_RESERVED_40_63_LEN = 6093; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATAQ_PORTA_CE_ERR = 6094; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATAQ_PORTA_UE_ERR = 6095; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATAQ_PORTA_ERR_TRAP_OVERFLOW = 6096; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATAQ_PORTA_CNTL_TRAP_SUBTST_NUM = 6097; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATAQ_PORTA_CNTL_TRAP_SUBTST_NUM_LEN = 6098; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATAQ_PORTA_ERR_LOG_PTR = 6099; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATAQ_PORTA_ERR_LOG_PTR_LEN = 6100; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATAQ_RESERVED_11_23 = 6101; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATAQ_RESERVED_11_23_LEN = 6102; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATBQ_PORTB_CE_ERR = 6103; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATBQ_PORTB_UE_ERR = 6104; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATBQ_PORTB_ERR_TRAP_OVERFLOW = 6105; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATBQ_PORTB_CNTL_TRAP_SUBTST_NUM = 6106; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATBQ_PORTB_CNTL_TRAP_SUBTST_NUM_LEN = 6107; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATBQ_PORTB_ERR_LOG_PTR = 6108; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATBQ_PORTB_ERR_LOG_PTR_LEN = 6109; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATBQ_RESERVED_11_23 = 6110; static const uint64_t IDX_CEN_MCBISTS23_MCBSTATBQ_RESERVED_11_23_LEN = 6111; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR0 = 6112; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR0_LEN = 6113; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR1 = 6114; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR1_LEN = 6115; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR2 = 6116; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR2_LEN = 6117; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR3 = 6118; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR3_LEN = 6119; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR4 = 6120; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR4_LEN = 6121; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR5 = 6122; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR5_LEN = 6123; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR6 = 6124; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR6_LEN = 6125; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR7 = 6126; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR7_LEN = 6127; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR8 = 6128; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR8_LEN = 6129; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q_RESERVED_63 = 6130; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR9 = 6131; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR9_LEN = 6132; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR10 = 6133; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR10_LEN = 6134; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR11 = 6135; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR11_LEN = 6136; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR12 = 6137; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR12_LEN = 6138; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR13 = 6139; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR13_LEN = 6140; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR14 = 6141; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR14_LEN = 6142; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR15 = 6143; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR15_LEN = 6144; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR16 = 6145; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR16_LEN = 6146; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR17 = 6147; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR17_LEN = 6148; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q_ERR_CNTR_OVERFLOW = 6149; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR18 = 6150; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR18_LEN = 6151; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR19 = 6152; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR19_LEN = 6153; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA3Q_RESERVED_14_63 = 6154; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA3Q_RESERVED_14_63_LEN = 6155; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR0 = 6156; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR0_LEN = 6157; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR1 = 6158; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR1_LEN = 6159; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR2 = 6160; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR2_LEN = 6161; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR3 = 6162; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR3_LEN = 6163; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR4 = 6164; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR4_LEN = 6165; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR5 = 6166; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR5_LEN = 6167; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR6 = 6168; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR6_LEN = 6169; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR7 = 6170; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR7_LEN = 6171; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR8 = 6172; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR8_LEN = 6173; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q_RESERVED_63 = 6174; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR9 = 6175; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR9_LEN = 6176; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR10 = 6177; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR10_LEN = 6178; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR11 = 6179; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR11_LEN = 6180; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR12 = 6181; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR12_LEN = 6182; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR13 = 6183; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR13_LEN = 6184; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR14 = 6185; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR14_LEN = 6186; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR15 = 6187; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR15_LEN = 6188; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR16 = 6189; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR16_LEN = 6190; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR17 = 6191; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR17_LEN = 6192; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q_ERR_CNTR_OVERFLOW = 6193; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR18 = 6194; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR18_LEN = 6195; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR19 = 6196; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR19_LEN = 6197; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB3Q_RESERVED_14_63 = 6198; static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB3Q_RESERVED_14_63_LEN = 6199; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA0_DATA = 6200; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA0_DATA_LEN = 6201; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA1_DATA = 6202; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA1_DATA_LEN = 6203; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA2_DATA = 6204; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA2_DATA_LEN = 6205; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA3_DATA = 6206; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA3_DATA_LEN = 6207; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA4_DATA = 6208; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA4_DATA_LEN = 6209; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA5_DATA = 6210; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA5_DATA_LEN = 6211; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA6_DATA = 6212; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA6_DATA_LEN = 6213; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA7_DATA = 6214; static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA7_DATA_LEN = 6215; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA0_DATA = 6216; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA0_DATA_LEN = 6217; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA1_DATA = 6218; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA1_DATA_LEN = 6219; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA2_DATA = 6220; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA2_DATA_LEN = 6221; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA3_DATA = 6222; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA3_DATA_LEN = 6223; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA4_DATA = 6224; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA4_DATA_LEN = 6225; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA5_DATA = 6226; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA5_DATA_LEN = 6227; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA6_DATA = 6228; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA6_DATA_LEN = 6229; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA7_DATA = 6230; static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA7_DATA_LEN = 6231; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA0_DATA = 6232; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA0_DATA_LEN = 6233; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA1_DATA = 6234; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA1_DATA_LEN = 6235; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA2_DATA = 6236; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA2_DATA_LEN = 6237; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA3_DATA = 6238; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA3_DATA_LEN = 6239; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA4_DATA = 6240; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA4_DATA_LEN = 6241; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA5_DATA = 6242; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA5_DATA_LEN = 6243; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA6_DATA = 6244; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA6_DATA_LEN = 6245; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA7_DATA = 6246; static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA7_DATA_LEN = 6247; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA0_DATA = 6248; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA0_DATA_LEN = 6249; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA1_DATA = 6250; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA1_DATA_LEN = 6251; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA2_DATA = 6252; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA2_DATA_LEN = 6253; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA3_DATA = 6254; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA3_DATA_LEN = 6255; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA4_DATA = 6256; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA4_DATA_LEN = 6257; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA5_DATA = 6258; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA5_DATA_LEN = 6259; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA6_DATA = 6260; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA6_DATA_LEN = 6261; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA7_DATA = 6262; static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA7_DATA_LEN = 6263; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA0_DATA = 6264; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA0_DATA_LEN = 6265; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA1_DATA = 6266; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA1_DATA_LEN = 6267; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA2_DATA = 6268; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA2_DATA_LEN = 6269; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA3_DATA = 6270; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA3_DATA_LEN = 6271; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA4_DATA = 6272; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA4_DATA_LEN = 6273; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA5_DATA = 6274; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA5_DATA_LEN = 6275; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA6_DATA = 6276; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA6_DATA_LEN = 6277; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA7_DATA = 6278; static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA7_DATA_LEN = 6279; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA0_DATA = 6280; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA0_DATA_LEN = 6281; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA1_DATA = 6282; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA1_DATA_LEN = 6283; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA2_DATA = 6284; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA2_DATA_LEN = 6285; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA3_DATA = 6286; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA3_DATA_LEN = 6287; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA4_DATA = 6288; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA4_DATA_LEN = 6289; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA5_DATA = 6290; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA5_DATA_LEN = 6291; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA6_DATA = 6292; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA6_DATA_LEN = 6293; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA7_DATA = 6294; static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA7_DATA_LEN = 6295; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA0_DATA = 6296; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA0_DATA_LEN = 6297; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA1_DATA = 6298; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA1_DATA_LEN = 6299; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA2_DATA = 6300; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA2_DATA_LEN = 6301; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA3_DATA = 6302; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA3_DATA_LEN = 6303; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA4_DATA = 6304; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA4_DATA_LEN = 6305; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA5_DATA = 6306; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA5_DATA_LEN = 6307; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA6_DATA = 6308; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA6_DATA_LEN = 6309; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA7_DATA = 6310; static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA7_DATA_LEN = 6311; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA0_DATA = 6312; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA0_DATA_LEN = 6313; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA1_DATA = 6314; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA1_DATA_LEN = 6315; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA2_DATA = 6316; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA2_DATA_LEN = 6317; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA3_DATA = 6318; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA3_DATA_LEN = 6319; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA4_DATA = 6320; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA4_DATA_LEN = 6321; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA5_DATA = 6322; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA5_DATA_LEN = 6323; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA6_DATA = 6324; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA6_DATA_LEN = 6325; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA7_DATA = 6326; static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA7_DATA_LEN = 6327; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA0_DATA = 6328; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA0_DATA_LEN = 6329; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA1_DATA = 6330; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA1_DATA_LEN = 6331; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA2_DATA = 6332; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA2_DATA_LEN = 6333; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA3_DATA = 6334; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA3_DATA_LEN = 6335; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA4_DATA = 6336; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA4_DATA_LEN = 6337; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA5_DATA = 6338; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA5_DATA_LEN = 6339; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA6_DATA = 6340; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA6_DATA_LEN = 6341; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA7_DATA = 6342; static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA7_DATA_LEN = 6343; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA0_DATA = 6344; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA0_DATA_LEN = 6345; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA1_DATA = 6346; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA1_DATA_LEN = 6347; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA2_DATA = 6348; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA2_DATA_LEN = 6349; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA3_DATA = 6350; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA3_DATA_LEN = 6351; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA4_DATA = 6352; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA4_DATA_LEN = 6353; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA5_DATA = 6354; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA5_DATA_LEN = 6355; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA6_DATA = 6356; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA6_DATA_LEN = 6357; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA7_DATA = 6358; static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA7_DATA_LEN = 6359; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA0_DATA = 6360; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA0_DATA_LEN = 6361; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA1_DATA = 6362; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA1_DATA_LEN = 6363; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA2_DATA = 6364; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA2_DATA_LEN = 6365; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA3_DATA = 6366; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA3_DATA_LEN = 6367; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA4_DATA = 6368; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA4_DATA_LEN = 6369; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA5_DATA = 6370; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA5_DATA_LEN = 6371; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA6_DATA = 6372; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA6_DATA_LEN = 6373; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA7_DATA = 6374; static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA7_DATA_LEN = 6375; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA0_DATA = 6376; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA0_DATA_LEN = 6377; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA1_DATA = 6378; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA1_DATA_LEN = 6379; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA2_DATA = 6380; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA2_DATA_LEN = 6381; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA3_DATA = 6382; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA3_DATA_LEN = 6383; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA4_DATA = 6384; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA4_DATA_LEN = 6385; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA5_DATA = 6386; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA5_DATA_LEN = 6387; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA6_DATA = 6388; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA6_DATA_LEN = 6389; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA7_DATA = 6390; static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA7_DATA_LEN = 6391; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA0_DATA = 6392; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA0_DATA_LEN = 6393; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA1_DATA = 6394; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA1_DATA_LEN = 6395; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA2_DATA = 6396; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA2_DATA_LEN = 6397; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA3_DATA = 6398; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA3_DATA_LEN = 6399; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA4_DATA = 6400; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA4_DATA_LEN = 6401; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA5_DATA = 6402; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA5_DATA_LEN = 6403; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA6_DATA = 6404; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA6_DATA_LEN = 6405; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA7_DATA = 6406; static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA7_DATA_LEN = 6407; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA0_DATA = 6408; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA0_DATA_LEN = 6409; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA1_DATA = 6410; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA1_DATA_LEN = 6411; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA2_DATA = 6412; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA2_DATA_LEN = 6413; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA3_DATA = 6414; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA3_DATA_LEN = 6415; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA4_DATA = 6416; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA4_DATA_LEN = 6417; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA5_DATA = 6418; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA5_DATA_LEN = 6419; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA6_DATA = 6420; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA6_DATA_LEN = 6421; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA7_DATA = 6422; static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA7_DATA_LEN = 6423; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA0_DATA = 6424; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA0_DATA_LEN = 6425; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA1_DATA = 6426; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA1_DATA_LEN = 6427; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA2_DATA = 6428; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA2_DATA_LEN = 6429; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA3_DATA = 6430; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA3_DATA_LEN = 6431; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA4_DATA = 6432; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA4_DATA_LEN = 6433; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA5_DATA = 6434; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA5_DATA_LEN = 6435; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA6_DATA = 6436; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA6_DATA_LEN = 6437; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA7_DATA = 6438; static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA7_DATA_LEN = 6439; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA0_DATA = 6440; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA0_DATA_LEN = 6441; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA1_DATA = 6442; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA1_DATA_LEN = 6443; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA2_DATA = 6444; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA2_DATA_LEN = 6445; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA3_DATA = 6446; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA3_DATA_LEN = 6447; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA4_DATA = 6448; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA4_DATA_LEN = 6449; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA5_DATA = 6450; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA5_DATA_LEN = 6451; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA6_DATA = 6452; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA6_DATA_LEN = 6453; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA7_DATA = 6454; static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA7_DATA_LEN = 6455; static const uint64_t IDX_CEN_MBIERPT0_MBISTAT_PARITY_ERROR = 6456; static const uint64_t IDX_CEN_MBIERPT0_MBICRCSYN_PARITY_ERROR = 6457; static const uint64_t IDX_CEN_MBIERPT0_MBIERRINJ_PARITY_ERROR = 6458; static const uint64_t IDX_CEN_MBIERPT0_MBIFPGAINTR_PARITY_ERROR = 6459; static const uint64_t IDX_CEN_MBIERPT0_CRCG_DATAFLOW_PARITY_ERROR = 6460; static const uint64_t IDX_CEN_MBIERPT0_ECCG_DATAFLOW_PARITY_ERROR = 6461; static const uint64_t IDX_CEN_MBIERPT0_US_CHINIT_READY_TIMEOUT_ERROR = 6462; static const uint64_t IDX_CEN_MBIERPT0_DS_FRAME_START_TIMEOUT_ERROR = 6463; static const uint64_t IDX_CEN_MBIERPT0_DS_NULL_PACKET_TIMEOUT_ERROR = 6464; static const uint64_t IDX_CEN_MBIERPT0_DS_ACK_PACKET_TIMEOUT_ERROR = 6465; static const uint64_t IDX_CEN_MBIERPT0_FRTL_SM_PARITY_ERROR = 6466; static const uint64_t IDX_CEN_MBIERPT0_FL_SM_PARITY_ERROR = 6467; static const uint64_t IDX_CEN_MBIERPT0_GLOBAL_SM_PARITY_ERROR = 6468; static const uint64_t IDX_CEN_MBIERPT0_REPLAY0_SM_PARITY_ERROR = 6469; static const uint64_t IDX_CEN_MBIERPT0_REPLAY1_SM_PARITY_ERROR = 6470; static const uint64_t IDX_CEN_MBIERPT0_REPLAY2_SM_PARITY_ERROR = 6471; static const uint64_t IDX_CEN_MBIERPT0_REPLAY3_SM_PARITY_ERROR = 6472; static const uint64_t IDX_CEN_MBIERPT0_REPLAY4_SM_PARITY_ERROR = 6473; static const uint64_t IDX_CEN_MBIERPT0_REPLAY5_SM_PARITY_ERROR = 6474; static const uint64_t IDX_CEN_MBIERPT0_REPLAY6_SM_PARITY_ERROR = 6475; static const uint64_t IDX_CEN_MBIERPT0_REPLAY7_SM_PARITY_ERROR = 6476; static const uint64_t IDX_CEN_MBIERPT0_REPLAY8_SM_PARITY_ERROR = 6477; static const uint64_t IDX_CEN_MBIERPT0_REPLAY9_SM_PARITY_ERROR = 6478; static const uint64_t IDX_CEN_MBIERPT0_REPLAY10_SM_PARITY_ERROR = 6479; static const uint64_t IDX_CEN_MBIERPT0_REPLAY11_SM_PARITY_ERROR = 6480; static const uint64_t IDX_CEN_MBIERPT0_REPLAY12_SM_PARITY_ERROR = 6481; static const uint64_t IDX_CEN_MBIERPT0_REPLAY13_SM_PARITY_ERROR = 6482; static const uint64_t IDX_CEN_MBIERPT0_REPLAY14_SM_PARITY_ERROR = 6483; static const uint64_t IDX_CEN_MBIERPT0_REPLAY15_SM_PARITY_ERROR = 6484; static const uint64_t IDX_CEN_MBIERPT0_REPLAY16_SM_PARITY_ERROR = 6485; static const uint64_t IDX_CEN_MBIERPT0_REPLAY17_SM_PARITY_ERROR = 6486; static const uint64_t IDX_CEN_MBIERPT0_REPLAY18_SM_PARITY_ERROR = 6487; static const uint64_t IDX_CEN_MBIERPT0_REPLAY19_SM_PARITY_ERROR = 6488; static const uint64_t IDX_CEN_MBIERPT0_REPLAY20_SM_PARITY_ERROR = 6489; static const uint64_t IDX_CEN_MBIERPT0_REPLAY21_SM_PARITY_ERROR = 6490; static const uint64_t IDX_CEN_MBIERPT0_REPLAY22_SM_PARITY_ERROR = 6491; static const uint64_t IDX_CEN_MBIERPT0_REPLAY23_SM_PARITY_ERROR = 6492; static const uint64_t IDX_CEN_MBIERPT0_REPLAY24_SM_PARITY_ERROR = 6493; static const uint64_t IDX_CEN_MBIERPT0_REPLAY25_SM_PARITY_ERROR = 6494; static const uint64_t IDX_CEN_MBIERPT0_REPLAY26_SM_PARITY_ERROR = 6495; static const uint64_t IDX_CEN_MBIERPT0_REPLAY27_SM_PARITY_ERROR = 6496; static const uint64_t IDX_CEN_MBIERPT0_REPLAY28_SM_PARITY_ERROR = 6497; static const uint64_t IDX_CEN_MBIERPT0_REPLAY29_SM_PARITY_ERROR = 6498; static const uint64_t IDX_CEN_MBIERPT0_REPLAY30_SM_PARITY_ERROR = 6499; static const uint64_t IDX_CEN_MBIERPT0_REPLAY31_SM_PARITY_ERROR = 6500; static const uint64_t IDX_CEN_MBICFGQ_FORCE_CHANNEL_FAIL = 6501; static const uint64_t IDX_CEN_MBICFGQ_REPLAY_CRC_DISABLE = 6502; static const uint64_t IDX_CEN_MBICFGQ_REPLAY_NOACK_DISABLE = 6503; static const uint64_t IDX_CEN_MBICFGQ_REPLAY_OUTOFORDER_DISABLE = 6504; static const uint64_t IDX_CEN_MBICFGQ_FORCE_LFSR_REPLAY = 6505; static const uint64_t IDX_CEN_MBICFGQ_CRC_CHECK_DISABLE = 6506; static const uint64_t IDX_CEN_MBICFGQ_ECC_CHECK_DISABLE = 6507; static const uint64_t IDX_CEN_MBICFGQ_FORCE_FRAME_LOCK = 6508; static const uint64_t IDX_CEN_MBICFGQ_FORCE_FRTL = 6509; static const uint64_t IDX_CEN_MBICFGQ_AUTO_FRTL_DISABLE = 6510; static const uint64_t IDX_CEN_MBICFGQ_MANUAL_FRTL_VALUE = 6511; static const uint64_t IDX_CEN_MBICFGQ_MANUAL_FRTL_VALUE_LEN = 6512; static const uint64_t IDX_CEN_MBICFGQ_MANUAL_FRTL_DONE = 6513; static const uint64_t IDX_CEN_MBICFGQ_ECC_CORRECT_DISABLE = 6514; static const uint64_t IDX_CEN_MBICFGQ_SPARE1 = 6515; static const uint64_t IDX_CEN_MBICFGQ_LANE_VOTING_BYPASS = 6516; static const uint64_t IDX_CEN_MBICFGQ_BAD_LANE_VALUE = 6517; static const uint64_t IDX_CEN_MBICFGQ_BAD_LANE_VALUE_LEN = 6518; static const uint64_t IDX_CEN_MBICFGQ_BAD_LANE_VOTING_DISABLE = 6519; static const uint64_t IDX_CEN_MBICFGQ_NO_FORWARD_PROGRESS_TIMEOUT_VALUE = 6520; static const uint64_t IDX_CEN_MBICFGQ_NO_FORWARD_PROGRESS_TIMEOUT_VALUE_LEN = 6521; static const uint64_t IDX_CEN_MBICFGQ_PERFORMANCE_DEGRADATION_PERCENT_SELECT = 6522; static const uint64_t IDX_CEN_MBICFGQ_PERFORMANCE_DEGRADATION_PERCENT_SELECT_LEN = 6523; static const uint64_t IDX_CEN_MBICFGQ_CHANNEL_INITIALIZATION_STATE_MACHINE_TIMEOUT_VALUE = 6524; static const uint64_t IDX_CEN_MBICFGQ_CHANNEL_INITIALIZATION_STATE_MACHINE_TIMEOUT_VALUE_LEN = 6525; static const uint64_t IDX_CEN_MBICFGQ_MBI_RESET_KEEPER = 6526; static const uint64_t IDX_CEN_MBICFGQ_FAULT_LINE_ERROR_ENABLE = 6527; static const uint64_t IDX_CEN_MBICFGQ_DEBUG_BUS_WAT_CONTROL = 6528; static const uint64_t IDX_CEN_MBICFGQ_SPARE3 = 6529; static const uint64_t IDX_CEN_MBICFGQ_SPARE3_LEN = 6530; static const uint64_t IDX_CEN_MBICRCSYNQ_VALID = 6531; static const uint64_t IDX_CEN_MBICRCSYNQ_FIRST = 6532; static const uint64_t IDX_CEN_MBICRCSYNQ_AUTO_RESET_DISABLE = 6533; static const uint64_t IDX_CEN_MBICRCSYNQ_DS_SYNDROME = 6534; static const uint64_t IDX_CEN_MBICRCSYNQ_DS_SYNDROME_LEN = 6535; static const uint64_t IDX_CEN_MBIERRINJQ_FRAME_CRC_ERROR_INJECT_MODE = 6536; static const uint64_t IDX_CEN_MBIERRINJQ_FRAME_CRC_ERROR_INJECT = 6537; static const uint64_t IDX_CEN_MBIERRINJQ_REPLAY_BUFFER_ERROR_INJECT_MODE = 6538; static const uint64_t IDX_CEN_MBIERRINJQ_REPLAY_BUFFER_ECC_CE_INJECT = 6539; static const uint64_t IDX_CEN_MBIERRINJQ_REPLAY_BUFFER_ECC_UE_INJECT = 6540; static const uint64_t IDX_CEN_MBIERRINJQ_DATA_FLOW_PARITY_ERROR_INJECT_MODE = 6541; static const uint64_t IDX_CEN_MBIERRINJQ_DATA_FLOW_PARITY_ERROR_INJECT = 6542; static const uint64_t IDX_CEN_MBIERRINJQ_DEAD_FRAME_CRC_ERROR_INJECT = 6543; static const uint64_t IDX_CEN_MBIFIRACT0_ACTION_0 = 6544; static const uint64_t IDX_CEN_MBIFIRACT0_ACTION_0_LEN = 6545; static const uint64_t IDX_CEN_MBIFIRACT1_ACTION_1 = 6546; static const uint64_t IDX_CEN_MBIFIRACT1_ACTION_1_LEN = 6547; static const uint64_t IDX_CEN_MBIFIRMASK_REPLAY_TIMEOUT = 6548; static const uint64_t IDX_CEN_MBIFIRMASK_CHANNEL_FAIL = 6549; static const uint64_t IDX_CEN_MBIFIRMASK_CRC_ERROR = 6550; static const uint64_t IDX_CEN_MBIFIRMASK_FRAME_NOACK = 6551; static const uint64_t IDX_CEN_MBIFIRMASK_SEQID_OUT_OF_ORDER = 6552; static const uint64_t IDX_CEN_MBIFIRMASK_REPLAY_BUFFER_ECC_CE = 6553; static const uint64_t IDX_CEN_MBIFIRMASK_REPLAY_BUFFER_ECC_UE = 6554; static const uint64_t IDX_CEN_MBIFIRMASK_MBI_CHINIT_STATE_MACHINE_TIMEOUT = 6555; static const uint64_t IDX_CEN_MBIFIRMASK_MBI_INTERNAL_CONTROL_PARITY_ERROR = 6556; static const uint64_t IDX_CEN_MBIFIRMASK_MBI_DATA_FLOW_PARITY_ERROR = 6557; static const uint64_t IDX_CEN_MBIFIRMASK_CRC_PERFORMANCE_DEGRADATION = 6558; static const uint64_t IDX_CEN_MBIFIRMASK_HOST_MC_CHECKSTOP = 6559; static const uint64_t IDX_CEN_MBIFIRMASK_HOST_MC_TRACESTOP = 6560; static const uint64_t IDX_CEN_MBIFIRMASK_CHANNEL_INTERLOCK_FAIL = 6561; static const uint64_t IDX_CEN_MBIFIRMASK_HOST_MC_LOCAL_CHECKSTOP = 6562; static const uint64_t IDX_CEN_MBIFIRMASK_FRTL_COUNTER_OVERFLOW = 6563; static const uint64_t IDX_CEN_MBIFIRMASK_SCOM_REGISTER_PARITY_ERROR = 6564; static const uint64_t IDX_CEN_MBIFIRMASK_IO_FAULT = 6565; static const uint64_t IDX_CEN_MBIFIRMASK_MULTIPLE_REPLAY = 6566; static const uint64_t IDX_CEN_MBIFIRMASK_MBICFG_PARITY_SCOM_ERROR = 6567; static const uint64_t IDX_CEN_MBIFIRMASK_BUFFER_OVERRUN_ERROR = 6568; static const uint64_t IDX_CEN_MBIFIRMASK_WAT_EVENT = 6569; static const uint64_t IDX_CEN_MBIFIRMASK_RESERVED_2 = 6570; static const uint64_t IDX_CEN_MBIFIRMASK_RESERVED_3 = 6571; static const uint64_t IDX_CEN_MBIFIRMASK_RESERVED_4 = 6572; static const uint64_t IDX_CEN_MBIFIRMASK_INTERNAL_SCOM_ERROR_CLONE = 6573; static const uint64_t IDX_CEN_MBIFIRMASK_INTERNAL_SCOM_ERROR_CLONE_COPY = 6574; static const uint64_t IDX_CEN_MBIFIRQ_REPLAY_TIMEOUT = 6575; static const uint64_t IDX_CEN_MBIFIRQ_CHANNEL_FAIL = 6576; static const uint64_t IDX_CEN_MBIFIRQ_CRC_ERROR = 6577; static const uint64_t IDX_CEN_MBIFIRQ_FRAME_NOACK = 6578; static const uint64_t IDX_CEN_MBIFIRQ_SEQID_OUT_OF_ORDER = 6579; static const uint64_t IDX_CEN_MBIFIRQ_REPLAY_BUFFER_ECC_CE = 6580; static const uint64_t IDX_CEN_MBIFIRQ_REPLAY_BUFFER_ECC_UE = 6581; static const uint64_t IDX_CEN_MBIFIRQ_MBI_STATE_MACHINE_TIMEOUT = 6582; static const uint64_t IDX_CEN_MBIFIRQ_MBI_INTERNAL_CONTROL_PARITY_ERROR = 6583; static const uint64_t IDX_CEN_MBIFIRQ_MBI_DATA_FLOW_PARITY_ERROR = 6584; static const uint64_t IDX_CEN_MBIFIRQ_CRC_PERFORMANCE_DEGRADATION = 6585; static const uint64_t IDX_CEN_MBIFIRQ_HOST_MC_GLOBAL_CHECKSTOP = 6586; static const uint64_t IDX_CEN_MBIFIRQ_HOST_MC_TRACESTOP = 6587; static const uint64_t IDX_CEN_MBIFIRQ_CHANNEL_INTERLOCK_FAIL = 6588; static const uint64_t IDX_CEN_MBIFIRQ_HOST_MC_LOCAL_CHECKSTOP = 6589; static const uint64_t IDX_CEN_MBIFIRQ_FRTL_CONTER_OVERFLOW = 6590; static const uint64_t IDX_CEN_MBIFIRQ_SCOM_REGISTER_PARITY_ERROR = 6591; static const uint64_t IDX_CEN_MBIFIRQ_IO_FAULT = 6592; static const uint64_t IDX_CEN_MBIFIRQ_MULTIPLE_REPLAY = 6593; static const uint64_t IDX_CEN_MBIFIRQ_MBICFG_PARITY_SCOM_ERROR = 6594; static const uint64_t IDX_CEN_MBIFIRQ_BUFFER_OVERRUN_ERROR = 6595; static const uint64_t IDX_CEN_MBIFIRQ_WAT_EVENT = 6596; static const uint64_t IDX_CEN_MBIFIRQ_RESERVED_2 = 6597; static const uint64_t IDX_CEN_MBIFIRQ_RESERVED_3 = 6598; static const uint64_t IDX_CEN_MBIFIRQ_RESERVED_4 = 6599; static const uint64_t IDX_CEN_MBIFIRQ_INTERNAL_SCOM_ERROR_CLONE = 6600; static const uint64_t IDX_CEN_MBIFIRQ_INTERNAL_SCOM_ERROR_CLONE_COPY = 6601; static const uint64_t IDX_CEN_MBIFPGAINTRQ_FPGA_INTERRUPT_ENABLE = 6602; static const uint64_t IDX_CEN_MBIFPGAINTRQ_FPGA_INTERRUPT_TRIGGER = 6603; static const uint64_t IDX_CEN_MBIFPGAINTRQ_FPGA_INTERRUPT_FENCE_DISABLE = 6604; static const uint64_t IDX_CEN_MBISTATQ_FRAME_LOCK_PASS = 6605; static const uint64_t IDX_CEN_MBISTATQ_FRAME_LOCK_FAIL = 6606; static const uint64_t IDX_CEN_MBISTATQ_FRTL_PASS = 6607; static const uint64_t IDX_CEN_MBISTATQ_FRTL_FAIL = 6608; static const uint64_t IDX_CEN_MBISTATQ_REPLAY_IN_PROGRESS = 6609; static const uint64_t IDX_CEN_MBISTATQ_OPERATING_FRTL_VALUE = 6610; static const uint64_t IDX_CEN_MBISTATQ_OPERATING_FRTL_VALUE_LEN = 6611; static const uint64_t IDX_CEN_MBISTATQ_DMI_EDI_FENCE = 6612; static const uint64_t IDX_CEN_MBISTATQ_CHAN_INTERLOCK_PASS = 6613; static const uint64_t IDX_CEN_MBISTATQ_CHAN_INTERLOCK_FAIL = 6614; static const uint64_t IDX_CEN_MBISTATQ_SPARE0 = 6615; static const uint64_t IDX_CEN_MBIFIRWOF_REPLAY_TIMEOUT = 6616; static const uint64_t IDX_CEN_MBIFIRWOF_CHANNEL_FAIL = 6617; static const uint64_t IDX_CEN_MBIFIRWOF_CRC_ERROR = 6618; static const uint64_t IDX_CEN_MBIFIRWOF_FRAME_NOACK = 6619; static const uint64_t IDX_CEN_MBIFIRWOF_SEQID_OUT_OF_ORDER = 6620; static const uint64_t IDX_CEN_MBIFIRWOF_REPLAY_BUFFER_ECC_CE = 6621; static const uint64_t IDX_CEN_MBIFIRWOF_REPLAY_BUFFER_ECC_UE = 6622; static const uint64_t IDX_CEN_MBIFIRWOF_MBI_STATE_MACHINE_TIMEOUT = 6623; static const uint64_t IDX_CEN_MBIFIRWOF_MBI_INTERNAL_CONTROL_PARITY_ERROR = 6624; static const uint64_t IDX_CEN_MBIFIRWOF_MBI_DATA_FLOW_PARITY_ERROR = 6625; static const uint64_t IDX_CEN_MBIFIRWOF_CRC_PERFORMANCE_DEGRADATION = 6626; static const uint64_t IDX_CEN_MBIFIRWOF_HOST_MC_GLOBAL_CHECKSTOP = 6627; static const uint64_t IDX_CEN_MBIFIRWOF_HOST_MC_TRACESTOP = 6628; static const uint64_t IDX_CEN_MBIFIRWOF_CHANNEL_INTERLOCK_FAIL = 6629; static const uint64_t IDX_CEN_MBIFIRWOF_HOST_MC_LOCAL_CHECKSTOP = 6630; static const uint64_t IDX_CEN_MBIFIRWOF_FRTL_CONTER_OVERFLOW = 6631; static const uint64_t IDX_CEN_MBIFIRWOF_SCOM_REGISTER_PARITY_ERROR = 6632; static const uint64_t IDX_CEN_MBIFIRWOF_IO_FAULT = 6633; static const uint64_t IDX_CEN_MBIFIRWOF_MULTIPLE_REPLAY = 6634; static const uint64_t IDX_CEN_MBIFIRWOF_MBICFG_PARITY_SCOM_ERROR = 6635; static const uint64_t IDX_CEN_MBIFIRWOF_BUFFER_OVERRUN_ERROR = 6636; static const uint64_t IDX_CEN_MBIFIRWOF_RESERVED_21_24 = 6637; static const uint64_t IDX_CEN_MBIFIRWOF_RESERVED_21_24_LEN = 6638; static const uint64_t IDX_CEN_MBIFIRWOF_INTERNAL_SCOM_ERROR_CLONE = 6639; static const uint64_t IDX_CEN_MBIFIRWOF_INTERNAL_SCOM_ERROR_CLONE_COPY = 6640; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA0_DATA = 6641; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA0_DATA_LEN = 6642; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA1_DATA = 6643; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA1_DATA_LEN = 6644; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA2_DATA = 6645; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA2_DATA_LEN = 6646; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA3_DATA = 6647; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA3_DATA_LEN = 6648; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA4_DATA = 6649; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA4_DATA_LEN = 6650; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA5_DATA = 6651; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA5_DATA_LEN = 6652; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA6_DATA = 6653; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA6_DATA_LEN = 6654; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA7_DATA = 6655; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA7_DATA_LEN = 6656; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC0_SPARE = 6657; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC0_ECC = 6658; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC0_ECC_LEN = 6659; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC1_SPARE = 6660; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC1_ECC = 6661; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC1_ECC_LEN = 6662; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC2_SPARE = 6663; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC2_ECC = 6664; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC2_ECC_LEN = 6665; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC3_SPARE = 6666; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC3_ECC = 6667; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC3_ECC_LEN = 6668; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC4_SPARE = 6669; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC4_ECC = 6670; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC4_ECC_LEN = 6671; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC5_SPARE = 6672; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC5_ECC = 6673; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC5_ECC_LEN = 6674; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC6_SPARE = 6675; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC6_ECC = 6676; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC6_ECC_LEN = 6677; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC7_SPARE = 6678; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC7_ECC = 6679; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC7_ECC_LEN = 6680; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA0_DATA = 6681; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA0_DATA_LEN = 6682; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA1_DATA = 6683; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA1_DATA_LEN = 6684; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA2_DATA = 6685; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA2_DATA_LEN = 6686; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA3_DATA = 6687; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA3_DATA_LEN = 6688; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA4_DATA = 6689; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA4_DATA_LEN = 6690; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA5_DATA = 6691; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA5_DATA_LEN = 6692; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA6_DATA = 6693; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA6_DATA_LEN = 6694; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA7_DATA = 6695; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA7_DATA_LEN = 6696; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC0_SPARE = 6697; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC0_ECC = 6698; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC0_ECC_LEN = 6699; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC1_SPARE = 6700; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC1_ECC = 6701; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC1_ECC_LEN = 6702; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC2_SPARE = 6703; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC2_ECC = 6704; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC2_ECC_LEN = 6705; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC3_SPARE = 6706; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC3_ECC = 6707; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC3_ECC_LEN = 6708; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC4_SPARE = 6709; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC4_ECC = 6710; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC4_ECC_LEN = 6711; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC5_SPARE = 6712; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC5_ECC = 6713; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC5_ECC_LEN = 6714; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC6_SPARE = 6715; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC6_ECC = 6716; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC6_ECC_LEN = 6717; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC7_SPARE = 6718; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC7_ECC = 6719; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC7_ECC_LEN = 6720; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA0_DATA = 6721; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA0_DATA_LEN = 6722; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA1_DATA = 6723; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA1_DATA_LEN = 6724; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA2_DATA = 6725; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA2_DATA_LEN = 6726; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA3_DATA = 6727; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA3_DATA_LEN = 6728; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA4_DATA = 6729; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA4_DATA_LEN = 6730; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA5_DATA = 6731; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA5_DATA_LEN = 6732; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA6_DATA = 6733; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA6_DATA_LEN = 6734; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA7_DATA = 6735; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA7_DATA_LEN = 6736; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC0_SPARE = 6737; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC0_ECC = 6738; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC0_ECC_LEN = 6739; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC1_SPARE = 6740; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC1_ECC = 6741; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC1_ECC_LEN = 6742; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC2_SPARE = 6743; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC2_ECC = 6744; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC2_ECC_LEN = 6745; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC3_SPARE = 6746; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC3_ECC = 6747; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC3_ECC_LEN = 6748; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC4_SPARE = 6749; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC4_ECC = 6750; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC4_ECC_LEN = 6751; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC5_SPARE = 6752; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC5_ECC = 6753; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC5_ECC_LEN = 6754; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC6_SPARE = 6755; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC6_ECC = 6756; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC6_ECC_LEN = 6757; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC7_SPARE = 6758; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC7_ECC = 6759; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC7_ECC_LEN = 6760; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA0_DATA = 6761; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA0_DATA_LEN = 6762; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA1_DATA = 6763; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA1_DATA_LEN = 6764; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA2_DATA = 6765; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA2_DATA_LEN = 6766; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA3_DATA = 6767; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA3_DATA_LEN = 6768; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA4_DATA = 6769; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA4_DATA_LEN = 6770; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA5_DATA = 6771; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA5_DATA_LEN = 6772; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA6_DATA = 6773; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA6_DATA_LEN = 6774; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA7_DATA = 6775; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA7_DATA_LEN = 6776; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC0_SPARE = 6777; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC0_ECC = 6778; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC0_ECC_LEN = 6779; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC1_SPARE = 6780; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC1_ECC = 6781; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC1_ECC_LEN = 6782; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC2_SPARE = 6783; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC2_ECC = 6784; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC2_ECC_LEN = 6785; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC3_SPARE = 6786; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC3_ECC = 6787; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC3_ECC_LEN = 6788; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC4_SPARE = 6789; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC4_ECC = 6790; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC4_ECC_LEN = 6791; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC5_SPARE = 6792; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC5_ECC = 6793; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC5_ECC_LEN = 6794; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC6_SPARE = 6795; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC6_ECC = 6796; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC6_ECC_LEN = 6797; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC7_SPARE = 6798; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC7_ECC = 6799; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC7_ECC_LEN = 6800; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_CHECKBIT0_1 = 6801; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_TAG0_2 = 6802; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_TAG1_3 = 6803; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_MDI = 6804; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C6_C5_C4 = 6805; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C6_C5_C4_LEN = 6806; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C3_C2_C1_C0 = 6807; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C3_C2_C1_C0_LEN = 6808; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_SPARE_ECC_BITS = 6809; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_SPARE_ECC_BITS_LEN = 6810; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_FABRIC_ECC = 6811; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_FABRIC_ECC_LEN = 6812; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_CHECKBIT0_1 = 6813; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_TAG0_2 = 6814; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_TAG1_3 = 6815; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_MDI = 6816; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C6_C5_C4 = 6817; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C6_C5_C4_LEN = 6818; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C3_C2_C1_C0 = 6819; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C3_C2_C1_C0_LEN = 6820; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_SPARE_ECC_BITS = 6821; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_SPARE_ECC_BITS_LEN = 6822; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_FABRIC_ECC = 6823; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_FABRIC_ECC_LEN = 6824; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_CHECKBIT0_1 = 6825; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_TAG0_2 = 6826; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_TAG1_3 = 6827; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_MDI = 6828; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C6_C5_C4 = 6829; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C6_C5_C4_LEN = 6830; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C3_C2_C1_C0 = 6831; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C3_C2_C1_C0_LEN = 6832; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_SPARE_ECC_BITS = 6833; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_SPARE_ECC_BITS_LEN = 6834; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_FABRIC_ECC = 6835; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_FABRIC_ECC_LEN = 6836; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_CHECKBIT0_1 = 6837; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_TAG0_2 = 6838; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_TAG1_3 = 6839; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_MDI = 6840; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C6_C5_C4 = 6841; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C6_C5_C4_LEN = 6842; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C3_C2_C1_C0 = 6843; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C3_C2_C1_C0_LEN = 6844; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_SPARE_ECC_BITS = 6845; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_SPARE_ECC_BITS_LEN = 6846; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_FABRIC_ECC = 6847; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_FABRIC_ECC_LEN = 6848; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_CHECKBIT0_1 = 6849; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_TAG0_2 = 6850; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_TAG1_3 = 6851; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_MDI = 6852; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C6_C5_C4 = 6853; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C6_C5_C4_LEN = 6854; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C3_C2_C1_C0 = 6855; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C3_C2_C1_C0_LEN = 6856; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_SPARE_ECC_BITS = 6857; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_SPARE_ECC_BITS_LEN = 6858; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_FABRIC_ECC = 6859; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_FABRIC_ECC_LEN = 6860; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_CHECKBIT0_1 = 6861; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_TAG0_2 = 6862; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_TAG1_3 = 6863; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_MDI = 6864; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C6_C5_C4 = 6865; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C6_C5_C4_LEN = 6866; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C3_C2_C1_C0 = 6867; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C3_C2_C1_C0_LEN = 6868; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_SPARE_ECC_BITS = 6869; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_SPARE_ECC_BITS_LEN = 6870; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_FABRIC_ECC = 6871; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_FABRIC_ECC_LEN = 6872; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_CHECKBIT0_1 = 6873; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_TAG0_2 = 6874; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_TAG1_3 = 6875; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_MDI = 6876; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C6_C5_C4 = 6877; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C6_C5_C4_LEN = 6878; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C3_C2_C1_C0 = 6879; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C3_C2_C1_C0_LEN = 6880; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_SPARE_ECC_BITS = 6881; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_SPARE_ECC_BITS_LEN = 6882; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_FABRIC_ECC = 6883; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_FABRIC_ECC_LEN = 6884; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_CHECKBIT0_1 = 6885; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_TAG0_2 = 6886; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_TAG1_3 = 6887; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_MDI = 6888; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C6_C5_C4 = 6889; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C6_C5_C4_LEN = 6890; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C3_C2_C1_C0 = 6891; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C3_C2_C1_C0_LEN = 6892; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_SPARE_ECC_BITS = 6893; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_SPARE_ECC_BITS_LEN = 6894; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_FABRIC_ECC = 6895; static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_FABRIC_ECC_LEN = 6896; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA0_DATA = 6897; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA0_DATA_LEN = 6898; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA1_DATA = 6899; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA1_DATA_LEN = 6900; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA2_DATA = 6901; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA2_DATA_LEN = 6902; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA3_DATA = 6903; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA3_DATA_LEN = 6904; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA4_DATA = 6905; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA4_DATA_LEN = 6906; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA5_DATA = 6907; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA5_DATA_LEN = 6908; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA6_DATA = 6909; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA6_DATA_LEN = 6910; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA7_DATA = 6911; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA7_DATA_LEN = 6912; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC0_SPARE = 6913; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC0_ECC = 6914; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC0_ECC_LEN = 6915; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC1_SPARE = 6916; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC1_ECC = 6917; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC1_ECC_LEN = 6918; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC2_SPARE = 6919; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC2_ECC = 6920; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC2_ECC_LEN = 6921; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC3_SPARE = 6922; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC3_ECC = 6923; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC3_ECC_LEN = 6924; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC4_SPARE = 6925; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC4_ECC = 6926; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC4_ECC_LEN = 6927; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC5_SPARE = 6928; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC5_ECC = 6929; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC5_ECC_LEN = 6930; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC6_SPARE = 6931; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC6_ECC = 6932; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC6_ECC_LEN = 6933; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC7_SPARE = 6934; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC7_ECC = 6935; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC7_ECC_LEN = 6936; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA0_DATA = 6937; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA0_DATA_LEN = 6938; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA1_DATA = 6939; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA1_DATA_LEN = 6940; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA2_DATA = 6941; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA2_DATA_LEN = 6942; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA3_DATA = 6943; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA3_DATA_LEN = 6944; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA4_DATA = 6945; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA4_DATA_LEN = 6946; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA5_DATA = 6947; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA5_DATA_LEN = 6948; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA6_DATA = 6949; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA6_DATA_LEN = 6950; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA7_DATA = 6951; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA7_DATA_LEN = 6952; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC0_SPARE = 6953; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC0_ECC = 6954; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC0_ECC_LEN = 6955; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC1_SPARE = 6956; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC1_ECC = 6957; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC1_ECC_LEN = 6958; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC2_SPARE = 6959; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC2_ECC = 6960; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC2_ECC_LEN = 6961; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC3_SPARE = 6962; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC3_ECC = 6963; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC3_ECC_LEN = 6964; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC4_SPARE = 6965; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC4_ECC = 6966; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC4_ECC_LEN = 6967; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC5_SPARE = 6968; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC5_ECC = 6969; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC5_ECC_LEN = 6970; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC6_SPARE = 6971; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC6_ECC = 6972; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC6_ECC_LEN = 6973; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC7_SPARE = 6974; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC7_ECC = 6975; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC7_ECC_LEN = 6976; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA0_DATA = 6977; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA0_DATA_LEN = 6978; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA1_DATA = 6979; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA1_DATA_LEN = 6980; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA2_DATA = 6981; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA2_DATA_LEN = 6982; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA3_DATA = 6983; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA3_DATA_LEN = 6984; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA4_DATA = 6985; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA4_DATA_LEN = 6986; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA5_DATA = 6987; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA5_DATA_LEN = 6988; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA6_DATA = 6989; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA6_DATA_LEN = 6990; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA7_DATA = 6991; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA7_DATA_LEN = 6992; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC0_SPARE = 6993; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC0_ECC = 6994; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC0_ECC_LEN = 6995; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC1_SPARE = 6996; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC1_ECC = 6997; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC1_ECC_LEN = 6998; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC2_SPARE = 6999; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC2_ECC = 7000; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC2_ECC_LEN = 7001; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC3_SPARE = 7002; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC3_ECC = 7003; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC3_ECC_LEN = 7004; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC4_SPARE = 7005; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC4_ECC = 7006; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC4_ECC_LEN = 7007; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC5_SPARE = 7008; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC5_ECC = 7009; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC5_ECC_LEN = 7010; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC6_SPARE = 7011; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC6_ECC = 7012; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC6_ECC_LEN = 7013; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC7_SPARE = 7014; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC7_ECC = 7015; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC7_ECC_LEN = 7016; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA0_DATA = 7017; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA0_DATA_LEN = 7018; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA1_DATA = 7019; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA1_DATA_LEN = 7020; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA2_DATA = 7021; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA2_DATA_LEN = 7022; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA3_DATA = 7023; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA3_DATA_LEN = 7024; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA4_DATA = 7025; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA4_DATA_LEN = 7026; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA5_DATA = 7027; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA5_DATA_LEN = 7028; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA6_DATA = 7029; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA6_DATA_LEN = 7030; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA7_DATA = 7031; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA7_DATA_LEN = 7032; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC0_SPARE = 7033; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC0_ECC = 7034; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC0_ECC_LEN = 7035; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC1_SPARE = 7036; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC1_ECC = 7037; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC1_ECC_LEN = 7038; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC2_SPARE = 7039; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC2_ECC = 7040; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC2_ECC_LEN = 7041; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC3_SPARE = 7042; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC3_ECC = 7043; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC3_ECC_LEN = 7044; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC4_SPARE = 7045; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC4_ECC = 7046; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC4_ECC_LEN = 7047; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC5_SPARE = 7048; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC5_ECC = 7049; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC5_ECC_LEN = 7050; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC6_SPARE = 7051; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC6_ECC = 7052; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC6_ECC_LEN = 7053; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC7_SPARE = 7054; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC7_ECC = 7055; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC7_ECC_LEN = 7056; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_CHECKBIT0_1 = 7057; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_TAG0_2 = 7058; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_TAG1_3 = 7059; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_MDI = 7060; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C6_C5_C4 = 7061; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C6_C5_C4_LEN = 7062; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C3_C2_C1_C0 = 7063; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C3_C2_C1_C0_LEN = 7064; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_SPARE_ECC_BITS = 7065; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_SPARE_ECC_BITS_LEN = 7066; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_FABRIC_ECC = 7067; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_FABRIC_ECC_LEN = 7068; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_CHECKBIT0_1 = 7069; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_TAG0_2 = 7070; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_TAG1_3 = 7071; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_MDI = 7072; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C6_C5_C4 = 7073; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C6_C5_C4_LEN = 7074; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C3_C2_C1_C0 = 7075; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C3_C2_C1_C0_LEN = 7076; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_SPARE_ECC_BITS = 7077; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_SPARE_ECC_BITS_LEN = 7078; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_FABRIC_ECC = 7079; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_FABRIC_ECC_LEN = 7080; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_CHECKBIT0_1 = 7081; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_TAG0_2 = 7082; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_TAG1_3 = 7083; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_MDI = 7084; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C6_C5_C4 = 7085; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C6_C5_C4_LEN = 7086; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C3_C2_C1_C0 = 7087; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C3_C2_C1_C0_LEN = 7088; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_SPARE_ECC_BITS = 7089; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_SPARE_ECC_BITS_LEN = 7090; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_FABRIC_ECC = 7091; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_FABRIC_ECC_LEN = 7092; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_CHECKBIT0_1 = 7093; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_TAG0_2 = 7094; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_TAG1_3 = 7095; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_MDI = 7096; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C6_C5_C4 = 7097; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C6_C5_C4_LEN = 7098; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C3_C2_C1_C0 = 7099; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C3_C2_C1_C0_LEN = 7100; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_SPARE_ECC_BITS = 7101; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_SPARE_ECC_BITS_LEN = 7102; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_FABRIC_ECC = 7103; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_FABRIC_ECC_LEN = 7104; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_CHECKBIT0_1 = 7105; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_TAG0_2 = 7106; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_TAG1_3 = 7107; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_MDI = 7108; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C6_C5_C4 = 7109; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C6_C5_C4_LEN = 7110; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C3_C2_C1_C0 = 7111; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C3_C2_C1_C0_LEN = 7112; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_SPARE_ECC_BITS = 7113; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_SPARE_ECC_BITS_LEN = 7114; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_FABRIC_ECC = 7115; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_FABRIC_ECC_LEN = 7116; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_CHECKBIT0_1 = 7117; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_TAG0_2 = 7118; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_TAG1_3 = 7119; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_MDI = 7120; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C6_C5_C4 = 7121; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C6_C5_C4_LEN = 7122; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C3_C2_C1_C0 = 7123; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C3_C2_C1_C0_LEN = 7124; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_SPARE_ECC_BITS = 7125; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_SPARE_ECC_BITS_LEN = 7126; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_FABRIC_ECC = 7127; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_FABRIC_ECC_LEN = 7128; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_CHECKBIT0_1 = 7129; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_TAG0_2 = 7130; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_TAG1_3 = 7131; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_MDI = 7132; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C6_C5_C4 = 7133; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C6_C5_C4_LEN = 7134; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C3_C2_C1_C0 = 7135; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C3_C2_C1_C0_LEN = 7136; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_SPARE_ECC_BITS = 7137; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_SPARE_ECC_BITS_LEN = 7138; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_FABRIC_ECC = 7139; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_FABRIC_ECC_LEN = 7140; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_CHECKBIT0_1 = 7141; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_TAG0_2 = 7142; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_TAG1_3 = 7143; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_MDI = 7144; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C6_C5_C4 = 7145; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C6_C5_C4_LEN = 7146; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C3_C2_C1_C0 = 7147; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C3_C2_C1_C0_LEN = 7148; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_SPARE_ECC_BITS = 7149; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_SPARE_ECC_BITS_LEN = 7150; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_FABRIC_ECC = 7151; static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_FABRIC_ECC_LEN = 7152; static const uint64_t IDX_CEN_MBA_MBABS0_WRITE_BIT_STEER_MUX_SELECT_0 = 7153; static const uint64_t IDX_CEN_MBA_MBABS0_WRITE_BIT_STEER_MUX_SELECT_0_LEN = 7154; static const uint64_t IDX_CEN_MBA_MBABS0_WRITE_BIT_STEER_MUX_SELECT_1 = 7155; static const uint64_t IDX_CEN_MBA_MBABS0_WRITE_BIT_STEER_MUX_SELECT_1_LEN = 7156; static const uint64_t IDX_CEN_MBA_MBABS0_WRITE_BIT_STEER_MUX_SELECT_2 = 7157; static const uint64_t IDX_CEN_MBA_MBABS0_WRITE_BIT_STEER_MUX_SELECT_2_LEN = 7158; static const uint64_t IDX_CEN_MBA_MBABS1_WRITE_BIT_STEER_MUX_SELECT_0 = 7159; static const uint64_t IDX_CEN_MBA_MBABS1_WRITE_BIT_STEER_MUX_SELECT_0_LEN = 7160; static const uint64_t IDX_CEN_MBA_MBABS1_WRITE_BIT_STEER_MUX_SELECT_1 = 7161; static const uint64_t IDX_CEN_MBA_MBABS1_WRITE_BIT_STEER_MUX_SELECT_1_LEN = 7162; static const uint64_t IDX_CEN_MBA_MBABS1_WRITE_BIT_STEER_MUX_SELECT_2 = 7163; static const uint64_t IDX_CEN_MBA_MBABS1_WRITE_BIT_STEER_MUX_SELECT_2_LEN = 7164; static const uint64_t IDX_CEN_MBA_MBABS2_WRITE_BIT_STEER_MUX_SELECT_0 = 7165; static const uint64_t IDX_CEN_MBA_MBABS2_WRITE_BIT_STEER_MUX_SELECT_0_LEN = 7166; static const uint64_t IDX_CEN_MBA_MBABS2_WRITE_BIT_STEER_MUX_SELECT_1 = 7167; static const uint64_t IDX_CEN_MBA_MBABS2_WRITE_BIT_STEER_MUX_SELECT_1_LEN = 7168; static const uint64_t IDX_CEN_MBA_MBABS2_WRITE_BIT_STEER_MUX_SELECT_2 = 7169; static const uint64_t IDX_CEN_MBA_MBABS2_WRITE_BIT_STEER_MUX_SELECT_2_LEN = 7170; static const uint64_t IDX_CEN_MBA_MBABS3_WRITE_BIT_STEER_MUX_SELECT_0 = 7171; static const uint64_t IDX_CEN_MBA_MBABS3_WRITE_BIT_STEER_MUX_SELECT_0_LEN = 7172; static const uint64_t IDX_CEN_MBA_MBABS3_WRITE_BIT_STEER_MUX_SELECT_1 = 7173; static const uint64_t IDX_CEN_MBA_MBABS3_WRITE_BIT_STEER_MUX_SELECT_1_LEN = 7174; static const uint64_t IDX_CEN_MBA_MBABS3_WRITE_BIT_STEER_MUX_SELECT_2 = 7175; static const uint64_t IDX_CEN_MBA_MBABS3_WRITE_BIT_STEER_MUX_SELECT_2_LEN = 7176; static const uint64_t IDX_CEN_MBA_MBABS4_WRITE_BIT_STEER_MUX_SELECT_0 = 7177; static const uint64_t IDX_CEN_MBA_MBABS4_WRITE_BIT_STEER_MUX_SELECT_0_LEN = 7178; static const uint64_t IDX_CEN_MBA_MBABS4_WRITE_BIT_STEER_MUX_SELECT_1 = 7179; static const uint64_t IDX_CEN_MBA_MBABS4_WRITE_BIT_STEER_MUX_SELECT_1_LEN = 7180; static const uint64_t IDX_CEN_MBA_MBABS4_WRITE_BIT_STEER_MUX_SELECT_2 = 7181; static const uint64_t IDX_CEN_MBA_MBABS4_WRITE_BIT_STEER_MUX_SELECT_2_LEN = 7182; static const uint64_t IDX_CEN_MBA_MBABS5_WRITE_BIT_STEER_MUX_SELECT_0 = 7183; static const uint64_t IDX_CEN_MBA_MBABS5_WRITE_BIT_STEER_MUX_SELECT_0_LEN = 7184; static const uint64_t IDX_CEN_MBA_MBABS5_WRITE_BIT_STEER_MUX_SELECT_1 = 7185; static const uint64_t IDX_CEN_MBA_MBABS5_WRITE_BIT_STEER_MUX_SELECT_1_LEN = 7186; static const uint64_t IDX_CEN_MBA_MBABS5_WRITE_BIT_STEER_MUX_SELECT_2 = 7187; static const uint64_t IDX_CEN_MBA_MBABS5_WRITE_BIT_STEER_MUX_SELECT_2_LEN = 7188; static const uint64_t IDX_CEN_MBA_MBABS6_WRITE_BIT_STEER_MUX_SELECT_0 = 7189; static const uint64_t IDX_CEN_MBA_MBABS6_WRITE_BIT_STEER_MUX_SELECT_0_LEN = 7190; static const uint64_t IDX_CEN_MBA_MBABS6_WRITE_BIT_STEER_MUX_SELECT_1 = 7191; static const uint64_t IDX_CEN_MBA_MBABS6_WRITE_BIT_STEER_MUX_SELECT_1_LEN = 7192; static const uint64_t IDX_CEN_MBA_MBABS6_WRITE_BIT_STEER_MUX_SELECT_2 = 7193; static const uint64_t IDX_CEN_MBA_MBABS6_WRITE_BIT_STEER_MUX_SELECT_2_LEN = 7194; static const uint64_t IDX_CEN_MBA_MBABS7_WRITE_BIT_STEER_MUX_SELECT_0 = 7195; static const uint64_t IDX_CEN_MBA_MBABS7_WRITE_BIT_STEER_MUX_SELECT_0_LEN = 7196; static const uint64_t IDX_CEN_MBA_MBABS7_WRITE_BIT_STEER_MUX_SELECT_1 = 7197; static const uint64_t IDX_CEN_MBA_MBABS7_WRITE_BIT_STEER_MUX_SELECT_1_LEN = 7198; static const uint64_t IDX_CEN_MBA_MBABS7_WRITE_BIT_STEER_MUX_SELECT_2 = 7199; static const uint64_t IDX_CEN_MBA_MBABS7_WRITE_BIT_STEER_MUX_SELECT_2_LEN = 7200; static const uint64_t IDX_CEN_MBA_MBA_INJQ_INJQ_CFG_RDTAG_ERR_INJ = 7201; static const uint64_t IDX_CEN_MBA_MBA_INJQ_INJQ_CFG_RRQ_POP_ERR_INJ = 7202; static const uint64_t IDX_CEN_MBA_MBA_INJQ_INJQ_CFG_WR_ECC_INJ_MODE = 7203; static const uint64_t IDX_CEN_MBA_MBA_INJQ_INJQ_CFG_WR_ECC_ERR_INJ = 7204; static const uint64_t IDX_CEN_MBA_MBA_INJQ_INJQ_CFG_WRD_BUFF_INJ_MODE = 7205; static const uint64_t IDX_CEN_MBA_MBA_INJQ_INJQ_CFG_WRD_BUFFER_CE_INJ = 7206; static const uint64_t IDX_CEN_MBA_MBA_INJQ_INJQ_CFG_WRD_BUFFER_UE_INJ = 7207; static const uint64_t IDX_CEN_MBA_MBA_WRD_MODE_WRD_MODE_CFG_ECC_CHK_DISABLE = 7208; static const uint64_t IDX_CEN_MBA_MBA_WRD_MODE_WRD_MODE_CFG_ECC_COR_DISABLE = 7209; static const uint64_t IDX_CEN_MBA_MBA_WRD_MODE_WRD_MODE_ECC_METADATA = 7210; static const uint64_t IDX_CEN_MBA_MBA_WRD_MODE_WRD_MODE_ECC_METADATA_LEN = 7211; static const uint64_t IDX_CEN_MBA_MBA_WRD_MODE_WRD_MODE_CFG_MAINT_ECC_CHK_DISABLE = 7212; static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ_CCS_ARRAY_CE_ERR_INJ_MODE = 7213; static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ_CCS_ARRAY_CE_ERR_INJ = 7214; static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ_CCS_ARRAY_UE_ERR_INJ_MODE = 7215; static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ_CCS_ARRAY_UE_ERR_INJ = 7216; static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ_CS_CHIP_ID_2N_MODE = 7217; static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ_DISABLE_2N_MODE = 7218; static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ_RESERVED_6_14 = 7219; static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ_RESERVED_6_14_LEN = 7220; static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ_READ_RESPONSE_DELAY_ENABLE = 7221; static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE0 = 7222; static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE0_LEN = 7223; static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE1 = 7224; static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE1_LEN = 7225; static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE2 = 7226; static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE2_LEN = 7227; static const uint64_t IDX_CEN_MBA_CCS_CNTLQ_START = 7228; static const uint64_t IDX_CEN_MBA_CCS_CNTLQ_STOP = 7229; static const uint64_t IDX_CEN_MBA_CCS_FIXED_DATA0Q_DATA_0_63 = 7230; static const uint64_t IDX_CEN_MBA_CCS_FIXED_DATA0Q_DATA_0_63_LEN = 7231; static const uint64_t IDX_CEN_MBA_CCS_FIXED_DATA1Q_DATA_64_79 = 7232; static const uint64_t IDX_CEN_MBA_CCS_FIXED_DATA1Q_DATA_64_79_LEN = 7233; static const uint64_t IDX_CEN_MBA_CCS_FIXED_DATA1Q_RESERVED_16_63 = 7234; static const uint64_t IDX_CEN_MBA_CCS_FIXED_DATA1Q_RESERVED_16_63_LEN = 7235; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_STOP_ON_ERR = 7236; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_UE_DISABLE = 7237; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_DATA_SEL = 7238; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_DATA_SEL_LEN = 7239; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_MCBIST_DDR_DPHY_NCLK = 7240; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_MCBIST_DDR_DPHY_NCLK_LEN = 7241; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_MCBIST_DDR_DPHY_PCLK = 7242; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_MCBIST_DDR_DPHY_PCLK_LEN = 7243; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT = 7244; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_LEN = 7245; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_MCBIST_DDR_RESETN = 7246; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_MCBIST_DDR_DFI_RESET_RECOVER = 7247; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_COPY_CKE_TO_SPARE = 7248; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_DISABLE_ECC_ARRAY_CHK = 7249; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_DISABLE_ECC_ARRAY_CORRECTION = 7250; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_ADDR_MUX_SEL = 7251; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_MULT = 7252; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_MULT_LEN = 7253; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_MA_B_ADDRESS_IDLE_PAT = 7254; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_MA_B_ADDRESS_IDLE_PAT_LEN = 7255; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_MA_B_BANK_IDLE_PAT = 7256; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_MA_B_BANK_IDLE_PAT_LEN = 7257; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_MA_B_ACTIVATE_IDLE_PAT = 7258; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_MA_B_RASN_IDLE_PAT = 7259; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_MA_B_CASN_IDLE_PAT = 7260; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_MA_B_WEN_IDLE_PAT = 7261; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_NTTM_MODE = 7262; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_NTTM_RW_DATA_DLY = 7263; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_NTTM_RW_DATA_DLY_LEN = 7264; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_DDR_RESETN_ENABLE = 7265; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_DDR_PARITY_ENABLE = 7266; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_GP_BIT_3_ENABLE = 7267; static const uint64_t IDX_CEN_MBA_CCS_MODEQ_FORCE_MCLK_LOW_N = 7268; static const uint64_t IDX_CEN_MBA_CCS_STATQ_IP = 7269; static const uint64_t IDX_CEN_MBA_CCS_STATQ_DONE = 7270; static const uint64_t IDX_CEN_MBA_CCS_STATQ_FAIL = 7271; static const uint64_t IDX_CEN_MBA_CCS_STATQ_FAIL_TYPE = 7272; static const uint64_t IDX_CEN_MBA_CCS_STATQ_FAIL_TYPE_LEN = 7273; static const uint64_t IDX_CEN_MBA_MBAFIRACT0_INVALID_MAINT_CMD = 7274; static const uint64_t IDX_CEN_MBA_MBAFIRACT0_INVALID_MAINT_ADDRESS = 7275; static const uint64_t IDX_CEN_MBA_MBAFIRACT0_MULTI_ADDRESS_MAINT_TIMEOUT = 7276; static const uint64_t IDX_CEN_MBA_MBAFIRACT0_INTERNAL_FSM_ERROR = 7277; static const uint64_t IDX_CEN_MBA_MBAFIRACT0_MCBIST_ERROR = 7278; static const uint64_t IDX_CEN_MBA_MBAFIRACT0_SCOM_CMD_REG_PE = 7279; static const uint64_t IDX_CEN_MBA_MBAFIRACT0_CHANNEL_CHKSTP_ERR = 7280; static const uint64_t IDX_CEN_MBA_MBAFIRACT0_WRD_CAW2_DATA_CE_UE_ERR = 7281; static const uint64_t IDX_CEN_MBA_MBAFIRACT0_MAINT_1HOT_ST_ERROR_DD2 = 7282; static const uint64_t IDX_CEN_MBA_MBAFIRACT0_RESERVED_9_14 = 7283; static const uint64_t IDX_CEN_MBA_MBAFIRACT0_RESERVED_9_14_LEN = 7284; static const uint64_t IDX_CEN_MBA_MBAFIRACT0_INTERNAL_SCOM_ERROR = 7285; static const uint64_t IDX_CEN_MBA_MBAFIRACT0_INTERNAL_SCOM_ERROR_CLONE = 7286; static const uint64_t IDX_CEN_MBA_MBAFIRACT1_INVALID_MAINT_CMD = 7287; static const uint64_t IDX_CEN_MBA_MBAFIRACT1_INVALID_MAINT_ADDRESS = 7288; static const uint64_t IDX_CEN_MBA_MBAFIRACT1_MULTI_ADDRESS_MAINT_TIMEOUT = 7289; static const uint64_t IDX_CEN_MBA_MBAFIRACT1_INTERNAL_FSM_ERROR = 7290; static const uint64_t IDX_CEN_MBA_MBAFIRACT1_MCBIST_ERROR = 7291; static const uint64_t IDX_CEN_MBA_MBAFIRACT1_SCOM_CMD_REG_PE = 7292; static const uint64_t IDX_CEN_MBA_MBAFIRACT1_CHANNEL_CHKSTP_ERR = 7293; static const uint64_t IDX_CEN_MBA_MBAFIRACT1_WRD_CAW2_DATA_CE_UE_ERR = 7294; static const uint64_t IDX_CEN_MBA_MBAFIRACT1_MAINT_1HOT_ST_ERROR_DD2 = 7295; static const uint64_t IDX_CEN_MBA_MBAFIRACT1_RESERVED_9_14 = 7296; static const uint64_t IDX_CEN_MBA_MBAFIRACT1_RESERVED_9_14_LEN = 7297; static const uint64_t IDX_CEN_MBA_MBAFIRACT1_INTERNAL_SCOM_ERROR = 7298; static const uint64_t IDX_CEN_MBA_MBAFIRACT1_INTERNAL_SCOM_ERROR_CLONE = 7299; static const uint64_t IDX_CEN_MBA_MBAFIRMASK_INVALID_MAINT_CMD = 7300; static const uint64_t IDX_CEN_MBA_MBAFIRMASK_INVALID_MAINT_ADDRESS = 7301; static const uint64_t IDX_CEN_MBA_MBAFIRMASK_MULTI_ADDRESS_MAINT_TIMEOUT = 7302; static const uint64_t IDX_CEN_MBA_MBAFIRMASK_INTERNAL_FSM_ERROR = 7303; static const uint64_t IDX_CEN_MBA_MBAFIRMASK_MCBIST_ERROR = 7304; static const uint64_t IDX_CEN_MBA_MBAFIRMASK_SCOM_CMD_REG_PE = 7305; static const uint64_t IDX_CEN_MBA_MBAFIRMASK_CHANNEL_CHKSTP_ERR = 7306; static const uint64_t IDX_CEN_MBA_MBAFIRMASK_WRD_CAW2_DATA_CE_UE_ERR = 7307; static const uint64_t IDX_CEN_MBA_MBAFIRMASK_MAINT_1HOT_ST_ERROR_DD2 = 7308; static const uint64_t IDX_CEN_MBA_MBAFIRMASK_RESERVED_9_14 = 7309; static const uint64_t IDX_CEN_MBA_MBAFIRMASK_RESERVED_9_14_LEN = 7310; static const uint64_t IDX_CEN_MBA_MBAFIRMASK_INTERNAL_SCOM_ERROR = 7311; static const uint64_t IDX_CEN_MBA_MBAFIRMASK_INTERNAL_SCOM_ERROR_CLONE = 7312; static const uint64_t IDX_CEN_MBA_MBAFIRQ_INVALID_MAINT_CMD = 7313; static const uint64_t IDX_CEN_MBA_MBAFIRQ_INVALID_MAINT_ADDRESS = 7314; static const uint64_t IDX_CEN_MBA_MBAFIRQ_MULTI_ADDRESS_MAINT_TIMEOUT = 7315; static const uint64_t IDX_CEN_MBA_MBAFIRQ_INTERNAL_FSM_ERROR = 7316; static const uint64_t IDX_CEN_MBA_MBAFIRQ_MCBIST_ERROR = 7317; static const uint64_t IDX_CEN_MBA_MBAFIRQ_SCOM_CMD_REG_PE = 7318; static const uint64_t IDX_CEN_MBA_MBAFIRQ_CHANNEL_CHKSTP_ERR = 7319; static const uint64_t IDX_CEN_MBA_MBAFIRQ_WRD_CAW2_DATA_CE_UE_ERR = 7320; static const uint64_t IDX_CEN_MBA_MBAFIRQ_MAINT_1HOT_ST_ERROR_DD2 = 7321; static const uint64_t IDX_CEN_MBA_MBAFIRQ_RESERVED_9_14 = 7322; static const uint64_t IDX_CEN_MBA_MBAFIRQ_RESERVED_9_14_LEN = 7323; static const uint64_t IDX_CEN_MBA_MBAFIRQ_INTERNAL_SCOM_ERROR = 7324; static const uint64_t IDX_CEN_MBA_MBAFIRQ_INTERNAL_SCOM_ERROR_CLONE = 7325; static const uint64_t IDX_CEN_MBA_MBAFIRWOF_INVALID_MAINT_CMD = 7326; static const uint64_t IDX_CEN_MBA_MBAFIRWOF_INVALID_MAINT_ADDRESS = 7327; static const uint64_t IDX_CEN_MBA_MBAFIRWOF_MULTI_ADDRESS_MAINT_TIMEOUT = 7328; static const uint64_t IDX_CEN_MBA_MBAFIRWOF_INTERNAL_FSM_ERROR = 7329; static const uint64_t IDX_CEN_MBA_MBAFIRWOF_MCBIST_ERROR = 7330; static const uint64_t IDX_CEN_MBA_MBAFIRWOF_SCOM_CMD_REG_PE = 7331; static const uint64_t IDX_CEN_MBA_MBAFIRWOF_CHANNEL_CHKSTP_ERR = 7332; static const uint64_t IDX_CEN_MBA_MBAFIRWOF_WRD_CAW2_DATA_CE_UE_ERR = 7333; static const uint64_t IDX_CEN_MBA_MBAFIRWOF_RESERVED_8_14 = 7334; static const uint64_t IDX_CEN_MBA_MBAFIRWOF_RESERVED_8_14_LEN = 7335; static const uint64_t IDX_CEN_MBA_MBAFIRWOF_INTERNAL_SCOM_ERROR = 7336; static const uint64_t IDX_CEN_MBA_MBAFIRWOF_INTERNAL_SCOM_ERROR_CLONE = 7337; static const uint64_t IDX_CEN_MBA_MBASCTLQ_STOP_ETE_NOW = 7338; static const uint64_t IDX_CEN_MBA_MBASCTLQ_STOP_ETE_RANK_END = 7339; static const uint64_t IDX_CEN_MBA_MBASCTLQ_STOP_NCE_HARD = 7340; static const uint64_t IDX_CEN_MBA_MBASCTLQ_STOP_NCE_INTERMITTENT = 7341; static const uint64_t IDX_CEN_MBA_MBASCTLQ_STOP_NCE_SOFT = 7342; static const uint64_t IDX_CEN_MBA_MBASCTLQ_STOP_SCE = 7343; static const uint64_t IDX_CEN_MBA_MBASCTLQ_STOP_MCE = 7344; static const uint64_t IDX_CEN_MBA_MBASCTLQ_STOP_RETRYCE = 7345; static const uint64_t IDX_CEN_MBA_MBASCTLQ_STOP_MPE = 7346; static const uint64_t IDX_CEN_MBA_MBASCTLQ_STOP_UE = 7347; static const uint64_t IDX_CEN_MBA_MBASCTLQ_STOP_ON_END_ADDRESS = 7348; static const uint64_t IDX_CEN_MBA_MBASCTLQ_ENABLE_ATT_MAINT_CMD_DONE = 7349; static const uint64_t IDX_CEN_MBA_MBASCTLQ_STOP_SUE = 7350; static const uint64_t IDX_CEN_MBA_MBASCTLQ_CMD_TIMEOUT_SEL = 7351; static const uint64_t IDX_CEN_MBA_MBASCTLQ_CMD_TIMEOUT_SEL_LEN = 7352; static const uint64_t IDX_CEN_MBA_MBASCTLQ_RESET_KEEPER = 7353; static const uint64_t IDX_CEN_MBA_MBASCTLQ_MBSPA_BIT_0_MODE = 7354; static const uint64_t IDX_CEN_MBA_MBASCTLQ_RESERVED_17_63 = 7355; static const uint64_t IDX_CEN_MBA_MBASCTLQ_RESERVED_17_63_LEN = 7356; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MAINT_START_ADDR_ERR = 7357; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MAINT_END_ADDR_ERR = 7358; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MCB_FIR_CCS_ERR = 7359; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MAINT_1HOT_ST_ERROR = 7360; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MCB_FIR_MCBAGEN_ERR = 7361; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MCB_FIR_MCBFSM_ERR = 7362; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBMCCQ_PE = 7363; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_CCS_CNTLQ_PE = 7364; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MCB_CNTLQ_PE = 7365; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBSPAQ_PE = 7366; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MAINT_CCS_PE = 7367; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MCBAGEN_PE = 7368; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MCBDGEN_PE = 7369; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MCB_CONTROLLER_PE = 7370; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS0_PE = 7371; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS1_PE = 7372; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS2_PE = 7373; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS3_PE = 7374; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS4_PE = 7375; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS5_PE = 7376; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS6_PE = 7377; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS7_PE = 7378; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_INJQ_PE = 7379; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_WRD_MODE_PE = 7380; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBMACAQ_PE = 7381; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBMCTQ_PE = 7382; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_RESERVED_26_63 = 7383; static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_RESERVED_26_63_LEN = 7384; static const uint64_t IDX_CEN_MBA_MBECTLQ_ATOMIC_ALT_CE_INJ = 7385; static const uint64_t IDX_CEN_MBA_MBECTLQ_ATOMIC_ALT_CHIP_KILL_INJ = 7386; static const uint64_t IDX_CEN_MBA_MBECTLQ_ATOMIC_ALT_SD_UE_INJ = 7387; static const uint64_t IDX_CEN_MBA_MBECTLQ_ATOMIC_ALT_SUE_INJ = 7388; static const uint64_t IDX_CEN_MBA_MBECTLQ_ATOMIC_ALT_INJ_SYM_SEL = 7389; static const uint64_t IDX_CEN_MBA_MBECTLQ_ATOMIC_ALT_INJ_SYM_SEL_LEN = 7390; static const uint64_t IDX_CEN_MBA_MBECTLQ_ATOMIC_ALT_INJ_DATA_SEL = 7391; static const uint64_t IDX_CEN_MBA_MBECTLQ_SCOM_CMD_REG_INJ_MODE = 7392; static const uint64_t IDX_CEN_MBA_MBECTLQ_SCOM_CMD_REG_INJ = 7393; static const uint64_t IDX_CEN_MBA_MBECTLQ_MAINT_INTERNAL_FSM_INJ_MODE = 7394; static const uint64_t IDX_CEN_MBA_MBECTLQ_MAINT_INTERNAL_FSM_INJ_REG = 7395; static const uint64_t IDX_CEN_MBA_MBECTLQ_CCS_INTERNAL_FSM_INJ_MODE = 7396; static const uint64_t IDX_CEN_MBA_MBECTLQ_CCS_INTERNAL_FSM_INJ_REG = 7397; static const uint64_t IDX_CEN_MBA_MBECTLQ_WRD_CAW2_UE_CE_DETECT = 7398; static const uint64_t IDX_CEN_MBA_MBECTLQ_RESERVED_19_31 = 7399; static const uint64_t IDX_CEN_MBA_MBECTLQ_RESERVED_19_31_LEN = 7400; static const uint64_t IDX_CEN_MBA_MBMACAQ_CMD_MASTER_RANK0 = 7401; static const uint64_t IDX_CEN_MBA_MBMACAQ_CMD_DIMM_SELECT = 7402; static const uint64_t IDX_CEN_MBA_MBMACAQ_CMD_MASTER_RANK1 = 7403; static const uint64_t IDX_CEN_MBA_MBMACAQ_CMD_MASTER_RANK2 = 7404; static const uint64_t IDX_CEN_MBA_MBMACAQ_CMD_SLAVE_RANK = 7405; static const uint64_t IDX_CEN_MBA_MBMACAQ_CMD_SLAVE_RANK_LEN = 7406; static const uint64_t IDX_CEN_MBA_MBMACAQ_CMD_BANK = 7407; static const uint64_t IDX_CEN_MBA_MBMACAQ_CMD_BANK_LEN = 7408; static const uint64_t IDX_CEN_MBA_MBMACAQ_CMD_ROW = 7409; static const uint64_t IDX_CEN_MBA_MBMACAQ_CMD_ROW_LEN = 7410; static const uint64_t IDX_CEN_MBA_MBMACAQ_CMD_COL = 7411; static const uint64_t IDX_CEN_MBA_MBMACAQ_CMD_COL_LEN = 7412; static const uint64_t IDX_CEN_MBA_MBMACAQ_CMD_ERR_STATUS = 7413; static const uint64_t IDX_CEN_MBA_MBMACAQ_CMD_ERR_STATUS_LEN = 7414; static const uint64_t IDX_CEN_MBA_MBMACAQ_MRANK_SCRUBED = 7415; static const uint64_t IDX_CEN_MBA_MBMACAQ_MRANK_SCRUBED_LEN = 7416; static const uint64_t IDX_CEN_MBA_MBMACAQ_CMD_ROW17 = 7417; static const uint64_t IDX_CEN_MBA_MBMCCQ_MAINT_CMD_START = 7418; static const uint64_t IDX_CEN_MBA_MBMCCQ_MAINT_CMD_STOP = 7419; static const uint64_t IDX_CEN_MBA_MBMCTQ_MAINT_CMD_TYPE = 7420; static const uint64_t IDX_CEN_MBA_MBMCTQ_MAINT_CMD_TYPE_LEN = 7421; static const uint64_t IDX_CEN_MBA_MBMCTQ_SF_INCREMENT_MODE = 7422; static const uint64_t IDX_CEN_MBA_MBMCTQ_BURST_WINDOW_SEL = 7423; static const uint64_t IDX_CEN_MBA_MBMCTQ_RESERVED_7_8 = 7424; static const uint64_t IDX_CEN_MBA_MBMCTQ_RESERVED_7_8_LEN = 7425; static const uint64_t IDX_CEN_MBA_MBMCTQ_TIMEBASE_SEL = 7426; static const uint64_t IDX_CEN_MBA_MBMCTQ_TIMEBASE_SEL_LEN = 7427; static const uint64_t IDX_CEN_MBA_MBMCTQ_TIMEBASE_BURST_SEL = 7428; static const uint64_t IDX_CEN_MBA_MBMCTQ_TIMEBASE_INTERVAL = 7429; static const uint64_t IDX_CEN_MBA_MBMCTQ_TIMEBASE_INTERVAL_LEN = 7430; static const uint64_t IDX_CEN_MBA_MBMCTQ_BURST_WINDOW = 7431; static const uint64_t IDX_CEN_MBA_MBMCTQ_BURST_WINDOW_LEN = 7432; static const uint64_t IDX_CEN_MBA_MBMCTQ_BURST_INTERVAL = 7433; static const uint64_t IDX_CEN_MBA_MBMCTQ_BURST_INTERVAL_LEN = 7434; static const uint64_t IDX_CEN_MBA_MBMEAQ_END_MASTER_RANK0 = 7435; static const uint64_t IDX_CEN_MBA_MBMEAQ_END_DIMM_SELECT = 7436; static const uint64_t IDX_CEN_MBA_MBMEAQ_END_MASTER_RANK1 = 7437; static const uint64_t IDX_CEN_MBA_MBMEAQ_END_MASTER_RANK2 = 7438; static const uint64_t IDX_CEN_MBA_MBMEAQ_END_SLAVE_RANK = 7439; static const uint64_t IDX_CEN_MBA_MBMEAQ_END_SLAVE_RANK_LEN = 7440; static const uint64_t IDX_CEN_MBA_MBMEAQ_END_BANK = 7441; static const uint64_t IDX_CEN_MBA_MBMEAQ_END_BANK_LEN = 7442; static const uint64_t IDX_CEN_MBA_MBMEAQ_END_ROW = 7443; static const uint64_t IDX_CEN_MBA_MBMEAQ_END_ROW_LEN = 7444; static const uint64_t IDX_CEN_MBA_MBMEAQ_END_COL = 7445; static const uint64_t IDX_CEN_MBA_MBMEAQ_END_COL_LEN = 7446; static const uint64_t IDX_CEN_MBA_MBMEAQ_CMD_ROW17 = 7447; static const uint64_t IDX_CEN_MBA_MBMSRQ_MAINT_CMD_IP = 7448; static const uint64_t IDX_CEN_MBA_MBSPAMSKQ_COMMAND_COMPLETE_WO_ENA_ERR_ATTN = 7449; static const uint64_t IDX_CEN_MBA_MBSPAMSKQ_HARD_CE_ETE_ATTN = 7450; static const uint64_t IDX_CEN_MBA_MBSPAMSKQ_SOFT_CE_ETE_ATTN = 7451; static const uint64_t IDX_CEN_MBA_MBSPAMSKQ_INTERMITTENT_ETE_ATTN = 7452; static const uint64_t IDX_CEN_MBA_MBSPAMSKQ_RCE_ETE_ATTN = 7453; static const uint64_t IDX_CEN_MBA_MBSPAMSKQ_EMERGENCY_THROTTLE_ATTN = 7454; static const uint64_t IDX_CEN_MBA_MBSPAMSKQ_FIRMWARE_ATTN0 = 7455; static const uint64_t IDX_CEN_MBA_MBSPAMSKQ_FIRMWARE_ATTN1 = 7456; static const uint64_t IDX_CEN_MBA_MBSPAMSKQ_WAT_DEBUG_ATTN = 7457; static const uint64_t IDX_CEN_MBA_MBSPAMSKQ_SPARE_ATTN1 = 7458; static const uint64_t IDX_CEN_MBA_MBSPAMSKQ_MCBIST_DONE = 7459; static const uint64_t IDX_CEN_MBA_MBSPAQ_COMMAND_COMPLETE_WO_ENA_ERR_ATTN = 7460; static const uint64_t IDX_CEN_MBA_MBSPAQ_HARD_CE_ETE_ATTN = 7461; static const uint64_t IDX_CEN_MBA_MBSPAQ_SOFT_CE_ETE_ATTN = 7462; static const uint64_t IDX_CEN_MBA_MBSPAQ_INTERMITTENT_ETE_ATTN = 7463; static const uint64_t IDX_CEN_MBA_MBSPAQ_RCE_ETE_ATTN = 7464; static const uint64_t IDX_CEN_MBA_MBSPAQ_EMERGENCY_THROTTLE_ATTN = 7465; static const uint64_t IDX_CEN_MBA_MBSPAQ_FIRMWARE_ATTN0 = 7466; static const uint64_t IDX_CEN_MBA_MBSPAQ_FIRMWARE_ATTN1 = 7467; static const uint64_t IDX_CEN_MBA_MBSPAQ_WAT_DEBUG_ATTN = 7468; static const uint64_t IDX_CEN_MBA_MBSPAQ_SPARE_ATTN1 = 7469; static const uint64_t IDX_CEN_MBA_MBSPAQ_MCBIST_DONE = 7470; static const uint64_t IDX_CEN_MBA_MCBAGRAQ_CFG_FIXED_WIDTH_A0 = 7471; static const uint64_t IDX_CEN_MBA_MCBAGRAQ_CFG_FIXED_WIDTH_A0_LEN = 7472; static const uint64_t IDX_CEN_MBA_MCBAGRAQ_CFG_FIXED_WIDTH_A1 = 7473; static const uint64_t IDX_CEN_MBA_MCBAGRAQ_CFG_FIXED_WIDTH_A1_LEN = 7474; static const uint64_t IDX_CEN_MBA_MCBAGRAQ_CFG_PORTA0_RATIO = 7475; static const uint64_t IDX_CEN_MBA_MCBAGRAQ_CFG_PORTA0_RATIO_LEN = 7476; static const uint64_t IDX_CEN_MBA_MCBAGRAQ_CFG_PORTA1_RATIO = 7477; static const uint64_t IDX_CEN_MBA_MCBAGRAQ_CFG_PORTA1_RATIO_LEN = 7478; static const uint64_t IDX_CEN_MBA_MCBAGRAQ_CFG_RANDPORT_WGT_A = 7479; static const uint64_t IDX_CEN_MBA_MCBAGRAQ_CFG_RANDPORT_WGT_A_LEN = 7480; static const uint64_t IDX_CEN_MBA_MCBAGRAQ_CFG_DET_RAND_WGT_A = 7481; static const uint64_t IDX_CEN_MBA_MCBAGRAQ_CFG_PORTA_SCKT_PPLTD = 7482; static const uint64_t IDX_CEN_MBA_MCBAGRAQ_CFG_PORTA_SCKT_PPLTD_LEN = 7483; static const uint64_t IDX_CEN_MBA_MCBAGRAQ_RESERVED_26_31 = 7484; static const uint64_t IDX_CEN_MBA_MCBAGRAQ_RESERVED_26_31_LEN = 7485; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK0 = 7486; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK0_LEN = 7487; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK1 = 7488; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK1_LEN = 7489; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK2 = 7490; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK2_LEN = 7491; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK3 = 7492; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK3_LEN = 7493; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_SRANK0 = 7494; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_SRANK0_LEN = 7495; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_SRANK1 = 7496; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_SRANK1_LEN = 7497; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_SRANK2 = 7498; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_SRANK2_LEN = 7499; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_BANK3 = 7500; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_BANK3_LEN = 7501; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_BANK2 = 7502; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_BANK2_LEN = 7503; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_BANK1 = 7504; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_BANK1_LEN = 7505; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_RESERVED_60_63 = 7506; static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q_RESERVED_60_63_LEN = 7507; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK0 = 7508; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK0_LEN = 7509; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK1 = 7510; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK1_LEN = 7511; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK2 = 7512; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK2_LEN = 7513; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK3 = 7514; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK3_LEN = 7515; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_SRANK0 = 7516; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_SRANK0_LEN = 7517; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_SRANK1 = 7518; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_SRANK1_LEN = 7519; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_SRANK2 = 7520; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_SRANK2_LEN = 7521; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_BANK3 = 7522; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_BANK3_LEN = 7523; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_BANK2 = 7524; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_BANK2_LEN = 7525; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_BANK1 = 7526; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_BANK1_LEN = 7527; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_RESERVED_60_63 = 7528; static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q_RESERVED_60_63_LEN = 7529; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_BANK0 = 7530; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_BANK0_LEN = 7531; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW16 = 7532; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW16_LEN = 7533; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW15 = 7534; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW15_LEN = 7535; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW14 = 7536; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW14_LEN = 7537; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW13 = 7538; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW13_LEN = 7539; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW12 = 7540; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW12_LEN = 7541; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW11 = 7542; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW11_LEN = 7543; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW10 = 7544; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW10_LEN = 7545; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW9 = 7546; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW9_LEN = 7547; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW8 = 7548; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW8_LEN = 7549; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_RESERVED_60_63 = 7550; static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q_RESERVED_60_63_LEN = 7551; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_BANK0 = 7552; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_BANK0_LEN = 7553; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW16 = 7554; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW16_LEN = 7555; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW15 = 7556; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW15_LEN = 7557; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW14 = 7558; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW14_LEN = 7559; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW13 = 7560; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW13_LEN = 7561; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW12 = 7562; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW12_LEN = 7563; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW11 = 7564; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW11_LEN = 7565; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW10 = 7566; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW10_LEN = 7567; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW9 = 7568; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW9_LEN = 7569; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW8 = 7570; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW8_LEN = 7571; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_RESERVED_60_63 = 7572; static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q_RESERVED_60_63_LEN = 7573; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW7 = 7574; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW7_LEN = 7575; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW6 = 7576; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW6_LEN = 7577; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW5 = 7578; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW5_LEN = 7579; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW4 = 7580; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW4_LEN = 7581; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW3 = 7582; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW3_LEN = 7583; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW2 = 7584; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW2_LEN = 7585; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW1 = 7586; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW1_LEN = 7587; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW0 = 7588; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW0_LEN = 7589; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_COL13 = 7590; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_COL13_LEN = 7591; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_COL11 = 7592; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_COL11_LEN = 7593; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_RESERVED_60_63 = 7594; static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q_RESERVED_60_63_LEN = 7595; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW7 = 7596; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW7_LEN = 7597; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW6 = 7598; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW6_LEN = 7599; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW5 = 7600; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW5_LEN = 7601; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW4 = 7602; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW4_LEN = 7603; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW3 = 7604; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW3_LEN = 7605; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW2 = 7606; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW2_LEN = 7607; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW1 = 7608; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW1_LEN = 7609; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW0 = 7610; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW0_LEN = 7611; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_COL13 = 7612; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_COL13_LEN = 7613; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_COL11 = 7614; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_COL11_LEN = 7615; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_RESERVED_60_63 = 7616; static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q_RESERVED_60_63_LEN = 7617; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL9 = 7618; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL9_LEN = 7619; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL8 = 7620; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL8_LEN = 7621; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL7 = 7622; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL7_LEN = 7623; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL6 = 7624; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL6_LEN = 7625; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL5 = 7626; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL5_LEN = 7627; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL4 = 7628; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL4_LEN = 7629; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL3 = 7630; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL3_LEN = 7631; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL2 = 7632; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL2_LEN = 7633; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_RESERVED_48_63 = 7634; static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q_RESERVED_48_63_LEN = 7635; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL9 = 7636; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL9_LEN = 7637; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL8 = 7638; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL8_LEN = 7639; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL7 = 7640; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL7_LEN = 7641; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL6 = 7642; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL6_LEN = 7643; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL5 = 7644; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL5_LEN = 7645; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL4 = 7646; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL4_LEN = 7647; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL3 = 7648; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL3_LEN = 7649; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL2 = 7650; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL2_LEN = 7651; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_RESERVED_48_63 = 7652; static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q_RESERVED_48_63_LEN = 7653; static const uint64_t IDX_CEN_MBA_MCBCFGQ_RESERVED_0_37 = 7654; static const uint64_t IDX_CEN_MBA_MCBCFGQ_RESERVED_0_37_LEN = 7655; static const uint64_t IDX_CEN_MBA_MCBCFGQ_REFRESH_ONLY_SUBTEST_EN = 7656; static const uint64_t IDX_CEN_MBA_MCBCFGQ_REFRESH_ONLY_SUBTEST_TIMEBASE_SEL = 7657; static const uint64_t IDX_CEN_MBA_MCBCFGQ_REFRESH_ONLY_SUBTEST_TIMEBASE_SEL_LEN = 7658; static const uint64_t IDX_CEN_MBA_MCBCFGQ_RAND_ADDR_ALL_MODE_EN = 7659; static const uint64_t IDX_CEN_MBA_MCBCFGQ_MCBIST_CFG_REF_WAIT_TIME = 7660; static const uint64_t IDX_CEN_MBA_MCBCFGQ_MCBIST_CFG_REF_WAIT_TIME_LEN = 7661; static const uint64_t IDX_CEN_MBA_MCBCFGQ_RESERVED_56_59 = 7662; static const uint64_t IDX_CEN_MBA_MCBCFGQ_RESERVED_56_59_LEN = 7663; static const uint64_t IDX_CEN_MBA_MCBCFGQ_MCBIST_CFG_RESET_ERROR_DATA = 7664; static const uint64_t IDX_CEN_MBA_MCBCFGQ_MCBIST_CFG_BREAK_ON_SUBTEST = 7665; static const uint64_t IDX_CEN_MBA_MCBCFGQ_MCBIST_CFG_STOP_ON_ERR = 7666; static const uint64_t IDX_CEN_MBA_MCBCFGQ_RESERVED_63 = 7667; static const uint64_t IDX_CEN_MBA_MCBDRCRQ_CFG_DATA_ROT = 7668; static const uint64_t IDX_CEN_MBA_MCBDRCRQ_CFG_DATA_ROT_LEN = 7669; static const uint64_t IDX_CEN_MBA_MCBDRCRQ_CFG_DATA_ROT_SEED = 7670; static const uint64_t IDX_CEN_MBA_MCBDRCRQ_CFG_DATA_ROT_SEED_LEN = 7671; static const uint64_t IDX_CEN_MBA_MCBDRCRQ_CFG_INVERT_DATA = 7672; static const uint64_t IDX_CEN_MBA_MCBDRCRQ_RESERVED_21_63 = 7673; static const uint64_t IDX_CEN_MBA_MCBDRCRQ_RESERVED_21_63_LEN = 7674; static const uint64_t IDX_CEN_MBA_MCBDRSRQ_CFG_DATA_ROT_SEED = 7675; static const uint64_t IDX_CEN_MBA_MCBDRSRQ_CFG_DATA_ROT_SEED_LEN = 7676; static const uint64_t IDX_CEN_MBA_MCBFD0Q_CFG_FIXED_SEED = 7677; static const uint64_t IDX_CEN_MBA_MCBFD0Q_CFG_FIXED_SEED_LEN = 7678; static const uint64_t IDX_CEN_MBA_MCBFD1Q_CFG_FIXED_SEED = 7679; static const uint64_t IDX_CEN_MBA_MCBFD1Q_CFG_FIXED_SEED_LEN = 7680; static const uint64_t IDX_CEN_MBA_MCBFD2Q_CFG_FIXED_SEED = 7681; static const uint64_t IDX_CEN_MBA_MCBFD2Q_CFG_FIXED_SEED_LEN = 7682; static const uint64_t IDX_CEN_MBA_MCBFD3Q_CFG_FIXED_SEED = 7683; static const uint64_t IDX_CEN_MBA_MCBFD3Q_CFG_FIXED_SEED_LEN = 7684; static const uint64_t IDX_CEN_MBA_MCBFD4Q_CFG_FIXED_SEED = 7685; static const uint64_t IDX_CEN_MBA_MCBFD4Q_CFG_FIXED_SEED_LEN = 7686; static const uint64_t IDX_CEN_MBA_MCBFD5Q_CFG_FIXED_SEED = 7687; static const uint64_t IDX_CEN_MBA_MCBFD5Q_CFG_FIXED_SEED_LEN = 7688; static const uint64_t IDX_CEN_MBA_MCBFD6Q_CFG_FIXED_SEED = 7689; static const uint64_t IDX_CEN_MBA_MCBFD6Q_CFG_FIXED_SEED_LEN = 7690; static const uint64_t IDX_CEN_MBA_MCBFD7Q_CFG_FIXED_SEED = 7691; static const uint64_t IDX_CEN_MBA_MCBFD7Q_CFG_FIXED_SEED_LEN = 7692; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED1 = 7693; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED1_LEN = 7694; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED2 = 7695; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED2_LEN = 7696; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED3 = 7697; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED3_LEN = 7698; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED4 = 7699; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED4_LEN = 7700; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED5 = 7701; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED5_LEN = 7702; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED6 = 7703; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED6_LEN = 7704; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED7 = 7705; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED7_LEN = 7706; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED8 = 7707; static const uint64_t IDX_CEN_MBA_MCBFDQ_CFG_FIXED_SEED8_LEN = 7708; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED1 = 7709; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED1_LEN = 7710; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED2 = 7711; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED2_LEN = 7712; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED3 = 7713; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED3_LEN = 7714; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED4 = 7715; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED4_LEN = 7716; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED5 = 7717; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED5_LEN = 7718; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED6 = 7719; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED6_LEN = 7720; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED7 = 7721; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED7_LEN = 7722; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED8 = 7723; static const uint64_t IDX_CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED8_LEN = 7724; static const uint64_t IDX_CEN_MBA_MCBLFSRA0Q_CFG_LFSR_MASK_A0 = 7725; static const uint64_t IDX_CEN_MBA_MCBLFSRA0Q_CFG_LFSR_MASK_A0_LEN = 7726; static const uint64_t IDX_CEN_MBA_MCBLFSRA0Q_RESERVED_38_63 = 7727; static const uint64_t IDX_CEN_MBA_MCBLFSRA0Q_RESERVED_38_63_LEN = 7728; static const uint64_t IDX_CEN_MBA_MCBLFSRA1Q_CFG_LFSR_MASK_A1 = 7729; static const uint64_t IDX_CEN_MBA_MCBLFSRA1Q_CFG_LFSR_MASK_A1_LEN = 7730; static const uint64_t IDX_CEN_MBA_MCBLFSRA1Q_RESERVED_38_63 = 7731; static const uint64_t IDX_CEN_MBA_MCBLFSRA1Q_RESERVED_38_63_LEN = 7732; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_OP_TYPE = 7733; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_OP_TYPE_LEN = 7734; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_1ST_CMD = 7735; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_2ND_CMD = 7736; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_3RD_CMD = 7737; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_MODE = 7738; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_MODE_LEN = 7739; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_DATA_MODE = 7740; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_DATA_MODE_LEN = 7741; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_DONE = 7742; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_DATA_SEL = 7743; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_DATA_SEL_LEN = 7744; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_SEL = 7745; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_SEL_LEN = 7746; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_OP_TYPE = 7747; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_OP_TYPE_LEN = 7748; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_COMPL_1ST_CMD = 7749; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_COMPL_2ND_CMD = 7750; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_COMPL_3RD_CMD = 7751; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_MODE = 7752; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_MODE_LEN = 7753; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_DATA_MODE = 7754; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_DATA_MODE_LEN = 7755; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_DONE = 7756; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_DATA_SEL = 7757; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_DATA_SEL_LEN = 7758; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_SEL = 7759; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_SEL_LEN = 7760; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_OP_TYPE = 7761; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_OP_TYPE_LEN = 7762; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_COMPL_1ST_CMD = 7763; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_COMPL_2ND_CMD = 7764; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_COMPL_3RD_CMD = 7765; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_MODE = 7766; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_MODE_LEN = 7767; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_DATA_MODE = 7768; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_DATA_MODE_LEN = 7769; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_DONE = 7770; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_DATA_SEL = 7771; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_DATA_SEL_LEN = 7772; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_SEL = 7773; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_SEL_LEN = 7774; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_OP_TYPE = 7775; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_OP_TYPE_LEN = 7776; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_COMPL_1ST_CMD = 7777; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_COMPL_2ND_CMD = 7778; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_COMPL_3RD_CMD = 7779; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_MODE = 7780; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_MODE_LEN = 7781; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_DATA_MODE = 7782; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_DATA_MODE_LEN = 7783; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_DONE = 7784; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_DATA_SEL = 7785; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_DATA_SEL_LEN = 7786; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_SEL = 7787; static const uint64_t IDX_CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_SEL_LEN = 7788; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_OP_TYPE = 7789; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_OP_TYPE_LEN = 7790; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_COMPL_1ST_CMD = 7791; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_COMPL_2ND_CMD = 7792; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_COMPL_3RD_CMD = 7793; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_MODE = 7794; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_MODE_LEN = 7795; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_DATA_MODE = 7796; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_DATA_MODE_LEN = 7797; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_DONE = 7798; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_DATA_SEL = 7799; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_DATA_SEL_LEN = 7800; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_SEL = 7801; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_SEL_LEN = 7802; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_OP_TYPE = 7803; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_OP_TYPE_LEN = 7804; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_COMPL_1ST_CMD = 7805; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_COMPL_2ND_CMD = 7806; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_COMPL_3RD_CMD = 7807; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_MODE = 7808; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_MODE_LEN = 7809; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_DATA_MODE = 7810; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_DATA_MODE_LEN = 7811; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_DONE = 7812; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_DATA_SEL = 7813; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_DATA_SEL_LEN = 7814; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_SEL = 7815; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_SEL_LEN = 7816; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_OP_TYPE = 7817; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_OP_TYPE_LEN = 7818; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_COMPL_1ST_CMD = 7819; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_COMPL_2ND_CMD = 7820; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_COMPL_3RD_CMD = 7821; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_MODE = 7822; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_MODE_LEN = 7823; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_DATA_MODE = 7824; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_DATA_MODE_LEN = 7825; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_DONE = 7826; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_DATA_SEL = 7827; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_DATA_SEL_LEN = 7828; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_SEL = 7829; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_SEL_LEN = 7830; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_OP_TYPE = 7831; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_OP_TYPE_LEN = 7832; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_COMPL_1ST_CMD = 7833; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_COMPL_2ND_CMD = 7834; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_COMPL_3RD_CMD = 7835; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_MODE = 7836; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_MODE_LEN = 7837; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_DATA_MODE = 7838; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_DATA_MODE_LEN = 7839; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_DONE = 7840; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_DATA_SEL = 7841; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_DATA_SEL_LEN = 7842; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_SEL = 7843; static const uint64_t IDX_CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_SEL_LEN = 7844; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_OP_TYPE = 7845; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_OP_TYPE_LEN = 7846; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_COMPL_1ST_CMD = 7847; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_COMPL_2ND_CMD = 7848; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_COMPL_3RD_CMD = 7849; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_MODE = 7850; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_MODE_LEN = 7851; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_DATA_MODE = 7852; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_DATA_MODE_LEN = 7853; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_DONE = 7854; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_DATA_SEL = 7855; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_DATA_SEL_LEN = 7856; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_SEL = 7857; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_SEL_LEN = 7858; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_OP_TYPE = 7859; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_OP_TYPE_LEN = 7860; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_COMPL_1ST_CMD = 7861; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_COMPL_2ND_CMD = 7862; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_COMPL_3RD_CMD = 7863; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_MODE = 7864; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_MODE_LEN = 7865; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_DATA_MODE = 7866; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_DATA_MODE_LEN = 7867; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_DONE = 7868; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_DATA_SEL = 7869; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_DATA_SEL_LEN = 7870; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_SEL = 7871; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_SEL_LEN = 7872; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_OP_TYPE = 7873; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_OP_TYPE_LEN = 7874; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_COMPL_1ST_CMD = 7875; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_COMPL_2ND_CMD = 7876; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_COMPL_3RD_CMD = 7877; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_MODE = 7878; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_MODE_LEN = 7879; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_DATA_MODE = 7880; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_DATA_MODE_LEN = 7881; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_DONE = 7882; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_DATA_SEL = 7883; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_DATA_SEL_LEN = 7884; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_SEL = 7885; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_SEL_LEN = 7886; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_OP_TYPE = 7887; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_OP_TYPE_LEN = 7888; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_COMPL_1ST_CMD = 7889; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_COMPL_2ND_CMD = 7890; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_COMPL_3RD_CMD = 7891; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_MODE = 7892; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_MODE_LEN = 7893; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_DATA_MODE = 7894; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_DATA_MODE_LEN = 7895; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_DONE = 7896; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_DATA_SEL = 7897; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_DATA_SEL_LEN = 7898; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_SEL = 7899; static const uint64_t IDX_CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_SEL_LEN = 7900; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_OP_TYPE = 7901; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_OP_TYPE_LEN = 7902; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_COMPL_1ST_CMD = 7903; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_COMPL_2ND_CMD = 7904; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_COMPL_3RD_CMD = 7905; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_MODE = 7906; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_MODE_LEN = 7907; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_DATA_MODE = 7908; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_DATA_MODE_LEN = 7909; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_DONE = 7910; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_DATA_SEL = 7911; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_DATA_SEL_LEN = 7912; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_SEL = 7913; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_SEL_LEN = 7914; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_OP_TYPE = 7915; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_OP_TYPE_LEN = 7916; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_COMPL_1ST_CMD = 7917; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_COMPL_2ND_CMD = 7918; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_COMPL_3RD_CMD = 7919; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_MODE = 7920; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_MODE_LEN = 7921; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_DATA_MODE = 7922; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_DATA_MODE_LEN = 7923; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_DONE = 7924; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_DATA_SEL = 7925; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_DATA_SEL_LEN = 7926; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_SEL = 7927; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_SEL_LEN = 7928; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_OP_TYPE = 7929; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_OP_TYPE_LEN = 7930; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_COMPL_1ST_CMD = 7931; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_COMPL_2ND_CMD = 7932; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_COMPL_3RD_CMD = 7933; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_MODE = 7934; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_MODE_LEN = 7935; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_DATA_MODE = 7936; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_DATA_MODE_LEN = 7937; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_DONE = 7938; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_DATA_SEL = 7939; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_DATA_SEL_LEN = 7940; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_SEL = 7941; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_SEL_LEN = 7942; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_OP_TYPE = 7943; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_OP_TYPE_LEN = 7944; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_COMPL_1ST_CMD = 7945; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_COMPL_2ND_CMD = 7946; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_COMPL_3RD_CMD = 7947; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_MODE = 7948; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_MODE_LEN = 7949; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_DATA_MODE = 7950; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_DATA_MODE_LEN = 7951; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_DONE = 7952; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_DATA_SEL = 7953; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_DATA_SEL_LEN = 7954; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_SEL = 7955; static const uint64_t IDX_CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_SEL_LEN = 7956; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_OP_TYPE = 7957; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_OP_TYPE_LEN = 7958; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_COMPL_1ST_CMD = 7959; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_COMPL_2ND_CMD = 7960; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_COMPL_3RD_CMD = 7961; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_MODE = 7962; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_MODE_LEN = 7963; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_DATA_MODE = 7964; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_DATA_MODE_LEN = 7965; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_DONE = 7966; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_DATA_SEL = 7967; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_DATA_SEL_LEN = 7968; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_SEL = 7969; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_SEL_LEN = 7970; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_OP_TYPE = 7971; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_OP_TYPE_LEN = 7972; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_COMPL_1ST_CMD = 7973; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_COMPL_2ND_CMD = 7974; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_COMPL_3RD_CMD = 7975; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_MODE = 7976; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_MODE_LEN = 7977; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_DATA_MODE = 7978; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_DATA_MODE_LEN = 7979; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_DONE = 7980; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_DATA_SEL = 7981; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_DATA_SEL_LEN = 7982; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_SEL = 7983; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_SEL_LEN = 7984; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_OP_TYPE = 7985; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_OP_TYPE_LEN = 7986; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_COMPL_1ST_CMD = 7987; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_COMPL_2ND_CMD = 7988; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_COMPL_3RD_CMD = 7989; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_MODE = 7990; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_MODE_LEN = 7991; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_DATA_MODE = 7992; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_DATA_MODE_LEN = 7993; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_DONE = 7994; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_DATA_SEL = 7995; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_DATA_SEL_LEN = 7996; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_SEL = 7997; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_SEL_LEN = 7998; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_OP_TYPE = 7999; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_OP_TYPE_LEN = 8000; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_COMPL_1ST_CMD = 8001; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_COMPL_2ND_CMD = 8002; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_COMPL_3RD_CMD = 8003; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_MODE = 8004; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_MODE_LEN = 8005; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_DATA_MODE = 8006; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_DATA_MODE_LEN = 8007; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_DONE = 8008; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_DATA_SEL = 8009; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_DATA_SEL_LEN = 8010; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_SEL = 8011; static const uint64_t IDX_CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_SEL_LEN = 8012; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_OP_TYPE = 8013; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_OP_TYPE_LEN = 8014; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_COMPL_1ST_CMD = 8015; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_COMPL_2ND_CMD = 8016; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_COMPL_3RD_CMD = 8017; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_MODE = 8018; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_MODE_LEN = 8019; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_DATA_MODE = 8020; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_DATA_MODE_LEN = 8021; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_DONE = 8022; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_DATA_SEL = 8023; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_DATA_SEL_LEN = 8024; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_SEL = 8025; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_SEL_LEN = 8026; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_OP_TYPE = 8027; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_OP_TYPE_LEN = 8028; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_COMPL_1ST_CMD = 8029; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_COMPL_2ND_CMD = 8030; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_COMPL_3RD_CMD = 8031; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_MODE = 8032; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_MODE_LEN = 8033; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_DATA_MODE = 8034; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_DATA_MODE_LEN = 8035; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_DONE = 8036; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_DATA_SEL = 8037; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_DATA_SEL_LEN = 8038; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_SEL = 8039; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_SEL_LEN = 8040; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_OP_TYPE = 8041; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_OP_TYPE_LEN = 8042; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_COMPL_1ST_CMD = 8043; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_COMPL_2ND_CMD = 8044; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_COMPL_3RD_CMD = 8045; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_MODE = 8046; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_MODE_LEN = 8047; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_DATA_MODE = 8048; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_DATA_MODE_LEN = 8049; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_DONE = 8050; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_DATA_SEL = 8051; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_DATA_SEL_LEN = 8052; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_SEL = 8053; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_SEL_LEN = 8054; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_OP_TYPE = 8055; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_OP_TYPE_LEN = 8056; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_COMPL_1ST_CMD = 8057; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_COMPL_2ND_CMD = 8058; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_COMPL_3RD_CMD = 8059; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_MODE = 8060; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_MODE_LEN = 8061; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_DATA_MODE = 8062; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_DATA_MODE_LEN = 8063; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_DONE = 8064; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_DATA_SEL = 8065; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_DATA_SEL_LEN = 8066; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_SEL = 8067; static const uint64_t IDX_CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_SEL_LEN = 8068; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_OP_TYPE = 8069; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_OP_TYPE_LEN = 8070; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_COMPL_1ST_CMD = 8071; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_COMPL_2ND_CMD = 8072; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_COMPL_3RD_CMD = 8073; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_MODE = 8074; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_MODE_LEN = 8075; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_DATA_MODE = 8076; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_DATA_MODE_LEN = 8077; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_DONE = 8078; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_DATA_SEL = 8079; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_DATA_SEL_LEN = 8080; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_SEL = 8081; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_SEL_LEN = 8082; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_OP_TYPE = 8083; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_OP_TYPE_LEN = 8084; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_COMPL_1ST_CMD = 8085; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_COMPL_2ND_CMD = 8086; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_COMPL_3RD_CMD = 8087; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_MODE = 8088; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_MODE_LEN = 8089; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_DATA_MODE = 8090; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_DATA_MODE_LEN = 8091; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_DONE = 8092; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_DATA_SEL = 8093; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_DATA_SEL_LEN = 8094; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_SEL = 8095; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_SEL_LEN = 8096; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_OP_TYPE = 8097; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_OP_TYPE_LEN = 8098; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_COMPL_1ST_CMD = 8099; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_COMPL_2ND_CMD = 8100; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_COMPL_3RD_CMD = 8101; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_MODE = 8102; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_MODE_LEN = 8103; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_DATA_MODE = 8104; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_DATA_MODE_LEN = 8105; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_DONE = 8106; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_DATA_SEL = 8107; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_DATA_SEL_LEN = 8108; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_SEL = 8109; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_SEL_LEN = 8110; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_OP_TYPE = 8111; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_OP_TYPE_LEN = 8112; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_COMPL_1ST_CMD = 8113; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_COMPL_2ND_CMD = 8114; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_COMPL_3RD_CMD = 8115; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_MODE = 8116; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_MODE_LEN = 8117; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_DATA_MODE = 8118; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_DATA_MODE_LEN = 8119; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_DONE = 8120; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_DATA_SEL = 8121; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_DATA_SEL_LEN = 8122; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_SEL = 8123; static const uint64_t IDX_CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_SEL_LEN = 8124; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_OP_TYPE = 8125; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_OP_TYPE_LEN = 8126; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_COMPL_1ST_CMD = 8127; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_COMPL_2ND_CMD = 8128; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_COMPL_3RD_CMD = 8129; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_MODE = 8130; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_MODE_LEN = 8131; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_DATA_MODE = 8132; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_DATA_MODE_LEN = 8133; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_DONE = 8134; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_DATA_SEL = 8135; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_DATA_SEL_LEN = 8136; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_SEL = 8137; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_SEL_LEN = 8138; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_OP_TYPE = 8139; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_OP_TYPE_LEN = 8140; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_COMPL_1ST_CMD = 8141; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_COMPL_2ND_CMD = 8142; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_COMPL_3RD_CMD = 8143; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_MODE = 8144; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_MODE_LEN = 8145; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_DATA_MODE = 8146; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_DATA_MODE_LEN = 8147; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_DONE = 8148; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_DATA_SEL = 8149; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_DATA_SEL_LEN = 8150; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_SEL = 8151; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_SEL_LEN = 8152; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_OP_TYPE = 8153; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_OP_TYPE_LEN = 8154; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_COMPL_1ST_CMD = 8155; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_COMPL_2ND_CMD = 8156; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_COMPL_3RD_CMD = 8157; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_MODE = 8158; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_MODE_LEN = 8159; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_DATA_MODE = 8160; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_DATA_MODE_LEN = 8161; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_DONE = 8162; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_DATA_SEL = 8163; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_DATA_SEL_LEN = 8164; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_SEL = 8165; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_SEL_LEN = 8166; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_OP_TYPE = 8167; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_OP_TYPE_LEN = 8168; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_COMPL_1ST_CMD = 8169; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_COMPL_2ND_CMD = 8170; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_COMPL_3RD_CMD = 8171; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_MODE = 8172; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_MODE_LEN = 8173; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_DATA_MODE = 8174; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_DATA_MODE_LEN = 8175; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_DONE = 8176; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_DATA_SEL = 8177; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_DATA_SEL_LEN = 8178; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_SEL = 8179; static const uint64_t IDX_CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_SEL_LEN = 8180; static const uint64_t IDX_CEN_MBA_MCBPARMQ_RESERVED_0_49 = 8181; static const uint64_t IDX_CEN_MBA_MCBPARMQ_RESERVED_0_49_LEN = 8182; static const uint64_t IDX_CEN_MBA_MCBPARMQ_CFG_RANDCMD_WGT = 8183; static const uint64_t IDX_CEN_MBA_MCBPARMQ_CFG_RANDCMD_WGT_LEN = 8184; static const uint64_t IDX_CEN_MBA_MCBPARMQ_CFG_MIN_CMD_GAP = 8185; static const uint64_t IDX_CEN_MBA_MCBPARMQ_CFG_MIN_CMD_GAP_LEN = 8186; static const uint64_t IDX_CEN_MBA_MCBPARMQ_CFG_EN_RANDCMD_GAP = 8187; static const uint64_t IDX_CEN_MBA_MCBPARMQ_CFG_RANDGAP_WGT = 8188; static const uint64_t IDX_CEN_MBA_MCBPARMQ_CFG_RANDGAP_WGT_LEN = 8189; static const uint64_t IDX_CEN_MBA_MCBPARMQ_CFG_BC4_EN = 8190; static const uint64_t IDX_CEN_MBA_MCBRCRQ_RESERVED_0_31 = 8191; static const uint64_t IDX_CEN_MBA_MCBRCRQ_RESERVED_0_31_LEN = 8192; static const uint64_t IDX_CEN_MBA_MCBRCRQ_CFG_RUNTIME_MCBALL = 8193; static const uint64_t IDX_CEN_MBA_MCBRCRQ_CFG_RUNTIME_SUBTEST = 8194; static const uint64_t IDX_CEN_MBA_MCBRCRQ_CFG_RUNTIME_SUBTEST_LEN = 8195; static const uint64_t IDX_CEN_MBA_MCBRCRQ_CFG_RUNTIME_OVERHEAD = 8196; static const uint64_t IDX_CEN_MBA_MCBRCRQ_RESERVED_39 = 8197; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED0 = 8198; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED0_LEN = 8199; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED1 = 8200; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED1_LEN = 8201; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED2 = 8202; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED2_LEN = 8203; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED3 = 8204; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED3_LEN = 8205; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED4 = 8206; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED4_LEN = 8207; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED5 = 8208; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED5_LEN = 8209; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED6 = 8210; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED6_LEN = 8211; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED7 = 8212; static const uint64_t IDX_CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED7_LEN = 8213; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED0 = 8214; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED0_LEN = 8215; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED1 = 8216; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED1_LEN = 8217; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED2 = 8218; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED2_LEN = 8219; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED3 = 8220; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED3_LEN = 8221; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED4 = 8222; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED4_LEN = 8223; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED5 = 8224; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED5_LEN = 8225; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED6 = 8226; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED6_LEN = 8227; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED7 = 8228; static const uint64_t IDX_CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED7_LEN = 8229; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED0 = 8230; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED0_LEN = 8231; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED1 = 8232; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED1_LEN = 8233; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED2 = 8234; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED2_LEN = 8235; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED3 = 8236; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED3_LEN = 8237; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED4 = 8238; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED4_LEN = 8239; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED5 = 8240; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED5_LEN = 8241; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED6 = 8242; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED6_LEN = 8243; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED7 = 8244; static const uint64_t IDX_CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED7_LEN = 8245; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED0 = 8246; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED0_LEN = 8247; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED1 = 8248; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED1_LEN = 8249; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED2 = 8250; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED2_LEN = 8251; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED3 = 8252; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED3_LEN = 8253; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED4 = 8254; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED4_LEN = 8255; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED5 = 8256; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED5_LEN = 8257; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED6 = 8258; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED6_LEN = 8259; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED7 = 8260; static const uint64_t IDX_CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED7_LEN = 8261; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED0 = 8262; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED0_LEN = 8263; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED1 = 8264; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED1_LEN = 8265; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED2 = 8266; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED2_LEN = 8267; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED3 = 8268; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED3_LEN = 8269; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED4 = 8270; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED4_LEN = 8271; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED5 = 8272; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED5_LEN = 8273; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED6 = 8274; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED6_LEN = 8275; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED7 = 8276; static const uint64_t IDX_CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED7_LEN = 8277; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED0 = 8278; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED0_LEN = 8279; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED1 = 8280; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED1_LEN = 8281; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED2 = 8282; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED2_LEN = 8283; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED3 = 8284; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED3_LEN = 8285; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED4 = 8286; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED4_LEN = 8287; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED5 = 8288; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED5_LEN = 8289; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED6 = 8290; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED6_LEN = 8291; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED7 = 8292; static const uint64_t IDX_CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED7_LEN = 8293; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED0 = 8294; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED0_LEN = 8295; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED1 = 8296; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED1_LEN = 8297; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED2 = 8298; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED2_LEN = 8299; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED3 = 8300; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED3_LEN = 8301; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED4 = 8302; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED4_LEN = 8303; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED5 = 8304; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED5_LEN = 8305; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED6 = 8306; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED6_LEN = 8307; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED7 = 8308; static const uint64_t IDX_CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED7_LEN = 8309; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED0 = 8310; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED0_LEN = 8311; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED1 = 8312; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED1_LEN = 8313; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED2 = 8314; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED2_LEN = 8315; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED3 = 8316; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED3_LEN = 8317; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED4 = 8318; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED4_LEN = 8319; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED5 = 8320; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED5_LEN = 8321; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED6 = 8322; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED6_LEN = 8323; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED7 = 8324; static const uint64_t IDX_CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED7_LEN = 8325; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED0 = 8326; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED0_LEN = 8327; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED1 = 8328; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED1_LEN = 8329; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED2 = 8330; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED2_LEN = 8331; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED3 = 8332; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED3_LEN = 8333; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED4 = 8334; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED4_LEN = 8335; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED5 = 8336; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED5_LEN = 8337; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED6 = 8338; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED6_LEN = 8339; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED7 = 8340; static const uint64_t IDX_CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED7_LEN = 8341; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED0 = 8342; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED0_LEN = 8343; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED1 = 8344; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED1_LEN = 8345; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED2 = 8346; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED2_LEN = 8347; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED3 = 8348; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED3_LEN = 8349; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED4 = 8350; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED4_LEN = 8351; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED5 = 8352; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED5_LEN = 8353; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED6 = 8354; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED6_LEN = 8355; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED7 = 8356; static const uint64_t IDX_CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED7_LEN = 8357; static const uint64_t IDX_CEN_MBA_MCBREARA0Q_CFG_RAND_END_ADDR_A0 = 8358; static const uint64_t IDX_CEN_MBA_MCBREARA0Q_CFG_RAND_END_ADDR_A0_LEN = 8359; static const uint64_t IDX_CEN_MBA_MCBREARA0Q_RESERVED_38_63 = 8360; static const uint64_t IDX_CEN_MBA_MCBREARA0Q_RESERVED_38_63_LEN = 8361; static const uint64_t IDX_CEN_MBA_MCBREARA1Q_CFG_RAND_END_ADDR_A1 = 8362; static const uint64_t IDX_CEN_MBA_MCBREARA1Q_CFG_RAND_END_ADDR_A1_LEN = 8363; static const uint64_t IDX_CEN_MBA_MCBREARA1Q_RESERVED_38_63 = 8364; static const uint64_t IDX_CEN_MBA_MCBREARA1Q_RESERVED_38_63_LEN = 8365; static const uint64_t IDX_CEN_MBA_MCBRSARA0Q_CFG_RAND_START_ADDR_A0 = 8366; static const uint64_t IDX_CEN_MBA_MCBRSARA0Q_CFG_RAND_START_ADDR_A0_LEN = 8367; static const uint64_t IDX_CEN_MBA_MCBRSARA0Q_RESERVED_38_63 = 8368; static const uint64_t IDX_CEN_MBA_MCBRSARA0Q_RESERVED_38_63_LEN = 8369; static const uint64_t IDX_CEN_MBA_MCBRSARA1Q_CFG_RAND_START_ADDR_A1 = 8370; static const uint64_t IDX_CEN_MBA_MCBRSARA1Q_CFG_RAND_START_ADDR_A1_LEN = 8371; static const uint64_t IDX_CEN_MBA_MCBRSARA1Q_RESERVED_38_63 = 8372; static const uint64_t IDX_CEN_MBA_MCBRSARA1Q_RESERVED_38_63_LEN = 8373; static const uint64_t IDX_CEN_MBA_MCBSEARA0Q_CFG_SEQ_END_ADDR_A0 = 8374; static const uint64_t IDX_CEN_MBA_MCBSEARA0Q_CFG_SEQ_END_ADDR_A0_LEN = 8375; static const uint64_t IDX_CEN_MBA_MCBSEARA0Q_RESERVED_38_63 = 8376; static const uint64_t IDX_CEN_MBA_MCBSEARA0Q_RESERVED_38_63_LEN = 8377; static const uint64_t IDX_CEN_MBA_MCBSEARA1Q_CFG_SEQ_END_ADDR_A1 = 8378; static const uint64_t IDX_CEN_MBA_MCBSEARA1Q_CFG_SEQ_END_ADDR_A1_LEN = 8379; static const uint64_t IDX_CEN_MBA_MCBSEARA1Q_RESERVED_38_63 = 8380; static const uint64_t IDX_CEN_MBA_MCBSEARA1Q_RESERVED_38_63_LEN = 8381; static const uint64_t IDX_CEN_MBA_MCBSSARA0Q_CFG_SEQ_START_ADDR_A0 = 8382; static const uint64_t IDX_CEN_MBA_MCBSSARA0Q_CFG_SEQ_START_ADDR_A0_LEN = 8383; static const uint64_t IDX_CEN_MBA_MCBSSARA0Q_RESERVED_38_63 = 8384; static const uint64_t IDX_CEN_MBA_MCBSSARA0Q_RESERVED_38_63_LEN = 8385; static const uint64_t IDX_CEN_MBA_MCBSSARA1Q_CFG_SEQ_START_ADDR_A1 = 8386; static const uint64_t IDX_CEN_MBA_MCBSSARA1Q_CFG_SEQ_START_ADDR_A1_LEN = 8387; static const uint64_t IDX_CEN_MBA_MCBSSARA1Q_RESERVED_38_63 = 8388; static const uint64_t IDX_CEN_MBA_MCBSSARA1Q_RESERVED_38_63_LEN = 8389; static const uint64_t IDX_CEN_MBA_MCB_CNTLQ_START = 8390; static const uint64_t IDX_CEN_MBA_MCB_CNTLQ_STOP = 8391; static const uint64_t IDX_CEN_MBA_MCB_CNTLSTATQ_IP = 8392; static const uint64_t IDX_CEN_MBA_MCB_CNTLSTATQ_DONE = 8393; static const uint64_t IDX_CEN_MBA_MCB_CNTLSTATQ_FAIL = 8394; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM = 8395; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_LEN = 8396; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD1 = 8397; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD1_LEN = 8398; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD2 = 8399; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD2_LEN = 8400; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD3 = 8401; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD3_LEN = 8402; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD4 = 8403; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD4_LEN = 8404; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD5 = 8405; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD5_LEN = 8406; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD6 = 8407; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD6_LEN = 8408; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD7 = 8409; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD7_LEN = 8410; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD8 = 8411; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD8_LEN = 8412; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD9 = 8413; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD9_LEN = 8414; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD10 = 8415; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD10_LEN = 8416; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD11 = 8417; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD11_LEN = 8418; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD12 = 8419; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD12_LEN = 8420; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD13 = 8421; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD13_LEN = 8422; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD14 = 8423; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD14_LEN = 8424; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD15 = 8425; static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD15_LEN = 8426; static const uint64_t IDX_CEN_MBA_RUNTIMECTRQ_CFG_RUNTIME_CTR = 8427; static const uint64_t IDX_CEN_MBA_RUNTIMECTRQ_CFG_RUNTIME_CTR_LEN = 8428; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_MA_B_ADDRESS = 8429; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_MA_B_ADDRESS_LEN = 8430; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_DDR_RESETN = 8431; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_MA_B_BANK = 8432; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_MA_B_BANK_LEN = 8433; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_MA_B_ACTIVATE = 8434; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_MA_B_RASN = 8435; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_MA_B_CASN = 8436; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_MA_B_WEN = 8437; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_MA_B_CKE = 8438; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_MA_B_CKE_LEN = 8439; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_MA_B_CSN = 8440; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_MA_B_CSN_LEN = 8441; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_MA_B_ODT = 8442; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_MA_B_ODT_LEN = 8443; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_DDR_CALIBRATION_TYPE = 8444; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_DDR_CALIBRATION_TYPE_LEN = 8445; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_DDR_PARITY = 8446; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_MA_B_CKE3_7 = 8447; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_LOOP_BREAK_MODE = 8448; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0_LOOP_BREAK_MODE_LEN = 8449; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_MA_B_ADDRESS = 8450; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_MA_B_ADDRESS_LEN = 8451; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_DDR_RESETN = 8452; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_MA_B_BANK = 8453; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_MA_B_BANK_LEN = 8454; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_MA_B_ACTIVATE = 8455; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_MA_B_RASN = 8456; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_MA_B_CASN = 8457; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_MA_B_WEN = 8458; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_MA_B_CKE = 8459; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_MA_B_CKE_LEN = 8460; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_MA_B_CSN = 8461; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_MA_B_CSN_LEN = 8462; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_MA_B_ODT = 8463; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_MA_B_ODT_LEN = 8464; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_DDR_CALIBRATION_TYPE = 8465; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_DDR_CALIBRATION_TYPE_LEN = 8466; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_DDR_PARITY = 8467; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_MA_B_CKE3_7 = 8468; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_LOOP_BREAK_MODE = 8469; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1_LOOP_BREAK_MODE_LEN = 8470; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_MA_B_ADDRESS = 8471; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_MA_B_ADDRESS_LEN = 8472; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_DDR_RESETN = 8473; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_MA_B_BANK = 8474; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_MA_B_BANK_LEN = 8475; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_MA_B_ACTIVATE = 8476; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_MA_B_RASN = 8477; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_MA_B_CASN = 8478; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_MA_B_WEN = 8479; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_MA_B_CKE = 8480; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_MA_B_CKE_LEN = 8481; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_MA_B_CSN = 8482; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_MA_B_CSN_LEN = 8483; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_MA_B_ODT = 8484; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_MA_B_ODT_LEN = 8485; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_DDR_CALIBRATION_TYPE = 8486; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_DDR_CALIBRATION_TYPE_LEN = 8487; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_DDR_PARITY = 8488; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_MA_B_CKE3_7 = 8489; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_LOOP_BREAK_MODE = 8490; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10_LOOP_BREAK_MODE_LEN = 8491; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_MA_B_ADDRESS = 8492; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_MA_B_ADDRESS_LEN = 8493; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_DDR_RESETN = 8494; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_MA_B_BANK = 8495; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_MA_B_BANK_LEN = 8496; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_MA_B_ACTIVATE = 8497; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_MA_B_RASN = 8498; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_MA_B_CASN = 8499; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_MA_B_WEN = 8500; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_MA_B_CKE = 8501; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_MA_B_CKE_LEN = 8502; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_MA_B_CSN = 8503; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_MA_B_CSN_LEN = 8504; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_MA_B_ODT = 8505; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_MA_B_ODT_LEN = 8506; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_DDR_CALIBRATION_TYPE = 8507; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_DDR_CALIBRATION_TYPE_LEN = 8508; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_DDR_PARITY = 8509; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_MA_B_CKE3_7 = 8510; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_LOOP_BREAK_MODE = 8511; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11_LOOP_BREAK_MODE_LEN = 8512; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_MA_B_ADDRESS = 8513; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_MA_B_ADDRESS_LEN = 8514; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_DDR_RESETN = 8515; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_MA_B_BANK = 8516; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_MA_B_BANK_LEN = 8517; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_MA_B_ACTIVATE = 8518; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_MA_B_RASN = 8519; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_MA_B_CASN = 8520; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_MA_B_WEN = 8521; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_MA_B_CKE = 8522; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_MA_B_CKE_LEN = 8523; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_MA_B_CSN = 8524; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_MA_B_CSN_LEN = 8525; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_MA_B_ODT = 8526; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_MA_B_ODT_LEN = 8527; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_DDR_CALIBRATION_TYPE = 8528; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_DDR_CALIBRATION_TYPE_LEN = 8529; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_DDR_PARITY = 8530; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_MA_B_CKE3_7 = 8531; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_LOOP_BREAK_MODE = 8532; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12_LOOP_BREAK_MODE_LEN = 8533; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_MA_B_ADDRESS = 8534; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_MA_B_ADDRESS_LEN = 8535; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_DDR_RESETN = 8536; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_MA_B_BANK = 8537; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_MA_B_BANK_LEN = 8538; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_MA_B_ACTIVATE = 8539; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_MA_B_RASN = 8540; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_MA_B_CASN = 8541; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_MA_B_WEN = 8542; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_MA_B_CKE = 8543; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_MA_B_CKE_LEN = 8544; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_MA_B_CSN = 8545; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_MA_B_CSN_LEN = 8546; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_MA_B_ODT = 8547; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_MA_B_ODT_LEN = 8548; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_DDR_CALIBRATION_TYPE = 8549; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_DDR_CALIBRATION_TYPE_LEN = 8550; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_DDR_PARITY = 8551; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_MA_B_CKE3_7 = 8552; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_LOOP_BREAK_MODE = 8553; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13_LOOP_BREAK_MODE_LEN = 8554; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_MA_B_ADDRESS = 8555; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_MA_B_ADDRESS_LEN = 8556; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_DDR_RESETN = 8557; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_MA_B_BANK = 8558; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_MA_B_BANK_LEN = 8559; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_MA_B_ACTIVATE = 8560; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_MA_B_RASN = 8561; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_MA_B_CASN = 8562; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_MA_B_WEN = 8563; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_MA_B_CKE = 8564; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_MA_B_CKE_LEN = 8565; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_MA_B_CSN = 8566; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_MA_B_CSN_LEN = 8567; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_MA_B_ODT = 8568; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_MA_B_ODT_LEN = 8569; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_DDR_CALIBRATION_TYPE = 8570; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_DDR_CALIBRATION_TYPE_LEN = 8571; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_DDR_PARITY = 8572; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_MA_B_CKE3_7 = 8573; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_LOOP_BREAK_MODE = 8574; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14_LOOP_BREAK_MODE_LEN = 8575; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_MA_B_ADDRESS = 8576; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_MA_B_ADDRESS_LEN = 8577; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_DDR_RESETN = 8578; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_MA_B_BANK = 8579; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_MA_B_BANK_LEN = 8580; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_MA_B_ACTIVATE = 8581; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_MA_B_RASN = 8582; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_MA_B_CASN = 8583; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_MA_B_WEN = 8584; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_MA_B_CKE = 8585; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_MA_B_CKE_LEN = 8586; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_MA_B_CSN = 8587; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_MA_B_CSN_LEN = 8588; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_MA_B_ODT = 8589; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_MA_B_ODT_LEN = 8590; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_DDR_CALIBRATION_TYPE = 8591; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_DDR_CALIBRATION_TYPE_LEN = 8592; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_DDR_PARITY = 8593; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_MA_B_CKE3_7 = 8594; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_LOOP_BREAK_MODE = 8595; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15_LOOP_BREAK_MODE_LEN = 8596; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_MA_B_ADDRESS = 8597; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_MA_B_ADDRESS_LEN = 8598; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_DDR_RESETN = 8599; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_MA_B_BANK = 8600; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_MA_B_BANK_LEN = 8601; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_MA_B_ACTIVATE = 8602; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_MA_B_RASN = 8603; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_MA_B_CASN = 8604; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_MA_B_WEN = 8605; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_MA_B_CKE = 8606; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_MA_B_CKE_LEN = 8607; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_MA_B_CSN = 8608; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_MA_B_CSN_LEN = 8609; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_MA_B_ODT = 8610; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_MA_B_ODT_LEN = 8611; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_DDR_CALIBRATION_TYPE = 8612; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_DDR_CALIBRATION_TYPE_LEN = 8613; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_DDR_PARITY = 8614; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_MA_B_CKE3_7 = 8615; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_LOOP_BREAK_MODE = 8616; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16_LOOP_BREAK_MODE_LEN = 8617; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_MA_B_ADDRESS = 8618; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_MA_B_ADDRESS_LEN = 8619; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_DDR_RESETN = 8620; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_MA_B_BANK = 8621; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_MA_B_BANK_LEN = 8622; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_MA_B_ACTIVATE = 8623; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_MA_B_RASN = 8624; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_MA_B_CASN = 8625; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_MA_B_WEN = 8626; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_MA_B_CKE = 8627; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_MA_B_CKE_LEN = 8628; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_MA_B_CSN = 8629; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_MA_B_CSN_LEN = 8630; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_MA_B_ODT = 8631; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_MA_B_ODT_LEN = 8632; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_DDR_CALIBRATION_TYPE = 8633; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_DDR_CALIBRATION_TYPE_LEN = 8634; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_DDR_PARITY = 8635; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_MA_B_CKE3_7 = 8636; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_LOOP_BREAK_MODE = 8637; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17_LOOP_BREAK_MODE_LEN = 8638; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_MA_B_ADDRESS = 8639; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_MA_B_ADDRESS_LEN = 8640; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_DDR_RESETN = 8641; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_MA_B_BANK = 8642; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_MA_B_BANK_LEN = 8643; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_MA_B_ACTIVATE = 8644; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_MA_B_RASN = 8645; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_MA_B_CASN = 8646; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_MA_B_WEN = 8647; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_MA_B_CKE = 8648; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_MA_B_CKE_LEN = 8649; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_MA_B_CSN = 8650; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_MA_B_CSN_LEN = 8651; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_MA_B_ODT = 8652; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_MA_B_ODT_LEN = 8653; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_DDR_CALIBRATION_TYPE = 8654; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_DDR_CALIBRATION_TYPE_LEN = 8655; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_DDR_PARITY = 8656; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_MA_B_CKE3_7 = 8657; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_LOOP_BREAK_MODE = 8658; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18_LOOP_BREAK_MODE_LEN = 8659; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_MA_B_ADDRESS = 8660; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_MA_B_ADDRESS_LEN = 8661; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_DDR_RESETN = 8662; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_MA_B_BANK = 8663; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_MA_B_BANK_LEN = 8664; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_MA_B_ACTIVATE = 8665; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_MA_B_RASN = 8666; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_MA_B_CASN = 8667; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_MA_B_WEN = 8668; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_MA_B_CKE = 8669; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_MA_B_CKE_LEN = 8670; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_MA_B_CSN = 8671; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_MA_B_CSN_LEN = 8672; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_MA_B_ODT = 8673; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_MA_B_ODT_LEN = 8674; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_DDR_CALIBRATION_TYPE = 8675; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_DDR_CALIBRATION_TYPE_LEN = 8676; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_DDR_PARITY = 8677; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_MA_B_CKE3_7 = 8678; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_LOOP_BREAK_MODE = 8679; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19_LOOP_BREAK_MODE_LEN = 8680; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_MA_B_ADDRESS = 8681; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_MA_B_ADDRESS_LEN = 8682; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_DDR_RESETN = 8683; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_MA_B_BANK = 8684; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_MA_B_BANK_LEN = 8685; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_MA_B_ACTIVATE = 8686; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_MA_B_RASN = 8687; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_MA_B_CASN = 8688; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_MA_B_WEN = 8689; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_MA_B_CKE = 8690; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_MA_B_CKE_LEN = 8691; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_MA_B_CSN = 8692; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_MA_B_CSN_LEN = 8693; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_MA_B_ODT = 8694; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_MA_B_ODT_LEN = 8695; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_DDR_CALIBRATION_TYPE = 8696; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_DDR_CALIBRATION_TYPE_LEN = 8697; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_DDR_PARITY = 8698; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_MA_B_CKE3_7 = 8699; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_LOOP_BREAK_MODE = 8700; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2_LOOP_BREAK_MODE_LEN = 8701; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_MA_B_ADDRESS = 8702; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_MA_B_ADDRESS_LEN = 8703; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_DDR_RESETN = 8704; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_MA_B_BANK = 8705; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_MA_B_BANK_LEN = 8706; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_MA_B_ACTIVATE = 8707; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_MA_B_RASN = 8708; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_MA_B_CASN = 8709; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_MA_B_WEN = 8710; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_MA_B_CKE = 8711; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_MA_B_CKE_LEN = 8712; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_MA_B_CSN = 8713; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_MA_B_CSN_LEN = 8714; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_MA_B_ODT = 8715; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_MA_B_ODT_LEN = 8716; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_DDR_CALIBRATION_TYPE = 8717; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_DDR_CALIBRATION_TYPE_LEN = 8718; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_DDR_PARITY = 8719; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_MA_B_CKE3_7 = 8720; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_LOOP_BREAK_MODE = 8721; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20_LOOP_BREAK_MODE_LEN = 8722; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_MA_B_ADDRESS = 8723; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_MA_B_ADDRESS_LEN = 8724; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_DDR_RESETN = 8725; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_MA_B_BANK = 8726; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_MA_B_BANK_LEN = 8727; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_MA_B_ACTIVATE = 8728; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_MA_B_RASN = 8729; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_MA_B_CASN = 8730; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_MA_B_WEN = 8731; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_MA_B_CKE = 8732; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_MA_B_CKE_LEN = 8733; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_MA_B_CSN = 8734; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_MA_B_CSN_LEN = 8735; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_MA_B_ODT = 8736; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_MA_B_ODT_LEN = 8737; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_DDR_CALIBRATION_TYPE = 8738; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_DDR_CALIBRATION_TYPE_LEN = 8739; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_DDR_PARITY = 8740; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_MA_B_CKE3_7 = 8741; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_LOOP_BREAK_MODE = 8742; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21_LOOP_BREAK_MODE_LEN = 8743; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_MA_B_ADDRESS = 8744; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_MA_B_ADDRESS_LEN = 8745; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_DDR_RESETN = 8746; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_MA_B_BANK = 8747; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_MA_B_BANK_LEN = 8748; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_MA_B_ACTIVATE = 8749; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_MA_B_RASN = 8750; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_MA_B_CASN = 8751; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_MA_B_WEN = 8752; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_MA_B_CKE = 8753; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_MA_B_CKE_LEN = 8754; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_MA_B_CSN = 8755; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_MA_B_CSN_LEN = 8756; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_MA_B_ODT = 8757; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_MA_B_ODT_LEN = 8758; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_DDR_CALIBRATION_TYPE = 8759; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_DDR_CALIBRATION_TYPE_LEN = 8760; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_DDR_PARITY = 8761; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_MA_B_CKE3_7 = 8762; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_LOOP_BREAK_MODE = 8763; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22_LOOP_BREAK_MODE_LEN = 8764; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_MA_B_ADDRESS = 8765; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_MA_B_ADDRESS_LEN = 8766; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_DDR_RESETN = 8767; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_MA_B_BANK = 8768; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_MA_B_BANK_LEN = 8769; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_MA_B_ACTIVATE = 8770; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_MA_B_RASN = 8771; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_MA_B_CASN = 8772; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_MA_B_WEN = 8773; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_MA_B_CKE = 8774; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_MA_B_CKE_LEN = 8775; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_MA_B_CSN = 8776; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_MA_B_CSN_LEN = 8777; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_MA_B_ODT = 8778; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_MA_B_ODT_LEN = 8779; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_DDR_CALIBRATION_TYPE = 8780; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_DDR_CALIBRATION_TYPE_LEN = 8781; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_DDR_PARITY = 8782; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_MA_B_CKE3_7 = 8783; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_LOOP_BREAK_MODE = 8784; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23_LOOP_BREAK_MODE_LEN = 8785; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_MA_B_ADDRESS = 8786; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_MA_B_ADDRESS_LEN = 8787; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_DDR_RESETN = 8788; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_MA_B_BANK = 8789; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_MA_B_BANK_LEN = 8790; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_MA_B_ACTIVATE = 8791; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_MA_B_RASN = 8792; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_MA_B_CASN = 8793; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_MA_B_WEN = 8794; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_MA_B_CKE = 8795; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_MA_B_CKE_LEN = 8796; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_MA_B_CSN = 8797; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_MA_B_CSN_LEN = 8798; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_MA_B_ODT = 8799; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_MA_B_ODT_LEN = 8800; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_DDR_CALIBRATION_TYPE = 8801; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_DDR_CALIBRATION_TYPE_LEN = 8802; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_DDR_PARITY = 8803; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_MA_B_CKE3_7 = 8804; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_LOOP_BREAK_MODE = 8805; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24_LOOP_BREAK_MODE_LEN = 8806; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_MA_B_ADDRESS = 8807; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_MA_B_ADDRESS_LEN = 8808; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_DDR_RESETN = 8809; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_MA_B_BANK = 8810; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_MA_B_BANK_LEN = 8811; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_MA_B_ACTIVATE = 8812; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_MA_B_RASN = 8813; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_MA_B_CASN = 8814; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_MA_B_WEN = 8815; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_MA_B_CKE = 8816; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_MA_B_CKE_LEN = 8817; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_MA_B_CSN = 8818; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_MA_B_CSN_LEN = 8819; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_MA_B_ODT = 8820; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_MA_B_ODT_LEN = 8821; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_DDR_CALIBRATION_TYPE = 8822; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_DDR_CALIBRATION_TYPE_LEN = 8823; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_DDR_PARITY = 8824; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_MA_B_CKE3_7 = 8825; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_LOOP_BREAK_MODE = 8826; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25_LOOP_BREAK_MODE_LEN = 8827; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_MA_B_ADDRESS = 8828; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_MA_B_ADDRESS_LEN = 8829; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_DDR_RESETN = 8830; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_MA_B_BANK = 8831; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_MA_B_BANK_LEN = 8832; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_MA_B_ACTIVATE = 8833; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_MA_B_RASN = 8834; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_MA_B_CASN = 8835; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_MA_B_WEN = 8836; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_MA_B_CKE = 8837; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_MA_B_CKE_LEN = 8838; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_MA_B_CSN = 8839; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_MA_B_CSN_LEN = 8840; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_MA_B_ODT = 8841; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_MA_B_ODT_LEN = 8842; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_DDR_CALIBRATION_TYPE = 8843; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_DDR_CALIBRATION_TYPE_LEN = 8844; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_DDR_PARITY = 8845; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_MA_B_CKE3_7 = 8846; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_LOOP_BREAK_MODE = 8847; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26_LOOP_BREAK_MODE_LEN = 8848; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_MA_B_ADDRESS = 8849; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_MA_B_ADDRESS_LEN = 8850; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_DDR_RESETN = 8851; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_MA_B_BANK = 8852; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_MA_B_BANK_LEN = 8853; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_MA_B_ACTIVATE = 8854; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_MA_B_RASN = 8855; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_MA_B_CASN = 8856; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_MA_B_WEN = 8857; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_MA_B_CKE = 8858; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_MA_B_CKE_LEN = 8859; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_MA_B_CSN = 8860; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_MA_B_CSN_LEN = 8861; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_MA_B_ODT = 8862; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_MA_B_ODT_LEN = 8863; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_DDR_CALIBRATION_TYPE = 8864; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_DDR_CALIBRATION_TYPE_LEN = 8865; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_DDR_PARITY = 8866; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_MA_B_CKE3_7 = 8867; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_LOOP_BREAK_MODE = 8868; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27_LOOP_BREAK_MODE_LEN = 8869; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_MA_B_ADDRESS = 8870; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_MA_B_ADDRESS_LEN = 8871; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_DDR_RESETN = 8872; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_MA_B_BANK = 8873; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_MA_B_BANK_LEN = 8874; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_MA_B_ACTIVATE = 8875; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_MA_B_RASN = 8876; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_MA_B_CASN = 8877; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_MA_B_WEN = 8878; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_MA_B_CKE = 8879; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_MA_B_CKE_LEN = 8880; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_MA_B_CSN = 8881; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_MA_B_CSN_LEN = 8882; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_MA_B_ODT = 8883; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_MA_B_ODT_LEN = 8884; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_DDR_CALIBRATION_TYPE = 8885; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_DDR_CALIBRATION_TYPE_LEN = 8886; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_DDR_PARITY = 8887; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_MA_B_CKE3_7 = 8888; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_LOOP_BREAK_MODE = 8889; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28_LOOP_BREAK_MODE_LEN = 8890; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_MA_B_ADDRESS = 8891; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_MA_B_ADDRESS_LEN = 8892; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_DDR_RESETN = 8893; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_MA_B_BANK = 8894; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_MA_B_BANK_LEN = 8895; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_MA_B_ACTIVATE = 8896; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_MA_B_RASN = 8897; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_MA_B_CASN = 8898; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_MA_B_WEN = 8899; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_MA_B_CKE = 8900; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_MA_B_CKE_LEN = 8901; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_MA_B_CSN = 8902; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_MA_B_CSN_LEN = 8903; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_MA_B_ODT = 8904; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_MA_B_ODT_LEN = 8905; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_DDR_CALIBRATION_TYPE = 8906; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_DDR_CALIBRATION_TYPE_LEN = 8907; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_DDR_PARITY = 8908; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_MA_B_CKE3_7 = 8909; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_LOOP_BREAK_MODE = 8910; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29_LOOP_BREAK_MODE_LEN = 8911; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_MA_B_ADDRESS = 8912; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_MA_B_ADDRESS_LEN = 8913; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_DDR_RESETN = 8914; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_MA_B_BANK = 8915; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_MA_B_BANK_LEN = 8916; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_MA_B_ACTIVATE = 8917; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_MA_B_RASN = 8918; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_MA_B_CASN = 8919; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_MA_B_WEN = 8920; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_MA_B_CKE = 8921; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_MA_B_CKE_LEN = 8922; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_MA_B_CSN = 8923; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_MA_B_CSN_LEN = 8924; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_MA_B_ODT = 8925; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_MA_B_ODT_LEN = 8926; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_DDR_CALIBRATION_TYPE = 8927; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_DDR_CALIBRATION_TYPE_LEN = 8928; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_DDR_PARITY = 8929; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_MA_B_CKE3_7 = 8930; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_LOOP_BREAK_MODE = 8931; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3_LOOP_BREAK_MODE_LEN = 8932; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_MA_B_ADDRESS = 8933; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_MA_B_ADDRESS_LEN = 8934; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_DDR_RESETN = 8935; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_MA_B_BANK = 8936; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_MA_B_BANK_LEN = 8937; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_MA_B_ACTIVATE = 8938; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_MA_B_RASN = 8939; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_MA_B_CASN = 8940; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_MA_B_WEN = 8941; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_MA_B_CKE = 8942; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_MA_B_CKE_LEN = 8943; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_MA_B_CSN = 8944; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_MA_B_CSN_LEN = 8945; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_MA_B_ODT = 8946; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_MA_B_ODT_LEN = 8947; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_DDR_CALIBRATION_TYPE = 8948; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_DDR_CALIBRATION_TYPE_LEN = 8949; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_DDR_PARITY = 8950; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_MA_B_CKE3_7 = 8951; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_LOOP_BREAK_MODE = 8952; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30_LOOP_BREAK_MODE_LEN = 8953; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_MA_B_ADDRESS = 8954; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_MA_B_ADDRESS_LEN = 8955; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_DDR_RESETN = 8956; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_MA_B_BANK = 8957; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_MA_B_BANK_LEN = 8958; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_MA_B_ACTIVATE = 8959; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_MA_B_RASN = 8960; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_MA_B_CASN = 8961; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_MA_B_WEN = 8962; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_MA_B_CKE = 8963; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_MA_B_CKE_LEN = 8964; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_MA_B_CSN = 8965; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_MA_B_CSN_LEN = 8966; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_MA_B_ODT = 8967; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_MA_B_ODT_LEN = 8968; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_DDR_CALIBRATION_TYPE = 8969; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_DDR_CALIBRATION_TYPE_LEN = 8970; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_DDR_PARITY = 8971; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_MA_B_CKE3_7 = 8972; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_LOOP_BREAK_MODE = 8973; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31_LOOP_BREAK_MODE_LEN = 8974; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_MA_B_ADDRESS = 8975; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_MA_B_ADDRESS_LEN = 8976; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_DDR_RESETN = 8977; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_MA_B_BANK = 8978; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_MA_B_BANK_LEN = 8979; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_MA_B_ACTIVATE = 8980; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_MA_B_RASN = 8981; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_MA_B_CASN = 8982; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_MA_B_WEN = 8983; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_MA_B_CKE = 8984; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_MA_B_CKE_LEN = 8985; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_MA_B_CSN = 8986; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_MA_B_CSN_LEN = 8987; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_MA_B_ODT = 8988; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_MA_B_ODT_LEN = 8989; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_DDR_CALIBRATION_TYPE = 8990; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_DDR_CALIBRATION_TYPE_LEN = 8991; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_DDR_PARITY = 8992; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_MA_B_CKE3_7 = 8993; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_LOOP_BREAK_MODE = 8994; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4_LOOP_BREAK_MODE_LEN = 8995; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_MA_B_ADDRESS = 8996; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_MA_B_ADDRESS_LEN = 8997; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_DDR_RESETN = 8998; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_MA_B_BANK = 8999; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_MA_B_BANK_LEN = 9000; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_MA_B_ACTIVATE = 9001; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_MA_B_RASN = 9002; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_MA_B_CASN = 9003; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_MA_B_WEN = 9004; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_MA_B_CKE = 9005; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_MA_B_CKE_LEN = 9006; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_MA_B_CSN = 9007; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_MA_B_CSN_LEN = 9008; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_MA_B_ODT = 9009; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_MA_B_ODT_LEN = 9010; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_DDR_CALIBRATION_TYPE = 9011; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_DDR_CALIBRATION_TYPE_LEN = 9012; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_DDR_PARITY = 9013; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_MA_B_CKE3_7 = 9014; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_LOOP_BREAK_MODE = 9015; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5_LOOP_BREAK_MODE_LEN = 9016; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_MA_B_ADDRESS = 9017; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_MA_B_ADDRESS_LEN = 9018; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_DDR_RESETN = 9019; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_MA_B_BANK = 9020; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_MA_B_BANK_LEN = 9021; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_MA_B_ACTIVATE = 9022; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_MA_B_RASN = 9023; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_MA_B_CASN = 9024; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_MA_B_WEN = 9025; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_MA_B_CKE = 9026; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_MA_B_CKE_LEN = 9027; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_MA_B_CSN = 9028; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_MA_B_CSN_LEN = 9029; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_MA_B_ODT = 9030; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_MA_B_ODT_LEN = 9031; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_DDR_CALIBRATION_TYPE = 9032; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_DDR_CALIBRATION_TYPE_LEN = 9033; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_DDR_PARITY = 9034; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_MA_B_CKE3_7 = 9035; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_LOOP_BREAK_MODE = 9036; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6_LOOP_BREAK_MODE_LEN = 9037; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_MA_B_ADDRESS = 9038; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_MA_B_ADDRESS_LEN = 9039; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_DDR_RESETN = 9040; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_MA_B_BANK = 9041; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_MA_B_BANK_LEN = 9042; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_MA_B_ACTIVATE = 9043; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_MA_B_RASN = 9044; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_MA_B_CASN = 9045; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_MA_B_WEN = 9046; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_MA_B_CKE = 9047; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_MA_B_CKE_LEN = 9048; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_MA_B_CSN = 9049; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_MA_B_CSN_LEN = 9050; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_MA_B_ODT = 9051; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_MA_B_ODT_LEN = 9052; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_DDR_CALIBRATION_TYPE = 9053; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_DDR_CALIBRATION_TYPE_LEN = 9054; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_DDR_PARITY = 9055; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_MA_B_CKE3 = 9056; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_LOOP_BREAK_MODE = 9057; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7_LOOP_BREAK_MODE_LEN = 9058; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_MA_B_ADDRESS = 9059; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_MA_B_ADDRESS_LEN = 9060; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_DDR_RESETN = 9061; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_MA_B_BANK = 9062; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_MA_B_BANK_LEN = 9063; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_MA_B_ACTIVATE = 9064; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_MA_B_RASN = 9065; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_MA_B_CASN = 9066; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_MA_B_WEN = 9067; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_MA_B_CKE = 9068; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_MA_B_CKE_LEN = 9069; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_MA_B_CSN = 9070; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_MA_B_CSN_LEN = 9071; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_MA_B_ODT = 9072; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_MA_B_ODT_LEN = 9073; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_DDR_CALIBRATION_TYPE = 9074; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_DDR_CALIBRATION_TYPE_LEN = 9075; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_DDR_PARITY = 9076; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_MA_B_CKE3_7 = 9077; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_LOOP_BREAK_MODE = 9078; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8_LOOP_BREAK_MODE_LEN = 9079; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_MA_B_ADDRESS = 9080; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_MA_B_ADDRESS_LEN = 9081; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_DDR_RESETN = 9082; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_MA_B_BANK = 9083; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_MA_B_BANK_LEN = 9084; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_MA_B_ACTIVATE = 9085; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_MA_B_RASN = 9086; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_MA_B_CASN = 9087; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_MA_B_WEN = 9088; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_MA_B_CKE = 9089; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_MA_B_CKE_LEN = 9090; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_MA_B_CSN = 9091; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_MA_B_CSN_LEN = 9092; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_MA_B_ODT = 9093; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_MA_B_ODT_LEN = 9094; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_DDR_CALIBRATION_TYPE = 9095; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_DDR_CALIBRATION_TYPE_LEN = 9096; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_DDR_PARITY = 9097; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_MA_B_CKE3_7 = 9098; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_LOOP_BREAK_MODE = 9099; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9_LOOP_BREAK_MODE_LEN = 9100; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_0_IDLES = 9101; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_0_IDLES_LEN = 9102; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_0_REPEAT_CMD_CNT = 9103; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_0_REPEAT_CMD_CNT_LEN = 9104; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_0_READ_OR_WRITE_DATA = 9105; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_0_READ_OR_WRITE_DATA_LEN = 9106; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_0_READ_COMPARE_REQUIRED = 9107; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_0_DDR_CAL_RANK = 9108; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_0_DDR_CAL_RANK_LEN = 9109; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_0_DDR_CALIBRATION_ENABLE = 9110; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_0_END = 9111; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_0_GOTO_CMD = 9112; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_0_GOTO_CMD_LEN = 9113; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_1_IDLES = 9114; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_1_IDLES_LEN = 9115; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_1_REPEAT_CMD_CNT = 9116; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_1_REPEAT_CMD_CNT_LEN = 9117; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_1_READ_OR_WRITE_DATA = 9118; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_1_READ_OR_WRITE_DATA_LEN = 9119; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_1_READ_COMPARE_REQUIRED = 9120; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_1_DDR_CAL_RANK = 9121; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_1_DDR_CAL_RANK_LEN = 9122; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_1_DDR_CALIBRATION_ENABLE = 9123; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_1_END = 9124; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_1_GOTO_CMD = 9125; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_1_GOTO_CMD_LEN = 9126; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_10_IDLES = 9127; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_10_IDLES_LEN = 9128; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_10_REPEAT_CMD_CNT = 9129; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_10_REPEAT_CMD_CNT_LEN = 9130; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_10_READ_OR_WRITE_DATA = 9131; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_10_READ_OR_WRITE_DATA_LEN = 9132; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_10_READ_COMPARE_REQUIRED = 9133; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_10_DDR_CAL_RANK = 9134; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_10_DDR_CAL_RANK_LEN = 9135; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_10_DDR_CALIBRATION_ENABLE = 9136; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_10_END = 9137; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_10_GOTO_CMD = 9138; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_10_GOTO_CMD_LEN = 9139; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_11_IDLES = 9140; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_11_IDLES_LEN = 9141; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_11_REPEAT_CMD_CNT = 9142; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_11_REPEAT_CMD_CNT_LEN = 9143; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_11_READ_OR_WRITE_DATA = 9144; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_11_READ_OR_WRITE_DATA_LEN = 9145; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_11_READ_COMPARE_REQUIRED = 9146; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_11_DDR_CAL_RANK = 9147; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_11_DDR_CAL_RANK_LEN = 9148; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_11_DDR_CALIBRATION_ENABLE = 9149; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_11_END = 9150; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_11_GOTO_CMD = 9151; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_11_GOTO_CMD_LEN = 9152; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_12_IDLES = 9153; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_12_IDLES_LEN = 9154; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_12_REPEAT_CMD_CNT = 9155; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_12_REPEAT_CMD_CNT_LEN = 9156; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_12_READ_OR_WRITE_DATA = 9157; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_12_READ_OR_WRITE_DATA_LEN = 9158; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_12_READ_COMPARE_REQUIRED = 9159; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_12_DDR_CAL_RANK = 9160; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_12_DDR_CAL_RANK_LEN = 9161; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_12_DDR_CALIBRATION_ENABLE = 9162; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_12_END = 9163; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_12_GOTO_CMD = 9164; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_12_GOTO_CMD_LEN = 9165; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_13_IDLES = 9166; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_13_IDLES_LEN = 9167; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_13_REPEAT_CMD_CNT = 9168; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_13_REPEAT_CMD_CNT_LEN = 9169; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_13_READ_OR_WRITE_DATA = 9170; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_13_READ_OR_WRITE_DATA_LEN = 9171; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_13_READ_COMPARE_REQUIRED = 9172; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_13_DDR_CAL_RANK = 9173; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_13_DDR_CAL_RANK_LEN = 9174; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_13_DDR_CALIBRATION_ENABLE = 9175; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_13_END = 9176; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_13_GOTO_CMD = 9177; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_13_GOTO_CMD_LEN = 9178; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_14_IDLES = 9179; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_14_IDLES_LEN = 9180; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_14_REPEAT_CMD_CNT = 9181; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_14_REPEAT_CMD_CNT_LEN = 9182; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_14_READ_OR_WRITE_DATA = 9183; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_14_READ_OR_WRITE_DATA_LEN = 9184; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_14_READ_COMPARE_REQUIRED = 9185; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_14_DDR_CAL_RANK = 9186; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_14_DDR_CAL_RANK_LEN = 9187; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_14_DDR_CALIBRATION_ENABLE = 9188; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_14_END = 9189; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_14_GOTO_CMD = 9190; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_14_GOTO_CMD_LEN = 9191; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_15_IDLES = 9192; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_15_IDLES_LEN = 9193; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_15_REPEAT_CMD_CNT = 9194; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_15_REPEAT_CMD_CNT_LEN = 9195; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_15_READ_OR_WRITE_DATA = 9196; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_15_READ_OR_WRITE_DATA_LEN = 9197; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_15_READ_COMPARE_REQUIRED = 9198; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_15_DDR_CAL_RANK = 9199; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_15_DDR_CAL_RANK_LEN = 9200; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_15_DDR_CALIBRATION_ENABLE = 9201; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_15_END = 9202; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_15_GOTO_CMD = 9203; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_15_GOTO_CMD_LEN = 9204; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_16_IDLES = 9205; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_16_IDLES_LEN = 9206; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_16_REPEAT_CMD_CNT = 9207; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_16_REPEAT_CMD_CNT_LEN = 9208; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_16_READ_OR_WRITE_DATA = 9209; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_16_READ_OR_WRITE_DATA_LEN = 9210; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_16_READ_COMPARE_REQUIRED = 9211; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_16_DDR_CAL_RANK = 9212; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_16_DDR_CAL_RANK_LEN = 9213; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_16_DDR_CALIBRATION_ENABLE = 9214; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_16_END = 9215; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_16_GOTO_CMD = 9216; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_16_GOTO_CMD_LEN = 9217; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_17_IDLES = 9218; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_17_IDLES_LEN = 9219; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_17_REPEAT_CMD_CNT = 9220; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_17_REPEAT_CMD_CNT_LEN = 9221; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_17_READ_OR_WRITE_DATA = 9222; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_17_READ_OR_WRITE_DATA_LEN = 9223; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_17_READ_COMPARE_REQUIRED = 9224; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_17_DDR_CAL_RANK = 9225; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_17_DDR_CAL_RANK_LEN = 9226; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_17_DDR_CALIBRATION_ENABLE = 9227; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_17_END = 9228; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_17_GOTO_CMD = 9229; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_17_GOTO_CMD_LEN = 9230; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_18_IDLES = 9231; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_18_IDLES_LEN = 9232; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_18_REPEAT_CMD_CNT = 9233; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_18_REPEAT_CMD_CNT_LEN = 9234; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_18_READ_OR_WRITE_DATA = 9235; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_18_READ_OR_WRITE_DATA_LEN = 9236; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_18_READ_COMPARE_REQUIRED = 9237; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_18_DDR_CAL_RANK = 9238; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_18_DDR_CAL_RANK_LEN = 9239; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_18_DDR_CALIBRATION_ENABLE = 9240; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_18_END = 9241; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_18_GOTO_CMD = 9242; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_18_GOTO_CMD_LEN = 9243; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_19_IDLES = 9244; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_19_IDLES_LEN = 9245; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_19_REPEAT_CMD_CNT = 9246; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_19_REPEAT_CMD_CNT_LEN = 9247; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_19_READ_OR_WRITE_DATA = 9248; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_19_READ_OR_WRITE_DATA_LEN = 9249; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_19_READ_COMPARE_REQUIRED = 9250; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_19_DDR_CAL_RANK = 9251; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_19_DDR_CAL_RANK_LEN = 9252; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_19_DDR_CALIBRATION_ENABLE = 9253; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_19_END = 9254; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_19_GOTO_CMD = 9255; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_19_GOTO_CMD_LEN = 9256; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_2_IDLES = 9257; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_2_IDLES_LEN = 9258; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_2_REPEAT_CMD_CNT = 9259; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_2_REPEAT_CMD_CNT_LEN = 9260; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_2_READ_OR_WRITE_DATA = 9261; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_2_READ_OR_WRITE_DATA_LEN = 9262; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_2_READ_COMPARE_REQUIRED = 9263; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_2_DDR_CAL_RANK = 9264; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_2_DDR_CAL_RANK_LEN = 9265; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_2_DDR_CALIBRATION_ENABLE = 9266; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_2_END = 9267; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_2_GOTO_CMD = 9268; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_2_GOTO_CMD_LEN = 9269; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_20_IDLES = 9270; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_20_IDLES_LEN = 9271; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_20_REPEAT_CMD_CNT = 9272; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_20_REPEAT_CMD_CNT_LEN = 9273; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_20_READ_OR_WRITE_DATA = 9274; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_20_READ_OR_WRITE_DATA_LEN = 9275; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_20_READ_COMPARE_REQUIRED = 9276; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_20_DDR_CAL_RANK = 9277; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_20_DDR_CAL_RANK_LEN = 9278; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_20_DDR_CALIBRATION_ENABLE = 9279; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_20_END = 9280; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_20_GOTO_CMD = 9281; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_20_GOTO_CMD_LEN = 9282; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_21_IDLES = 9283; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_21_IDLES_LEN = 9284; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_21_REPEAT_CMD_CNT = 9285; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_21_REPEAT_CMD_CNT_LEN = 9286; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_21_READ_OR_WRITE_DATA = 9287; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_21_READ_OR_WRITE_DATA_LEN = 9288; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_21_READ_COMPARE_REQUIRED = 9289; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_21_DDR_CAL_RANK = 9290; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_21_DDR_CAL_RANK_LEN = 9291; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_21_DDR_CALIBRATION_ENABLE = 9292; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_21_END = 9293; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_21_GOTO_CMD = 9294; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_21_GOTO_CMD_LEN = 9295; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_22_IDLES = 9296; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_22_IDLES_LEN = 9297; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_22_REPEAT_CMD_CNT = 9298; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_22_REPEAT_CMD_CNT_LEN = 9299; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_22_READ_OR_WRITE_DATA = 9300; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_22_READ_OR_WRITE_DATA_LEN = 9301; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_22_READ_COMPARE_REQUIRED = 9302; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_22_DDR_CAL_RANK = 9303; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_22_DDR_CAL_RANK_LEN = 9304; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_22_DDR_CALIBRATION_ENABLE = 9305; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_22_END = 9306; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_22_GOTO_CMD = 9307; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_22_GOTO_CMD_LEN = 9308; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_23_IDLES = 9309; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_23_IDLES_LEN = 9310; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_23_REPEAT_CMD_CNT = 9311; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_23_REPEAT_CMD_CNT_LEN = 9312; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_23_READ_OR_WRITE_DATA = 9313; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_23_READ_OR_WRITE_DATA_LEN = 9314; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_23_READ_COMPARE_REQUIRED = 9315; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_23_DDR_CAL_RANK = 9316; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_23_DDR_CAL_RANK_LEN = 9317; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_23_DDR_CALIBRATION_ENABLE = 9318; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_23_END = 9319; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_23_GOTO_CMD = 9320; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_23_GOTO_CMD_LEN = 9321; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_24_IDLES = 9322; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_24_IDLES_LEN = 9323; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_24_REPEAT_CMD_CNT = 9324; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_24_REPEAT_CMD_CNT_LEN = 9325; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_24_READ_OR_WRITE_DATA = 9326; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_24_READ_OR_WRITE_DATA_LEN = 9327; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_24_READ_COMPARE_REQUIRED = 9328; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_24_DDR_CAL_RANK = 9329; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_24_DDR_CAL_RANK_LEN = 9330; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_24_DDR_CALIBRATION_ENABLE = 9331; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_24_END = 9332; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_24_GOTO_CMD = 9333; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_24_GOTO_CMD_LEN = 9334; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_25_IDLES = 9335; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_25_IDLES_LEN = 9336; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_25_REPEAT_CMD_CNT = 9337; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_25_REPEAT_CMD_CNT_LEN = 9338; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_25_READ_OR_WRITE_DATA = 9339; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_25_READ_OR_WRITE_DATA_LEN = 9340; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_25_READ_COMPARE_REQUIRED = 9341; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_25_DDR_CAL_RANK = 9342; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_25_DDR_CAL_RANK_LEN = 9343; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_25_DDR_CALIBRATION_ENABLE = 9344; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_25_END = 9345; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_25_GOTO_CMD = 9346; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_25_GOTO_CMD_LEN = 9347; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_26_IDLES = 9348; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_26_IDLES_LEN = 9349; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_26_REPEAT_CMD_CNT = 9350; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_26_REPEAT_CMD_CNT_LEN = 9351; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_26_READ_OR_WRITE_DATA = 9352; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_26_READ_OR_WRITE_DATA_LEN = 9353; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_26_READ_COMPARE_REQUIRED = 9354; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_26_DDR_CAL_RANK = 9355; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_26_DDR_CAL_RANK_LEN = 9356; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_26_DDR_CALIBRATION_ENABLE = 9357; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_26_END = 9358; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_26_GOTO_CMD = 9359; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_26_GOTO_CMD_LEN = 9360; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_27_IDLES = 9361; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_27_IDLES_LEN = 9362; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_27_REPEAT_CMD_CNT = 9363; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_27_REPEAT_CMD_CNT_LEN = 9364; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_27_READ_OR_WRITE_DATA = 9365; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_27_READ_OR_WRITE_DATA_LEN = 9366; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_27_READ_COMPARE_REQUIRED = 9367; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_27_DDR_CAL_RANK = 9368; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_27_DDR_CAL_RANK_LEN = 9369; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_27_DDR_CALIBRATION_ENABLE = 9370; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_27_END = 9371; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_27_GOTO_CMD = 9372; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_27_GOTO_CMD_LEN = 9373; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_28_IDLES = 9374; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_28_IDLES_LEN = 9375; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_28_REPEAT_CMD_CNT = 9376; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_28_REPEAT_CMD_CNT_LEN = 9377; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_28_READ_OR_WRITE_DATA = 9378; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_28_READ_OR_WRITE_DATA_LEN = 9379; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_28_READ_COMPARE_REQUIRED = 9380; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_28_DDR_CAL_RANK = 9381; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_28_DDR_CAL_RANK_LEN = 9382; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_28_DDR_CALIBRATION_ENABLE = 9383; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_28_END = 9384; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_28_GOTO_CMD = 9385; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_28_GOTO_CMD_LEN = 9386; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_29_IDLES = 9387; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_29_IDLES_LEN = 9388; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_29_REPEAT_CMD_CNT = 9389; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_29_REPEAT_CMD_CNT_LEN = 9390; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_29_READ_OR_WRITE_DATA = 9391; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_29_READ_OR_WRITE_DATA_LEN = 9392; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_29_READ_COMPARE_REQUIRED = 9393; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_29_DDR_CAL_RANK = 9394; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_29_DDR_CAL_RANK_LEN = 9395; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_29_DDR_CALIBRATION_ENABLE = 9396; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_29_END = 9397; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_29_GOTO_CMD = 9398; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_29_GOTO_CMD_LEN = 9399; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_3_IDLES = 9400; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_3_IDLES_LEN = 9401; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_3_REPEAT_CMD_CNT = 9402; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_3_REPEAT_CMD_CNT_LEN = 9403; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_3_READ_OR_WRITE_DATA = 9404; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_3_READ_OR_WRITE_DATA_LEN = 9405; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_3_READ_COMPARE_REQUIRED = 9406; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_3_DDR_CAL_RANK = 9407; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_3_DDR_CAL_RANK_LEN = 9408; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_3_DDR_CALIBRATION_ENABLE = 9409; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_3_END = 9410; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_3_GOTO_CMD = 9411; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_3_GOTO_CMD_LEN = 9412; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_30_IDLES = 9413; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_30_IDLES_LEN = 9414; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_30_REPEAT_CMD_CNT = 9415; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_30_REPEAT_CMD_CNT_LEN = 9416; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_30_READ_OR_WRITE_DATA = 9417; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_30_READ_OR_WRITE_DATA_LEN = 9418; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_30_READ_COMPARE_REQUIRED = 9419; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_30_DDR_CAL_RANK = 9420; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_30_DDR_CAL_RANK_LEN = 9421; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_30_DDR_CALIBRATION_ENABLE = 9422; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_30_END = 9423; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_30_GOTO_CMD = 9424; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_30_GOTO_CMD_LEN = 9425; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_31_IDLES = 9426; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_31_IDLES_LEN = 9427; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_31_REPEAT_CMD_CNT = 9428; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_31_REPEAT_CMD_CNT_LEN = 9429; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_31_READ_OR_WRITE_DATA = 9430; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_31_READ_OR_WRITE_DATA_LEN = 9431; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_31_READ_COMPARE_REQUIRED = 9432; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_31_DDR_CAL_RANK = 9433; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_31_DDR_CAL_RANK_LEN = 9434; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_31_DDR_CALIBRATION_ENABLE = 9435; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_31_END = 9436; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_31_GOTO_CMD = 9437; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_31_GOTO_CMD_LEN = 9438; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_4_IDLES = 9439; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_4_IDLES_LEN = 9440; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_4_REPEAT_CMD_CNT = 9441; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_4_REPEAT_CMD_CNT_LEN = 9442; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_4_READ_OR_WRITE_DATA = 9443; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_4_READ_OR_WRITE_DATA_LEN = 9444; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_4_READ_COMPARE_REQUIRED = 9445; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_4_DDR_CAL_RANK = 9446; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_4_DDR_CAL_RANK_LEN = 9447; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_4_DDR_CALIBRATION_ENABLE = 9448; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_4_END = 9449; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_4_GOTO_CMD = 9450; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_4_GOTO_CMD_LEN = 9451; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_5_IDLES = 9452; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_5_IDLES_LEN = 9453; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_5_REPEAT_CMD_CNT = 9454; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_5_REPEAT_CMD_CNT_LEN = 9455; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_5_READ_OR_WRITE_DATA = 9456; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_5_READ_OR_WRITE_DATA_LEN = 9457; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_5_READ_COMPARE_REQUIRED = 9458; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_5_DDR_CAL_RANK = 9459; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_5_DDR_CAL_RANK_LEN = 9460; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_5_DDR_CALIBRATION_ENABLE = 9461; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_5_END = 9462; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_5_GOTO_CMD = 9463; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_5_GOTO_CMD_LEN = 9464; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_6_IDLES = 9465; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_6_IDLES_LEN = 9466; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_6_REPEAT_CMD_CNT = 9467; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_6_REPEAT_CMD_CNT_LEN = 9468; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_6_READ_OR_WRITE_DATA = 9469; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_6_READ_OR_WRITE_DATA_LEN = 9470; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_6_READ_COMPARE_REQUIRED = 9471; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_6_DDR_CAL_RANK = 9472; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_6_DDR_CAL_RANK_LEN = 9473; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_6_DDR_CALIBRATION_ENABLE = 9474; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_6_END = 9475; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_6_GOTO_CMD = 9476; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_6_GOTO_CMD_LEN = 9477; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_7_IDLES = 9478; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_7_IDLES_LEN = 9479; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_7_REPEAT_CMD_CNT = 9480; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_7_REPEAT_CMD_CNT_LEN = 9481; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_7_READ_OR_WRITE_DATA = 9482; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_7_READ_OR_WRITE_DATA_LEN = 9483; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_7_READ_COMPARE_REQUIRED = 9484; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_7_DDR_CAL_RANK = 9485; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_7_DDR_CAL_RANK_LEN = 9486; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_7_DDR_CALIBRATION_ENABLE = 9487; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_7_END = 9488; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_7_GOTO_CMD = 9489; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_7_GOTO_CMD_LEN = 9490; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_8_IDLES = 9491; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_8_IDLES_LEN = 9492; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_8_REPEAT_CMD_CNT = 9493; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_8_REPEAT_CMD_CNT_LEN = 9494; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_8_READ_OR_WRITE_DATA = 9495; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_8_READ_OR_WRITE_DATA_LEN = 9496; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_8_READ_COMPARE_REQUIRED = 9497; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_8_DDR_CAL_RANK = 9498; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_8_DDR_CAL_RANK_LEN = 9499; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_8_DDR_CALIBRATION_ENABLE = 9500; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_8_END = 9501; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_8_GOTO_CMD = 9502; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_8_GOTO_CMD_LEN = 9503; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_9_IDLES = 9504; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_9_IDLES_LEN = 9505; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_9_REPEAT_CMD_CNT = 9506; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_9_REPEAT_CMD_CNT_LEN = 9507; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_9_READ_OR_WRITE_DATA = 9508; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_9_READ_OR_WRITE_DATA_LEN = 9509; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_9_READ_COMPARE_REQUIRED = 9510; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_9_DDR_CAL_RANK = 9511; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_9_DDR_CAL_RANK_LEN = 9512; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_9_DDR_CALIBRATION_ENABLE = 9513; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_9_END = 9514; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_9_GOTO_CMD = 9515; static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_9_GOTO_CMD_LEN = 9516; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_RECOVERABLE_ERROR = 9517; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_NONRECOVERABLE_ERROR = 9518; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_REFRESH_OVERRUN = 9519; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_WAT__ERROR = 9520; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_RCD_PARITY_ERROR_0 = 9521; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_DDR0_CAL_TIMEOUT_ERR = 9522; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_DDR1_CAL_TIMEOUT_ERR = 9523; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_RCD_PARITY_ERROR_1 = 9524; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_MBX_TO_PAR_ERROR = 9525; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_WRD_UE = 9526; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_WRD_CE = 9527; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_MAINT_UE = 9528; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_MAINT_CE = 9529; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_DDR_CAL_RESET_TIMEOUT = 9530; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_WRQ_DATA_CE = 9531; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_WRQ_DATA_UE = 9532; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_WRQ_DATA_SUE = 9533; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_WRQ_RRQ_HANG_ERR = 9534; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_SM_1HOT_ERR = 9535; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_WRD_SCOM_ERROR = 9536; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_RHMR_PRIM_REACHED_MAX = 9537; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_RHMR_SEC_REACHED_MAX = 9538; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_RHMR_SEC_ALREADY_FULL = 9539; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_RESERVED_23 = 9540; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_INTERNAL_SCOM_ERROR = 9541; static const uint64_t IDX_CEN_MBA_MBACALFIRQ_INTERNAL_SCOM_ERROR_COPY = 9542; static const uint64_t IDX_CEN_MBA_MBACALFIR_ACTION0_FIR = 9543; static const uint64_t IDX_CEN_MBA_MBACALFIR_ACTION0_FIR_LEN = 9544; static const uint64_t IDX_CEN_MBA_MBACALFIR_ACTION1_FIR = 9545; static const uint64_t IDX_CEN_MBA_MBACALFIR_ACTION1_FIR_LEN = 9546; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_RECOVERABLE_ERROR = 9547; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_NONRECOVERABLE_ERROR = 9548; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_REFRESH_OVERRUN = 9549; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_WAT__ERROR = 9550; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_RCD_PARITY_ERROR_0 = 9551; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_DDR0_CAL_TIMEOUT_ERR = 9552; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_DDR1_CAL_TIMEOUT_ERR = 9553; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_RCD_PARITY_ERROR_1 = 9554; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_MBX_TO_PAR_ERROR = 9555; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_WRD_UE = 9556; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_WRD_CE = 9557; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_MAINT_UE = 9558; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_MAINT_CE = 9559; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_DDR_CAL_RESET_TIMEOUT = 9560; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_WRQ_DATA_CE = 9561; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_WRQ_DATA_UE = 9562; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_WRQ_DATA_SUE = 9563; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_WRQ_RRQ_HANG_ERR = 9564; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_SM_1HOT_ERR = 9565; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_WRD_SCOM_ERROR = 9566; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_RHMR_PRIM_REACHED_MAX = 9567; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_RHMR_SEC_REACHED_MAX = 9568; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_RHMR_SEC_ALREADY_FULL = 9569; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_RESERVED_23 = 9570; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_INTERNAL_SCOM_ERROR = 9571; static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_INTERNAL_SCOM_ERROR_COPY = 9572; static const uint64_t IDX_CEN_MBA_MBASIRACT0_ACTION_0 = 9573; static const uint64_t IDX_CEN_MBA_MBASIRACT0_ACTION_0_LEN = 9574; static const uint64_t IDX_CEN_MBA_MBASIRACT1_ACTION_1 = 9575; static const uint64_t IDX_CEN_MBA_MBASIRACT1_ACTION_1_LEN = 9576; static const uint64_t IDX_CEN_MBA_MBASIRMASK_SIR_MASK = 9577; static const uint64_t IDX_CEN_MBA_MBASIRMASK_SIR_MASK_LEN = 9578; static const uint64_t IDX_CEN_MBA_MBASIRQ_INVALID_CAL0Q_ACCESS = 9579; static const uint64_t IDX_CEN_MBA_MBASIRQ_INVALID_CAL1Q_ACCESS = 9580; static const uint64_t IDX_CEN_MBA_MBASIRQ_INVALID_CAL2Q_ACCESS = 9581; static const uint64_t IDX_CEN_MBA_MBASIRQ_INVALID_CAL3Q_ACCESS = 9582; static const uint64_t IDX_CEN_MBA_MBASIRQ_INVALID_DDR_CONFIG_REG_ACCESS = 9583; static const uint64_t IDX_CEN_MBA_MBASIRQ_INVALID_SIR_MASK_OR_ACTION_REGISTER_ACCESS = 9584; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_INTERVAL_TMR0_ENABLE = 9585; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_TIME_BASE_TMR0 = 9586; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_TIME_BASE_TMR0_LEN = 9587; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_INTERVAL_COUNTER_TMR0 = 9588; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_INTERVAL_COUNTER_TMR0_LEN = 9589; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL1_ENABLE = 9590; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL1_TYPE = 9591; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL1_TYPE_LEN = 9592; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL1_DDR_DONE = 9593; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL2_ENABLE = 9594; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL2_TYPE = 9595; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL2_TYPE_LEN = 9596; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL2_DDR_DONE = 9597; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL3_ENABLE = 9598; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL3_TYPE = 9599; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL3_TYPE_LEN = 9600; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL3_DDR_DONE = 9601; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_Z_SYNC = 9602; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_Z_SYNC_LEN = 9603; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_DDR_RESET_TMR = 9604; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_DDR_RESET_TMR_LEN = 9605; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_DDR_RESET_TMR_TB = 9606; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_DDR_RESET_TMR_TB_LEN = 9607; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_DDR_RESET_ENABLE = 9608; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_SINGLE_RANK = 9609; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_INJECT_CAL0_PAR_ERROR = 9610; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_INJECT_1HOT_SM_ERROR = 9611; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_SINGLE_PORT_MODE = 9612; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_SINGLE_PORT_MODE_LEN = 9613; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_RESERVED_56_63 = 9614; static const uint64_t IDX_CEN_MBA_MBA_CAL0Q_CAL0Q_RESERVED_56_63_LEN = 9615; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_INTERVAL_TMR1_ENABLE = 9616; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_TIME_BASE_TMR1 = 9617; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_TIME_BASE_TMR1_LEN = 9618; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_INTERVAL_COUNTER_TMR1 = 9619; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_INTERVAL_COUNTER_TMR1_LEN = 9620; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL1_ENABLE = 9621; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL1_TYPE = 9622; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL1_TYPE_LEN = 9623; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL1_DDR_DONE = 9624; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL2_ENABLE = 9625; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL2_TYPE = 9626; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL2_TYPE_LEN = 9627; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL2_DDR_DONE = 9628; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL3_ENABLE = 9629; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL3_TYPE = 9630; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL3_TYPE_LEN = 9631; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL3_DDR_DONE = 9632; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_Z_SYNC = 9633; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_Z_SYNC_LEN = 9634; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_SINGLE_RANK = 9635; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_RESERVED_40_63 = 9636; static const uint64_t IDX_CEN_MBA_MBA_CAL1Q_CAL1Q_RESERVED_40_63_LEN = 9637; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_INTERVAL_TMR2_ENABLE = 9638; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_TIME_BASE_TMR2 = 9639; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_TIME_BASE_TMR2_LEN = 9640; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_INTERVAL_COUNTER_TMR2 = 9641; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_INTERVAL_COUNTER_TMR2_LEN = 9642; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL1_ENABLE = 9643; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL1_TYPE = 9644; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL1_TYPE_LEN = 9645; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL1_DDR_DONE = 9646; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL2_ENABLE = 9647; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL2_TYPE = 9648; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL2_TYPE_LEN = 9649; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL2_DDR_DONE = 9650; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL3_ENABLE = 9651; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL3_TYPE = 9652; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL3_TYPE_LEN = 9653; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL3_DDR_DONE = 9654; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_Z_SYNC = 9655; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_Z_SYNC_LEN = 9656; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_SINGLE_RANK = 9657; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_WAT_EVENT_ENABLE = 9658; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_RCD_ERROR_START_DLY = 9659; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_RCD_ERROR_START_DLY_LEN = 9660; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_RESERVED_57_63 = 9661; static const uint64_t IDX_CEN_MBA_MBA_CAL2Q_CAL2Q_RESERVED_57_63_LEN = 9662; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_INTERNAL_ZQ_TB = 9663; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_INTERNAL_ZQ_TB_LEN = 9664; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_INTERNAL_ZQ_LENGTH = 9665; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_INTERNAL_ZQ_LENGTH_LEN = 9666; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_EXTERNAL_ZQ_TB = 9667; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_EXTERNAL_ZQ_TB_LEN = 9668; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_EXTERNAL_ZQ_LENGTH = 9669; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_EXTERNAL_ZQ_LENGTH_LEN = 9670; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_RDCLK_SYSCLK_TB = 9671; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_RDCLK_SYSCLK_TB_LEN = 9672; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_RDCLK_SYSCLK_LENGTH = 9673; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_RDCLK_SYSCLK_LENGTH_LEN = 9674; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_DQS_ALIGNMENT_TB = 9675; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_DQS_ALIGNMENT_TB_LEN = 9676; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_DQS_ALIGNMENT_LENGTH = 9677; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_DQS_ALIGNMENT_LENGTH_LEN = 9678; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_MPR_READEYE_TB = 9679; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_MPR_READEYE_TB_LEN = 9680; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_MPR_READEYE_LENGTH = 9681; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_MPR_READEYE_LENGTH_LEN = 9682; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_ALL_PERIODIC_TB = 9683; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_ALL_PERIODIC_TB_LEN = 9684; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_ALL_PERIODIC_LENGTH = 9685; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_ALL_PERIODIC_LENGTH_LEN = 9686; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_RESERVED_60_63 = 9687; static const uint64_t IDX_CEN_MBA_MBA_CAL3Q_CAL3Q_RESERVED_60_63_LEN = 9688; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RODT_START_DLY = 9689; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RODT_START_DLY_LEN = 9690; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RODT_END_DLY = 9691; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RODT_END_DLY_LEN = 9692; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WODT_START_DLY = 9693; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WODT_START_DLY_LEN = 9694; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WODT_END_DLY = 9695; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WODT_END_DLY_LEN = 9696; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WRDONE_DLY = 9697; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WRDONE_DLY_LEN = 9698; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WRDATA_DLY = 9699; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WRDATA_DLY_LEN = 9700; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RDTAG_DLY = 9701; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RDTAG_DLY_LEN = 9702; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RDTAG_MBX_CYCLE = 9703; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RODT_BC4_END_DLY = 9704; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RODT_BC4_END_DLY_LEN = 9705; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WODT_BC4_END_DLY = 9706; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WODT_BC4_END_DLY_LEN = 9707; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_SYNC_RDTAG_ENABLE = 9708; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_GOLDEN_DELAY_MODE = 9709; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_GOLDEN_DELAY_MODE_LEN = 9710; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RESET_MISR_ON_REFR_SYNC_EN = 9711; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_RESERVED_59_63 = 9712; static const uint64_t IDX_CEN_MBA_MBA_DSM0Q_DSM0Q_RESERVED_59_63_LEN = 9713; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RDCMD_PAR = 9714; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RDCMD_PAR_RC = 9715; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RDCMD_PAR_RD1 = 9716; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RDCMD_PAR_RC_RD1 = 9717; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_WRCMD_PAR = 9718; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_WRCMD_PAR_RC = 9719; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_WRD_IDX_PAR = 9720; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RHMR_PRIM_PE = 9721; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RHMR_SEC_PE = 9722; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RHMR_LRU_ERROR = 9723; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_WRQ_HANG = 9724; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RRQ_HANG = 9725; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_DSM_PE = 9726; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_TMR_PE = 9727; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RRQ_PE = 9728; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_WRQ_PE = 9729; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_FARB_PE = 9730; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_PC_PE = 9731; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL0_PE = 9732; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL1_PE = 9733; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL2_PE = 9734; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL3_PE = 9735; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_DDR_IF_SM_1HOT = 9736; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL_SM_1HOT = 9737; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RANK_SM_1HOT = 9738; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_PC_CAL_REFFSM_1HOT = 9739; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_PC_CAL_PCFSM_1HOT = 9740; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_FARB_CAL_RECVFSM_1HOT = 9741; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RESERVED_CERR_28 = 9742; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RESERVED_CERR_29 = 9743; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RESERVED_CERR_30 = 9744; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RESERVED_CERR_31 = 9745; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RESERVED_CERR_32 = 9746; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_SIR_CERR = 9747; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RDCMD_RDCHECK = 9748; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_WRD_RDCHECK = 9749; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL0_INVALID_ACCESS = 9750; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL1_INVALID_ACCESS = 9751; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL2_INVALID_ACCESS = 9752; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL3_INVALID_ACCESS = 9753; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_DDR_INVALID_ACCESS = 9754; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RESERVED_CERR_41 = 9755; static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RESERVED_CERR_42 = 9756; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_MISR_BLOCK = 9757; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_MISR_BLOCK_LEN = 9758; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_MISR_FEEDBACK_ENABLE = 9759; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_RESERVED_17_23 = 9760; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_RESERVED_17_23_LEN = 9761; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_MAX_READS_IN_A_ROW = 9762; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_MAX_READS_IN_A_ROW_LEN = 9763; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_MAX_WRITES_IN_A_ROW = 9764; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_MAX_WRITES_IN_A_ROW_LEN = 9765; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_PARITY_AFTER_CMD = 9766; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_INJECT_PARITY_ERR_RAS0 = 9767; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_INJECT_PARITY_ERR_CAS0 = 9768; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_INJECT_PARITY_ERR_RAS1 = 9769; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_INJECT_PARITY_ERR_CAS1 = 9770; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_PARITY_DETECT_TIME = 9771; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_PARITY_DETECT_TIME_LEN = 9772; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_RCD_PROTECTION_TIME = 9773; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_RCD_PROTECTION_TIME_LEN = 9774; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_DISABLE_RCD_RECOVERY = 9775; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_OE_ALWAYS_ON = 9776; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_FLIP_PORT1_ADDR = 9777; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_DISABLE_REFRESH_DURING_NOISE_WDW = 9778; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_RESERVED_58 = 9779; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_INJECT_PARITY_ERR_CONSTANT = 9780; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_IGNORE_RCD_PARITY_ERR = 9781; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_ENABLE_RCD_RW_RETRY = 9782; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_RESERVED_62_63 = 9783; static const uint64_t IDX_CEN_MBA_MBA_FARB0Q_FARB0Q_RESERVED_62_63_LEN = 9784; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S0_CS = 9785; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S0_CS_LEN = 9786; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S1_CS = 9787; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S1_CS_LEN = 9788; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S2_CS = 9789; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S2_CS_LEN = 9790; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S3_CS = 9791; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S3_CS_LEN = 9792; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S4_CS = 9793; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S4_CS_LEN = 9794; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S5_CS = 9795; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S5_CS_LEN = 9796; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S6_CS = 9797; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S6_CS_LEN = 9798; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S7_CS = 9799; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S7_CS_LEN = 9800; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_CS_S0_MASK = 9801; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_CS_S0_MASK_LEN = 9802; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_S0_DIS_SMDR = 9803; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_DDR4_PARITY_ON_CID_DIS = 9804; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_S0_RSV0 = 9805; static const uint64_t IDX_CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_S0_RSV0_LEN = 9806; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S0_CS = 9807; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S0_CS_LEN = 9808; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S1_CS = 9809; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S1_CS_LEN = 9810; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S2_CS = 9811; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S2_CS_LEN = 9812; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S3_CS = 9813; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S3_CS_LEN = 9814; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S4_CS = 9815; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S4_CS_LEN = 9816; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S5_CS = 9817; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S5_CS_LEN = 9818; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S6_CS = 9819; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S6_CS_LEN = 9820; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S7_CS = 9821; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S7_CS_LEN = 9822; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_S0_RSV1 = 9823; static const uint64_t IDX_CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_S0_RSV1_LEN = 9824; static const uint64_t IDX_CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_N_PER = 9825; static const uint64_t IDX_CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_N_PER_LEN = 9826; static const uint64_t IDX_CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_N_PER_CHIP = 9827; static const uint64_t IDX_CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_N_PER_CHIP_LEN = 9828; static const uint64_t IDX_CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_M = 9829; static const uint64_t IDX_CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_M_LEN = 9830; static const uint64_t IDX_CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_RAS_WEIGHT = 9831; static const uint64_t IDX_CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_RAS_WEIGHT_LEN = 9832; static const uint64_t IDX_CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_CAS_WEIGHT = 9833; static const uint64_t IDX_CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_CAS_WEIGHT_LEN = 9834; static const uint64_t IDX_CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_PER_SLOT_ENABLED = 9835; static const uint64_t IDX_CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_COUNT_OTHER_DIS = 9836; static const uint64_t IDX_CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_CHANGE_AFTER_SYNC = 9837; static const uint64_t IDX_CEN_MBA_MBA_FARB3Q_FARB3Q_RESERVED_54_63 = 9838; static const uint64_t IDX_CEN_MBA_MBA_FARB3Q_FARB3Q_RESERVED_54_63_LEN = 9839; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_EN = 9840; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_EN_LEN = 9841; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_SECONDARY_EN = 9842; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_HASH_SWIZZLE_EN = 9843; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_FARB4Q_RESERVED_4_9 = 9844; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_FARB4Q_RESERVED_4_9_LEN = 9845; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_DECREMENT_WEIGHT = 9846; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_DECREMENT_WEIGHT_LEN = 9847; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_PRIMARY_DECR_INTV = 9848; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_PRIMARY_DECR_INTV_LEN = 9849; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_SECONDARY_DECR_INTV = 9850; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_SECONDARY_DECR_INTV_LEN = 9851; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_SIM_EN = 9852; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_EMERGENCY_N = 9853; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_EMERGENCY_N_LEN = 9854; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_EMERGENCY_M = 9855; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_EMERGENCY_M_LEN = 9856; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_FARB4Q_RESERVED_56_63 = 9857; static const uint64_t IDX_CEN_MBA_MBA_FARB4Q_FARB4Q_RESERVED_56_63_LEN = 9858; static const uint64_t IDX_CEN_MBA_MBA_PMU0Q_PMU0Q_READ_COUNT = 9859; static const uint64_t IDX_CEN_MBA_MBA_PMU0Q_PMU0Q_READ_COUNT_LEN = 9860; static const uint64_t IDX_CEN_MBA_MBA_PMU0Q_PMU0Q_WRITE_COUNT = 9861; static const uint64_t IDX_CEN_MBA_MBA_PMU0Q_PMU0Q_WRITE_COUNT_LEN = 9862; static const uint64_t IDX_CEN_MBA_MBA_PMU1Q_PMU1Q_ACTIVATE_COUNT = 9863; static const uint64_t IDX_CEN_MBA_MBA_PMU1Q_PMU1Q_ACTIVATE_COUNT_LEN = 9864; static const uint64_t IDX_CEN_MBA_MBA_PMU1Q_PMU1Q_PU_COUNTS = 9865; static const uint64_t IDX_CEN_MBA_MBA_PMU1Q_PMU1Q_PU_COUNTS_LEN = 9866; static const uint64_t IDX_CEN_MBA_MBA_PMU2Q_PMU2Q_FRAME_COUNT = 9867; static const uint64_t IDX_CEN_MBA_MBA_PMU2Q_PMU2Q_FRAME_COUNT_LEN = 9868; static const uint64_t IDX_CEN_MBA_MBA_PMU3Q_PMU3Q_LOW_IDLE_THRESHOLD = 9869; static const uint64_t IDX_CEN_MBA_MBA_PMU3Q_PMU3Q_LOW_IDLE_THRESHOLD_LEN = 9870; static const uint64_t IDX_CEN_MBA_MBA_PMU3Q_PMU3Q_MED_IDLE_THRESHOLD = 9871; static const uint64_t IDX_CEN_MBA_MBA_PMU3Q_PMU3Q_MED_IDLE_THRESHOLD_LEN = 9872; static const uint64_t IDX_CEN_MBA_MBA_PMU3Q_PMU3Q_HIGH_IDLE_THRESHOLD = 9873; static const uint64_t IDX_CEN_MBA_MBA_PMU3Q_PMU3Q_HIGH_IDLE_THRESHOLD_LEN = 9874; static const uint64_t IDX_CEN_MBA_MBA_PMU4Q_PMU4Q_BASE_IDLE_COUNT = 9875; static const uint64_t IDX_CEN_MBA_MBA_PMU4Q_PMU4Q_BASE_IDLE_COUNT_LEN = 9876; static const uint64_t IDX_CEN_MBA_MBA_PMU4Q_PMU4Q_LOW_IDLE_COUNT = 9877; static const uint64_t IDX_CEN_MBA_MBA_PMU4Q_PMU4Q_LOW_IDLE_COUNT_LEN = 9878; static const uint64_t IDX_CEN_MBA_MBA_PMU5Q_PMU5Q_MED_IDLE_COUNT = 9879; static const uint64_t IDX_CEN_MBA_MBA_PMU5Q_PMU5Q_MED_IDLE_COUNT_LEN = 9880; static const uint64_t IDX_CEN_MBA_MBA_PMU5Q_PMU5Q_HIGH_IDLE_COUNT = 9881; static const uint64_t IDX_CEN_MBA_MBA_PMU5Q_PMU5Q_HIGH_IDLE_COUNT_LEN = 9882; static const uint64_t IDX_CEN_MBA_MBA_PMU6Q_PMU6Q_TOTAL_GAP_COUNTS = 9883; static const uint64_t IDX_CEN_MBA_MBA_PMU6Q_PMU6Q_TOTAL_GAP_COUNTS_LEN = 9884; static const uint64_t IDX_CEN_MBA_MBA_PMU6Q_PMU6Q_SPECIFIC_GAP_COUNT = 9885; static const uint64_t IDX_CEN_MBA_MBA_PMU6Q_PMU6Q_SPECIFIC_GAP_COUNT_LEN = 9886; static const uint64_t IDX_CEN_MBA_MBA_PMU6Q_PMU6Q_GAP_LENGTH_ADDER = 9887; static const uint64_t IDX_CEN_MBA_MBA_PMU6Q_PMU6Q_GAP_LENGTH_ADDER_LEN = 9888; static const uint64_t IDX_CEN_MBA_MBA_PMU6Q_PMU6Q_SPECIFIC_GAP_CONDITION = 9889; static const uint64_t IDX_CEN_MBA_MBA_PMU6Q_PMU6Q_SPECIFIC_GAP_CONDITION_LEN = 9890; static const uint64_t IDX_CEN_MBA_MBA_PMU6Q_PMU6Q_CMD_TO_COUNT = 9891; static const uint64_t IDX_CEN_MBA_MBA_PMU6Q_PMU6Q_CMD_TO_COUNT_LEN = 9892; static const uint64_t IDX_CEN_MBA_MBA_PMU6Q_PMU6Q_COMMAND_PATTERN_TO_COUNT = 9893; static const uint64_t IDX_CEN_MBA_MBA_PMU6Q_PMU6Q_COMMAND_PATTERN_TO_COUNT_LEN = 9894; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RRQ_SKIP_LIMIT = 9895; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RRQ_SKIP_LIMIT_LEN = 9896; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RRQ_REORDER_DEPTH = 9897; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RRQ_REORDER_DEPTH_LEN = 9898; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_DISABLE_RD_PG_MODE = 9899; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_DISABLE_FAST_PATH = 9900; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR0 = 9901; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR0_LEN = 9902; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR1 = 9903; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR1_LEN = 9904; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR2 = 9905; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR2_LEN = 9906; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR3 = 9907; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR3_LEN = 9908; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RRQ_OPP_PAGE_MODE_EN = 9909; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_RESERVED_58_63 = 9910; static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q_RRQ0Q_RESERVED_58_63_LEN = 9911; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_RRSMSR_DLY = 9912; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_RRSMSR_DLY_LEN = 9913; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_RRSMDR_DLY = 9914; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_RRSMDR_DLY_LEN = 9915; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_RRDM_DLY = 9916; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_RRDM_DLY_LEN = 9917; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_RWSMSR_DLY = 9918; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_RWSMSR_DLY_LEN = 9919; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_RWSMDR_DLY = 9920; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_RWSMDR_DLY_LEN = 9921; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_RWDM_DLY = 9922; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_RWDM_DLY_LEN = 9923; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_WRSMSR_DLY = 9924; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_WRSMSR_DLY_LEN = 9925; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_WRSMDR_DLY = 9926; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_WRSMDR_DLY_LEN = 9927; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_WRDM_DLY = 9928; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_WRDM_DLY_LEN = 9929; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_WWSMSR_DLY = 9930; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_WWSMSR_DLY_LEN = 9931; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_WWSMDR_DLY = 9932; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_WWSMDR_DLY_LEN = 9933; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_WWDM_DLY = 9934; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_WWDM_DLY_LEN = 9935; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_RROP_DLY = 9936; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_RROP_DLY_LEN = 9937; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_WWOP_DLY = 9938; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_WWOP_DLY_LEN = 9939; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_TRRD = 9940; static const uint64_t IDX_CEN_MBA_MBA_TMR0Q_TMR0Q_TRRD_LEN = 9941; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_TRAP = 9942; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_TRAP_LEN = 9943; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_TWAP = 9944; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_TWAP_LEN = 9945; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_TFAW = 9946; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_TFAW_LEN = 9947; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_RRSBG_DLY = 9948; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_RRSBG_DLY_LEN = 9949; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_WRSBG_DLY = 9950; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_WRSBG_DLY_LEN = 9951; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_DDR4_CL_INTL_DIS = 9952; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_ACTREF = 9953; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_ACTREF_LEN = 9954; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_RESERVED_35_47 = 9955; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_RESERVED_35_47_LEN = 9956; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_RWSMSR_MSB = 9957; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_RWSMDR_MSB = 9958; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_RWDM_MSB = 9959; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_RESERVED_51_63 = 9960; static const uint64_t IDX_CEN_MBA_MBA_TMR1Q_TMR1Q_RESERVED_51_63_LEN = 9961; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRITE_HW_MARK = 9962; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRITE_HW_MARK_LEN = 9963; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_FIFO_MODE = 9964; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_DISABLE_WR_PG_MODE = 9965; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_ENTRY0_HP_DLY = 9966; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_ENTRY0_HP_DLY_LEN = 9967; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_FLUSH_WR_RANK = 9968; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_ENABLE_NON_HP_WR = 9969; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_ENTRY0_MIN_FOR_RRQ_IDLE_WR = 9970; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_ENTRY0_MIN_FOR_RRQ_IDLE_WR_LEN = 9971; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_RRQ_IDLE_LOW_WATERMARK = 9972; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_RRQ_IDLE_LOW_WATERMARK_LEN = 9973; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_SKIP_LIMIT = 9974; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_SKIP_LIMIT_LEN = 9975; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_CLN_HP_ENABLE = 9976; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_HANG_THRESHOLD = 9977; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_HANG_THRESHOLD_LEN = 9978; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_RRQ_HANG_THRESHOLD = 9979; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_RRQ_HANG_THRESHOLD_LEN = 9980; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_RESERVED_61_63 = 9981; static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q_WRQ0Q_RESERVED_61_63_LEN = 9982; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_REFRESH_ENABLE = 9983; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_REFRESH_INTERVAL_TIMEBASE_SELECT = 9984; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_REFRESH_INTERVAL_TIMEBASE_SELECT_LEN = 9985; static const uint64_t IDX_CEN_MBA_MBAREF0Q_RESERVED_3 = 9986; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_REFRESH_PRIORITY_THRESHOLD = 9987; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_REFRESH_PRIORITY_THRESHOLD_LEN = 9988; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_REFRESH_INTERVAL = 9989; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_REFRESH_INTERVAL_LEN = 9990; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_REFRESH_RESET_INTERVAL = 9991; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_REFRESH_RESET_INTERVAL_LEN = 9992; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_TRFC = 9993; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_TRFC_LEN = 9994; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_REFR_TSV_STACK = 9995; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_REFR_TSV_STACK_LEN = 9996; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_REFR_CHECK_INTERVAL = 9997; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_REFR_CHECK_INTERVAL_LEN = 9998; static const uint64_t IDX_CEN_MBA_MBAREF0Q_CFG_TRFC_STACK_GATE_ALL_REF = 9999; static const uint64_t IDX_CEN_MBA_MBAREF0Q_RESERVED_62_63 = 10000; static const uint64_t IDX_CEN_MBA_MBAREF0Q_RESERVED_62_63_LEN = 10001; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK0_PRIM_CKE = 10002; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK0_PRIM_CKE_LEN = 10003; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK1_PRIM_CKE = 10004; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK1_PRIM_CKE_LEN = 10005; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK2_PRIM_CKE = 10006; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK2_PRIM_CKE_LEN = 10007; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK3_PRIM_CKE = 10008; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK3_PRIM_CKE_LEN = 10009; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK4_PRIM_CKE = 10010; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK4_PRIM_CKE_LEN = 10011; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK5_PRIM_CKE = 10012; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK5_PRIM_CKE_LEN = 10013; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK6_PRIM_CKE = 10014; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK6_PRIM_CKE_LEN = 10015; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK7_PRIM_CKE = 10016; static const uint64_t IDX_CEN_MBA_MBAREF1Q_CFG_MRNK7_PRIM_CKE_LEN = 10017; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_LP_DYN_WAIT_ENABLE = 10018; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_HP_RANK_BIAS_ENABLE = 10019; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_HP_RANK_BLOCK_ENABLE = 10020; static const uint64_t IDX_CEN_MBA_MBAREFAQ_RESERVED_3 = 10021; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_PUP_THRESHOLD = 10022; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_PUP_THRESHOLD_LEN = 10023; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ1_COEF = 10024; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ1_COEF_LEN = 10025; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ2_COEF = 10026; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ2_COEF_LEN = 10027; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ3_COEF = 10028; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ3_COEF_LEN = 10029; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ4_COEF = 10030; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ4_COEF_LEN = 10031; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ5_COEF = 10032; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ5_COEF_LEN = 10033; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ6_COEF = 10034; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ6_COEF_LEN = 10035; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_RRQ_REF_HINT_DLY = 10036; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_RRQ_REF_HINT_DLY_LEN = 10037; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_ASSERT_REFRESH_BLOCK_DLY = 10038; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_ASSERT_REFRESH_BLOCK_DLY_LEN = 10039; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_FORCE_HP_REF_REQ_DLY = 10040; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_FORCE_HP_REF_REQ_DLY_LEN = 10041; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REF_BLOCK_STOP_DLY = 10042; static const uint64_t IDX_CEN_MBA_MBAREFAQ_CFG_REF_BLOCK_STOP_DLY_LEN = 10043; static const uint64_t IDX_CEN_MBA_MBAREFAQ_MODE_HP_SUB_CNT = 10044; static const uint64_t IDX_CEN_MBA_MBAREFAQ_MODE_HP_SUB_CNT_LEN = 10045; static const uint64_t IDX_CEN_MBA_MBAREFAQ_MODE_LP_SUB_CNT = 10046; static const uint64_t IDX_CEN_MBA_MBAREFAQ_MODE_LP_SUB_CNT_LEN = 10047; static const uint64_t IDX_CEN_MBA_MBAREFAQ_RESERVED_54_63 = 10048; static const uint64_t IDX_CEN_MBA_MBAREFAQ_RESERVED_54_63_LEN = 10049; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_LP2_ENTRY_REQ = 10050; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_LP2_STATE = 10051; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_MIN_MAX_DOMAINS_ENABLE = 10052; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_MIN_MAX_DOMAINS = 10053; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_MIN_MAX_DOMAINS_LEN = 10054; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_PUP_AVAIL = 10055; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_PUP_AVAIL_LEN = 10056; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_PDN_PUP = 10057; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_PDN_PUP_LEN = 10058; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_PUP_PDN = 10059; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_PUP_PDN_LEN = 10060; static const uint64_t IDX_CEN_MBA_MBARPC0Q_RESERVED_21 = 10061; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_ENABLE = 10062; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_TIME = 10063; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_TIME_LEN = 10064; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_PUP_AFTER_ACTIVATE_WAIT_ENABLE = 10065; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_PUP_AFTER_ACTIVATE_WAIT_TIME = 10066; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_PUP_AFTER_ACTIVATE_WAIT_TIME_LEN = 10067; static const uint64_t IDX_CEN_MBA_MBARPC0Q_CFG_FORCE_SPARE_PUP = 10068; static const uint64_t IDX_CEN_MBA_MBARPC0Q_MODE_MIN_DOMAIN_REDUCTION_CNT_REFR_INT = 10069; static const uint64_t IDX_CEN_MBA_MBARPC0Q_MODE_EMER_MIN_MAX_DOMAIN = 10070; static const uint64_t IDX_CEN_MBA_MBARPC0Q_MODE_EMER_MIN_MAX_DOMAIN_LEN = 10071; static const uint64_t IDX_CEN_MBA_MBARPC0Q_RESERVED_47_63 = 10072; static const uint64_t IDX_CEN_MBA_MBARPC0Q_RESERVED_47_63_LEN = 10073; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK0_RD_CKE = 10074; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK0_RD_CKE_LEN = 10075; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK1_RD_CKE = 10076; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK1_RD_CKE_LEN = 10077; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK2_RD_CKE = 10078; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK2_RD_CKE_LEN = 10079; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK3_RD_CKE = 10080; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK3_RD_CKE_LEN = 10081; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK4_RD_CKE = 10082; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK4_RD_CKE_LEN = 10083; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK5_RD_CKE = 10084; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK5_RD_CKE_LEN = 10085; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK6_RD_CKE = 10086; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK6_RD_CKE_LEN = 10087; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK7_RD_CKE = 10088; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK7_RD_CKE_LEN = 10089; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK0_WR_CKE = 10090; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK0_WR_CKE_LEN = 10091; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK1_WR_CKE = 10092; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK1_WR_CKE_LEN = 10093; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK2_WR_CKE = 10094; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK2_WR_CKE_LEN = 10095; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK3_WR_CKE = 10096; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK3_WR_CKE_LEN = 10097; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK4_WR_CKE = 10098; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK4_WR_CKE_LEN = 10099; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK5_WR_CKE = 10100; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK5_WR_CKE_LEN = 10101; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK6_WR_CKE = 10102; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK6_WR_CKE_LEN = 10103; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK7_WR_CKE = 10104; static const uint64_t IDX_CEN_MBA_MBARPC1Q_CFG_MRNK7_WR_CKE_LEN = 10105; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_ISLE_XSTOP_MASK_B = 10106; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_PCB_XSTOP_MASK_B = 10107; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_CLKSTP_EN = 10108; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_EDRAM_XSTOP_MASK_B = 10109; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_PLL_XSTOP_MASK_B = 10110; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_LOCAL_XSTOP_MASK_B = 10111; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_DISABLE_PCB_ITR = 10112; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_USE_FOR_SCAN = 10113; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_KEEP_EDRAM_ON_XSTOP = 10114; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_TRIGGER_OPCG_ON_XSTOP = 10115; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_SEL_EXT_OPCG_TRIGGER = 10116; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_LISTEN_TO_PULSE = 10117; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_CLK_START_ENABLE = 10118; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_CLK_STOP_ENABLE = 10119; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_CHIP_PROTECTION_ENABLE = 10120; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_SPARE15 = 10121; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_SPARE16 = 10122; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_SPARE17 = 10123; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_SPARE18 = 10124; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_SPARE19 = 10125; static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_SPARE20 = 10126; static const uint64_t IDX_CEN_TCN_PHASE_SHADOW_COUNT_Q = 10127; static const uint64_t IDX_CEN_TCN_PHASE_SHADOW_COUNT_Q_LEN = 10128; static const uint64_t IDX_CEN_TCN_OPCG_REG0_RUNN_MODE = 10129; static const uint64_t IDX_CEN_TCN_OPCG_REG0_GO = 10130; static const uint64_t IDX_CEN_TCN_OPCG_REG0_RUN_SCAN0 = 10131; static const uint64_t IDX_CEN_TCN_OPCG_REG0_SCAN0_MODE = 10132; static const uint64_t IDX_CEN_TCN_OPCG_REG0_SCAN_RATIO = 10133; static const uint64_t IDX_CEN_TCN_OPCG_REG0_SCAN_RATIO_LEN = 10134; static const uint64_t IDX_CEN_TCN_OPCG_REG0_INOP_FORCE_SG = 10135; static const uint64_t IDX_CEN_TCN_OPCG_REG0_INOP_ALIGN = 10136; static const uint64_t IDX_CEN_TCN_OPCG_REG0_INOP_ALIGN_LEN = 10137; static const uint64_t IDX_CEN_TCN_OPCG_REG0_INOP_WAIT = 10138; static const uint64_t IDX_CEN_TCN_OPCG_REG0_INOP_WAIT_LEN = 10139; static const uint64_t IDX_CEN_TCN_OPCG_REG0_SNOP_ALIGN = 10140; static const uint64_t IDX_CEN_TCN_OPCG_REG0_SNOP_ALIGN_LEN = 10141; static const uint64_t IDX_CEN_TCN_OPCG_REG0_SNOP_WAIT = 10142; static const uint64_t IDX_CEN_TCN_OPCG_REG0_SNOP_WAIT_LEN = 10143; static const uint64_t IDX_CEN_TCN_OPCG_REG0_ENOP_ALIGN = 10144; static const uint64_t IDX_CEN_TCN_OPCG_REG0_ENOP_ALIGN_LEN = 10145; static const uint64_t IDX_CEN_TCN_OPCG_REG0_ENOP_WAIT = 10146; static const uint64_t IDX_CEN_TCN_OPCG_REG0_ENOP_WAIT_LEN = 10147; static const uint64_t IDX_CEN_TCN_OPCG_REG0_ENOP_FORCE_SG = 10148; static const uint64_t IDX_CEN_TCN_OPCG_REG0_LOOP_COUNT = 10149; static const uint64_t IDX_CEN_TCN_OPCG_REG0_LOOP_COUNT_LEN = 10150; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_COUNT = 10151; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_COUNT_LEN = 10152; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ01_01F = 10153; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ01_01F_LEN = 10154; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ02_02F = 10155; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ02_02F_LEN = 10156; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ03_03F = 10157; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ03_03F_LEN = 10158; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ04_04F = 10159; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ04_04F_LEN = 10160; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ05_05F = 10161; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ05_05F_LEN = 10162; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ06_06F = 10163; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ06_06F_LEN = 10164; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ07_07F = 10165; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ07_07F_LEN = 10166; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ08_08F = 10167; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ08_08F_LEN = 10168; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ09_01FBY2 = 10169; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ09_01FBY2_LEN = 10170; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ10_02FBY2 = 10171; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ10_02FBY2_LEN = 10172; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ11_03FBY2 = 10173; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ11_03FBY2_LEN = 10174; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ12_04FBY2 = 10175; static const uint64_t IDX_CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ12_04FBY2_LEN = 10176; static const uint64_t IDX_CEN_TCN_OPCG_REG2_SCAN_COUNT = 10177; static const uint64_t IDX_CEN_TCN_OPCG_REG2_SCAN_COUNT_LEN = 10178; static const uint64_t IDX_CEN_TCN_OPCG_REG2_MISR_A_VAL = 10179; static const uint64_t IDX_CEN_TCN_OPCG_REG2_MISR_A_VAL_LEN = 10180; static const uint64_t IDX_CEN_TCN_OPCG_REG2_MISR_B_VAL = 10181; static const uint64_t IDX_CEN_TCN_OPCG_REG2_MISR_B_VAL_LEN = 10182; static const uint64_t IDX_CEN_TCN_OPCG_REG2_MISR_INIT_WAIT = 10183; static const uint64_t IDX_CEN_TCN_OPCG_REG2_MISR_INIT_WAIT_LEN = 10184; static const uint64_t IDX_CEN_TCN_OPCG_REG2_SUPPRESS_EVEN_CLK = 10185; static const uint64_t IDX_CEN_TCN_OPCG_REG2_PAD_VALUE = 10186; static const uint64_t IDX_CEN_TCN_OPCG_REG2_PAD_VALUE_LEN = 10187; static const uint64_t IDX_CEN_TCN_OPCG_REG2_USE_F_AND_FDIV2 = 10188; static const uint64_t IDX_CEN_TCN_OPCG_REG2_USE_ARY_CLK_DURING_FILL = 10189; static const uint64_t IDX_CEN_TCN_OPCG_REG2_SG_HIGH_DURING_FILL = 10190; static const uint64_t IDX_CEN_TCN_OPCG_REG2_RTIM_THOLD_FORCE = 10191; static const uint64_t IDX_CEN_TCN_OPCG_REG2_LBIST_SKITTER_CTL = 10192; static const uint64_t IDX_CEN_TCN_OPCG_REG2_MISR_MODE = 10193; static const uint64_t IDX_CEN_TCN_OPCG_REG2_INFINITE_MODE = 10194; static const uint64_t IDX_CEN_TCN_OPCG_REG2_NSL_FILL_COUNT = 10195; static const uint64_t IDX_CEN_TCN_OPCG_REG2_NSL_FILL_COUNT_LEN = 10196; static const uint64_t IDX_CEN_TCN_OPCG_REG3_GO2 = 10197; static const uint64_t IDX_CEN_TCN_OPCG_REG3_RUN_ON_UPDATE_DR = 10198; static const uint64_t IDX_CEN_TCN_OPCG_REG3_RUN_ON_CAPTURE_DR = 10199; static const uint64_t IDX_CEN_TCN_OPCG_REG3_ALIGN_SOURCE_SELECT = 10200; static const uint64_t IDX_CEN_TCN_OPCG_REG3_ALIGN_SOURCE_SELECT_LEN = 10201; static const uint64_t IDX_CEN_TCN_OPCG_REG3_PRPG_WEIGHTING = 10202; static const uint64_t IDX_CEN_TCN_OPCG_REG3_PRPG_WEIGHTING_LEN = 10203; static const uint64_t IDX_CEN_TCN_OPCG_REG3_PRPG_VALUE = 10204; static const uint64_t IDX_CEN_TCN_OPCG_REG3_PRPG_VALUE_LEN = 10205; static const uint64_t IDX_CEN_TCN_OPCG_REG3_EXTEND_INOPW_ENOPW = 10206; static const uint64_t IDX_CEN_TCN_OPCG_REG3_EXTEND_SNOPW = 10207; static const uint64_t IDX_CEN_TCN_OPCG_REG3_FORCE_SG_HIGH_DURING_SNOP = 10208; static const uint64_t IDX_CEN_TCN_OPCG_REG3_CHKSW = 10209; static const uint64_t IDX_CEN_TCN_OPCG_REG3_CHKSW_LEN = 10210; static const uint64_t IDX_CEN_TCN_OPCG_REG3_PRPG_A_VAL = 10211; static const uint64_t IDX_CEN_TCN_OPCG_REG3_PRPG_A_VAL_LEN = 10212; static const uint64_t IDX_CEN_TCN_OPCG_REG3_PRPG_B_VAL = 10213; static const uint64_t IDX_CEN_TCN_OPCG_REG3_PRPG_B_VAL_LEN = 10214; static const uint64_t IDX_CEN_TCN_OPCG_REG3_PRPG_MODE = 10215; static const uint64_t IDX_CEN_TCN_OPCG_REG3_SCAN_CLK_USE_EVEN = 10216; static const uint64_t IDX_CEN_TCN_OPCG_REG3_SPARE3 = 10217; static const uint64_t IDX_CEN_TCN_OPCG_REG3_SPARE3_LEN = 10218; static const uint64_t IDX_CEN_TCN_CLK_REGION_CLOCK_CMD = 10219; static const uint64_t IDX_CEN_TCN_CLK_REGION_CLOCK_CMD_LEN = 10220; static const uint64_t IDX_CEN_TCN_CLK_REGION_CLOCK_PERV = 10221; static const uint64_t IDX_CEN_TCN_CLK_REGION_CLOCK_FASTUNIT0 = 10222; static const uint64_t IDX_CEN_TCN_CLK_REGION_CLOCK_FASTUNIT1 = 10223; static const uint64_t IDX_CEN_TCN_CLK_REGION_CLOCK_UNIT2 = 10224; static const uint64_t IDX_CEN_TCN_CLK_REGION_CLOCK_UNIT3 = 10225; static const uint64_t IDX_CEN_TCN_CLK_REGION_CLOCK_UNIT4 = 10226; static const uint64_t IDX_CEN_TCN_CLK_REGION_CLOCK_UNIT5 = 10227; static const uint64_t IDX_CEN_TCN_CLK_REGION_CLOCK_PLL = 10228; static const uint64_t IDX_CEN_TCN_CLK_REGION_SEL_THOLD_SL = 10229; static const uint64_t IDX_CEN_TCN_CLK_REGION_SEL_THOLD_NSL = 10230; static const uint64_t IDX_CEN_TCN_CLK_REGION_SEL_THOLD_ARY = 10231; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_CLK_VITL = 10232; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_CLK_PERV = 10233; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_CLK_FASTUNIT0 = 10234; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_CLK_FASTUNIT1 = 10235; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_CLK_UNIT2 = 10236; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_CLK_UNIT3 = 10237; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_CLK_UNIT4 = 10238; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_CLK_UNIT5 = 10239; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_CLK_PLL = 10240; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_FUNC = 10241; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_CFG = 10242; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_CCFG_GPTR = 10243; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_REGF = 10244; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_LBIST = 10245; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_ABIST = 10246; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_REPR = 10247; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_TIME = 10248; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_BNDY_FARY = 10249; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_FARR = 10250; static const uint64_t IDX_CEN_TCN_SCANSELQ_SCANSEL_CMSK = 10251; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_PERV_FUNC_SL = 10252; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_PERV_FUNC_NSL = 10253; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_PERV_ARY_NSL = 10254; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT0_ODD_FUNC_SL = 10255; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT0_EVEN_FUNC_SL = 10256; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT0_ODD_FUNC_NSL = 10257; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT0_EVEN_FUNC_NSL = 10258; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT0_ODD_ARY_NSL = 10259; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT0_EVEN_ARY_NSL = 10260; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT1_ODD_FUNC_SL = 10261; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT1_EVEN_FUNC_SL = 10262; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT1_ODD_FUNC_NSL = 10263; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT1_EVEN_FUNC_NSL = 10264; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT1_ODD_ARY_NSL = 10265; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT1_EVEN_ARY_NSL = 10266; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_UNIT2_FUNC_SL = 10267; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_UNIT2_FUNC_NSL = 10268; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_UNIT2_ARY_NSL = 10269; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_UNIT3_FUNC_SL = 10270; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_UNIT3_FUNC_NSL = 10271; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_UNIT3_ARY_NSL = 10272; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_UNIT4_FUNC_SL = 10273; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_UNIT4_FUNC_NSL = 10274; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_UNIT4_ARY_NSL = 10275; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_UNIT5_FUNC_SL = 10276; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_UNIT5_FUNC_NSL = 10277; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_UNIT5_ARY_NSL = 10278; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_PLL_FUNC_SL = 10279; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_PLL_FUNC_NSL = 10280; static const uint64_t IDX_CEN_TCN_CLOCK_STAT_STATUS_PLL_ARY_NSL = 10281; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_PCB_WRITE_NOT_ALLOWED = 10282; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_PCB_READ_NOT_ALLOWED = 10283; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_PCB_PARITY_ERR_ON_CMD = 10284; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_PCB_ADDRESS_NOT_VALID = 10285; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_PCB_PARITY_ADDR_ERR = 10286; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_PCB_PARITY_DATA_ERR = 10287; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_PCB_PROTECTED_ACCESS_INVALID = 10288; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_PCB_PARITY_SPCIF_ERR = 10289; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_PCB_WRITE_AND_OPCG = 10290; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_CLOCK_CMD_CONFLICT = 10291; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_SCAN_COLLISION = 10292; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_OPCG_TRIGGER = 10293; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_OPCG_PARITY = 10294; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_PHASE_CNT_CORRUPTED = 10295; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_CC_PAR_ERR = 10296; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_CC_PAR_ERR_LEN = 10297; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_GPIO_PAR_ERR = 10298; static const uint64_t IDX_CEN_TCN_ERROR_STATUS_SECURITY_VIOLATION = 10299; static const uint64_t IDX_CEN_TCN_CC_PROTECT_MODE_REG_READ_ENABLE = 10300; static const uint64_t IDX_CEN_TCN_CC_PROTECT_MODE_REG_WRITE_ENABLE = 10301; static const uint64_t IDX_CEN_TCN_CC_ATOMIC_LOCK_REG_ENABLE = 10302; static const uint64_t IDX_CEN_TCN_CC_ATOMIC_LOCK_REG_ID = 10303; static const uint64_t IDX_CEN_TCN_CC_ATOMIC_LOCK_REG_ID_LEN = 10304; static const uint64_t IDX_CEN_TCN_GP0_TC_UNIT_ABSTCLK_MUXSEL_DC = 10305; static const uint64_t IDX_CEN_TCN_GP0_TC_UNIT_SYNCCLK_MUXSEL_DC = 10306; static const uint64_t IDX_CEN_TCN_GP0_TC_GPIO_FLUSHMODE_INH_DC_OUT = 10307; static const uint64_t IDX_CEN_TCN_GP0_TC_GPIO_FORCEALIGN = 10308; static const uint64_t IDX_CEN_TCN_GP0_TC_GPIO_AVP_MODE_DC_OUT = 10309; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED9 = 10310; static const uint64_t IDX_CEN_TCN_GP0_TC_GPIO_CC_SCAN_DIS_DC_B_OUT = 10311; static const uint64_t IDX_CEN_TCN_GP0_TC_SKIT_MODE_BIST_DC = 10312; static const uint64_t IDX_CEN_TCN_GP0_TC_GPIO_LBIST_EN_DC_OUT = 10313; static const uint64_t IDX_CEN_TCN_GP0_TC_UNIT_LBIST_AC_MODE_DC = 10314; static const uint64_t IDX_CEN_TCN_GP0_TC_UNIT_LBIST_ARY_WRT_THRU_DC = 10315; static const uint64_t IDX_CEN_TCN_GP0_TC_ABIST_MODE_DC = 10316; static const uint64_t IDX_CEN_TCN_GP0_TC_GPIO_ABIST_START_TEST_DC_OUT = 10317; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED0 = 10318; static const uint64_t IDX_CEN_TCN_GP0_TC_UNIT_ATPG_EN_DC = 10319; static const uint64_t IDX_CEN_TCN_GP0_TC_GPIO_SCAN_PROTECT_DC_OUT = 10320; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED1 = 10321; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED2 = 10322; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED3 = 10323; static const uint64_t IDX_CEN_TCN_GP0_TC_FENCE_EDRAM = 10324; static const uint64_t IDX_CEN_TCN_GP0_TP_GPIO_TRACE_START = 10325; static const uint64_t IDX_CEN_TCN_GP0_TP_GPIO_TRACE_STOP = 10326; static const uint64_t IDX_CEN_TCN_GP0_TP_GPIO_TRACE_RESET = 10327; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED5 = 10328; static const uint64_t IDX_CEN_TCN_GP0_TC_GPIO_CLKDIV_SEL_DC = 10329; static const uint64_t IDX_CEN_TCN_GP0_TC_GPIO_CLKDIV_SEL_DC_LEN = 10330; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED6 = 10331; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED7 = 10332; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED8 = 10333; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED8_LEN = 10334; static const uint64_t IDX_CEN_TCN_GP0_TC_PSRO_SEL_DC = 10335; static const uint64_t IDX_CEN_TCN_GP0_TC_PSRO_SEL_DC_LEN = 10336; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED10 = 10337; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED10_LEN = 10338; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED11 = 10339; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED11_LEN = 10340; static const uint64_t IDX_CEN_TCN_GP0_TC_PLLNSTIO_PADTEST_T_K = 10341; static const uint64_t IDX_CEN_TCN_GP0_TC_PLLNSTIO_PADTEST_C_K = 10342; static const uint64_t IDX_CEN_TCN_GP0_TC_UNIT_FENCE_RAM_DOUT_DC = 10343; static const uint64_t IDX_CEN_TCN_GP0_TC_SENS0_TUNEBITS_DC = 10344; static const uint64_t IDX_CEN_TCN_GP0_TC_SENS0_TUNEBITS_DC_LEN = 10345; static const uint64_t IDX_CEN_TCN_GP0_TC_SENS1_TUNEBITS_DC = 10346; static const uint64_t IDX_CEN_TCN_GP0_TC_SENS1_TUNEBITS_DC_LEN = 10347; static const uint64_t IDX_CEN_TCN_GP0_TC_MBI_FENCE_EN_DC = 10348; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED22 = 10349; static const uint64_t IDX_CEN_TCN_GP0_NOT_USED21 = 10350; static const uint64_t IDX_CEN_TCN_GP0_TC_MASK_CC_PCB_ERR_DC = 10351; static const uint64_t IDX_CEN_TCN_GP0_TC_MASK_CC_SCAN_OPCG_ERR_DC = 10352; static const uint64_t IDX_CEN_TCN_GP0_TC_CC_LCC_EDGE_DELAYED_DC = 10353; static const uint64_t IDX_CEN_TCN_GP0_TC_FENCE_PERV_DC = 10354; static const uint64_t IDX_CEN_TCN_GP1_REFR_ABIST_DONE = 10355; static const uint64_t IDX_CEN_TCN_GP1_MBS_ABIST_DONE = 10356; static const uint64_t IDX_CEN_TCN_GP1_MBI_ABIST_DONE = 10357; static const uint64_t IDX_CEN_TCN_GP1_TRA_ABIST_DONE = 10358; static const uint64_t IDX_CEN_TCN_GP1_REFR_ABIST_DIAG = 10359; static const uint64_t IDX_CEN_TCN_GP1_MBS_ABIST_DIAG = 10360; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED27 = 10361; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED28 = 10362; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED29 = 10363; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED30 = 10364; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED31 = 10365; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED32 = 10366; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED33 = 10367; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED34 = 10368; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED35 = 10369; static const uint64_t IDX_CEN_TCN_GP1_TC_OPCG_DONE_DC = 10370; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED36 = 10371; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED37 = 10372; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED38 = 10373; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED39 = 10374; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED40 = 10375; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED41 = 10376; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED42 = 10377; static const uint64_t IDX_CEN_TCN_GP1_NOT_USED43 = 10378; static const uint64_t IDX_CEN_TCN_GP2_GPIN_MASKING = 10379; static const uint64_t IDX_CEN_TCN_GP2_GPIN_MASKING_LEN = 10380; static const uint64_t IDX_CEN_TCN_GP4_TC_PROBE0_SEL_DC = 10381; static const uint64_t IDX_CEN_TCN_GP4_TC_PROBE0_SEL_DC_LEN = 10382; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED44 = 10383; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED44_LEN = 10384; static const uint64_t IDX_CEN_TCN_GP4_TC_PROBE1_SEL_DC = 10385; static const uint64_t IDX_CEN_TCN_GP4_TC_PROBE1_SEL_DC_LEN = 10386; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED45 = 10387; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED45_LEN = 10388; static const uint64_t IDX_CEN_TCN_GP4_TC_PROBE2_SEL_DC = 10389; static const uint64_t IDX_CEN_TCN_GP4_TC_PROBE2_SEL_DC_LEN = 10390; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED46 = 10391; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED46_LEN = 10392; static const uint64_t IDX_CEN_TCN_GP4_TC_PROBE3_SEL_DC = 10393; static const uint64_t IDX_CEN_TCN_GP4_TC_PROBE3_SEL_DC_LEN = 10394; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED47 = 10395; static const uint64_t IDX_CEN_TCN_GP4_TC_OFLOW_FEH_SEL_DC = 10396; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED48 = 10397; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED49 = 10398; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED50 = 10399; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED51 = 10400; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED52 = 10401; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED53 = 10402; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED54 = 10403; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED55 = 10404; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED56 = 10405; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED57 = 10406; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED58 = 10407; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED59 = 10408; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED60 = 10409; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED61 = 10410; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED62 = 10411; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED63 = 10412; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED64 = 10413; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED65 = 10414; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED66 = 10415; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED67 = 10416; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED68 = 10417; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED69 = 10418; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED70 = 10419; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED71 = 10420; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED72 = 10421; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED73 = 10422; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED74 = 10423; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED75 = 10424; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED76 = 10425; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED77 = 10426; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED78 = 10427; static const uint64_t IDX_CEN_TCN_GP4_NOT_USED79 = 10428; static const uint64_t IDX_CEN_TCN_GPIO_PROTECT_MODE_REG_READ_ENABLE = 10429; static const uint64_t IDX_CEN_TCN_GPIO_PROTECT_MODE_REG_WRITE_ENABLE = 10430; static const uint64_t IDX_CEN_TCN_GPIO_ATOMIC_LOCK_REG_ENABLE = 10431; static const uint64_t IDX_CEN_TCN_GPIO_ATOMIC_LOCK_REG_ID = 10432; static const uint64_t IDX_CEN_TCN_GPIO_ATOMIC_LOCK_REG_ID_LEN = 10433; static const uint64_t IDX_CEN_TCN_XFIR_IN0 = 10434; static const uint64_t IDX_CEN_TCN_XFIR_IN1 = 10435; static const uint64_t IDX_CEN_TCN_XFIR_IN2 = 10436; static const uint64_t IDX_CEN_TCN_XFIR_IN3 = 10437; static const uint64_t IDX_CEN_TCN_XFIR_IN4 = 10438; static const uint64_t IDX_CEN_TCN_XFIR_IN5 = 10439; static const uint64_t IDX_CEN_TCN_XFIR_IN6 = 10440; static const uint64_t IDX_CEN_TCN_XFIR_IN7 = 10441; static const uint64_t IDX_CEN_TCN_XFIR_IN8 = 10442; static const uint64_t IDX_CEN_TCN_XFIR_IN9 = 10443; static const uint64_t IDX_CEN_TCN_XFIR_IN10 = 10444; static const uint64_t IDX_CEN_TCN_XFIR_IN11 = 10445; static const uint64_t IDX_CEN_TCN_XFIR_IN12 = 10446; static const uint64_t IDX_CEN_TCN_XFIR_IN13 = 10447; static const uint64_t IDX_CEN_TCN_XFIR_IN14 = 10448; static const uint64_t IDX_CEN_TCN_XFIR_IN15 = 10449; static const uint64_t IDX_CEN_TCN_XFIR_IN15_LEN = 10450; static const uint64_t IDX_CEN_TCN_XFIR_IN26 = 10451; static const uint64_t IDX_CEN_TCN_RFIR_IN0 = 10452; static const uint64_t IDX_CEN_TCN_RFIR_LFIR_RECOV_ERR = 10453; static const uint64_t IDX_CEN_TCN_RFIR_IN = 10454; static const uint64_t IDX_CEN_TCN_RFIR_IN_LEN = 10455; static const uint64_t IDX_CEN_TCN_FIR_MASK_IN0 = 10456; static const uint64_t IDX_CEN_TCN_FIR_MASK_IN1 = 10457; static const uint64_t IDX_CEN_TCN_FIR_MASK_IN2 = 10458; static const uint64_t IDX_CEN_TCN_FIR_MASK_IN3 = 10459; static const uint64_t IDX_CEN_TCN_FIR_MASK_IN4 = 10460; static const uint64_t IDX_CEN_TCN_FIR_MASK_IN4_LEN = 10461; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN0 = 10462; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN1 = 10463; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN2 = 10464; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN3 = 10465; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN4 = 10466; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN5 = 10467; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN6 = 10468; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN7 = 10469; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN8 = 10470; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN9 = 10471; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN10 = 10472; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN11 = 10473; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN12 = 10474; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN13 = 10475; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN13_LEN = 10476; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_IN40 = 10477; static const uint64_t IDX_CEN_TCN_PSCOM_MODE_REG_ABORT_ON_PCB_ADDR_PARITY_ERROR = 10478; static const uint64_t IDX_CEN_TCN_PSCOM_MODE_REG_ABORT_ON_PCB_WDATA_PARITY_ERROR = 10479; static const uint64_t IDX_CEN_TCN_PSCOM_MODE_REG_ABORT_ON_DL_RETURN_P0_ERROR = 10480; static const uint64_t IDX_CEN_TCN_PSCOM_MODE_REG_ABORT_ON_DL_RETURN_WDATA_PARITY_ERROR = 10481; static const uint64_t IDX_CEN_TCN_PSCOM_MODE_REG_WATCHDOG_ENABLE = 10482; static const uint64_t IDX_CEN_TCN_PSCOM_MODE_REG_SCOM_HANG_LIMIT = 10483; static const uint64_t IDX_CEN_TCN_PSCOM_MODE_REG_SCOM_HANG_LIMIT_LEN = 10484; static const uint64_t IDX_CEN_TCN_PSCOM_MODE_REG_FORCE_ALL_RINGS = 10485; static const uint64_t IDX_CEN_TCN_PSCOM_MODE_REG_FSM_SELFRESET_ON_STATEVEC_PARITYERROR_ENABLE = 10486; static const uint64_t IDX_CEN_TCN_PSCOM_MODE_REG_RESERVED_LT = 10487; static const uint64_t IDX_CEN_TCN_PSCOM_MODE_REG_RESERVED_LT_LEN = 10488; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_WDATA_PARITY = 10489; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_ADDRESS_PARITY = 10490; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_DL_RETURN_WDATA_PARITY = 10491; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_DL_RETURN_P0 = 10492; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_UL_RDATA_PARITY = 10493; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_UL_P0 = 10494; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARITY_ON_INTERFACE_MACHINE = 10495; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARITY_ON_P2S_MACHINE = 10496; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULCCH = 10497; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN = 10498; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULDCH = 10499; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_WRITE_NVLD = 10500; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_READ_NVLD = 10501; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_ADDR_INVALID = 10502; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_COMMAND_PARITY = 10503; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_GENERAL_TIMEOUT = 10504; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION = 10505; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER = 10506; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_WDATA_PARITY = 10507; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_ADDRESS_PARITY = 10508; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_DL_RETURN_WDATA_PARITY = 10509; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_DL_RETURN_P0 = 10510; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_UL_RDATA_PARITY = 10511; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_UL_P0 = 10512; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PARITY_ON_INTERFACE_MACHINE = 10513; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PARITY_ON_P2S_MACHINE = 10514; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULCCH = 10515; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN = 10516; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULDCH = 10517; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_WRITE_NVLD = 10518; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_READ_NVLD = 10519; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_ADDR_INVALID = 10520; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_COMMAND_PARITY = 10521; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_GENERAL_TIMEOUT = 10522; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION = 10523; static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER = 10524; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_PCB_WDATA_PARITY = 10525; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_PCB_ADDRESS_PARITY = 10526; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_DL_RETURN_WDATA_PARITY = 10527; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_DL_RETURN_P0 = 10528; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_UL_RDATA_PARITY = 10529; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_UL_P0 = 10530; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_PARITY_ON_INTERFACE_MACHINE = 10531; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_PARITY_ON_P2S_MACHINE = 10532; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULCCH = 10533; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN = 10534; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULDCH = 10535; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_MASK_PARALLEL_WRITE_NVLD = 10536; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_MASK_PARALLEL_READ_NVLD = 10537; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_MASK_PARALLEL_ADDR_INVALID = 10538; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_PCB_COMMAND_PARITY = 10539; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_GENERAL_TIMEOUT = 10540; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION = 10541; static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER = 10542; static const uint64_t IDX_CEN_TCN_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR = 10543; static const uint64_t IDX_CEN_TCN_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR_LEN = 10544; static const uint64_t IDX_CEN_TCN_ADDR_TRAP_REG_PCB_READ_NOTWRITE_OF_LAST_TRANSACTION_WITH_ERROR = 10545; static const uint64_t IDX_CEN_TCN_ADDR_TRAP_REG_RESERVED_LAST_LT = 10546; static const uint64_t IDX_CEN_TCN_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR = 10547; static const uint64_t IDX_CEN_TCN_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR_LEN = 10548; static const uint64_t IDX_CEN_TCN_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_RETURN_PARITY = 10549; static const uint64_t IDX_CEN_TCN_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_WRITE_PARITY_ERROR = 10550; static const uint64_t IDX_CEN_TCN_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_ACCESS_VIOLATION = 10551; static const uint64_t IDX_CEN_TCN_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_INVALID_REGISTER = 10552; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_LOCAL_TRACE_RUN_IN = 10553; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_TRACE_STATE_LAT = 10554; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_TRACE_STATE_LAT_LEN = 10555; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_TRACE_FREEZE = 10556; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_COND3_STATE_LT = 10557; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_COND3_STATE_LT_LEN = 10558; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_COND5_STATE_LT = 10559; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_COND5_STATE_LT_LEN = 10560; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_HISTORY_CONDITION0_LT = 10561; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_HISTORY_CONDITION1_LT = 10562; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_HISTORY_COND2_3_EVENT = 10563; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_HISTORY_COND2_TIMEOUT = 10564; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_HISTORY_COND4_5_EVENT = 10565; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_HISTORY_COND4_TIMEOUT = 10566; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_RESERVED_TCDBG_LT = 10567; static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_RESERVED_TCDBG_LT_LEN = 10568; static const uint64_t IDX_CEN_TCN_PSCOM_WRITE_PROTECT_REG_ENABLE_SERIAL_RING = 10569; static const uint64_t IDX_CEN_TCN_PSCOM_WRITE_PROTECT_REG_RESERVED = 10570; static const uint64_t IDX_CEN_TCN_ATOMIC_LOCK_REG_ENABLE = 10571; static const uint64_t IDX_CEN_TCN_ATOMIC_LOCK_REG_ID = 10572; static const uint64_t IDX_CEN_TCN_ATOMIC_LOCK_REG_ID_LEN = 10573; static const uint64_t IDX_CEN_TCN_SPATTN_IN0 = 10574; static const uint64_t IDX_CEN_TCN_SPATTN_IN1 = 10575; static const uint64_t IDX_CEN_TCN_SPATTN_IN2 = 10576; static const uint64_t IDX_CEN_TCN_SPATTN_IN2_LEN = 10577; static const uint64_t IDX_CEN_TCN_SPA_MASK_IN = 10578; static const uint64_t IDX_CEN_TCN_SPA_MASK_IN_LEN = 10579; static const uint64_t IDX_CEN_TCN_MODE_REG_IN0 = 10580; static const uint64_t IDX_CEN_TCN_MODE_REG_IN1 = 10581; static const uint64_t IDX_CEN_TCN_MODE_REG_IN2 = 10582; static const uint64_t IDX_CEN_TCN_MODE_REG_IN3 = 10583; static const uint64_t IDX_CEN_TCN_MODE_REG_IN4 = 10584; static const uint64_t IDX_CEN_TCN_MODE_REG_IN5 = 10585; static const uint64_t IDX_CEN_TCN_MODE_REG_IN6 = 10586; static const uint64_t IDX_CEN_TCN_MODE_REG_IN7 = 10587; static const uint64_t IDX_CEN_TCN_MODE_REG_IN8 = 10588; static const uint64_t IDX_CEN_TCN_MODE_REG_IN9 = 10589; static const uint64_t IDX_CEN_TCN_MODE_REG_IN10 = 10590; static const uint64_t IDX_CEN_TCN_MODE_REG_IN11 = 10591; static const uint64_t IDX_CEN_TCN_MODE_REG_IN = 10592; static const uint64_t IDX_CEN_TCN_MODE_REG_IN_LEN = 10593; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_ACTION0_IN = 10594; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_ACTION0_IN_LEN = 10595; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_ACTION1_IN = 10596; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_ACTION1_IN_LEN = 10597; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_MASK_LFIR_IN = 10598; static const uint64_t IDX_CEN_TCN_LOCAL_FIR_MASK_LFIR_IN_LEN = 10599; static const uint64_t IDX_CEN_TCN_DTS_RESULT0_0_RESULT = 10600; static const uint64_t IDX_CEN_TCN_DTS_RESULT0_0_RESULT_LEN = 10601; static const uint64_t IDX_CEN_TCN_DTS_RESULT0_1_RESULT = 10602; static const uint64_t IDX_CEN_TCN_DTS_RESULT0_1_RESULT_LEN = 10603; static const uint64_t IDX_CEN_TCN_DTS_TRC_RESULT_TIMESTAMP_COUNTER_VALUE = 10604; static const uint64_t IDX_CEN_TCN_DTS_TRC_RESULT_TIMESTAMP_COUNTER_VALUE_LEN = 10605; static const uint64_t IDX_CEN_TCN_DTS_TRC_RESULT_TIMESTAMP_COUNTER_OVERFLOW_ERR = 10606; static const uint64_t IDX_CEN_TCN_DTS_TRC_RESULT_0_RESULT = 10607; static const uint64_t IDX_CEN_TCN_DTS_TRC_RESULT_0_RESULT_LEN = 10608; static const uint64_t IDX_CEN_TCN_ENC_CPM_RESULT0_DTS_0_RESULT = 10609; static const uint64_t IDX_CEN_TCN_ENC_CPM_RESULT0_DTS_0_RESULT_LEN = 10610; static const uint64_t IDX_CEN_TCN_ENC_CPM_RESULT0_DTS_1_RESULT = 10611; static const uint64_t IDX_CEN_TCN_ENC_CPM_RESULT0_DTS_1_RESULT_LEN = 10612; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_DIS_CPM_BUBBLE_CORR = 10613; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_FORCE_THRES_ACT = 10614; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_THRES_TRIP_ENA = 10615; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_THRES_TRIP_ENA_LEN = 10616; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_DTS_SAMPLE_ENA = 10617; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_SAMPLE_PULSE_CNT = 10618; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_SAMPLE_PULSE_CNT_LEN = 10619; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_THRES_ENA = 10620; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_THRES_ENA_LEN = 10621; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_DTS_TRIGGER = 10622; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_DTS_TRIGGER_SEL = 10623; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_UNUSED = 10624; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_UNUSED_LEN = 10625; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_DTS_READ_SEL = 10626; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_DTS_READ_SEL_LEN = 10627; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_DTS_ENABLE = 10628; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_DTS_ENABLE_LEN = 10629; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_CPM_ENABLE = 10630; static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_CPM_ENABLE_LEN = 10631; static const uint64_t IDX_CEN_TCN_SKITTER_MODE_REG_HOLD_SAMPLE = 10632; static const uint64_t IDX_CEN_TCN_SKITTER_MODE_REG_DISABLE_STICKINESS = 10633; static const uint64_t IDX_CEN_TCN_SKITTER_MODE_REG_UNUSED1 = 10634; static const uint64_t IDX_CEN_TCN_SKITTER_MODE_REG_UNUSED1_LEN = 10635; static const uint64_t IDX_CEN_TCN_SKITTER_MODE_REG_HOLD_DBGTRIG_SEL = 10636; static const uint64_t IDX_CEN_TCN_SKITTER_MODE_REG_HOLD_DBGTRIG_SEL_LEN = 10637; static const uint64_t IDX_CEN_TCN_SKITTER_MODE_REG_RESET_TRIG_SEL = 10638; static const uint64_t IDX_CEN_TCN_SKITTER_MODE_REG_RESET_TRIG_SEL_LEN = 10639; static const uint64_t IDX_CEN_TCN_SKITTER_MODE_REG_SAMPLE_GUTS = 10640; static const uint64_t IDX_CEN_TCN_SKITTER_MODE_REG_SAMPLE_GUTS_LEN = 10641; static const uint64_t IDX_CEN_TCN_SKITTER_MODE_REG_HOLD_SAMPLE_WITH_TRIGGER = 10642; static const uint64_t IDX_CEN_TCN_SKITTER_MODE_REG_DATA_V_LT = 10643; static const uint64_t IDX_CEN_TCN_SKITTER_CLKSRC_REG_SKITTER0 = 10644; static const uint64_t IDX_CEN_TCN_SKITTER_CLKSRC_REG_SKITTER0_LEN = 10645; static const uint64_t IDX_CEN_TCN_INJECT_REG_THERM_TRIP = 10646; static const uint64_t IDX_CEN_TCN_INJECT_REG_THERM_TRIP_LEN = 10647; static const uint64_t IDX_CEN_TCN_INJECT_REG_THERM_MODE = 10648; static const uint64_t IDX_CEN_TCN_INJECT_REG_THERM_MODE_LEN = 10649; static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_SERIAL_SHIFTCNT_MODEREG_PARITY_MASK = 10650; static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_THERM_MODEREG_PARITY_MASK = 10651; static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_SKITTER_MODEREG_PARITY_MASK = 10652; static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_SKITTER_FORCEREG_PARITY_MASK = 10653; static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_SCAN_INIT_VERSION_REG_PARITY_MASK = 10654; static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_VOLT_MODEREG_PARITY_MASK = 10655; static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_COUNT_STATE_MASK = 10656; static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_RUN_STATE_MASK = 10657; static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_THRES_STATE_MASK = 10658; static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_OVERFLOW_MASK = 10659; static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_SHIFTER_PARITY_MASK = 10660; static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_SHIFTER_VALID_MASK = 10661; static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_TIMEOUT_MASK = 10662; static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_F_SKITTER_READ_MASK = 10663; static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_PCB_MASK = 10664; static const uint64_t IDX_CEN_TCN_SKITTER_FORCE_REG_F_READ = 10665; static const uint64_t IDX_CEN_TCN_VOLT_MODE_REG_MEASURE_ENA = 10666; static const uint64_t IDX_CEN_TCN_VOLT_MODE_REG_TRIP_ENA = 10667; static const uint64_t IDX_CEN_TCN_VOLT_MODE_REG_ENABLE = 10668; static const uint64_t IDX_CEN_TCN_VOLT_MODE_REG_ENABLE_LEN = 10669; static const uint64_t IDX_CEN_TCN_TIMESTAMP_COUNTER_READ_VALUE = 10670; static const uint64_t IDX_CEN_TCN_TIMESTAMP_COUNTER_READ_VALUE_LEN = 10671; static const uint64_t IDX_CEN_TCN_TIMESTAMP_COUNTER_READ_OVERFLOW_ERR = 10672; static const uint64_t IDX_CEN_TCN_DBG_MODE_REG_GLB_BRCST = 10673; static const uint64_t IDX_CEN_TCN_DBG_MODE_REG_GLB_BRCST_LEN = 10674; static const uint64_t IDX_CEN_TCN_DBG_MODE_REG_TRACE_SEL = 10675; static const uint64_t IDX_CEN_TCN_DBG_MODE_REG_TRACE_SEL_LEN = 10676; static const uint64_t IDX_CEN_TCN_DBG_MODE_REG_TRIG_SEL = 10677; static const uint64_t IDX_CEN_TCN_DBG_MODE_REG_TRIG_SEL_LEN = 10678; static const uint64_t IDX_CEN_TCN_DBG_MODE_REG_STOP_ON_XSTOP_SELECTION = 10679; static const uint64_t IDX_CEN_TCN_DBG_MODE_REG_STOP_ON_RECOV_ERR_SELECTION = 10680; static const uint64_t IDX_CEN_TCN_DBG_MODE_REG_STOP_ON_SPATTN_SELECTION = 10681; static const uint64_t IDX_CEN_TCN_DBG_MODE_REG_FREEZE_SEL = 10682; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_COND1_SEL_A = 10683; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_COND1_SEL_A_LEN = 10684; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_COND1_SEL_B = 10685; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_COND1_SEL_B_LEN = 10686; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_COND2_SEL_A = 10687; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_COND2_SEL_A_LEN = 10688; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_COND2_SEL_B = 10689; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_COND2_SEL_B_LEN = 10690; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_C1_INAROW_MODE = 10691; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE1 = 10692; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE1 = 10693; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE1 = 10694; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_X_COUPLE_SELECT1 = 10695; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_X_COUPLE_SELECT1_LEN = 10696; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_C2_INAROW_MODE = 10697; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE2 = 10698; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE2 = 10699; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE2 = 10700; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_X_COUPLE_SELECT2 = 10701; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_X_COUPLE_SELECT2_LEN = 10702; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_COND3_ENABLE_RESET = 10703; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_EXACT_TO_MODE = 10704; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_RESET_C2TIMER_ON_C1 = 10705; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_RESET_C3_ON_C0 = 10706; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_SLOW_TO_MODE = 10707; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_EXACT_RESET_C3_ON_TO = 10708; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_C1_COUNT_LT = 10709; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_C1_COUNT_LT_LEN = 10710; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_C2_COUNT_LT = 10711; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_C2_COUNT_LT_LEN = 10712; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_RESET_C3_SELECT = 10713; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_RESET_C3_SELECT_LEN = 10714; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_CROSS_COUPLE_SELECT_1_A = 10715; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1_CROSS_COUPLE_SELECT_1_A_LEN = 10716; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_B = 10717; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_B_LEN = 10718; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_A = 10719; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_A_LEN = 10720; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_B = 10721; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_B_LEN = 10722; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_2_SP_COUNT_LT = 10723; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_2_SP_COUNT_LT_LEN = 10724; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_2_TO_CMP_LT_VALUE = 10725; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_2_TO_CMP_LT_VALUE_LEN = 10726; static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_2_FORCE_TEST_MODE = 10727; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_COND1_SEL_A = 10728; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_COND1_SEL_A_LEN = 10729; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_COND1_SEL_B = 10730; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_COND1_SEL_B_LEN = 10731; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_COND2_SEL_A = 10732; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_COND2_SEL_A_LEN = 10733; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_COND2_SEL_B = 10734; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_COND2_SEL_B_LEN = 10735; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_C1_INAROW_MODE = 10736; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE1 = 10737; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE1 = 10738; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE1 = 10739; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_X_COUPLE_SELECT1 = 10740; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_X_COUPLE_SELECT1_LEN = 10741; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_C2_INAROW_MODE = 10742; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE2 = 10743; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE2 = 10744; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE2 = 10745; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_X_COUPLE_SELECT2 = 10746; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_X_COUPLE_SELECT2_LEN = 10747; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_COND3_ENABLE_RESET = 10748; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_EXACT_TO_MODE = 10749; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_RESET_C2TIMER_ON_C1 = 10750; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_RESET_C3_ON_C0 = 10751; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_SLOW_TO_MODE = 10752; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_EXACT_RESET_C3_ON_TO = 10753; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_C1_COUNT_LT = 10754; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_C1_COUNT_LT_LEN = 10755; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_C2_COUNT_LT = 10756; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_C2_COUNT_LT_LEN = 10757; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_RESET_C3_SELECT = 10758; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_RESET_C3_SELECT_LEN = 10759; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_CROSS_COUPLE_SELECT_1_A = 10760; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1_CROSS_COUPLE_SELECT_1_A_LEN = 10761; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_B = 10762; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_B_LEN = 10763; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_A = 10764; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_A_LEN = 10765; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_B = 10766; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_B_LEN = 10767; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_2_SP_COUNT_LT = 10768; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_2_SP_COUNT_LT_LEN = 10769; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_2_TO_CMP_LT_VALUE = 10770; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_2_TO_CMP_LT_VALUE_LEN = 10771; static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_2_FORCE_TEST_MODE = 10772; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST1_COND3_ENABLE = 10773; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST2_COND3_ENABLE = 10774; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST3_COND3_ENABLE = 10775; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST4_COND3_ENABLE = 10776; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST1_SLOW_LFSR_MODE = 10777; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST2_SLOW_LFSR_MODE = 10778; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST3_SLOW_LFSR_MODE = 10779; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST4_SLOW_LFSR_MODE = 10780; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST1_CONDITION1_TRIG_SEL = 10781; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST1_CONDITION1_TRIG_SEL_LEN = 10782; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST1_CONDITION2_TRIG_SEL = 10783; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST1_CONDITION2_TRIG_SEL_LEN = 10784; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST1_C2_TIMEOUT_TRIG_SEL = 10785; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST1_C2_TIMEOUT_TRIG_SEL_LEN = 10786; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST2_CONDITION1_TRIG_SEL = 10787; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST2_CONDITION1_TRIG_SEL_LEN = 10788; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_SEL = 10789; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_SEL_LEN = 10790; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL = 10791; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL_LEN = 10792; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_EXT_TRIG_ON_STOP = 10793; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_EXT_TRIG_ON_FREEZE = 10794; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL = 10795; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL_LEN = 10796; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL = 10797; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL_LEN = 10798; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_PC_TP_TRIG_SEL = 10799; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_PC_TP_TRIG_SEL_LEN = 10800; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_ARM_SEL = 10801; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_ARM_SEL_LEN = 10802; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL = 10803; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL_LEN = 10804; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL = 10805; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL_LEN = 10806; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO = 10807; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO_LEN = 10808; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_DO = 10809; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_DO_LEN = 10810; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_DO = 10811; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_DO_LEN = 10812; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_DO = 10813; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_DO_LEN = 10814; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_DO = 10815; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_DO_LEN = 10816; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_DO = 10817; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_DO_LEN = 10818; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_WAITN = 10819; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_WAITN = 10820; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_WAITN = 10821; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_WAITN = 10822; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_WAITN = 10823; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_WAITN = 10824; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_BANK = 10825; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_BANK = 10826; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_BANK = 10827; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_BANK = 10828; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_BANK = 10829; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_BANK = 10830; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_LT = 10831; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_LT_LEN = 10832; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_SELECTOR = 10833; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_LT = 10834; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_LT_LEN = 10835; static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_SELECTOR = 10836; static const uint64_t IDX_CEN_TCN_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE = 10837; static const uint64_t IDX_CEN_TCN_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE_LEN = 10838; static const uint64_t IDX_CEN_TCN_DBG_TRACE_MODE_REG_2_IMM_FREEZE = 10839; static const uint64_t IDX_CEN_TCN_DBG_TRACE_MODE_REG_2_STOP_ON_ERR = 10840; static const uint64_t IDX_CEN_TCN_DBG_TRACE_MODE_REG_2_BANK_ON_RUNN_MATCH = 10841; static const uint64_t IDX_CEN_TCN_DBG_TRACE_MODE_REG_2_FORCE_TEST = 10842; static const uint64_t IDX_CEN_TCN_DBG_TRACE_MODE_REG_2_ACCUM_HIST = 10843; static const uint64_t IDX_CEN_TCN_DBG_TRACE_MODE_REG_2_FRZ_COUNT_ON = 10844; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_STORE_ON_TRIG_MODE = 10845; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_WRITE_ON_RUN_MODE = 10846; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE = 10847; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE_LEN = 10848; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_BANK_MODE = 10849; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_ENH_MODE = 10850; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL = 10851; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL_LEN = 10852; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63 = 10853; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63_LEN = 10854; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87 = 10855; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87_LEN = 10856; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_2_PATTERNA = 10857; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_2_PATTERNA_LEN = 10858; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_2_PATTERNB = 10859; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_2_PATTERNB_LEN = 10860; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_3_PATTERNC = 10861; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_3_PATTERNC_LEN = 10862; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_3_PATTERND = 10863; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_3_PATTERND_LEN = 10864; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_4_MASKA = 10865; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_4_MASKA_LEN = 10866; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_4_MASKB = 10867; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_4_MASKB_LEN = 10868; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_5_MASKC = 10869; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_5_MASKC_LEN = 10870; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_5_MASKD = 10871; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_5_MASKD_LEN = 10872; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_DISABLE_COMPRESSION = 10873; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_ERROR_BIT_COMPRESSION_CARE_MASK = 10874; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL = 10875; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL_LEN = 10876; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL = 10877; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL_LEN = 10878; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL = 10879; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL_LEN = 10880; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL = 10881; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL_LEN = 10882; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK = 10883; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK_LEN = 10884; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK = 10885; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK_LEN = 10886; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK = 10887; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK_LEN = 10888; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK = 10889; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK_LEN = 10890; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG0_NOT_MODE = 10891; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG1_NOT_MODE = 10892; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE = 10893; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE_LEN = 10894; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_HI_DATA_REG_DATA = 10895; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_HI_DATA_REG_DATA_LEN = 10896; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_DATA = 10897; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_DATA_LEN = 10898; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_ADDRESS = 10899; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_ADDRESS_LEN = 10900; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_LAST_BANK = 10901; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_LAST_BANK_LEN = 10902; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_LAST_BANK_VALID = 10903; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_WRITE_ON_RUN = 10904; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_RUNNING = 10905; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_HOLD_ADDRESS = 10906; static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_HOLD_ADDRESS_LEN = 10907; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_STORE_ON_TRIG_MODE = 10908; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_WRITE_ON_RUN_MODE = 10909; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE = 10910; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE_LEN = 10911; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_BANK_MODE = 10912; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_ENH_MODE = 10913; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL = 10914; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL_LEN = 10915; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63 = 10916; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63_LEN = 10917; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87 = 10918; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87_LEN = 10919; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_2_PATTERNA = 10920; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_2_PATTERNA_LEN = 10921; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_2_PATTERNB = 10922; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_2_PATTERNB_LEN = 10923; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_3_PATTERNC = 10924; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_3_PATTERNC_LEN = 10925; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_3_PATTERND = 10926; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_3_PATTERND_LEN = 10927; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_4_MASKA = 10928; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_4_MASKA_LEN = 10929; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_4_MASKB = 10930; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_4_MASKB_LEN = 10931; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_5_MASKC = 10932; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_5_MASKC_LEN = 10933; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_5_MASKD = 10934; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_5_MASKD_LEN = 10935; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_DISABLE_COMPRESSION = 10936; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_ERROR_BIT_COMPRESSION_CARE_MASK = 10937; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL = 10938; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL_LEN = 10939; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL = 10940; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL_LEN = 10941; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL = 10942; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL_LEN = 10943; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL = 10944; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL_LEN = 10945; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK = 10946; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK_LEN = 10947; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK = 10948; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK_LEN = 10949; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK = 10950; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK_LEN = 10951; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK = 10952; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK_LEN = 10953; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG0_NOT_MODE = 10954; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG1_NOT_MODE = 10955; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE = 10956; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE_LEN = 10957; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_HI_DATA_REG_DATA = 10958; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_HI_DATA_REG_DATA_LEN = 10959; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_DATA = 10960; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_DATA_LEN = 10961; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_ADDRESS = 10962; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_ADDRESS_LEN = 10963; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_LAST_BANK = 10964; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_LAST_BANK_LEN = 10965; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_LAST_BANK_VALID = 10966; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_WRITE_ON_RUN = 10967; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_RUNNING = 10968; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_HOLD_ADDRESS = 10969; static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_HOLD_ADDRESS_LEN = 10970; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_STORE_ON_TRIG_MODE = 10971; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_WRITE_ON_RUN_MODE = 10972; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE = 10973; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE_LEN = 10974; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_BANK_MODE = 10975; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_ENH_MODE = 10976; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL = 10977; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL_LEN = 10978; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63 = 10979; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63_LEN = 10980; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87 = 10981; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87_LEN = 10982; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_2_PATTERNA = 10983; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_2_PATTERNA_LEN = 10984; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_2_PATTERNB = 10985; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_2_PATTERNB_LEN = 10986; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_3_PATTERNC = 10987; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_3_PATTERNC_LEN = 10988; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_3_PATTERND = 10989; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_3_PATTERND_LEN = 10990; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_4_MASKA = 10991; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_4_MASKA_LEN = 10992; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_4_MASKB = 10993; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_4_MASKB_LEN = 10994; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_5_MASKC = 10995; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_5_MASKC_LEN = 10996; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_5_MASKD = 10997; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_5_MASKD_LEN = 10998; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_DISABLE_COMPRESSION = 10999; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_ERROR_BIT_COMPRESSION_CARE_MASK = 11000; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL = 11001; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL_LEN = 11002; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL = 11003; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL_LEN = 11004; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL = 11005; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL_LEN = 11006; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL = 11007; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL_LEN = 11008; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK = 11009; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK_LEN = 11010; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK = 11011; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK_LEN = 11012; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK = 11013; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK_LEN = 11014; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK = 11015; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK_LEN = 11016; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG0_NOT_MODE = 11017; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG1_NOT_MODE = 11018; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE = 11019; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE_LEN = 11020; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_HI_DATA_REG_DATA = 11021; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_HI_DATA_REG_DATA_LEN = 11022; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_DATA = 11023; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_DATA_LEN = 11024; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_ADDRESS = 11025; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_ADDRESS_LEN = 11026; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_LAST_BANK = 11027; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_LAST_BANK_LEN = 11028; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_LAST_BANK_VALID = 11029; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_WRITE_ON_RUN = 11030; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_RUNNING = 11031; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_HOLD_ADDRESS = 11032; static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_HOLD_ADDRESS_LEN = 11033; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_CNTL = 11034; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_CNTL_LEN = 11035; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_INJECT_FIR_ERR0 = 11036; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_INJECT_FIR_ERR1 = 11037; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_INJECT_FIR_ERR2 = 11038; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_INJECT_FIR_ERR3 = 11039; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_INJECT_FIR_ERR4 = 11040; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_VPROTH_CTL = 11041; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_VPROTH_CTL_LEN = 11042; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_CNTL = 11043; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_CNTL_LEN = 11044; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_INJECT_FIR_ERR0 = 11045; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_INJECT_FIR_ERR1 = 11046; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_INJECT_FIR_ERR2 = 11047; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_INJECT_FIR_ERR3 = 11048; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_INJECT_FIR_ERR4 = 11049; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_VPROTH_CTL = 11050; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_VPROTH_CTL_LEN = 11051; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_CONFIG0_P0_DISABLE_PARITY_CHECKER = 11052; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_CONFIG0_P0_RESET_ERR_RPT = 11053; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_CONFIG0_P0_FORCE_ON_CLK_GATE = 11054; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_CONFIG0_P0_DEBUG_BUS_SEL_LO = 11055; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_CONFIG0_P0_DEBUG__BUS_SEL_HI = 11056; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_CONFIG0_P0_DEBUG__BUS_SEL_HI_LEN = 11057; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_CONFIG0_P1_DISABLE_PARITY_CHECKER = 11058; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_CONFIG0_P1_RESET_ERR_RPT = 11059; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_CONFIG0_P1_FORCE_ON_CLK_GATE = 11060; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_CONFIG0_P1_DEBUG_BUS_SEL_LO = 11061; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_CONFIG0_P1_DEBUG__BUS_SEL_HI = 11062; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_CONFIG0_P1_DEBUG__BUS_SEL_HI_LEN = 11063; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ERROR_MASK0_P0_INVALID_ADDRESS_MASK = 11064; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ERROR_MASK0_P0_WR_PAR_ERR_MASK = 11065; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ERROR_MASK0_P1_INVALID_ADDRESS_MASK = 11066; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ERROR_MASK0_P1_WR_PAR_ERR_MASK = 11067; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ERROR_STATUS0_P0_INVALID_ADDRESS = 11068; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ERROR_STATUS0_P0_WR_PAR_ERR = 11069; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ERROR_STATUS0_P1_INVALID_ADDRESS = 11070; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ERROR_STATUS0_P1_WR_PAR_ERR = 11071; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_SET0 = 11072; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_SET1 = 11073; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_SET2 = 11074; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_SET3 = 11075; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_SET4 = 11076; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_SET5 = 11077; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_FSM_DP18 = 11078; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_FSM_DP18_LEN = 11079; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_REG_DP18 = 11080; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_REG_DP18_LEN = 11081; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_SET0 = 11082; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_SET1 = 11083; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_SET2 = 11084; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_SET3 = 11085; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_SET4 = 11086; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_SET5 = 11087; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_FSM_DP18 = 11088; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_FSM_DP18_LEN = 11089; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_REG_DP18 = 11090; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_REG_DP18_LEN = 11091; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR1_P0_PC_ERR_STATUS0 = 11092; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR1_P0_PC_ERR_STATUS0_LEN = 11093; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR1_P0_PC_INIT_CAL_ERR = 11094; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR1_P0_PC_INIT_CAL_ERR_LEN = 11095; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR1_P1_PC_ERR_STATUS0 = 11096; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR1_P1_PC_ERR_STATUS0_LEN = 11097; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR1_P1_PC_INIT_CAL_ERR = 11098; static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR1_P1_PC_INIT_CAL_ERR_LEN = 11099; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P0_LOCK = 11100; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P0_LOCK_LEN = 11101; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P1_LOCK = 11102; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P1_LOCK_LEN = 11103; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_BASE_CNTR0_P0_PERIODIC = 11104; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_BASE_CNTR0_P0_PERIODIC_LEN = 11105; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_BASE_CNTR0_P1_PERIODIC = 11106; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_BASE_CNTR0_P1_PERIODIC_LEN = 11107; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_BASE_CNTR1_P0_PERIODIC = 11108; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_BASE_CNTR1_P0_PERIODIC_LEN = 11109; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_BASE_CNTR1_P1_PERIODIC = 11110; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_BASE_CNTR1_P1_PERIODIC_LEN = 11111; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CAL_TIMER_RELOAD_VALUE_P0_PERIODIC = 11112; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CAL_TIMER_RELOAD_VALUE_P0_PERIODIC_LEN = 11113; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CAL_TIMER_RELOAD_VALUE_P1_PERIODIC = 11114; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CAL_TIMER_RELOAD_VALUE_P1_PERIODIC_LEN = 11115; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CAL_TIMER_P0_PERIODIC = 11116; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CAL_TIMER_P0_PERIODIC_LEN = 11117; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CAL_TIMER_P1_PERIODIC = 11118; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CAL_TIMER_P1_PERIODIC_LEN = 11119; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P0_PROTOCOL = 11120; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P0_PROTOCOL_LEN = 11121; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P0_DATA_MUX4_1MODE = 11122; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P0_SPAM_EN = 11123; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P0_DDR4_CMD_SIG_REDUCTION = 11124; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P0_SYSCLK_2X_MEMINTCLKO = 11125; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P0_RANK_OVERRIDE = 11126; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P0_RANK_OVERRIDE_VALUE = 11127; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P0_RANK_OVERRIDE_VALUE_LEN = 11128; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P0_LOW_LATENCY = 11129; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P0_DDR4_IPW_LOOP_DIS = 11130; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P0_DDR4_VLEVEL_BANK_GROUP = 11131; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P0_ZCAL_NOT_CONT = 11132; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P1_PROTOCOL = 11133; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P1_PROTOCOL_LEN = 11134; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P1_DATA_MUX4_1MODE = 11135; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P1_SPAM_EN = 11136; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P1_DDR4_CMD_SIG_REDUCTION = 11137; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P1_SYSCLK_2X_MEMINTCLKO = 11138; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P1_RANK_OVERRIDE = 11139; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P1_RANK_OVERRIDE_VALUE = 11140; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P1_RANK_OVERRIDE_VALUE_LEN = 11141; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P1_LOW_LATENCY = 11142; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P1_DDR4_IPW_LOOP_DIS = 11143; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P1_DDR4_VLEVEL_BANK_GROUP = 11144; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P1_ZCAL_NOT_CONT = 11145; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P0_WRITE_LATENCY_OFFSET = 11146; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P0_WRITE_LATENCY_OFFSET_LEN = 11147; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P0_READ_LATENCY_OFFSET = 11148; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P0_READ_LATENCY_OFFSET_LEN = 11149; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P0_MEMCTL_CIC_FAST = 11150; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P0_MEMCTL_CTRN_IGNORE = 11151; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P0_DISABLE_MEMCTL_CAL = 11152; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P0_MEMORY_TYPE = 11153; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P0_MEMORY_TYPE_LEN = 11154; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P0_DDR4_LATENCY_SW = 11155; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P0_RETRAIN_PERCAL_SW = 11156; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P1_WRITE_LATENCY_OFFSET = 11157; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P1_WRITE_LATENCY_OFFSET_LEN = 11158; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P1_READ_LATENCY_OFFSET = 11159; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P1_READ_LATENCY_OFFSET_LEN = 11160; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P1_MEMCTL_CIC_FAST = 11161; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P1_MEMCTL_CTRN_IGNORE = 11162; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P1_DISABLE_MEMCTL_CAL = 11163; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P1_MEMORY_TYPE = 11164; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P1_MEMORY_TYPE_LEN = 11165; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P1_DDR4_LATENCY_SW = 11166; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P1_RETRAIN_PERCAL_SW = 11167; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS0_INIT_CAL_VALUE = 11168; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS1_INIT_CAL_VALUE = 11169; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS2_INIT_CAL_VALUE = 11170; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS3_INIT_CAL_VALUE = 11171; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS4_INIT_CAL_VALUE = 11172; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS5_INIT_CAL_VALUE = 11173; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS6_INIT_CAL_VALUE = 11174; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS7_INIT_CAL_VALUE = 11175; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS0_INIT_CAL_VALUE = 11176; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS1_INIT_CAL_VALUE = 11177; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS2_INIT_CAL_VALUE = 11178; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS3_INIT_CAL_VALUE = 11179; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS4_INIT_CAL_VALUE = 11180; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS5_INIT_CAL_VALUE = 11181; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS6_INIT_CAL_VALUE = 11182; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS7_INIT_CAL_VALUE = 11183; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P0_LOCK = 11184; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P0_LOCK_LEN = 11185; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P1_LOCK = 11186; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P1_LOCK_LEN = 11187; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_MASK0_P0_RC_ERROR_MASK = 11188; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_MASK0_P0_WC_ERROR_MASK = 11189; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_MASK0_P0_SEQ_ERROR_MASK = 11190; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_MASK0_P0_CC_ERROR_MASK = 11191; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_MASK0_P0_APB_ERROR_MASK = 11192; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_MASK0_P0_ERROR_MASK = 11193; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_MASK0_P1_RC_ERROR_MASK = 11194; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_MASK0_P1_WC_ERROR_MASK = 11195; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_MASK0_P1_SEQ_ERROR_MASK = 11196; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_MASK0_P1_CC_ERROR_MASK = 11197; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_MASK0_P1_APB_ERROR_MASK = 11198; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_MASK0_P1_ERROR_MASK = 11199; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P0_RC_ERROR = 11200; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P0_WC_ERROR = 11201; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P0_SEQ_ERROR = 11202; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P0_CC_ERROR = 11203; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P0_APB_ERROR = 11204; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P0_ERROR = 11205; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P1_RC_ERROR = 11206; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P1_WC_ERROR = 11207; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P1_SEQ_ERROR = 11208; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P1_CC_ERROR = 11209; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P1_APB_ERROR = 11210; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P1_ERROR = 11211; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_WR_LEVEL = 11212; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_INITIAL_PAT_WR = 11213; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_DQS_ALIGN = 11214; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_RDCLK_ALIGN = 11215; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_READ_CTR = 11216; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_WRITE_CTR = 11217; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_INITIAL_COARSE_WR = 11218; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_COARSE_RD = 11219; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_CUSTOM_RD = 11220; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_CUSTOM_WR = 11221; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ABORT_ON_ERROR = 11222; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_DIGITAL_EYE = 11223; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_RANK_PAIR = 11224; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_RANK_PAIR_LEN = 11225; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_WR_LEVEL = 11226; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_INITIAL_PAT_WR = 11227; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_DQS_ALIGN = 11228; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_RDCLK_ALIGN = 11229; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_READ_CTR = 11230; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_WRITE_CTR = 11231; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_INITIAL_COARSE_WR = 11232; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_COARSE_RD = 11233; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_CUSTOM_RD = 11234; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_CUSTOM_WR = 11235; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ABORT_ON_ERROR = 11236; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_DIGITAL_EYE = 11237; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_RANK_PAIR = 11238; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_RANK_PAIR_LEN = 11239; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_REFRESH_COUNT = 11240; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_REFRESH_COUNT_LEN = 11241; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_REFRESH_CONTROL = 11242; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_REFRESH_CONTROL_LEN = 11243; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_REFRESH_ALL_RANKS = 11244; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_SNOOP_DIS = 11245; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_REFRESH_INTERVAL = 11246; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_REFRESH_INTERVAL_LEN = 11247; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_REFRESH_COUNT = 11248; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_REFRESH_COUNT_LEN = 11249; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_REFRESH_CONTROL = 11250; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_REFRESH_CONTROL_LEN = 11251; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_REFRESH_ALL_RANKS = 11252; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_SNOOP_DIS = 11253; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_REFRESH_INTERVAL = 11254; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_REFRESH_INTERVAL_LEN = 11255; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_WR_LEVEL = 11256; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_INITIAL_PAT_WRITE = 11257; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_DQS_ALIGN = 11258; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_RDCLK_ALIGN = 11259; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_READ_CTR = 11260; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_WRITE_CTR = 11261; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_INITIAL_COARSE_WR = 11262; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_COARSE_RD = 11263; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_CUSTOM_RD = 11264; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_CUSTOM_WR = 11265; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_DIGITAL_EYE = 11266; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_RANK_PAIR = 11267; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_RANK_PAIR_LEN = 11268; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_WR_LEVEL = 11269; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_INITIAL_PAT_WRITE = 11270; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_DQS_ALIGN = 11271; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_RDCLK_ALIGN = 11272; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_READ_CTR = 11273; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_WRITE_CTR = 11274; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_INITIAL_COARSE_WR = 11275; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_COARSE_RD = 11276; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_CUSTOM_RD = 11277; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_CUSTOM_WR = 11278; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_DIGITAL_EYE = 11279; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_RANK_PAIR = 11280; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_RANK_PAIR_LEN = 11281; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_WR_LEVEL = 11282; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_INITIAL_PAT_WRITE = 11283; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_DQS_ALIGN = 11284; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_RDCLK_ALIGN = 11285; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_READ_CTR = 11286; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_WRITE_CTR = 11287; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_INITIAL_COARSE_WR = 11288; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_COARSE_RD = 11289; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_CUSTOM_RD = 11290; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_CUSTOM_WR = 11291; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_DIGITAL_EYE = 11292; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_WR_LEVEL = 11293; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_INITIAL_PAT_WRITE = 11294; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_DQS_ALIGN = 11295; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_RDCLK_ALIGN = 11296; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_READ_CTR = 11297; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_WRITE_CTR = 11298; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_INITIAL_COARSE_WR = 11299; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_COARSE_RD = 11300; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_CUSTOM_RD = 11301; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_CUSTOM_WR = 11302; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_DIGITAL_EYE = 11303; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_STATUS_P0_COMPLETE = 11304; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_STATUS_P0_COMPLETE_LEN = 11305; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_STATUS_P0_PER_ABORT = 11306; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_STATUS_P1_COMPLETE = 11307; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_STATUS_P1_COMPLETE_LEN = 11308; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_STATUS_P1_PER_ABORT = 11309; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTP = 11310; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTP_LEN = 11311; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTN = 11312; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTN_LEN = 11313; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_OVERRIDE = 11314; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_ENABLE_ZCAL = 11315; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_RESET_ZCAL = 11316; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P1_PVTP = 11317; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P1_PVTP_LEN = 11318; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P1_PVTN = 11319; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P1_PVTN_LEN = 11320; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P1_OVERRIDE = 11321; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P1_ENABLE_ZCAL = 11322; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P1_RESET_ZCAL = 11323; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTP = 11324; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTP_LEN = 11325; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTN = 11326; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTN_LEN = 11327; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P1_PVTP = 11328; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P1_PVTP_LEN = 11329; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P1_PVTN = 11330; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P1_PVTN_LEN = 11331; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP0_P0_MODE_REGISTER_0_VALUE = 11332; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP0_P0_MODE_REGISTER_0_VALUE_LEN = 11333; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP0_P1_MODE_REGISTER_0_VALUE = 11334; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP0_P1_MODE_REGISTER_0_VALUE_LEN = 11335; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP1_P0_MODE_REGISTER_0_VALUE = 11336; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP1_P0_MODE_REGISTER_0_VALUE_LEN = 11337; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP1_P1_MODE_REGISTER_0_VALUE = 11338; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP1_P1_MODE_REGISTER_0_VALUE_LEN = 11339; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP2_P0_MODE_REGISTER_0_VALUE = 11340; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP2_P0_MODE_REGISTER_0_VALUE_LEN = 11341; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP2_P1_MODE_REGISTER_0_VALUE = 11342; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP2_P1_MODE_REGISTER_0_VALUE_LEN = 11343; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP3_P0_MODE_REGISTER_0_VALUE = 11344; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP3_P0_MODE_REGISTER_0_VALUE_LEN = 11345; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP3_P1_MODE_REGISTER_0_VALUE = 11346; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP3_P1_MODE_REGISTER_0_VALUE_LEN = 11347; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP0_P0_MODE_REGISTER_0_VALUE = 11348; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP0_P0_MODE_REGISTER_0_VALUE_LEN = 11349; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP0_P1_MODE_REGISTER_0_VALUE = 11350; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP0_P1_MODE_REGISTER_0_VALUE_LEN = 11351; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP1_P0_MODE_REGISTER_0_VALUE = 11352; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP1_P0_MODE_REGISTER_0_VALUE_LEN = 11353; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP1_P1_MODE_REGISTER_0_VALUE = 11354; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP1_P1_MODE_REGISTER_0_VALUE_LEN = 11355; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP2_P0_MODE_REGISTER_0_VALUE = 11356; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP2_P0_MODE_REGISTER_0_VALUE_LEN = 11357; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP2_P1_MODE_REGISTER_0_VALUE = 11358; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP2_P1_MODE_REGISTER_0_VALUE_LEN = 11359; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP3_P0_MODE_REGISTER_0_VALUE = 11360; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP3_P0_MODE_REGISTER_0_VALUE_LEN = 11361; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP3_P1_MODE_REGISTER_0_VALUE = 11362; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP3_P1_MODE_REGISTER_0_VALUE_LEN = 11363; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP0_P0_MODE_REGISTER_1_VALUE = 11364; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP0_P0_MODE_REGISTER_1_VALUE_LEN = 11365; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP0_P1_MODE_REGISTER_1_VALUE = 11366; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP0_P1_MODE_REGISTER_1_VALUE_LEN = 11367; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP1_P0_MODE_REGISTER_1_VALUE = 11368; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP1_P0_MODE_REGISTER_1_VALUE_LEN = 11369; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP1_P1_MODE_REGISTER_1_VALUE = 11370; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP1_P1_MODE_REGISTER_1_VALUE_LEN = 11371; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP2_P0_MODE_REGISTER_1_VALUE = 11372; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP2_P0_MODE_REGISTER_1_VALUE_LEN = 11373; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP2_P1_MODE_REGISTER_1_VALUE = 11374; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP2_P1_MODE_REGISTER_1_VALUE_LEN = 11375; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP3_P0_MODE_REGISTER_1_VALUE = 11376; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP3_P0_MODE_REGISTER_1_VALUE_LEN = 11377; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP3_P1_MODE_REGISTER_1_VALUE = 11378; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP3_P1_MODE_REGISTER_1_VALUE_LEN = 11379; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP0_P0_MODE_REGISTER_1_VALUE = 11380; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP0_P0_MODE_REGISTER_1_VALUE_LEN = 11381; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP0_P1_MODE_REGISTER_1_VALUE = 11382; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP0_P1_MODE_REGISTER_1_VALUE_LEN = 11383; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP1_P0_MODE_REGISTER_1_VALUE = 11384; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP1_P0_MODE_REGISTER_1_VALUE_LEN = 11385; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP1_P1_MODE_REGISTER_1_VALUE = 11386; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP1_P1_MODE_REGISTER_1_VALUE_LEN = 11387; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP2_P0_MODE_REGISTER_1_VALUE = 11388; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP2_P0_MODE_REGISTER_1_VALUE_LEN = 11389; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP2_P1_MODE_REGISTER_1_VALUE = 11390; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP2_P1_MODE_REGISTER_1_VALUE_LEN = 11391; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP3_P0_MODE_REGISTER_1_VALUE = 11392; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP3_P0_MODE_REGISTER_1_VALUE_LEN = 11393; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP3_P1_MODE_REGISTER_1_VALUE = 11394; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP3_P1_MODE_REGISTER_1_VALUE_LEN = 11395; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP0_P0_MODE_REGISTER_2_VALUE = 11396; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP0_P0_MODE_REGISTER_2_VALUE_LEN = 11397; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP0_P1_MODE_REGISTER_2_VALUE = 11398; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP0_P1_MODE_REGISTER_2_VALUE_LEN = 11399; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP1_P0_MODE_REGISTER_2_VALUE = 11400; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP1_P0_MODE_REGISTER_2_VALUE_LEN = 11401; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP1_P1_MODE_REGISTER_2_VALUE = 11402; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP1_P1_MODE_REGISTER_2_VALUE_LEN = 11403; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP2_P0_MODE_REGISTER_2_VALUE = 11404; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP2_P0_MODE_REGISTER_2_VALUE_LEN = 11405; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP2_P1_MODE_REGISTER_2_VALUE = 11406; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP2_P1_MODE_REGISTER_2_VALUE_LEN = 11407; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP3_P0_MODE_REGISTER_2_VALUE = 11408; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP3_P0_MODE_REGISTER_2_VALUE_LEN = 11409; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP3_P1_MODE_REGISTER_2_VALUE = 11410; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP3_P1_MODE_REGISTER_2_VALUE_LEN = 11411; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP0_P0_MODE_REGISTER_2_VALUE = 11412; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP0_P0_MODE_REGISTER_2_VALUE_LEN = 11413; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP0_P1_MODE_REGISTER_2_VALUE = 11414; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP0_P1_MODE_REGISTER_2_VALUE_LEN = 11415; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP1_P0_MODE_REGISTER_2_VALUE = 11416; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP1_P0_MODE_REGISTER_2_VALUE_LEN = 11417; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP1_P1_MODE_REGISTER_2_VALUE = 11418; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP1_P1_MODE_REGISTER_2_VALUE_LEN = 11419; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP2_P0_MODE_REGISTER_2_VALUE = 11420; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP2_P0_MODE_REGISTER_2_VALUE_LEN = 11421; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP2_P1_MODE_REGISTER_2_VALUE = 11422; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP2_P1_MODE_REGISTER_2_VALUE_LEN = 11423; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP3_P0_MODE_REGISTER_2_VALUE = 11424; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP3_P0_MODE_REGISTER_2_VALUE_LEN = 11425; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP3_P1_MODE_REGISTER_2_VALUE = 11426; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP3_P1_MODE_REGISTER_2_VALUE_LEN = 11427; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP0_P0_MODE_REGISTER_3_VALUE = 11428; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP0_P0_MODE_REGISTER_3_VALUE_LEN = 11429; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP0_P1_MODE_REGISTER_3_VALUE = 11430; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP0_P1_MODE_REGISTER_3_VALUE_LEN = 11431; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP1_P0_MODE_REGISTER_3_VALUE = 11432; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP1_P0_MODE_REGISTER_3_VALUE_LEN = 11433; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP1_P1_MODE_REGISTER_3_VALUE = 11434; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP1_P1_MODE_REGISTER_3_VALUE_LEN = 11435; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP2_P0_MODE_REGISTER_3_VALUE = 11436; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP2_P0_MODE_REGISTER_3_VALUE_LEN = 11437; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP2_P1_MODE_REGISTER_3_VALUE = 11438; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP2_P1_MODE_REGISTER_3_VALUE_LEN = 11439; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP3_P0_MODE_REGISTER_3_VALUE = 11440; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP3_P0_MODE_REGISTER_3_VALUE_LEN = 11441; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP3_P1_MODE_REGISTER_3_VALUE = 11442; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP3_P1_MODE_REGISTER_3_VALUE_LEN = 11443; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP0_P0_MODE_REGISTER_3_VALUE = 11444; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP0_P0_MODE_REGISTER_3_VALUE_LEN = 11445; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP0_P1_MODE_REGISTER_3_VALUE = 11446; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP0_P1_MODE_REGISTER_3_VALUE_LEN = 11447; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP1_P0_MODE_REGISTER_3_VALUE = 11448; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP1_P0_MODE_REGISTER_3_VALUE_LEN = 11449; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP1_P1_MODE_REGISTER_3_VALUE = 11450; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP1_P1_MODE_REGISTER_3_VALUE_LEN = 11451; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP2_P0_MODE_REGISTER_3_VALUE = 11452; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP2_P0_MODE_REGISTER_3_VALUE_LEN = 11453; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP2_P1_MODE_REGISTER_3_VALUE = 11454; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP2_P1_MODE_REGISTER_3_VALUE_LEN = 11455; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP3_P0_MODE_REGISTER_3_VALUE = 11456; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP3_P0_MODE_REGISTER_3_VALUE_LEN = 11457; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP3_P1_MODE_REGISTER_3_VALUE = 11458; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP3_P1_MODE_REGISTER_3_VALUE_LEN = 11459; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ENA_RANK_PAIR = 11460; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ENA_RANK_PAIR_LEN = 11461; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ENA_ZCAL = 11462; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ENA_SYSCLK_ALIGN = 11463; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ENA_READ_CTR = 11464; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ENA_RDCLK_ALIGN = 11465; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ENA_DQS_ALIGN = 11466; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_NEXT_RANK_PAIR = 11467; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_NEXT_RANK_PAIR_LEN = 11468; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_FAST_SIM_CNTR = 11469; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_START_INIT = 11470; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_START = 11471; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ABORT_ON_ERR_EN = 11472; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_DD2_FIX_DIS = 11473; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ENA_RANK_PAIR = 11474; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ENA_RANK_PAIR_LEN = 11475; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ENA_ZCAL = 11476; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ENA_SYSCLK_ALIGN = 11477; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ENA_READ_CTR = 11478; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ENA_RDCLK_ALIGN = 11479; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ENA_DQS_ALIGN = 11480; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_NEXT_RANK_PAIR = 11481; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_NEXT_RANK_PAIR_LEN = 11482; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_FAST_SIM_CNTR = 11483; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_START_INIT = 11484; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_START = 11485; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ABORT_ON_ERR_EN = 11486; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_DD2_FIX_DIS = 11487; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P0_ENA_RANK = 11488; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P0_ENA_RANK_LEN = 11489; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P0_NEXT_RANK = 11490; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P0_NEXT_RANK_LEN = 11491; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P0_START = 11492; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P1_ENA_RANK = 11493; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P1_ENA_RANK_LEN = 11494; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P1_NEXT_RANK = 11495; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P1_NEXT_RANK_LEN = 11496; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P1_START = 11497; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_MASTER_PD_CNTL = 11498; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_ANALOG_INPUT_STAB2 = 11499; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_EYEDAC_PD = 11500; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_PHYTOP_CLK_GATE = 11501; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_EXT_VREF_PD = 11502; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_RESET_STAB = 11503; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_ANALOG_OUTPUT_STAB = 11504; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_ANALOG_INPUT_STAB1 = 11505; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_SYSCLK_CLK_GATE = 11506; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_DELAY_LINE_CTL_OVERRIDE = 11507; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_WR_FIFO_STAB = 11508; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_ADR_RX_PD = 11509; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_DP18_RX_PD = 11510; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_DP18_RX_PD_LEN = 11511; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_TX_TRISTATE_CNTL = 11512; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_VCC_REG_PD = 11513; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_MASTER_PD_CNTL = 11514; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_ANALOG_INPUT_STAB2 = 11515; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_EYEDAC_PD = 11516; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_PHYTOP_CLK_GATE = 11517; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_EXT_VREF_PD = 11518; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_RESET_STAB = 11519; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_ANALOG_OUTPUT_STAB = 11520; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_ANALOG_INPUT_STAB1 = 11521; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_SYSCLK_CLK_GATE = 11522; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_DELAY_LINE_CTL_OVERRIDE = 11523; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_WR_FIFO_STAB = 11524; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_ADR_RX_PD = 11525; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_DP18_RX_PD = 11526; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_DP18_RX_PD_LEN = 11527; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_TX_TRISTATE_CNTL = 11528; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_VCC_REG_PD = 11529; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP0_TER = 11530; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP0_QUA = 11531; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP1_TER = 11532; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP1_QUA = 11533; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP2_TER = 11534; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP2_QUA = 11535; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP3_TER = 11536; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP3_QUA = 11537; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP0_TER = 11538; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP0_QUA = 11539; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP1_TER = 11540; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP1_QUA = 11541; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP2_TER = 11542; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP2_QUA = 11543; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP3_TER = 11544; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP3_QUA = 11545; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP0_PRI = 11546; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP0_SEC = 11547; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP1_PRI = 11548; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP1_SEC = 11549; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP2_PRI = 11550; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP2_SEC = 11551; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP3_PRI = 11552; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP3_SEC = 11553; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_GROUPING = 11554; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_GROUPING_LEN = 11555; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_A3_A4 = 11556; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_A5_A6 = 11557; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_A7_A8 = 11558; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_A11_A13 = 11559; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_BA0_BA1 = 11560; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_BG0_BG1 = 11561; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP0_PRI = 11562; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP0_SEC = 11563; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP1_PRI = 11564; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP1_SEC = 11565; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP2_PRI = 11566; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP2_SEC = 11567; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP3_PRI = 11568; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP3_SEC = 11569; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_GROUPING = 11570; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_GROUPING_LEN = 11571; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_A3_A4 = 11572; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_A5_A6 = 11573; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_A7_A8 = 11574; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_A11_A13 = 11575; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_BA0_BA1 = 11576; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_BG0_BG1 = 11577; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PRI = 11578; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PRI_LEN = 11579; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PRI_V = 11580; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_SEC = 11581; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_SEC_LEN = 11582; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_SEC_V = 11583; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PAIR1_PRI = 11584; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PAIR1_PRI_LEN = 11585; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PAIR1_PRI_V = 11586; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PAIR1_SEC = 11587; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PAIR1_SEC_LEN = 11588; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PAIR1_SEC_V = 11589; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PRI = 11590; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PRI_LEN = 11591; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PRI_V = 11592; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_SEC = 11593; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_SEC_LEN = 11594; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_SEC_V = 11595; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PAIR1_PRI = 11596; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PAIR1_PRI_LEN = 11597; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PAIR1_PRI_V = 11598; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PAIR1_SEC = 11599; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PAIR1_SEC_LEN = 11600; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PAIR1_SEC_V = 11601; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR2_PRI = 11602; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR2_PRI_LEN = 11603; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR2_PRI_V = 11604; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR2_SEC = 11605; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR2_SEC_LEN = 11606; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR2_SEC_V = 11607; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR3_PRI = 11608; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR3_PRI_LEN = 11609; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR3_PRI_V = 11610; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR3_SEC = 11611; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR3_SEC_LEN = 11612; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR3_SEC_V = 11613; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR2_PRI = 11614; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR2_PRI_LEN = 11615; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR2_PRI_V = 11616; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR2_SEC = 11617; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR2_SEC_LEN = 11618; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR2_SEC_V = 11619; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR3_PRI = 11620; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR3_PRI_LEN = 11621; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR3_PRI_V = 11622; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR3_SEC = 11623; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR3_SEC_LEN = 11624; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR3_SEC_V = 11625; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR0_TER = 11626; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR0_TER_LEN = 11627; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR0_TER_V = 11628; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR0_QUA = 11629; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR0_QUA_LEN = 11630; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR0_QUA_V = 11631; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR1_TER = 11632; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR1_TER_LEN = 11633; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR1_TER_V = 11634; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR1_QUA = 11635; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR1_QUA_LEN = 11636; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR1_QUA_V = 11637; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR0_TER = 11638; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR0_TER_LEN = 11639; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR0_TER_V = 11640; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR0_QUA = 11641; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR0_QUA_LEN = 11642; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR0_QUA_V = 11643; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR1_TER = 11644; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR1_TER_LEN = 11645; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR1_TER_V = 11646; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR1_QUA = 11647; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR1_QUA_LEN = 11648; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR1_QUA_V = 11649; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_PAIR2_TER = 11650; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_PAIR2_TER_LEN = 11651; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_PAIR2_TER_V = 11652; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_PAIR2_QUA = 11653; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_PAIR2_QUA_LEN = 11654; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_PAIR2_QUA_V = 11655; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_TER = 11656; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_TER_LEN = 11657; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_TER_V = 11658; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_QUA = 11659; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_QUA_LEN = 11660; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_QUA_V = 11661; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_PAIR2_TER = 11662; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_PAIR2_TER_LEN = 11663; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_PAIR2_TER_V = 11664; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_PAIR2_QUA = 11665; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_PAIR2_QUA_LEN = 11666; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_PAIR2_QUA_V = 11667; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_TER = 11668; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_TER_LEN = 11669; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_TER_V = 11670; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_QUA = 11671; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_QUA_LEN = 11672; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_QUA_V = 11673; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RELOAD_VALUE0_P0_PERIODIC_CAL_REQ_EN = 11674; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RELOAD_VALUE0_P0_PERIODIC = 11675; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RELOAD_VALUE0_P0_PERIODIC_LEN = 11676; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RELOAD_VALUE0_P1_PERIODIC_CAL_REQ_EN = 11677; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RELOAD_VALUE0_P1_PERIODIC = 11678; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RELOAD_VALUE0_P1_PERIODIC_LEN = 11679; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RESETS_P0_PLL_RESET = 11680; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RESETS_P0_SYSCLK_RESET = 11681; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RESETS_P1_PLL_RESET = 11682; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RESETS_P1_SYSCLK_RESET = 11683; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P0_VREFDQ0DSGN = 11684; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P0_VREFDQ0D = 11685; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P0_VREFDQ0D_LEN = 11686; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P0_VREFDQ1DSGN = 11687; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P0_VREFDQ1D = 11688; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P0_VREFDQ1D_LEN = 11689; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P1_VREFDQ0DSGN = 11690; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P1_VREFDQ0D = 11691; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P1_VREFDQ0D_LEN = 11692; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P1_VREFDQ1DSGN = 11693; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P1_VREFDQ1D = 11694; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P1_VREFDQ1D_LEN = 11695; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ZCAL_TIMER_RELOAD_VALUE_P0_PERIODIC = 11696; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ZCAL_TIMER_RELOAD_VALUE_P0_PERIODIC_LEN = 11697; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ZCAL_TIMER_RELOAD_VALUE_P1_PERIODIC = 11698; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ZCAL_TIMER_RELOAD_VALUE_P1_PERIODIC_LEN = 11699; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ZCAL_TIMER_P0_PERIODIC = 11700; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ZCAL_TIMER_P0_PERIODIC_LEN = 11701; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ZCAL_TIMER_P1_PERIODIC = 11702; static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ZCAL_TIMER_P1_PERIODIC_LEN = 11703; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P0_GLOBAL_PHY_OFFSET = 11704; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P0_GLOBAL_PHY_OFFSET_LEN = 11705; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P0_ADVANCE_RD_VALID = 11706; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P0_PER_DUTY_CYCLE_SW = 11707; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P0_PER_REPEAT_COUNT = 11708; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P0_PER_REPEAT_COUNT_LEN = 11709; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P0_SINGLE_BIT_MPR_RP0 = 11710; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P0_SINGLE_BIT_MPR_RP1 = 11711; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P0_SINGLE_BIT_MPR_RP2 = 11712; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P0_SINGLE_BIT_MPR_RP3 = 11713; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P0_ALIGN_ON_EVEN_CYCLES = 11714; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P0_PERFORM_RDCLK_ALIGN = 11715; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P0_STAGGERED_PATTERN = 11716; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P1_GLOBAL_PHY_OFFSET = 11717; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P1_GLOBAL_PHY_OFFSET_LEN = 11718; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P1_ADVANCE_RD_VALID = 11719; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P1_PER_DUTY_CYCLE_SW = 11720; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P1_PER_REPEAT_COUNT = 11721; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P1_PER_REPEAT_COUNT_LEN = 11722; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P1_SINGLE_BIT_MPR_RP0 = 11723; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P1_SINGLE_BIT_MPR_RP1 = 11724; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P1_SINGLE_BIT_MPR_RP2 = 11725; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P1_SINGLE_BIT_MPR_RP3 = 11726; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P1_ALIGN_ON_EVEN_CYCLES = 11727; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P1_PERFORM_RDCLK_ALIGN = 11728; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P1_STAGGERED_PATTERN = 11729; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG1_P0_OUTER_LOOP_CNT = 11730; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG1_P0_OUTER_LOOP_CNT_LEN = 11731; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG1_P1_OUTER_LOOP_CNT = 11732; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG1_P1_OUTER_LOOP_CNT_LEN = 11733; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG2_P0_CONSEQ_PASS = 11734; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG2_P0_CONSEQ_PASS_LEN = 11735; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG2_P0_BURST_WINDOW = 11736; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG2_P0_BURST_WINDOW_LEN = 11737; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG2_P0_ALLOW_RD_FIFO_AUTO_RESET = 11738; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG2_P1_CONSEQ_PASS = 11739; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG2_P1_CONSEQ_PASS_LEN = 11740; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG2_P1_BURST_WINDOW = 11741; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG2_P1_BURST_WINDOW_LEN = 11742; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG2_P1_ALLOW_RD_FIFO_AUTO_RESET = 11743; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P0_FINE_CAL_STEP_SIZE = 11744; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P0_FINE_CAL_STEP_SIZE_LEN = 11745; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P0_COARSE_CAL_STEP_SIZE = 11746; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P0_COARSE_CAL_STEP_SIZE_LEN = 11747; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P0_DQ_SEL_QUAD = 11748; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P0_DQ_SEL_QUAD_LEN = 11749; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P0_DQ_SEL_LANE = 11750; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P0_DQ_SEL_LANE_LEN = 11751; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P1_FINE_CAL_STEP_SIZE = 11752; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P1_FINE_CAL_STEP_SIZE_LEN = 11753; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P1_COARSE_CAL_STEP_SIZE = 11754; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P1_COARSE_CAL_STEP_SIZE_LEN = 11755; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P1_DQ_SEL_QUAD = 11756; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P1_DQ_SEL_QUAD_LEN = 11757; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P1_DQ_SEL_LANE = 11758; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P1_DQ_SEL_LANE_LEN = 11759; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_ERROR_MASK0_P0_RD_CNTL_ERROR_MASK = 11760; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_ERROR_MASK0_P1_RD_CNTL_ERROR_MASK = 11761; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_ERROR_STATUS0_P0_RD_CNTL_ERROR = 11762; static const uint64_t IDX_CEN_MBA_DDRPHY_RC_ERROR_STATUS0_P1_RD_CNTL_ERROR = 11763; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_MPR_PATTERN_BIT = 11764; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_TWO_CYCLE_ADDR_EN = 11765; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_MR_MASK_EN = 11766; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_MR_MASK_EN_LEN = 11767; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_DELAYED_PAR = 11768; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_LRDIMM_CONTEXT = 11769; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_FORCE_RESERVED = 11770; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_HALT_ROTATION = 11771; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_FORCE_MPR = 11772; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_CLONE_CS_MODE = 11773; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_PAR_INVERT = 11774; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_IPW_SIDEAB_SEL = 11775; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_PAR_A17_MASK = 11776; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_CW_MIRROR = 11777; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_MPR_PATTERN_BIT = 11778; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_TWO_CYCLE_ADDR_EN = 11779; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_MR_MASK_EN = 11780; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_MR_MASK_EN_LEN = 11781; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_DELAYED_PAR = 11782; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_LRDIMM_CONTEXT = 11783; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_FORCE_RESERVED = 11784; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_HALT_ROTATION = 11785; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_FORCE_MPR = 11786; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_CLONE_CS_MODE = 11787; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_PAR_INVERT = 11788; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_IPW_SIDEAB_SEL = 11789; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_PAR_A17_MASK = 11790; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_CW_MIRROR = 11791; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_MASK0_P0_MULT_REQ_ERR_MASK = 11792; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_MASK0_P0_INVALID_REQTYPE_ERR_MASK = 11793; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_MASK0_P0_EARLY_REQ_ERR_MASK = 11794; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_MASK0_P1_MULT_REQ_ERR_MASK = 11795; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_MASK0_P1_INVALID_REQTYPE_ERR_MASK = 11796; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_MASK0_P1_EARLY_REQ_ERR_MASK = 11797; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_MULTIPLE_REQ_ERROR = 11798; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_INVALID_REQTYPE_ERROR = 11799; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_EARLY_REQ_ERROR = 11800; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_MULTIPLE_REQ_SOURCE = 11801; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_MULTIPLE_REQ_SOURCE_LEN = 11802; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_INVALID_REQTYPE = 11803; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_INVALID_REQTYPE_LEN = 11804; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_INVALID_REQ_SOURCE = 11805; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_INVALID_REQ_SOURCE_LEN = 11806; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_EARLY_REQ_SOURCE = 11807; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_EARLY_REQ_SOURCE_LEN = 11808; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_MULTIPLE_REQ_ERROR = 11809; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_INVALID_REQTYPE_ERROR = 11810; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_EARLY_REQ_ERROR = 11811; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_MULTIPLE_REQ_SOURCE = 11812; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_MULTIPLE_REQ_SOURCE_LEN = 11813; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_INVALID_REQTYPE = 11814; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_INVALID_REQTYPE_LEN = 11815; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_INVALID_REQ_SOURCE = 11816; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_INVALID_REQ_SOURCE_LEN = 11817; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_EARLY_REQ_SOURCE = 11818; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_EARLY_REQ_SOURCE_LEN = 11819; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR2_P0_ADDR2 = 11820; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR2_P0_ADDR2_LEN = 11821; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR2_P1_ADDR2 = 11822; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR2_P1_ADDR2_LEN = 11823; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR3_P0_ADDR3 = 11824; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR3_P0_ADDR3_LEN = 11825; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR3_P1_ADDR3 = 11826; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR3_P1_ADDR3_LEN = 11827; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR4_P0_ADDR4 = 11828; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR4_P0_ADDR4_LEN = 11829; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR4_P1_ADDR4 = 11830; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR4_P1_ADDR4_LEN = 11831; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TMOD_CYCLES = 11832; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TMOD_CYCLES_LEN = 11833; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TRCD_CYCLES = 11834; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TRCD_CYCLES_LEN = 11835; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TRP_CYCLES = 11836; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TRP_CYCLES_LEN = 11837; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TRFC_CYCLES = 11838; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TRFC_CYCLES_LEN = 11839; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TMOD_CYCLES = 11840; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TMOD_CYCLES_LEN = 11841; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TRCD_CYCLES = 11842; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TRCD_CYCLES_LEN = 11843; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TRP_CYCLES = 11844; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TRP_CYCLES_LEN = 11845; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TRFC_CYCLES = 11846; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TRFC_CYCLES_LEN = 11847; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TZQINIT_CYCLES = 11848; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TZQINIT_CYCLES_LEN = 11849; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TZQCS_CYCLES = 11850; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TZQCS_CYCLES_LEN = 11851; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TWLDQSEN_CYCLES = 11852; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TWLDQSEN_CYCLES_LEN = 11853; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TWRMRD_CYCLES = 11854; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TWRMRD_CYCLES_LEN = 11855; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TZQINIT_CYCLES = 11856; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TZQINIT_CYCLES_LEN = 11857; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TZQCS_CYCLES = 11858; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TZQCS_CYCLES_LEN = 11859; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TWLDQSEN_CYCLES = 11860; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TWLDQSEN_CYCLES_LEN = 11861; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TWRMRD_CYCLES = 11862; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TWRMRD_CYCLES_LEN = 11863; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0_TODTLON_OFF_CYCLES = 11864; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0_TODTLON_OFF_CYCLES_LEN = 11865; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0_TRC_CYCLES = 11866; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0_TRC_CYCLES_LEN = 11867; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0_TMRSC_CYCLES = 11868; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0_TMRSC_CYCLES_LEN = 11869; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P1_TODTLON_OFF_CYCLES = 11870; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P1_TODTLON_OFF_CYCLES_LEN = 11871; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P1_TRC_CYCLES = 11872; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P1_TRC_CYCLES_LEN = 11873; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P1_TMRSC_CYCLES = 11874; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P1_TMRSC_CYCLES_LEN = 11875; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_DEFAULT_CFG_P0_DEF_VALUES = 11876; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_DEFAULT_CFG_P0_DEF_VALUES_LEN = 11877; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_DEFAULT_CFG_P1_DEF_VALUES = 11878; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_DEFAULT_CFG_P1_DEF_VALUES_LEN = 11879; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P0_VALUES0 = 11880; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P0_VALUES0_LEN = 11881; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P0_VALUES1 = 11882; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P0_VALUES1_LEN = 11883; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P1_VALUES0 = 11884; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P1_VALUES0_LEN = 11885; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P1_VALUES1 = 11886; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P1_VALUES1_LEN = 11887; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P0_VALUES2 = 11888; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P0_VALUES2_LEN = 11889; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P0_VALUES3 = 11890; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P0_VALUES3_LEN = 11891; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P1_VALUES2 = 11892; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P1_VALUES2_LEN = 11893; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P1_VALUES3 = 11894; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P1_VALUES3_LEN = 11895; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P0_VALUES4 = 11896; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P0_VALUES4_LEN = 11897; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P0_VALUES5 = 11898; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P0_VALUES5_LEN = 11899; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P1_VALUES4 = 11900; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P1_VALUES4_LEN = 11901; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P1_VALUES5 = 11902; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P1_VALUES5_LEN = 11903; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P0_VALUES6 = 11904; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P0_VALUES6_LEN = 11905; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P0_VALUES7 = 11906; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P0_VALUES7_LEN = 11907; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P1_VALUES6 = 11908; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P1_VALUES6_LEN = 11909; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P1_VALUES7 = 11910; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P1_VALUES7_LEN = 11911; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P0_VALUES0 = 11912; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P0_VALUES0_LEN = 11913; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P0_VALUES1 = 11914; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P0_VALUES1_LEN = 11915; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P1_VALUES0 = 11916; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P1_VALUES0_LEN = 11917; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P1_VALUES1 = 11918; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P1_VALUES1_LEN = 11919; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P0_VALUES2 = 11920; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P0_VALUES2_LEN = 11921; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P0_VALUES3 = 11922; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P0_VALUES3_LEN = 11923; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P1_VALUES2 = 11924; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P1_VALUES2_LEN = 11925; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P1_VALUES3 = 11926; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P1_VALUES3_LEN = 11927; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P0_VALUES4 = 11928; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P0_VALUES4_LEN = 11929; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P0_VALUES5 = 11930; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P0_VALUES5_LEN = 11931; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P1_VALUES4 = 11932; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P1_VALUES4_LEN = 11933; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P1_VALUES5 = 11934; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P1_VALUES5_LEN = 11935; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P0_VALUES6 = 11936; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P0_VALUES6_LEN = 11937; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P0_VALUES7 = 11938; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P0_VALUES7_LEN = 11939; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P1_VALUES6 = 11940; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P1_VALUES6_LEN = 11941; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P1_VALUES7 = 11942; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P1_VALUES7_LEN = 11943; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RD_WR_DATA0_P0_DATA_REG0 = 11944; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RD_WR_DATA0_P0_DATA_REG0_LEN = 11945; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RD_WR_DATA0_P1_DATA_REG0 = 11946; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RD_WR_DATA0_P1_DATA_REG0_LEN = 11947; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RD_WR_DATA1_P0_DATA_REG1 = 11948; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RD_WR_DATA1_P0_DATA_REG1_LEN = 11949; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RD_WR_DATA1_P1_DATA_REG1 = 11950; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RD_WR_DATA1_P1_DATA_REG1_LEN = 11951; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR0_P0_ADDR0 = 11952; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR0_P0_ADDR0_LEN = 11953; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR0_P1_ADDR0 = 11954; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR0_P1_ADDR0_LEN = 11955; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR1_P0_ADDR1 = 11956; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR1_P0_ADDR1_LEN = 11957; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR1_P1_ADDR1 = 11958; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR1_P1_ADDR1_LEN = 11959; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR2_P0_ADDR2 = 11960; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR2_P0_ADDR2_LEN = 11961; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR2_P1_ADDR2 = 11962; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR2_P1_ADDR2_LEN = 11963; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR3_P0_ADDR3 = 11964; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR3_P0_ADDR3_LEN = 11965; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR3_P1_ADDR3 = 11966; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR3_P1_ADDR3_LEN = 11967; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR4_P0_ADDR4 = 11968; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR4_P0_ADDR4_LEN = 11969; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR4_P1_ADDR4 = 11970; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR4_P1_ADDR4_LEN = 11971; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_0_2 = 11972; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_SEL_TYPE_0_2 = 11973; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_SEL_0_2 = 11974; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_SEL_0_2_LEN = 11975; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_1_3 = 11976; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_SEL_TYPE_1_3 = 11977; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_SEL_1_3 = 11978; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_SEL_1_3_LEN = 11979; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_0_2 = 11980; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_SEL_TYPE_0_2 = 11981; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_SEL_0_2 = 11982; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_SEL_0_2_LEN = 11983; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_1_3 = 11984; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_SEL_TYPE_1_3 = 11985; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_SEL_1_3 = 11986; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_SEL_1_3_LEN = 11987; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_0_2 = 11988; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_SEL_TYPE_0_2 = 11989; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_SEL_0_2 = 11990; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_SEL_0_2_LEN = 11991; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_1_3 = 11992; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_SEL_TYPE_1_3 = 11993; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_SEL_1_3 = 11994; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_SEL_1_3_LEN = 11995; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_0_2 = 11996; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_SEL_TYPE_0_2 = 11997; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_SEL_0_2 = 11998; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_SEL_0_2_LEN = 11999; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_1_3 = 12000; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_SEL_TYPE_1_3 = 12001; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_SEL_1_3 = 12002; static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_SEL_1_3_LEN = 12003; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG0_P0_TWLO_TWLOE = 12004; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG0_P0_TWLO_TWLOE_LEN = 12005; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG0_P0_WL_ONE_DQS_PULSE = 12006; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG0_P0_FW_WR_RD = 12007; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG0_P0_FW_WR_RD_LEN = 12008; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG0_P0_CUSTOM_INIT_WRITE = 12009; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG0_P1_TWLO_TWLOE = 12010; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG0_P1_TWLO_TWLOE_LEN = 12011; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG0_P1_WL_ONE_DQS_PULSE = 12012; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG0_P1_FW_WR_RD = 12013; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG0_P1_FW_WR_RD_LEN = 12014; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG0_P1_CUSTOM_INIT_WRITE = 12015; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG1_P0_BIG_STEP = 12016; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG1_P0_BIG_STEP_LEN = 12017; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG1_P0_SMALL_STEP = 12018; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG1_P0_SMALL_STEP_LEN = 12019; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG1_P0_WR_PRE_DLY = 12020; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG1_P0_WR_PRE_DLY_LEN = 12021; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG1_P1_BIG_STEP = 12022; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG1_P1_BIG_STEP_LEN = 12023; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG1_P1_SMALL_STEP = 12024; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG1_P1_SMALL_STEP_LEN = 12025; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG1_P1_WR_PRE_DLY = 12026; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG1_P1_WR_PRE_DLY_LEN = 12027; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P0_NUM_VALID_SAMPLES = 12028; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P0_NUM_VALID_SAMPLES_LEN = 12029; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P0_FW_RD_WR = 12030; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P0_FW_RD_WR_LEN = 12031; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P0_IPW_WR = 12032; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P0_IPW_WR_LEN = 12033; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P0_EN_RESET_DD2_FIX_DIS = 12034; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P0_EN_RESET_WR_DELAY_WL = 12035; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P1_NUM_VALID_SAMPLES = 12036; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P1_NUM_VALID_SAMPLES_LEN = 12037; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P1_FW_RD_WR = 12038; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P1_FW_RD_WR_LEN = 12039; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P1_IPW_WR = 12040; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P1_IPW_WR_LEN = 12041; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P1_EN_RESET_DD2_FIX_DIS = 12042; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P1_EN_RESET_WR_DELAY_WL = 12043; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG3_P0_DDR4_MRS_CMD_DQ_EN = 12044; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG3_P0_MRS_CMD_DQ_ON = 12045; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG3_P0_MRS_CMD_DQ_ON_LEN = 12046; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG3_P0_MRS_CMD_DQ_OFF = 12047; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG3_P0_MRS_CMD_DQ_OFF_LEN = 12048; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG3_P1_DDR4_MRS_CMD_DQ_EN = 12049; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG3_P1_MRS_CMD_DQ_ON = 12050; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG3_P1_MRS_CMD_DQ_ON_LEN = 12051; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG3_P1_MRS_CMD_DQ_OFF = 12052; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG3_P1_MRS_CMD_DQ_OFF_LEN = 12053; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_ERROR_MASK0_P0_WR_CNTL_ERROR_MASK = 12054; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_ERROR_MASK0_P1_WR_CNTL_ERROR_MASK = 12055; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_ERROR_STATUS0_P0_WR_CNTL_ERROR = 12056; static const uint64_t IDX_CEN_MBA_DDRPHY_WC_ERROR_STATUS0_P1_WR_CNTL_ERROR = 12057; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_0_01_DIR_15 = 12058; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_0_01_DIR_15_LEN = 12059; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_1_01_DIR_0_15 = 12060; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_1_01_DIR_0_15_LEN = 12061; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_0_01_DIR_15 = 12062; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_0_01_DIR_15_LEN = 12063; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_1_01_DIR_0_15 = 12064; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_1_01_DIR_0_15_LEN = 12065; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_2_23_DIR_0_15 = 12066; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_2_23_DIR_0_15_LEN = 12067; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_3_23_DIR_0_15 = 12068; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_3_23_DIR_0_15_LEN = 12069; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_2_23_DIR_0_15 = 12070; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_2_23_DIR_0_15_LEN = 12071; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_3_23_DIR_0_15 = 12072; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_3_23_DIR_0_15_LEN = 12073; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_4_DIR_0_15 = 12074; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_4_DIR_0_15_LEN = 12075; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_4_DIR_0_15 = 12076; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_4_DIR_0_15_LEN = 12077; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_DD2_FIX_DIS = 12078; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_TOXDRV_HIBERNATE = 12079; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_ATEST_MUX_CTL_EN = 12080; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_WL_ADVANCE_DISABLE = 12081; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_DISABLE_PING_PONG = 12082; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_DELAY_PING_PONG_HALF = 12083; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_ADVANCE_PING_PONG = 12084; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_ATEST_MUX_CTL0 = 12085; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_ATEST_MUX_CTL1 = 12086; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_ATEST_MUX_CTL2 = 12087; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_ATEST_MUX_CTL3 = 12088; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_DD2_FIX_DIS = 12089; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_TOXDRV_HIBERNATE = 12090; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_ATEST_MUX_CTL_EN = 12091; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_WL_ADVANCE_DISABLE = 12092; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_DISABLE_PING_PONG = 12093; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_DELAY_PING_PONG_HALF = 12094; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_ADVANCE_PING_PONG = 12095; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_ATEST_MUX_CTL0 = 12096; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_ATEST_MUX_CTL1 = 12097; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_ATEST_MUX_CTL2 = 12098; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_ATEST_MUX_CTL3 = 12099; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_DD2_FIX_DIS = 12100; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_TOXDRV_HIBERNATE = 12101; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_ATEST_MUX_CTL_EN = 12102; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_WL_ADVANCE_DISABLE = 12103; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_DISABLE_PING_PONG = 12104; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_DELAY_PING_PONG_HALF = 12105; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_ADVANCE_PING_PONG = 12106; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_ATEST_MUX_CTL0 = 12107; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_ATEST_MUX_CTL1 = 12108; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_ATEST_MUX_CTL2 = 12109; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_ATEST_MUX_CTL3 = 12110; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_DD2_FIX_DIS = 12111; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_TOXDRV_HIBERNATE = 12112; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_ATEST_MUX_CTL_EN = 12113; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_WL_ADVANCE_DISABLE = 12114; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_DISABLE_PING_PONG = 12115; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_DELAY_PING_PONG_HALF = 12116; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_ADVANCE_PING_PONG = 12117; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_ATEST_MUX_CTL0 = 12118; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_ATEST_MUX_CTL1 = 12119; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_ATEST_MUX_CTL2 = 12120; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_ATEST_MUX_CTL3 = 12121; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_DD2_FIX_DIS = 12122; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_TOXDRV_HIBERNATE = 12123; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_ATEST_MUX_CTL_EN = 12124; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_WL_ADVANCE_DISABLE = 12125; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_DISABLE_PING_PONG = 12126; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_DELAY_PING_PONG_HALF = 12127; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_ADVANCE_PING_PONG = 12128; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_ATEST_MUX_CTL0 = 12129; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_ATEST_MUX_CTL1 = 12130; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_ATEST_MUX_CTL2 = 12131; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_ATEST_MUX_CTL3 = 12132; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_DD2_FIX_DIS = 12133; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_TOXDRV_HIBERNATE = 12134; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_ATEST_MUX_CTL_EN = 12135; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_WL_ADVANCE_DISABLE = 12136; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_DISABLE_PING_PONG = 12137; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_DELAY_PING_PONG_HALF = 12138; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_ADVANCE_PING_PONG = 12139; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_ATEST_MUX_CTL0 = 12140; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_ATEST_MUX_CTL1 = 12141; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_ATEST_MUX_CTL2 = 12142; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_ATEST_MUX_CTL3 = 12143; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_DD2_FIX_DIS = 12144; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_TOXDRV_HIBERNATE = 12145; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_ATEST_MUX_CTL_EN = 12146; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_WL_ADVANCE_DISABLE = 12147; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_DISABLE_PING_PONG = 12148; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_DELAY_PING_PONG_HALF = 12149; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_ADVANCE_PING_PONG = 12150; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_ATEST_MUX_CTL0 = 12151; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_ATEST_MUX_CTL1 = 12152; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_ATEST_MUX_CTL2 = 12153; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_ATEST_MUX_CTL3 = 12154; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_DD2_FIX_DIS = 12155; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_TOXDRV_HIBERNATE = 12156; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_ATEST_MUX_CTL_EN = 12157; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_WL_ADVANCE_DISABLE = 12158; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_DISABLE_PING_PONG = 12159; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_DELAY_PING_PONG_HALF = 12160; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_ADVANCE_PING_PONG = 12161; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_ATEST_MUX_CTL0 = 12162; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_ATEST_MUX_CTL1 = 12163; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_ATEST_MUX_CTL2 = 12164; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_ATEST_MUX_CTL3 = 12165; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_DD2_FIX_DIS = 12166; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_TOXDRV_HIBERNATE = 12167; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_ATEST_MUX_CTL_EN = 12168; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_WL_ADVANCE_DISABLE = 12169; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_DISABLE_PING_PONG = 12170; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_DELAY_PING_PONG_HALF = 12171; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_ADVANCE_PING_PONG = 12172; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_ATEST_MUX_CTL0 = 12173; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_ATEST_MUX_CTL1 = 12174; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_ATEST_MUX_CTL2 = 12175; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_ATEST_MUX_CTL3 = 12176; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_DD2_FIX_DIS = 12177; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_TOXDRV_HIBERNATE = 12178; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_ATEST_MUX_CTL_EN = 12179; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_WL_ADVANCE_DISABLE = 12180; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_DISABLE_PING_PONG = 12181; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_DELAY_PING_PONG_HALF = 12182; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_ADVANCE_PING_PONG = 12183; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_ATEST_MUX_CTL0 = 12184; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_ATEST_MUX_CTL1 = 12185; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_ATEST_MUX_CTL2 = 12186; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_ATEST_MUX_CTL3 = 12187; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_0_01_DISABLE_15 = 12188; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_0_01_DISABLE_15_LEN = 12189; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_1_01_DISABLE_0_15 = 12190; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_1_01_DISABLE_0_15_LEN = 12191; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_0_01_DISABLE_15 = 12192; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_0_01_DISABLE_15_LEN = 12193; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_1_01_DISABLE_0_15 = 12194; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_1_01_DISABLE_0_15_LEN = 12195; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_2_23_DISABLE_0_15 = 12196; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_2_23_DISABLE_0_15_LEN = 12197; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_3_23_DISABLE_0_15 = 12198; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_3_23_DISABLE_0_15_LEN = 12199; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_2_23_DISABLE_0_15 = 12200; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_2_23_DISABLE_0_15_LEN = 12201; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_3_23_DISABLE_0_15 = 12202; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_3_23_DISABLE_0_15_LEN = 12203; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_4_DISABLE_0_15 = 12204; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_4_DISABLE_0_15_LEN = 12205; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_4_DISABLE_0_15 = 12206; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_4_DISABLE_0_15_LEN = 12207; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_0_01_DISABLE_15 = 12208; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_0_01_DISABLE_15_LEN = 12209; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_1_01_DISABLE_0_15 = 12210; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_1_01_DISABLE_0_15_LEN = 12211; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_0_01_DISABLE_15 = 12212; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_0_01_DISABLE_15_LEN = 12213; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_1_01_DISABLE_0_15 = 12214; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_1_01_DISABLE_0_15_LEN = 12215; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_2_23_DISABLE_0_15 = 12216; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_2_23_DISABLE_0_15_LEN = 12217; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_3_23_DISABLE_0_15 = 12218; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_3_23_DISABLE_0_15_LEN = 12219; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_2_23_DISABLE_0_15 = 12220; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_2_23_DISABLE_0_15_LEN = 12221; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_3_23_DISABLE_0_15 = 12222; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_3_23_DISABLE_0_15_LEN = 12223; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_4_DISABLE_0_15 = 12224; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_4_DISABLE_0_15_LEN = 12225; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_4_DISABLE_0_15 = 12226; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_4_DISABLE_0_15_LEN = 12227; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_0_01_DISABLE_15 = 12228; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_0_01_DISABLE_15_LEN = 12229; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_1_01_DISABLE_0_15 = 12230; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_1_01_DISABLE_0_15_LEN = 12231; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_0_01_DISABLE_15 = 12232; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_0_01_DISABLE_15_LEN = 12233; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_1_01_DISABLE_0_15 = 12234; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_1_01_DISABLE_0_15_LEN = 12235; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_2_23_DISABLE_0_15 = 12236; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_2_23_DISABLE_0_15_LEN = 12237; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_3_23_DISABLE_0_15 = 12238; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_3_23_DISABLE_0_15_LEN = 12239; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_2_23_DISABLE_0_15 = 12240; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_2_23_DISABLE_0_15_LEN = 12241; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_3_23_DISABLE_0_15 = 12242; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_3_23_DISABLE_0_15_LEN = 12243; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_4_DISABLE_0_15 = 12244; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_4_DISABLE_0_15_LEN = 12245; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_4_DISABLE_0_15 = 12246; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_4_DISABLE_0_15_LEN = 12247; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_0_01_DISABLE_15 = 12248; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_0_01_DISABLE_15_LEN = 12249; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_1_01_DISABLE_0_15 = 12250; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_1_01_DISABLE_0_15_LEN = 12251; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_0_01_DISABLE_15 = 12252; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_0_01_DISABLE_15_LEN = 12253; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_1_01_DISABLE_0_15 = 12254; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_1_01_DISABLE_0_15_LEN = 12255; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_2_23_DISABLE_0_15 = 12256; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_2_23_DISABLE_0_15_LEN = 12257; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_3_23_DISABLE_0_15 = 12258; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_3_23_DISABLE_0_15_LEN = 12259; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_2_23_DISABLE_0_15 = 12260; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_2_23_DISABLE_0_15_LEN = 12261; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_3_23_DISABLE_0_15 = 12262; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_3_23_DISABLE_0_15_LEN = 12263; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_4_DISABLE_0_15 = 12264; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_4_DISABLE_0_15_LEN = 12265; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_4_DISABLE_0_15 = 12266; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_4_DISABLE_0_15_LEN = 12267; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_0_01_DISABLE_16_23 = 12268; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_0_01_DISABLE_16_23_LEN = 12269; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_1_01_DISABLE_16_23 = 12270; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_1_01_DISABLE_16_23_LEN = 12271; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_0_01_DISABLE_16_23 = 12272; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_0_01_DISABLE_16_23_LEN = 12273; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_1_01_DISABLE_16_23 = 12274; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_1_01_DISABLE_16_23_LEN = 12275; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_2_23_DISABLE_16 = 12276; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_2_23_DISABLE_16_LEN = 12277; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_3_23_DISABLE_16 = 12278; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_3_23_DISABLE_16_LEN = 12279; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_2_23_DISABLE_16 = 12280; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_2_23_DISABLE_16_LEN = 12281; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_3_23_DISABLE_16 = 12282; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_3_23_DISABLE_16_LEN = 12283; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_4_DISABLE_16_23 = 12284; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_4_DISABLE_16_23_LEN = 12285; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_4_DISABLE_16_23 = 12286; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_4_DISABLE_16_23_LEN = 12287; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_0_01_DISABLE_16_23 = 12288; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_0_01_DISABLE_16_23_LEN = 12289; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_1_01_DISABLE_16_23 = 12290; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_1_01_DISABLE_16_23_LEN = 12291; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_0_01_DISABLE_16_23 = 12292; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_0_01_DISABLE_16_23_LEN = 12293; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_1_01_DISABLE_16_23 = 12294; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_1_01_DISABLE_16_23_LEN = 12295; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_2_23_DISABLE_16 = 12296; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_2_23_DISABLE_16_LEN = 12297; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_3_23_DISABLE_16 = 12298; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_3_23_DISABLE_16_LEN = 12299; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_2_23_DISABLE_16 = 12300; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_2_23_DISABLE_16_LEN = 12301; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_3_23_DISABLE_16 = 12302; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_3_23_DISABLE_16_LEN = 12303; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_4_DISABLE_16_23 = 12304; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_4_DISABLE_16_23_LEN = 12305; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_4_DISABLE_16_23 = 12306; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_4_DISABLE_16_23_LEN = 12307; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_0_01_DISABLE_16_23 = 12308; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_0_01_DISABLE_16_23_LEN = 12309; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_1_01_DISABLE_16_23 = 12310; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_1_01_DISABLE_16_23_LEN = 12311; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_0_01_DISABLE_16_23 = 12312; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_0_01_DISABLE_16_23_LEN = 12313; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_1_01_DISABLE_16_23 = 12314; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_1_01_DISABLE_16_23_LEN = 12315; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_2_23_DISABLE_16 = 12316; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_2_23_DISABLE_16_LEN = 12317; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_3_23_DISABLE_16 = 12318; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_3_23_DISABLE_16_LEN = 12319; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_2_23_DISABLE_16 = 12320; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_2_23_DISABLE_16_LEN = 12321; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_3_23_DISABLE_16 = 12322; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_3_23_DISABLE_16_LEN = 12323; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_4_DISABLE_16_23 = 12324; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_4_DISABLE_16_23_LEN = 12325; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_4_DISABLE_16_23 = 12326; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_4_DISABLE_16_23_LEN = 12327; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_0_01_DISABLE_16_23 = 12328; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_0_01_DISABLE_16_23_LEN = 12329; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_1_01_DISABLE_16_23 = 12330; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_1_01_DISABLE_16_23_LEN = 12331; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_0_01_DISABLE_16_23 = 12332; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_0_01_DISABLE_16_23_LEN = 12333; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_1_01_DISABLE_16_23 = 12334; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_1_01_DISABLE_16_23_LEN = 12335; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_2_23_DISABLE_16 = 12336; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_2_23_DISABLE_16_LEN = 12337; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_3_23_DISABLE_16 = 12338; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_3_23_DISABLE_16_LEN = 12339; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_2_23_DISABLE_16 = 12340; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_2_23_DISABLE_16_LEN = 12341; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_3_23_DISABLE_16 = 12342; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_3_23_DISABLE_16_LEN = 12343; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_4_DISABLE_16_23 = 12344; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_4_DISABLE_16_23_LEN = 12345; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_4_DISABLE_16_23 = 12346; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_4_DISABLE_16_23_LEN = 12347; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_0_01_ENABLE_15 = 12348; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_0_01_ENABLE_15_LEN = 12349; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_1_01_ENABLE_0_15 = 12350; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_1_01_ENABLE_0_15_LEN = 12351; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_0_01_ENABLE_15 = 12352; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_0_01_ENABLE_15_LEN = 12353; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_1_01_ENABLE_0_15 = 12354; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_1_01_ENABLE_0_15_LEN = 12355; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_2_23_ENABLE_0_15 = 12356; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_2_23_ENABLE_0_15_LEN = 12357; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_3_23_ENABLE_0_15 = 12358; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_3_23_ENABLE_0_15_LEN = 12359; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_2_23_ENABLE_0_15 = 12360; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_2_23_ENABLE_0_15_LEN = 12361; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_3_23_ENABLE_0_15 = 12362; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_3_23_ENABLE_0_15_LEN = 12363; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_4_ENABLE_0_15 = 12364; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_4_ENABLE_0_15_LEN = 12365; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_4_ENABLE_0_15 = 12366; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_4_ENABLE_0_15_LEN = 12367; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_ENABLE_16_23 = 12368; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_ENABLE_16_23_LEN = 12369; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_DFT_FORCE_OUTPUTS = 12370; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_DFT_PRBS7_GEN_EN = 12371; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_WRAPSEL = 12372; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_HW_VALUE = 12373; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_MRS_CMD_N0 = 12374; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_MRS_CMD_N1 = 12375; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_MRS_CMD_N2 = 12376; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_MRS_CMD_N3 = 12377; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_ENABLE_16_23 = 12378; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_ENABLE_16_23_LEN = 12379; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_DFT_FORCE_OUTPUTS = 12380; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_DFT_PRBS7_GEN_EN = 12381; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_WRAPSEL = 12382; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_HW_VALUE = 12383; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_MRS_CMD_N0 = 12384; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_MRS_CMD_N1 = 12385; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_MRS_CMD_N2 = 12386; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_MRS_CMD_N3 = 12387; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_ENABLE_16_23 = 12388; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_ENABLE_16_23_LEN = 12389; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_DFT_FORCE_OUTPUTS = 12390; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_DFT_PRBS7_GEN_EN = 12391; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_WRAPSEL = 12392; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_HW_VALUE = 12393; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_MRS_CMD_N0 = 12394; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_MRS_CMD_N1 = 12395; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_MRS_CMD_N2 = 12396; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_MRS_CMD_N3 = 12397; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_ENABLE_16_23 = 12398; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_ENABLE_16_23_LEN = 12399; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_DFT_FORCE_OUTPUTS = 12400; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_DFT_PRBS7_GEN_EN = 12401; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_WRAPSEL = 12402; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_HW_VALUE = 12403; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_MRS_CMD_N0 = 12404; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_MRS_CMD_N1 = 12405; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_MRS_CMD_N2 = 12406; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_MRS_CMD_N3 = 12407; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_ENABLE_16 = 12408; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_ENABLE_16_LEN = 12409; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_DFT_FORCE_OUTPUTS = 12410; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_DFT_PRBS7_GEN_EN = 12411; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_WRAPSEL = 12412; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_HW_VALUE = 12413; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_MRS_CMD_N0 = 12414; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_MRS_CMD_N1 = 12415; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_MRS_CMD_N2 = 12416; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_MRS_CMD_N3 = 12417; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_ENABLE_16 = 12418; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_ENABLE_16_LEN = 12419; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_DFT_FORCE_OUTPUTS = 12420; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_DFT_PRBS7_GEN_EN = 12421; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_WRAPSEL = 12422; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_HW_VALUE = 12423; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_MRS_CMD_N0 = 12424; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_MRS_CMD_N1 = 12425; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_MRS_CMD_N2 = 12426; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_MRS_CMD_N3 = 12427; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_ENABLE_16 = 12428; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_ENABLE_16_LEN = 12429; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_DFT_FORCE_OUTPUTS = 12430; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_DFT_PRBS7_GEN_EN = 12431; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_WRAPSEL = 12432; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_HW_VALUE = 12433; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_MRS_CMD_N0 = 12434; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_MRS_CMD_N1 = 12435; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_MRS_CMD_N2 = 12436; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_MRS_CMD_N3 = 12437; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_ENABLE_16 = 12438; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_ENABLE_16_LEN = 12439; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_DFT_FORCE_OUTPUTS = 12440; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_DFT_PRBS7_GEN_EN = 12441; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_WRAPSEL = 12442; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_HW_VALUE = 12443; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_MRS_CMD_N0 = 12444; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_MRS_CMD_N1 = 12445; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_MRS_CMD_N2 = 12446; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_MRS_CMD_N3 = 12447; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_ENABLE_16_23 = 12448; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_ENABLE_16_23_LEN = 12449; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_DFT_FORCE_OUTPUTS = 12450; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_DFT_PRBS7_GEN_EN = 12451; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_WRAPSEL = 12452; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_HW_VALUE = 12453; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_MRS_CMD_N0 = 12454; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_MRS_CMD_N1 = 12455; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_MRS_CMD_N2 = 12456; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_MRS_CMD_N3 = 12457; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_ENABLE_16_23 = 12458; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_ENABLE_16_23_LEN = 12459; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_DFT_FORCE_OUTPUTS = 12460; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_DFT_PRBS7_GEN_EN = 12461; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_WRAPSEL = 12462; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_HW_VALUE = 12463; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_MRS_CMD_N0 = 12464; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_MRS_CMD_N1 = 12465; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_MRS_CMD_N2 = 12466; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_MRS_CMD_N3 = 12467; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_HS_PROBE_A = 12468; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_HS_PROBE_A_LEN = 12469; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_HS_PROBE_B = 12470; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_HS_PROBE_B_LEN = 12471; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_RD = 12472; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_RD_LEN = 12473; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_WR = 12474; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_WR_LEN = 12475; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_HS_PROBE_A = 12476; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_HS_PROBE_A_LEN = 12477; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_HS_PROBE_B = 12478; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_HS_PROBE_B_LEN = 12479; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_RD = 12480; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_RD_LEN = 12481; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_WR = 12482; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_WR_LEN = 12483; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_HS_PROBE_A = 12484; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_HS_PROBE_A_LEN = 12485; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_HS_PROBE_B = 12486; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_HS_PROBE_B_LEN = 12487; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_RD = 12488; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_RD_LEN = 12489; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_WR = 12490; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_WR_LEN = 12491; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_HS_PROBE_A = 12492; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_HS_PROBE_A_LEN = 12493; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_HS_PROBE_B = 12494; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_HS_PROBE_B_LEN = 12495; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_RD = 12496; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_RD_LEN = 12497; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_WR = 12498; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_WR_LEN = 12499; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_HS_PROBE_A = 12500; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_HS_PROBE_A_LEN = 12501; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_HS_PROBE_B = 12502; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_HS_PROBE_B_LEN = 12503; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_RD = 12504; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_RD_LEN = 12505; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_WR = 12506; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_WR_LEN = 12507; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_HS_PROBE_A = 12508; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_HS_PROBE_A_LEN = 12509; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_HS_PROBE_B = 12510; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_HS_PROBE_B_LEN = 12511; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_RD = 12512; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_RD_LEN = 12513; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_WR = 12514; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_WR_LEN = 12515; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_HS_PROBE_A = 12516; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_HS_PROBE_A_LEN = 12517; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_HS_PROBE_B = 12518; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_HS_PROBE_B_LEN = 12519; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_RD = 12520; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_RD_LEN = 12521; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_WR = 12522; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_WR_LEN = 12523; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_HS_PROBE_A = 12524; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_HS_PROBE_A_LEN = 12525; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_HS_PROBE_B = 12526; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_HS_PROBE_B_LEN = 12527; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_RD = 12528; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_RD_LEN = 12529; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_WR = 12530; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_WR_LEN = 12531; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_HS_PROBE_A = 12532; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_HS_PROBE_A_LEN = 12533; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_HS_PROBE_B = 12534; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_HS_PROBE_B_LEN = 12535; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_RD = 12536; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_RD_LEN = 12537; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_WR = 12538; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_WR_LEN = 12539; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_HS_PROBE_A = 12540; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_HS_PROBE_A_LEN = 12541; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_HS_PROBE_B = 12542; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_HS_PROBE_B_LEN = 12543; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_RD = 12544; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_RD_LEN = 12545; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_WR = 12546; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_WR_LEN = 12547; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_0_01_DIGITAL_EN = 12548; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_0_01_BUMP = 12549; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_0_01_TRIG_PERIOD = 12550; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_0_01_CNTL_POL = 12551; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_0_01_CNTL_SRC = 12552; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_1_01_DIGITAL_EN = 12553; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_1_01_BUMP = 12554; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_1_01_TRIG_PERIOD = 12555; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_1_01_CNTL_POL = 12556; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_1_01_CNTL_SRC = 12557; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_0_01_DIGITAL_EN = 12558; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_0_01_BUMP = 12559; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_0_01_TRIG_PERIOD = 12560; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_0_01_CNTL_POL = 12561; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_0_01_CNTL_SRC = 12562; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_1_01_DIGITAL_EN = 12563; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_1_01_BUMP = 12564; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_1_01_TRIG_PERIOD = 12565; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_1_01_CNTL_POL = 12566; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_1_01_CNTL_SRC = 12567; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_2_23_DIGITAL_EN = 12568; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_2_23_BUMP = 12569; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_2_23_TRIG_PERIOD = 12570; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_2_23_CNTL_POL = 12571; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_2_23_CNTL_SRC = 12572; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_3_23_DIGITAL_EN = 12573; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_3_23_BUMP = 12574; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_3_23_TRIG_PERIOD = 12575; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_3_23_CNTL_POL = 12576; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_3_23_CNTL_SRC = 12577; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_2_23_DIGITAL_EN = 12578; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_2_23_BUMP = 12579; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_2_23_TRIG_PERIOD = 12580; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_2_23_CNTL_POL = 12581; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_2_23_CNTL_SRC = 12582; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_3_23_DIGITAL_EN = 12583; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_3_23_BUMP = 12584; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_3_23_TRIG_PERIOD = 12585; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_3_23_CNTL_POL = 12586; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_3_23_CNTL_SRC = 12587; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_4_DIGITAL_EN = 12588; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_4_BUMP = 12589; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_4_TRIG_PERIOD = 12590; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_4_CNTL_POL = 12591; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_4_CNTL_SRC = 12592; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_4_DIGITAL_EN = 12593; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_4_BUMP = 12594; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_4_TRIG_PERIOD = 12595; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_4_CNTL_POL = 12596; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_4_CNTL_SRC = 12597; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0_01_CHECKER_ENABLE = 12598; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0_01_CHECKER_RESET = 12599; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0_01_SYNC = 12600; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0_01_SYNC_LEN = 12601; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0_01_ERROR = 12602; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0_01_ERROR_LEN = 12603; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1_01_CHECKER_ENABLE = 12604; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1_01_CHECKER_RESET = 12605; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1_01_SYNC = 12606; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1_01_SYNC_LEN = 12607; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1_01_ERROR = 12608; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1_01_ERROR_LEN = 12609; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0_01_CHECKER_ENABLE = 12610; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0_01_CHECKER_RESET = 12611; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0_01_SYNC = 12612; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0_01_SYNC_LEN = 12613; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0_01_ERROR = 12614; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0_01_ERROR_LEN = 12615; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1_01_CHECKER_ENABLE = 12616; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1_01_CHECKER_RESET = 12617; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1_01_SYNC = 12618; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1_01_SYNC_LEN = 12619; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1_01_ERROR = 12620; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1_01_ERROR_LEN = 12621; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2_23_CHECKER_ENABLE = 12622; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2_23_CHECKER_RESET = 12623; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2_23_SYNC = 12624; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2_23_SYNC_LEN = 12625; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2_23_ERROR = 12626; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2_23_ERROR_LEN = 12627; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3_23_CHECKER_ENABLE = 12628; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3_23_CHECKER_RESET = 12629; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3_23_SYNC = 12630; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3_23_SYNC_LEN = 12631; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3_23_ERROR = 12632; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3_23_ERROR_LEN = 12633; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2_23_CHECKER_ENABLE = 12634; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2_23_CHECKER_RESET = 12635; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2_23_SYNC = 12636; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2_23_SYNC_LEN = 12637; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2_23_ERROR = 12638; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2_23_ERROR_LEN = 12639; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3_23_CHECKER_ENABLE = 12640; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3_23_CHECKER_RESET = 12641; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3_23_SYNC = 12642; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3_23_SYNC_LEN = 12643; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3_23_ERROR = 12644; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3_23_ERROR_LEN = 12645; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4_CHECKER_ENABLE = 12646; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4_CHECKER_RESET = 12647; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4_SYNC = 12648; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4_SYNC_LEN = 12649; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4_ERROR = 12650; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4_ERROR_LEN = 12651; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4_CHECKER_ENABLE = 12652; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4_CHECKER_RESET = 12653; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4_SYNC = 12654; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4_SYNC_LEN = 12655; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4_ERROR = 12656; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4_ERROR_LEN = 12657; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_0_01_DQS = 12658; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_0_01_DQS_LEN = 12659; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_1_01_DQS = 12660; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_1_01_DQS_LEN = 12661; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_0_01_DQS = 12662; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_0_01_DQS_LEN = 12663; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_1_01_DQS = 12664; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_1_01_DQS_LEN = 12665; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_2_23_DQS = 12666; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_2_23_DQS_LEN = 12667; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_3_23_DQS = 12668; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_3_23_DQS_LEN = 12669; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_2_23_DQS = 12670; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_2_23_DQS_LEN = 12671; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_3_23_DQS = 12672; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_3_23_DQS_LEN = 12673; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_4_DQS = 12674; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_4_DQS_LEN = 12675; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_4_DQS = 12676; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_4_DQS_LEN = 12677; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_0_01_ROT_CLK_N0 = 12678; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_0_01_ROT_CLK_N0_LEN = 12679; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_0_01_ROT_CLK_N1 = 12680; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_0_01_ROT_CLK_N1_LEN = 12681; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_1_01_ROT_CLK_N0 = 12682; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_1_01_ROT_CLK_N0_LEN = 12683; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_1_01_ROT_CLK_N1 = 12684; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_1_01_ROT_CLK_N1_LEN = 12685; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_0_01_ROT_CLK_N0 = 12686; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_0_01_ROT_CLK_N0_LEN = 12687; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_0_01_ROT_CLK_N1 = 12688; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_0_01_ROT_CLK_N1_LEN = 12689; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_1_01_ROT_CLK_N0 = 12690; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_1_01_ROT_CLK_N0_LEN = 12691; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_1_01_ROT_CLK_N1 = 12692; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_1_01_ROT_CLK_N1_LEN = 12693; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_2_23_ROT_CLK_N0 = 12694; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_2_23_ROT_CLK_N0_LEN = 12695; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_2_23_ROT_CLK_N1 = 12696; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_2_23_ROT_CLK_N1_LEN = 12697; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_3_23_ROT_CLK_N0 = 12698; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_3_23_ROT_CLK_N0_LEN = 12699; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_3_23_ROT_CLK_N1 = 12700; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_3_23_ROT_CLK_N1_LEN = 12701; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_2_23_ROT_CLK_N0 = 12702; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_2_23_ROT_CLK_N0_LEN = 12703; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_2_23_ROT_CLK_N1 = 12704; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_2_23_ROT_CLK_N1_LEN = 12705; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_3_23_ROT_CLK_N0 = 12706; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_3_23_ROT_CLK_N0_LEN = 12707; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_3_23_ROT_CLK_N1 = 12708; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_3_23_ROT_CLK_N1_LEN = 12709; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_4_ROT_CLK_N0 = 12710; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_4_ROT_CLK_N0_LEN = 12711; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_4_ROT_CLK_N1 = 12712; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_4_ROT_CLK_N1_LEN = 12713; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_4_ROT_CLK_N0 = 12714; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_4_ROT_CLK_N0_LEN = 12715; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_4_ROT_CLK_N1 = 12716; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_4_ROT_CLK_N1_LEN = 12717; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_0_01_ROT_CLK_N0 = 12718; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_0_01_ROT_CLK_N0_LEN = 12719; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_0_01_ROT_CLK_N1 = 12720; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_0_01_ROT_CLK_N1_LEN = 12721; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_1_01_ROT_CLK_N0 = 12722; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_1_01_ROT_CLK_N0_LEN = 12723; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_1_01_ROT_CLK_N1 = 12724; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_1_01_ROT_CLK_N1_LEN = 12725; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_0_01_ROT_CLK_N0 = 12726; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_0_01_ROT_CLK_N0_LEN = 12727; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_0_01_ROT_CLK_N1 = 12728; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_0_01_ROT_CLK_N1_LEN = 12729; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_1_01_ROT_CLK_N0 = 12730; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_1_01_ROT_CLK_N0_LEN = 12731; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_1_01_ROT_CLK_N1 = 12732; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_1_01_ROT_CLK_N1_LEN = 12733; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_2_23_ROT_CLK_N0 = 12734; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_2_23_ROT_CLK_N0_LEN = 12735; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_2_23_ROT_CLK_N1 = 12736; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_2_23_ROT_CLK_N1_LEN = 12737; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_3_23_ROT_CLK_N0 = 12738; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_3_23_ROT_CLK_N0_LEN = 12739; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_3_23_ROT_CLK_N1 = 12740; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_3_23_ROT_CLK_N1_LEN = 12741; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_2_23_ROT_CLK_N0 = 12742; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_2_23_ROT_CLK_N0_LEN = 12743; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_2_23_ROT_CLK_N1 = 12744; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_2_23_ROT_CLK_N1_LEN = 12745; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_3_23_ROT_CLK_N0 = 12746; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_3_23_ROT_CLK_N0_LEN = 12747; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_3_23_ROT_CLK_N1 = 12748; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_3_23_ROT_CLK_N1_LEN = 12749; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_4_ROT_CLK_N0 = 12750; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_4_ROT_CLK_N0_LEN = 12751; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_4_ROT_CLK_N1 = 12752; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_4_ROT_CLK_N1_LEN = 12753; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_4_ROT_CLK_N0 = 12754; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_4_ROT_CLK_N0_LEN = 12755; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_4_ROT_CLK_N1 = 12756; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_4_ROT_CLK_N1_LEN = 12757; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_0_01_ROT_CLK_N0 = 12758; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_0_01_ROT_CLK_N0_LEN = 12759; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_0_01_ROT_CLK_N1 = 12760; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_0_01_ROT_CLK_N1_LEN = 12761; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_1_01_ROT_CLK_N0 = 12762; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_1_01_ROT_CLK_N0_LEN = 12763; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_1_01_ROT_CLK_N1 = 12764; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_1_01_ROT_CLK_N1_LEN = 12765; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_0_01_ROT_CLK_N0 = 12766; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_0_01_ROT_CLK_N0_LEN = 12767; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_0_01_ROT_CLK_N1 = 12768; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_0_01_ROT_CLK_N1_LEN = 12769; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_1_01_ROT_CLK_N0 = 12770; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_1_01_ROT_CLK_N0_LEN = 12771; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_1_01_ROT_CLK_N1 = 12772; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_1_01_ROT_CLK_N1_LEN = 12773; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_2_23_ROT_CLK_N0 = 12774; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_2_23_ROT_CLK_N0_LEN = 12775; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_2_23_ROT_CLK_N1 = 12776; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_2_23_ROT_CLK_N1_LEN = 12777; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_3_23_ROT_CLK_N0 = 12778; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_3_23_ROT_CLK_N0_LEN = 12779; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_3_23_ROT_CLK_N1 = 12780; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_3_23_ROT_CLK_N1_LEN = 12781; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_2_23_ROT_CLK_N0 = 12782; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_2_23_ROT_CLK_N0_LEN = 12783; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_2_23_ROT_CLK_N1 = 12784; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_2_23_ROT_CLK_N1_LEN = 12785; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_3_23_ROT_CLK_N0 = 12786; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_3_23_ROT_CLK_N0_LEN = 12787; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_3_23_ROT_CLK_N1 = 12788; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_3_23_ROT_CLK_N1_LEN = 12789; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_4_ROT_CLK_N0 = 12790; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_4_ROT_CLK_N0_LEN = 12791; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_4_ROT_CLK_N1 = 12792; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_4_ROT_CLK_N1_LEN = 12793; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_4_ROT_CLK_N0 = 12794; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_4_ROT_CLK_N0_LEN = 12795; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_4_ROT_CLK_N1 = 12796; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_4_ROT_CLK_N1_LEN = 12797; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_0_01_ROT_CLK_N0 = 12798; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_0_01_ROT_CLK_N0_LEN = 12799; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_0_01_ROT_CLK_N1 = 12800; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_0_01_ROT_CLK_N1_LEN = 12801; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_1_01_ROT_CLK_N0 = 12802; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_1_01_ROT_CLK_N0_LEN = 12803; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_1_01_ROT_CLK_N1 = 12804; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_1_01_ROT_CLK_N1_LEN = 12805; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_0_01_ROT_CLK_N0 = 12806; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_0_01_ROT_CLK_N0_LEN = 12807; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_0_01_ROT_CLK_N1 = 12808; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_0_01_ROT_CLK_N1_LEN = 12809; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_1_01_ROT_CLK_N0 = 12810; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_1_01_ROT_CLK_N0_LEN = 12811; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_1_01_ROT_CLK_N1 = 12812; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_1_01_ROT_CLK_N1_LEN = 12813; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_2_23_ROT_CLK_N0 = 12814; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_2_23_ROT_CLK_N0_LEN = 12815; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_2_23_ROT_CLK_N1 = 12816; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_2_23_ROT_CLK_N1_LEN = 12817; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_3_23_ROT_CLK_N0 = 12818; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_3_23_ROT_CLK_N0_LEN = 12819; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_3_23_ROT_CLK_N1 = 12820; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_3_23_ROT_CLK_N1_LEN = 12821; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_2_23_ROT_CLK_N0 = 12822; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_2_23_ROT_CLK_N0_LEN = 12823; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_2_23_ROT_CLK_N1 = 12824; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_2_23_ROT_CLK_N1_LEN = 12825; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_3_23_ROT_CLK_N0 = 12826; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_3_23_ROT_CLK_N0_LEN = 12827; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_3_23_ROT_CLK_N1 = 12828; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_3_23_ROT_CLK_N1_LEN = 12829; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_4_ROT_CLK_N0 = 12830; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_4_ROT_CLK_N0_LEN = 12831; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_4_ROT_CLK_N1 = 12832; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_4_ROT_CLK_N1_LEN = 12833; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_4_ROT_CLK_N0 = 12834; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_4_ROT_CLK_N0_LEN = 12835; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_4_ROT_CLK_N1 = 12836; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_4_ROT_CLK_N1_LEN = 12837; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_0_01_ROT_CLK_N0 = 12838; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_0_01_ROT_CLK_N0_LEN = 12839; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_0_01_ROT_CLK_N1 = 12840; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_0_01_ROT_CLK_N1_LEN = 12841; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_1_01_ROT_CLK_N0 = 12842; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_1_01_ROT_CLK_N0_LEN = 12843; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_1_01_ROT_CLK_N1 = 12844; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_1_01_ROT_CLK_N1_LEN = 12845; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_0_01_ROT_CLK_N0 = 12846; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_0_01_ROT_CLK_N0_LEN = 12847; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_0_01_ROT_CLK_N1 = 12848; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_0_01_ROT_CLK_N1_LEN = 12849; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_1_01_ROT_CLK_N0 = 12850; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_1_01_ROT_CLK_N0_LEN = 12851; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_1_01_ROT_CLK_N1 = 12852; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_1_01_ROT_CLK_N1_LEN = 12853; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_2_23_ROT_CLK_N0 = 12854; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_2_23_ROT_CLK_N0_LEN = 12855; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_2_23_ROT_CLK_N1 = 12856; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_2_23_ROT_CLK_N1_LEN = 12857; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_3_23_ROT_CLK_N0 = 12858; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_3_23_ROT_CLK_N0_LEN = 12859; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_3_23_ROT_CLK_N1 = 12860; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_3_23_ROT_CLK_N1_LEN = 12861; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_2_23_ROT_CLK_N0 = 12862; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_2_23_ROT_CLK_N0_LEN = 12863; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_2_23_ROT_CLK_N1 = 12864; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_2_23_ROT_CLK_N1_LEN = 12865; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_3_23_ROT_CLK_N0 = 12866; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_3_23_ROT_CLK_N0_LEN = 12867; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_3_23_ROT_CLK_N1 = 12868; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_3_23_ROT_CLK_N1_LEN = 12869; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_4_ROT_CLK_N0 = 12870; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_4_ROT_CLK_N0_LEN = 12871; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_4_ROT_CLK_N1 = 12872; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_4_ROT_CLK_N1_LEN = 12873; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_4_ROT_CLK_N0 = 12874; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_4_ROT_CLK_N0_LEN = 12875; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_4_ROT_CLK_N1 = 12876; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_4_ROT_CLK_N1_LEN = 12877; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_0_01_ROT_CLK_N0 = 12878; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_0_01_ROT_CLK_N0_LEN = 12879; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_0_01_ROT_CLK_N1 = 12880; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_0_01_ROT_CLK_N1_LEN = 12881; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_1_01_ROT_CLK_N0 = 12882; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_1_01_ROT_CLK_N0_LEN = 12883; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_1_01_ROT_CLK_N1 = 12884; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_1_01_ROT_CLK_N1_LEN = 12885; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_0_01_ROT_CLK_N0 = 12886; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_0_01_ROT_CLK_N0_LEN = 12887; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_0_01_ROT_CLK_N1 = 12888; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_0_01_ROT_CLK_N1_LEN = 12889; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_1_01_ROT_CLK_N0 = 12890; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_1_01_ROT_CLK_N0_LEN = 12891; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_1_01_ROT_CLK_N1 = 12892; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_1_01_ROT_CLK_N1_LEN = 12893; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_2_23_ROT_CLK_N0 = 12894; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_2_23_ROT_CLK_N0_LEN = 12895; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_2_23_ROT_CLK_N1 = 12896; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_2_23_ROT_CLK_N1_LEN = 12897; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_3_23_ROT_CLK_N0 = 12898; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_3_23_ROT_CLK_N0_LEN = 12899; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_3_23_ROT_CLK_N1 = 12900; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_3_23_ROT_CLK_N1_LEN = 12901; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_2_23_ROT_CLK_N0 = 12902; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_2_23_ROT_CLK_N0_LEN = 12903; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_2_23_ROT_CLK_N1 = 12904; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_2_23_ROT_CLK_N1_LEN = 12905; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_3_23_ROT_CLK_N0 = 12906; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_3_23_ROT_CLK_N0_LEN = 12907; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_3_23_ROT_CLK_N1 = 12908; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_3_23_ROT_CLK_N1_LEN = 12909; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_4_ROT_CLK_N0 = 12910; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_4_ROT_CLK_N0_LEN = 12911; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_4_ROT_CLK_N1 = 12912; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_4_ROT_CLK_N1_LEN = 12913; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_4_ROT_CLK_N0 = 12914; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_4_ROT_CLK_N0_LEN = 12915; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_4_ROT_CLK_N1 = 12916; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_4_ROT_CLK_N1_LEN = 12917; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_0_01_ROT_CLK_N0 = 12918; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_0_01_ROT_CLK_N0_LEN = 12919; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_0_01_ROT_CLK_N1 = 12920; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_0_01_ROT_CLK_N1_LEN = 12921; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_1_01_ROT_CLK_N0 = 12922; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_1_01_ROT_CLK_N0_LEN = 12923; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_1_01_ROT_CLK_N1 = 12924; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_1_01_ROT_CLK_N1_LEN = 12925; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_0_01_ROT_CLK_N0 = 12926; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_0_01_ROT_CLK_N0_LEN = 12927; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_0_01_ROT_CLK_N1 = 12928; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_0_01_ROT_CLK_N1_LEN = 12929; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_1_01_ROT_CLK_N0 = 12930; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_1_01_ROT_CLK_N0_LEN = 12931; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_1_01_ROT_CLK_N1 = 12932; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_1_01_ROT_CLK_N1_LEN = 12933; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_2_23_ROT_CLK_N0 = 12934; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_2_23_ROT_CLK_N0_LEN = 12935; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_2_23_ROT_CLK_N1 = 12936; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_2_23_ROT_CLK_N1_LEN = 12937; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_3_23_ROT_CLK_N0 = 12938; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_3_23_ROT_CLK_N0_LEN = 12939; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_3_23_ROT_CLK_N1 = 12940; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_3_23_ROT_CLK_N1_LEN = 12941; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_2_23_ROT_CLK_N0 = 12942; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_2_23_ROT_CLK_N0_LEN = 12943; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_2_23_ROT_CLK_N1 = 12944; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_2_23_ROT_CLK_N1_LEN = 12945; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_3_23_ROT_CLK_N0 = 12946; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_3_23_ROT_CLK_N0_LEN = 12947; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_3_23_ROT_CLK_N1 = 12948; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_3_23_ROT_CLK_N1_LEN = 12949; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_4_ROT_CLK_N0 = 12950; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_4_ROT_CLK_N0_LEN = 12951; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_4_ROT_CLK_N1 = 12952; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_4_ROT_CLK_N1_LEN = 12953; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_4_ROT_CLK_N0 = 12954; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_4_ROT_CLK_N0_LEN = 12955; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_4_ROT_CLK_N1 = 12956; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_4_ROT_CLK_N1_LEN = 12957; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_0_01_ROT_CLK_N0 = 12958; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_0_01_ROT_CLK_N0_LEN = 12959; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_0_01_ROT_CLK_N1 = 12960; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_0_01_ROT_CLK_N1_LEN = 12961; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_1_01_ROT_CLK_N0 = 12962; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_1_01_ROT_CLK_N0_LEN = 12963; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_1_01_ROT_CLK_N1 = 12964; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_1_01_ROT_CLK_N1_LEN = 12965; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_0_01_ROT_CLK_N0 = 12966; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_0_01_ROT_CLK_N0_LEN = 12967; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_0_01_ROT_CLK_N1 = 12968; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_0_01_ROT_CLK_N1_LEN = 12969; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_1_01_ROT_CLK_N0 = 12970; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_1_01_ROT_CLK_N0_LEN = 12971; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_1_01_ROT_CLK_N1 = 12972; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_1_01_ROT_CLK_N1_LEN = 12973; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_2_23_ROT_CLK_N0 = 12974; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_2_23_ROT_CLK_N0_LEN = 12975; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_2_23_ROT_CLK_N1 = 12976; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_2_23_ROT_CLK_N1_LEN = 12977; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_3_23_ROT_CLK_N0 = 12978; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_3_23_ROT_CLK_N0_LEN = 12979; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_3_23_ROT_CLK_N1 = 12980; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_3_23_ROT_CLK_N1_LEN = 12981; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_2_23_ROT_CLK_N0 = 12982; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_2_23_ROT_CLK_N0_LEN = 12983; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_2_23_ROT_CLK_N1 = 12984; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_2_23_ROT_CLK_N1_LEN = 12985; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_3_23_ROT_CLK_N0 = 12986; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_3_23_ROT_CLK_N0_LEN = 12987; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_3_23_ROT_CLK_N1 = 12988; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_3_23_ROT_CLK_N1_LEN = 12989; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_4_ROT_CLK_N0 = 12990; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_4_ROT_CLK_N0_LEN = 12991; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_4_ROT_CLK_N1 = 12992; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_4_ROT_CLK_N1_LEN = 12993; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_4_ROT_CLK_N0 = 12994; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_4_ROT_CLK_N0_LEN = 12995; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_4_ROT_CLK_N1 = 12996; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_4_ROT_CLK_N1_LEN = 12997; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N0 = 12998; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N0_LEN = 12999; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N1 = 13000; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N1_LEN = 13001; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N2 = 13002; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N2_LEN = 13003; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N3 = 13004; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N3_LEN = 13005; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N0 = 13006; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N0_LEN = 13007; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N1 = 13008; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N1_LEN = 13009; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N2 = 13010; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N2_LEN = 13011; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N3 = 13012; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N3_LEN = 13013; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N0 = 13014; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N0_LEN = 13015; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N1 = 13016; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N1_LEN = 13017; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N2 = 13018; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N2_LEN = 13019; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N3 = 13020; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N3_LEN = 13021; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N0 = 13022; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N0_LEN = 13023; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N1 = 13024; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N1_LEN = 13025; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N2 = 13026; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N2_LEN = 13027; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N3 = 13028; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N3_LEN = 13029; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N0 = 13030; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N0_LEN = 13031; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N1 = 13032; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N1_LEN = 13033; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N2 = 13034; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N2_LEN = 13035; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N3 = 13036; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N3_LEN = 13037; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N0 = 13038; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N0_LEN = 13039; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N1 = 13040; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N1_LEN = 13041; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N2 = 13042; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N2_LEN = 13043; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N3 = 13044; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N3_LEN = 13045; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N0 = 13046; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N0_LEN = 13047; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N1 = 13048; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N1_LEN = 13049; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N2 = 13050; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N2_LEN = 13051; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N3 = 13052; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N3_LEN = 13053; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N0 = 13054; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N0_LEN = 13055; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N1 = 13056; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N1_LEN = 13057; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N2 = 13058; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N2_LEN = 13059; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N3 = 13060; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N3_LEN = 13061; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N0 = 13062; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N0_LEN = 13063; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N1 = 13064; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N1_LEN = 13065; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N2 = 13066; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N2_LEN = 13067; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N3 = 13068; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N3_LEN = 13069; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N0 = 13070; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N0_LEN = 13071; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N1 = 13072; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N1_LEN = 13073; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N2 = 13074; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N2_LEN = 13075; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N3 = 13076; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N3_LEN = 13077; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N0 = 13078; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N0_LEN = 13079; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N1 = 13080; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N1_LEN = 13081; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N2 = 13082; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N2_LEN = 13083; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N3 = 13084; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N3_LEN = 13085; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N0 = 13086; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N0_LEN = 13087; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N1 = 13088; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N1_LEN = 13089; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N2 = 13090; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N2_LEN = 13091; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N3 = 13092; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N3_LEN = 13093; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N0 = 13094; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N0_LEN = 13095; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N1 = 13096; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N1_LEN = 13097; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N2 = 13098; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N2_LEN = 13099; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N3 = 13100; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N3_LEN = 13101; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N0 = 13102; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N0_LEN = 13103; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N1 = 13104; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N1_LEN = 13105; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N2 = 13106; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N2_LEN = 13107; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N3 = 13108; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N3_LEN = 13109; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N0 = 13110; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N0_LEN = 13111; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N1 = 13112; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N1_LEN = 13113; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N2 = 13114; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N2_LEN = 13115; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N3 = 13116; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N3_LEN = 13117; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N0 = 13118; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N0_LEN = 13119; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N1 = 13120; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N1_LEN = 13121; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N2 = 13122; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N2_LEN = 13123; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N3 = 13124; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N3_LEN = 13125; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N0 = 13126; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N0_LEN = 13127; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N1 = 13128; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N1_LEN = 13129; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N2 = 13130; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N2_LEN = 13131; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N3 = 13132; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N3_LEN = 13133; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N0 = 13134; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N0_LEN = 13135; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N1 = 13136; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N1_LEN = 13137; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N2 = 13138; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N2_LEN = 13139; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N3 = 13140; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N3_LEN = 13141; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N0 = 13142; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N0_LEN = 13143; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N1 = 13144; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N1_LEN = 13145; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N2 = 13146; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N2_LEN = 13147; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N3 = 13148; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N3_LEN = 13149; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N0 = 13150; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N0_LEN = 13151; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N1 = 13152; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N1_LEN = 13153; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N2 = 13154; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N2_LEN = 13155; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N3 = 13156; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N3_LEN = 13157; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N0 = 13158; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N0_LEN = 13159; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N1 = 13160; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N1_LEN = 13161; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N2 = 13162; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N2_LEN = 13163; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N3 = 13164; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N3_LEN = 13165; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N0 = 13166; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N0_LEN = 13167; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N1 = 13168; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N1_LEN = 13169; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N2 = 13170; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N2_LEN = 13171; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N3 = 13172; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N3_LEN = 13173; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N0 = 13174; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N0_LEN = 13175; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N1 = 13176; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N1_LEN = 13177; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N2 = 13178; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N2_LEN = 13179; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N3 = 13180; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N3_LEN = 13181; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N0 = 13182; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N0_LEN = 13183; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N1 = 13184; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N1_LEN = 13185; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N2 = 13186; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N2_LEN = 13187; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N3 = 13188; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N3_LEN = 13189; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N0 = 13190; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N0_LEN = 13191; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N1 = 13192; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N1_LEN = 13193; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N2 = 13194; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N2_LEN = 13195; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N3 = 13196; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N3_LEN = 13197; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N0 = 13198; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N0_LEN = 13199; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N1 = 13200; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N1_LEN = 13201; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N2 = 13202; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N2_LEN = 13203; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N3 = 13204; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N3_LEN = 13205; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N0 = 13206; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N0_LEN = 13207; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N1 = 13208; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N1_LEN = 13209; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N2 = 13210; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N2_LEN = 13211; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N3 = 13212; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N3_LEN = 13213; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N0 = 13214; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N0_LEN = 13215; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N1 = 13216; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N1_LEN = 13217; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N2 = 13218; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N2_LEN = 13219; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N3 = 13220; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N3_LEN = 13221; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N0 = 13222; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N0_LEN = 13223; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N1 = 13224; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N1_LEN = 13225; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N2 = 13226; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N2_LEN = 13227; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N3 = 13228; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N3_LEN = 13229; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N0 = 13230; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N0_LEN = 13231; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N1 = 13232; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N1_LEN = 13233; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N2 = 13234; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N2_LEN = 13235; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N3 = 13236; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N3_LEN = 13237; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N0 = 13238; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N0_LEN = 13239; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N1 = 13240; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N1_LEN = 13241; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N2 = 13242; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N2_LEN = 13243; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N3 = 13244; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N3_LEN = 13245; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N0 = 13246; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N0_LEN = 13247; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N1 = 13248; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N1_LEN = 13249; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N2 = 13250; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N2_LEN = 13251; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N3 = 13252; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N3_LEN = 13253; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N0 = 13254; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N0_LEN = 13255; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N1 = 13256; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N1_LEN = 13257; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N2 = 13258; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N2_LEN = 13259; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N3 = 13260; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N3_LEN = 13261; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N0 = 13262; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N0_LEN = 13263; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N1 = 13264; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N1_LEN = 13265; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N2 = 13266; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N2_LEN = 13267; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N3 = 13268; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N3_LEN = 13269; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N0 = 13270; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N0_LEN = 13271; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N1 = 13272; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N1_LEN = 13273; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N2 = 13274; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N2_LEN = 13275; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N3 = 13276; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N3_LEN = 13277; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N0 = 13278; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N0_LEN = 13279; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N1 = 13280; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N1_LEN = 13281; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N2 = 13282; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N2_LEN = 13283; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N3 = 13284; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N3_LEN = 13285; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N0 = 13286; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N0_LEN = 13287; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N1 = 13288; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N1_LEN = 13289; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N2 = 13290; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N2_LEN = 13291; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N3 = 13292; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N3_LEN = 13293; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N0 = 13294; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N0_LEN = 13295; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N1 = 13296; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N1_LEN = 13297; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N2 = 13298; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N2_LEN = 13299; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N3 = 13300; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N3_LEN = 13301; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N0 = 13302; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N0_LEN = 13303; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N1 = 13304; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N1_LEN = 13305; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N2 = 13306; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N2_LEN = 13307; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N3 = 13308; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N3_LEN = 13309; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N0 = 13310; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N0_LEN = 13311; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N1 = 13312; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N1_LEN = 13313; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N2 = 13314; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N2_LEN = 13315; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N3 = 13316; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N3_LEN = 13317; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_DQSCLK_SELECT0 = 13318; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_DQSCLK_SELECT0_LEN = 13319; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_RDCLK_SELECT0 = 13320; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_RDCLK_SELECT0_LEN = 13321; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_DQSCLK_SELECT1 = 13322; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_DQSCLK_SELECT1_LEN = 13323; static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_