From a4edd934b26877603b9e024182d98fb210fba8fc Mon Sep 17 00:00:00 2001 From: Abhishek Agarwal Date: Mon, 13 Jun 2016 10:14:07 +0200 Subject: Level 2 HWP p9_getecid Change-Id: I0e1238fdd21e239bb082795ef7fad6fde3c3ebd9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25701 Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Sunil Kumar Reviewed-by: Soma Bhanutej Reviewed-by: PARVATHI RACHAKONDA Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25703 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell --- .../chips/p9/procedures/hwp/perv/p9_getecid.C | 68 +++++++++++++++++++++- .../chips/p9/procedures/hwp/perv/p9_getecid.H | 6 +- .../xml/attribute_info/pervasive_attributes.xml | 8 ++- .../fapi2/xml/attribute_info/hb_temp_defaults.xml | 3 + 4 files changed, 78 insertions(+), 7 deletions(-) (limited to 'src') diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C b/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C index ad2d909a8..077beb945 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C @@ -25,22 +25,84 @@ // *HWP HW Backup Owner : Srinivas V Naga // *HWP FW Owner : sunil kumar // *HWP Team : Perv -// *HWP Level : 1 +// *HWP Level : 2 // *HWP Consumed by : SBE //------------------------------------------------------------------------------ //## auto_generated #include "p9_getecid.H" +//## auto_generated +#include "p9_const_common.H" + +#include +#include +#include +#include +#include +enum P9_SBE_COMMON_Private_Constants +{ + OTPC_M_MODE_REGISTER_ECC_ENABLE_BIT = 1 // OTPROM mode register MODE_ECC_ENABLE field/bit definitions +}; fapi2::ReturnCode p9_getecid(const - fapi2::Target& i_target_chip, const fapi2::variable_buffer& o_fuseString) + fapi2::Target& i_target_chip, fapi2::variable_buffer& o_fuseString) { + uint64_t attr_data[2]; + bool secure_mode = false; + fapi2::buffer l_ecid_part0_data64 = 0; + fapi2::buffer l_ecid_part1_data64 = 0; + fapi2::buffer l_ecid_part1_data48 = 0; + fapi2::buffer l_local = 0; FAPI_INF("Entering ..."); + FAPI_DBG("determine if security is enabled"); + fapi2::buffer l_data64; + FAPI_TRY(fapi2::getScom(i_target_chip, PERV_CBS_CS_SCOM, l_data64)); + secure_mode = l_data64.getBit<4>(); + + FAPI_DBG("clear ECC enable before reading ECID data (read-modify-write OTPROM Mode register), insecure mode only"); + + if (!secure_mode) + { + fapi2::buffer l_data64; + FAPI_TRY(fapi2::getScom(i_target_chip, PU_MODE_REGISTER, l_data64)); + l_data64.clearBit(); + FAPI_TRY(fapi2::putScom(i_target_chip, PU_MODE_REGISTER, l_data64)); + } + + FAPI_DBG("extract and manipulate ECID data"); + FAPI_TRY(fapi2::getScom(i_target_chip, PU_OTPROM0_ECID_PART0_REGISTER, l_ecid_part0_data64)); + FAPI_TRY(fapi2::getScom(i_target_chip, PU_OTPROM0_ECID_PART1_REGISTER, l_ecid_part1_data64)); + l_ecid_part0_data64.reverse(); + l_ecid_part1_data64.reverse(); + + l_local.insertFromRight<0, 64>(l_ecid_part0_data64); + attr_data[0] = l_local; + l_local.insertFromRight<0, 64>(l_ecid_part1_data64); + attr_data[1] = l_local; + o_fuseString.insert(l_ecid_part0_data64, 0, 64, 0); + l_ecid_part1_data64.extractToRight<0, 48>(l_ecid_part1_data48); + o_fuseString.insert(l_ecid_part1_data48, 64, 48, 0); + + FAPI_DBG("push fuse string into attribute"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_ECID, i_target_chip, attr_data)); + + FAPI_DBG("restore ECC enable setting (insecure mode only)"); + + if (!secure_mode) + { + fapi2::buffer l_data64; + FAPI_TRY(fapi2::getScom(i_target_chip, PU_MODE_REGISTER, l_data64)); + l_data64.setBit(); + FAPI_TRY(fapi2::putScom(i_target_chip, PU_MODE_REGISTER, l_data64)); + } + FAPI_INF("Exiting ..."); - return fapi2::FAPI2_RC_SUCCESS; +// return fapi2::FAPI2_RC_SUCCESS; +fapi_try_exit: + return fapi2::current_err; } diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_getecid.H b/src/import/chips/p9/procedures/hwp/perv/p9_getecid.H index 4a6e06387..2ea1779c3 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_getecid.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_getecid.H @@ -25,7 +25,7 @@ // *HWP HW Backup Owner : Srinivas V Naga // *HWP FW Owner : sunil kumar // *HWP Team : Perv -// *HWP Level : 1 +// *HWP Level : 2 // *HWP Consumed by : SBE //------------------------------------------------------------------------------ @@ -38,7 +38,7 @@ typedef fapi2::ReturnCode (*p9_getecid_FP_t)(const fapi2::Target&, - const fapi2::variable_buffer& fuseString); + fapi2::variable_buffer& fuseString); /// @brief Get ECID string from target using SCOM /// @@ -47,7 +47,7 @@ typedef fapi2::ReturnCode (*p9_getecid_FP_t)(const fapi2::Target& i_target_chip, - const fapi2::variable_buffer& o_fuseString); + fapi2::variable_buffer& o_fuseString); } #endif diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml index 5c91f196a..76091a0f9 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml @@ -348,8 +348,14 @@ ATTR_ECID TARGET_TYPE_PROC_CHIP - + Bits 0 to 63 of the ECID in array entry 0 and bits 64 to 127 in ECID array entry 1 +Created from running the mss_get_cen_ecid.C +Firmware shares some code with the processor, so the attribute is named so they can point at a target and have common function. uint64 + + + + 2 diff --git a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml index b9040067e..af1757299 100644 --- a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml +++ b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml @@ -211,6 +211,9 @@ ATTR_FSI_GP_SHADOWS_OVERWRITE + + ATTR_ECID + -- cgit v1.2.1