From 7d14631253d5cd41782bc7b58751480b07b8d684 Mon Sep 17 00:00:00 2001 From: Thi Tran Date: Thu, 12 Sep 2013 10:41:02 -0500 Subject: Hostboot - Updated HWPs from defect SW222043 (Power Management Significant) Change-Id: I2054d8de283fa65fa4aa79b5dce344a726067408 CQ: SW218817 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6129 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III --- src/build/tools/listdeps.pl | 2 + src/include/usr/isteps/istep15list.H | 1 + src/usr/hwpf/hwp/build_winkle_images/makefile | 1 + .../p8_set_pore_bar/p8_poreslw_init.C | 777 ++++++------ .../p8_set_pore_bar/p8_set_pore_bar.C | 75 +- src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.C | 833 +++++++------ src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.H | 13 +- src/usr/hwpf/hwp/occ/occ_procedures/p8_pba_init.C | 735 +++++------ .../hwpf/hwp/occ/occ_procedures/p8_pm_firinit.C | 254 ++-- .../hwpf/hwp/occ/occ_procedures/p8_pm_firinit.H | 20 +- src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_init.C | 958 ++++++++------- .../hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C | 44 +- .../hwp/occ/occ_procedures/p8_pm_pmc_firinit.C | 36 +- .../hwp/occ/occ_procedures/p8_pm_prep_for_reset.C | 507 ++------ .../hwp/occ/occ_procedures/p8_pm_prep_for_reset.H | 84 +- .../hwpf/hwp/occ/occ_procedures/p8_poregpe_init.C | 107 +- src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.C | 1287 +++++++++----------- src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.H | 17 +- src/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.C | 516 ++++---- .../hwp/runtime_errors/p8_force_vsafe_errors.xml | 29 +- .../hwpf/hwp/runtime_errors/p8_pba_init_errors.xml | 24 +- .../runtime_errors/p8_pm_prep_for_reset_errors.xml | 9 +- src/usr/runtime/common/hsvc_exdata.C | 2 + src/usr/runtime/populate_attributes.C | 2 +- src/usr/targeting/common/xmltohb/target_types.xml | 2 + 25 files changed, 3007 insertions(+), 3328 deletions(-) (limited to 'src') diff --git a/src/build/tools/listdeps.pl b/src/build/tools/listdeps.pl index b0c5dd180..5d9bc68ee 100755 --- a/src/build/tools/listdeps.pl +++ b/src/build/tools/listdeps.pl @@ -170,6 +170,7 @@ else "libcore_activate.so" , "libestablish_system_smp.so" , "libstart_payload.so" , + "libocc.so" , ); } @@ -210,6 +211,7 @@ my %istepFiles = ( "libmc_config.so" => "istep12list.H" , "libdram_training.so" => "istep13list.H" , "libdram_initialization.so" => "istep14list.H" , + "libocc.so" => "istep15list.H" , "libbuild_winkle_images.so" => "istep15list.H" , "libcore_activate.so" => "istep16list.H" , "libestablish_system_smp.so" => "istep18list.H" , diff --git a/src/include/usr/isteps/istep15list.H b/src/include/usr/isteps/istep15list.H index e79fb360b..e463d3ce5 100644 --- a/src/include/usr/isteps/istep15list.H +++ b/src/include/usr/isteps/istep15list.H @@ -101,6 +101,7 @@ namespace INITSERVICE const DepModInfo g_istep15Dependancies = { { + DEP_LIB(libocc.so), DEP_LIB(libbuild_winkle_images.so), { 0 }, } diff --git a/src/usr/hwpf/hwp/build_winkle_images/makefile b/src/usr/hwpf/hwp/build_winkle_images/makefile index 8c5be9a53..3e79e2c22 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/makefile +++ b/src/usr/hwpf/hwp/build_winkle_images/makefile @@ -43,6 +43,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/mvpd_accessors ## EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar +EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/occ/occ_procedures CFLAGS += -D __FAPI diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C index 7f0cb94e6..72dd48dab 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_poreslw_init.C,v 1.11 2013/02/19 15:37:34 stillgs Exp $ +// $Id: p8_poreslw_init.C,v 1.15 2013/08/02 19:09:56 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_poreslw_init.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -65,6 +65,7 @@ #include "p8_poreslw_init.H" #include "p8_pfet_init.H" #include "p8_pmc_deconfig_setup.H" +#include "p8_cpu_special_wakeup.H" #include "p8_pcb_scom_errors.H" @@ -92,18 +93,21 @@ fapi::ReturnCode poreslw_ex_setup(const Target& i_target); // Function definitions // ---------------------------------------------------------------------- - -/// \param[in] i_target Chip target -/// \param[in] mode Control mode for the procedure -/// (PM_CONFIG, PM_INIT, PM_RESET) - -/// \retval FAPI_RC_SUCCESS -/// \retval ERROR defined in xml - +// ---------------------------------------------------------------------- +/** + * p8_pcbs_init calls the underlying routine based on mode parameter + * + * @param[in] i_target Chip target + * @param[in] mode Control mode for the procedure + * PM_INIT, PM_CONFIG, PM_RESET + * + * @retval FAPI_RC_SUCCESS + * @retval ERROR defined in xml + */ fapi::ReturnCode p8_poreslw_init(const Target& i_target, uint32_t mode) { - fapi::ReturnCode l_rc; + fapi::ReturnCode rc; FAPI_INF("Executing p8_poreslw_init in mode %x ....", mode); @@ -113,7 +117,7 @@ p8_poreslw_init(const Target& i_target, uint32_t mode) if (mode == PM_CONFIG) { FAPI_INF("PORE-SLW configuration..."); - FAPI_INF("---> None is defined..."); + // None is defined } /// ------------------------------- @@ -121,7 +125,7 @@ p8_poreslw_init(const Target& i_target, uint32_t mode) /// the SLW using necessary Platform or Feature attributes. else if (mode == PM_INIT) { - l_rc = poreslw_init(i_target); + rc = poreslw_init(i_target); } /// ------------------------------- @@ -129,7 +133,7 @@ p8_poreslw_init(const Target& i_target, uint32_t mode) /// reinitialized else if (mode == PM_RESET) { - l_rc = poreslw_reset(i_target); + rc = poreslw_reset(i_target); } /// ------------------------------- @@ -137,20 +141,28 @@ p8_poreslw_init(const Target& i_target, uint32_t mode) else { FAPI_ERR("Unknown mode passed to p8_poreslw_init. Mode %x ....", mode); - FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PORESLW_CODE_BAD_MODE); + FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PORESLW_CODE_BAD_MODE); } - return l_rc; + return rc; } //------------------------------------------------------------------------------ // PORE SLW Initialization Function //------------------------------------------------------------------------------ +/** + * poreslw_init Initializes the slw function on a chip + * + * @param[in] i_target Chip target + * + * @retval FAPI_RC_SUCCESS + * @retval ERROR defined in xml + */ fapi::ReturnCode poreslw_init(const Target& i_target) { - fapi::ReturnCode l_rc; + fapi::ReturnCode rc; uint32_t e_rc = 0; ecmdDataBufferBase data(64); @@ -158,10 +170,11 @@ poreslw_init(const Target& i_target) do { + // Synchronize the PMC Deconfiguration Register with the currently // enabled EX chiplets. - FAPI_EXEC_HWP(l_rc, p8_pmc_deconfig_setup, i_target); - if(l_rc) + FAPI_EXEC_HWP(rc, p8_pmc_deconfig_setup, i_target); + if(rc) { FAPI_ERR("PMC Deconfig Setup error"); break; @@ -169,8 +182,8 @@ poreslw_init(const Target& i_target) FAPI_DBG("Activate the PMC Idle seequencer by making sure the Halt bit is clear"); const uint32_t HALT_IDLE_STATE_MASTER_FSM = 14; - l_rc = fapiGetScom(i_target, PMC_MODE_REG_0x00062000, data); - if(!l_rc.ok()) + rc = fapiGetScom(i_target, PMC_MODE_REG_0x00062000, data); + if(!rc.ok()) { FAPI_ERR("Scom error reading PMC_MODE"); break; @@ -180,12 +193,12 @@ poreslw_init(const Target& i_target) if (e_rc) { FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); - l_rc.setEcmdError(e_rc); + rc.setEcmdError(e_rc); break; } - l_rc = fapiPutScom(i_target, PMC_MODE_REG_0x00062000, data); - if(!l_rc.ok()) + rc = fapiPutScom(i_target, PMC_MODE_REG_0x00062000, data); + if(!rc.ok()) { FAPI_ERR("Scom error writing PMC_MODE"); break; @@ -194,8 +207,8 @@ poreslw_init(const Target& i_target) FAPI_DBG("Activate the PMC Idle seequencer by making sure the Halt bit is clear"); // Setup up each of the EX chiplets - l_rc = poreslw_ex_setup(i_target); - if(!l_rc.ok()) + rc = poreslw_ex_setup(i_target); + if(!rc.ok()) { FAPI_ERR("Error from poreslw_ex_setup n"); break; @@ -203,16 +216,24 @@ poreslw_init(const Target& i_target) } while(0); - return l_rc; + return rc; } //------------------------------------------------------------------------------ // PORE SLW Reset Function //------------------------------------------------------------------------------ +/** + * poreslw_reset Resets the slw function on a chip + * + * @param[in] i_target Chip target + * + * @retval FAPI_RC_SUCCESS + * @retval ERROR defined in xml + */ fapi::ReturnCode poreslw_reset(const Target& i_target) { - fapi::ReturnCode l_rc; + fapi::ReturnCode rc; uint32_t e_rc = 0; ecmdDataBufferBase data(64); ecmdDataBufferBase polldata(64); @@ -230,8 +251,8 @@ poreslw_reset(const Target& i_target) // exception of Error Maskbuild_node_slw // set PORE run bit to stop - l_rc = fapiGetScom(i_target, PORE_SLW_CONTROL_0x00068001, data); - if(!l_rc.ok()) + rc = fapiGetScom(i_target, PORE_SLW_CONTROL_0x00068001, data); + if(!rc.ok()) { FAPI_ERR("Scom error reading PORE_SLW_CONTROL"); break; @@ -241,12 +262,12 @@ poreslw_reset(const Target& i_target) if (e_rc) { FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); - l_rc.setEcmdError(e_rc); + rc.setEcmdError(e_rc); break; } - l_rc = fapiPutScom(i_target, PORE_SLW_CONTROL_0x00068001, data); - if(!l_rc.ok()) + rc = fapiPutScom(i_target, PORE_SLW_CONTROL_0x00068001, data); + if(!rc.ok()) { FAPI_ERR("Scom error writing PORE_SLW_CONTROL"); break; @@ -259,14 +280,14 @@ poreslw_reset(const Target& i_target) if (e_rc) { FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); - l_rc.setEcmdError(e_rc); + rc.setEcmdError(e_rc); break; } FAPI_DBG("PORE-SLW Reset value: 0x%16llX", data.getDoubleWord(0)); - l_rc = fapiPutScom(i_target, PORE_SLW_RESET_0x00068002, data); - if(!l_rc.ok()) + rc = fapiPutScom(i_target, PORE_SLW_RESET_0x00068002, data); + if(!rc.ok()) { FAPI_ERR("Scom error writing PORE_SLW_RESET"); break; @@ -276,8 +297,8 @@ poreslw_reset(const Target& i_target) wait_state_detected = false; for (poll_count=0; poll_count l_exChiplets; - uint8_t l_functional = 0; uint8_t l_ex_number = 0; uint64_t address; - bool __attribute__((unused)) core_flag = false; // HACK - bool __attribute__((unused)) error_flag = false; // HACK - //@thi - fixed compiler error - Greg will fix this in next version - //uint32_t fsierror = 0; uint8_t pm_sleep_type; uint8_t pm_sleep_entry ; @@ -342,6 +366,20 @@ poreslw_ex_setup(const Target& i_target) uint8_t pm_winkle_entry ; uint8_t pm_winkle_exit ; + + // These enums must match the enum values in pm_hwp_attributes.xml + enum IDLE_TYPE + { + FAST = 0, + DEEP = 1 + }; + + enum IDLE_TRANSITION_MODE + { + HARDWARE = 0, + ASSISTED = 1 + }; + // Give relevant bits a name // PMGP1 bits const uint32_t PM_SLEEP_POWER_DOWN_EN_BIT = 0; @@ -351,8 +389,6 @@ poreslw_ex_setup(const Target& i_target) const uint32_t PM_WINKLE_POWER_UP_EN_BIT = 4; const uint32_t PM_WINKLE_POWER_OFF_SEL_BIT = 5; - //@thi - fixed compiler error - Greg will fix this in next version - //const uint32_t IDLE_STATE_OVERRIDE_EN = 6; const uint32_t PM_DISABLE = 0; do @@ -366,413 +402,370 @@ poreslw_ex_setup(const Target& i_target) // it is invoked prior to the chiplet loop below. FAPI_INF("\tInitialize the PFET controllers"); - FAPI_EXEC_HWP(l_rc, p8_pfet_init, i_target, PM_INIT); - if(l_rc) + FAPI_EXEC_HWP(rc, p8_pfet_init, i_target, PM_INIT); + if(rc) { FAPI_ERR("PFET Controller Setup error"); break; } + // Read the attributes + + // \todo Hardcoded values until platform control of attributes is in place. + FAPI_INF("\tWARNING: !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!"); + FAPI_INF("\tWARNING: Hardcoded idle config values set until platform support of attributes available"); + FAPI_INF("\tWARNING: !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!"); + + pm_sleep_entry = 0; // 0=assisted, 1=HW + pm_sleep_exit = 0; // 0=assisted, 1=HW + pm_sleep_type = 1; // 0=fast, 1=deep + + // Due to L3 High Availability Write Pointers that must be + // saved upon a Deep Winkle Entry, this transition must be + // assisted. + pm_winkle_entry = 0; // 0=assisted, 1=HW + pm_winkle_exit = 0; // 0=assisted, 1=HW + pm_winkle_type = 1; // 0=fast, 1=deep + + // Sleep + /* + GETATTR(ATTR_PM_SLEEP_TYPE, + "ATTR_PM_SLEEP_TYPE", + &i_target, + pm_sleep_type); + + GETATTR(ATTR_PM_SLEEP_ENTRY, + "ATTR_PM_SLEEP_ENTRY", + &i_target, + pm_sleep_entry); + + GETATTR(ATTR_PM_SLEEP_EXIT, + "ATTR_PM_SLEEP_EXIT", + &i_target, + pm_sleep_exit); + + // Winkle + GETATTR(ATTR_PM_WINKLE_TYPE, + "ATTR_PM_WINKLE_TYPE", + &i_target, + pm_winkle_type); + + GETATTR(ATTR_PM_WINKLE_ENTRY, + "ATTR_PM_WINKLE_ENTRY", + &i_target, + pm_winkle_entry); + + GETATTR(ATTR_PM_WINKLE_EXIT, + "ATTR_PM_WINKLE_EXIT", + &i_target, + pm_winkle_exit); + + */ + // Due to L3 High Availability Write Pointers that must be + // saved upon a Deep Winkle Entry, this transition must be + // assisted. + // \todo need Attribute for L3 HA enabled. GA1 = NO + if (pm_winkle_entry != ASSISTED) + { + FAPI_INF("Winkle Entry is not configured in ASSISTED mode. L3 High Availability functions" + " are not supported"); + FAPI_INF("Continuing anyway...."); + } + // -------------------------------------- // Walk the configured chiplets - l_rc = fapiGetChildChiplets ( i_target, + rc = fapiGetChildChiplets ( i_target, TARGET_TYPE_EX_CHIPLET, l_exChiplets, - TARGET_STATE_PRESENT); - if (l_rc) - { - FAPI_ERR("Error from fapiGetChildChiplets!"); - error_flag = true; - break; - } + TARGET_STATE_FUNCTIONAL); + if (rc) + { + FAPI_ERR("Error from fapiGetChildChiplets!"); + break; + } - FAPI_DBG("\tChiplet vector size => %u ", l_exChiplets.size()); + FAPI_DBG("\tChiplet vector size => %u ", l_exChiplets.size()); // Iterate through the returned chiplets - for (uint8_t j=0; j < l_exChiplets.size(); j++) - { - - // Determine if it's functional - l_rc = FAPI_ATTR_GET( ATTR_FUNCTIONAL, - &l_exChiplets[j], - l_functional); - if (l_rc) + for (uint8_t j=0; j < l_exChiplets.size(); j++) + { + + // Get the core number + rc = FAPI_ATTR_GET( ATTR_CHIP_UNIT_POS, + &l_exChiplets[j], + l_ex_number); + if(!rc.ok()) { - FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error"); + FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error"); break; } - else if ( l_functional ) + + address = EX_GP3_0x100F0012 + (l_ex_number * 0x01000000); + rc=fapiGetScom(i_target, address, data); + if(rc) { + FAPI_ERR("GetScom error"); + break; + } - // Get the core number - l_rc = FAPI_ATTR_GET( ATTR_CHIP_UNIT_POS, - &l_exChiplets[j], - l_ex_number); - if(!l_rc.ok()) + // Check if chiplet enable bit is set (configured). If so, process + if ( data.isBitSet(0) ) + { + FAPI_INF("\tSetting up Core %X ", l_ex_number); + + // ****************************************************************** + // Set PMGP1_REG + // ****************************************************************** + + FAPI_DBG("\t-----------------------------------------------------"); + FAPI_DBG("\tPMGP1_REG Configuration "); + FAPI_DBG("\t-----------------------------------------------------"); + FAPI_DBG("\t pm_sleep_entry => %d ", pm_sleep_entry ); + FAPI_DBG("\t pm_sleep_exit => %d ", pm_sleep_exit ); + FAPI_DBG("\t pm_sleep_type => %d ", pm_sleep_type ); + FAPI_DBG("\t pm_winkle_entry => %d ", pm_winkle_entry ); + FAPI_DBG("\t pm_winkle_exit => %d ", pm_winkle_exit ); + FAPI_DBG("\t pm_winkle_type => %d ", pm_winkle_type ); + FAPI_DBG("\t-----------------------------------------------------"); + + + FAPI_DBG("\t*************************************"); + FAPI_INF("\tSetup PMGP1_REG for EX %x", l_ex_number); + FAPI_DBG("\t*************************************"); + + // Initialize the set and clear vectors + e_rc |= clear_data.flushTo1(); // Set to 1s to be used for WAND + e_rc |= set_data.flushTo0(); // Set to 0s to be used for WOR + + // If sleep entry = 1 (hardware), sleep power down enable = 1 + // else sleep entry = 0 (assisted), sleep power down enable = 0 + if (pm_sleep_entry) { - FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error"); - break; + e_rc |= set_data.setBit(PM_SLEEP_POWER_DOWN_EN_BIT); + } + else + { + e_rc |= clear_data.clearBit(PM_SLEEP_POWER_DOWN_EN_BIT); } - address = EX_GP3_0x100F0012 + (l_ex_number * 0x01000000); - l_rc=fapiGetScom(i_target, address, data); - if(l_rc) + // If sleep exit = 1 (hardware), sleep power up enable = 1 + // else sleep exit = 0 (assisted), sleep power up enable = 0 + if (pm_sleep_exit) { - FAPI_ERR("GetScom error"); - break; + e_rc |= set_data.setBit(PM_SLEEP_POWER_UP_EN_BIT); + } + else + { + e_rc |= clear_data.clearBit(PM_SLEEP_POWER_UP_EN_BIT); } - // Check if chiplet enable bit is set (configured). If so, process - if ( data.isBitSet(0) ) + // If sleep type = 1 (deep), sleep power up sel = 1 + // else sleep type = 0 (fast), sleep power up sel = 0 + if (pm_sleep_type) { - FAPI_INF("\tSetting up Core %X ", l_ex_number); - - // -------------------------------------- - // Based on Attributes, set the idle handling controls - - // e_rc = FAPI_ATTR_GET(ATTR_PM_SLEEP_TYPE, &i_target, pm_sleep_type); - // if (e_rc) - // { - // FAPI_ERR("fapiGetAttribute of ATTR_PM_SLEEP_TYPE with e_rc = 0x%x", (uint32_t)e_rc); - // break; - // } - // - // e_rc = FAPI_ATTR_GET(ATTR_PM_SLEEP_ENTRY, &i_target, pm_sleep_entry); - // if (e_rc) - // FAPI_ERR("fapiGetAttribute of ATTR_PM_SLEEP_ENTRY with e_rc = 0x%x", (uint32_t)e_rc); - // break; - // } - // - // e_rc = FAPI_ATTR_GET(ATTR_PM_SLEEP_EXIT, &i_target, pm_sleep_exit); - // if (e_rc) - // { - // FAPI_ERR("fapiGetAttribute of ATTR_PM_SLEEP_EXIT with e_rc = 0x%x", (uint32_t)e_rc); - // break; - // } - // - // e_rc = FAPI_ATTR_GET(ATTR_PM_WINKLE_TYPE, &i_target, pm_winkle_type); - // if (e_rc) - // { - // FAPI_ERR("fapiGetAttribute of ATTR_PM_WINKLE_TYPE with e_rc = 0x%x", (uint32_t)e_rc); - // break; - // } - // \todo missing attributes - // e_rc = FAPI_ATTR_GET("ATTR_PM_WINKLE_ENTRY", &i_target,(unit8_t) pm_winkle_entry); - // if (e_rc) - // { - // FAPI_ERR("fapiGetAttribute of ATTR_PM_WINKLE_ENTRY with e_rc = 0x%x", (uint32_t)e_rc); - // break; - // } - // - // e_rc = FAPI_ATTR_GET("ATTR_PM_WINKLE_EXIT", &i_target,(unit8_t) pm_winkle_exit); - // if (e_rc) - // { - // FAPI_ERR("fapiGetAttribute of ATTR_PM_WINKLE_EXIT with e_rc = 0x%x", (uint32_t)e_rc); - // break; - // } - - // \todo Hardcoded values until platform control of attributes is in place. - FAPI_INF("\tWARNING: !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!"); - FAPI_INF("\tWARNING: Hardcoded idle config values set until platform support of attributes available"); - FAPI_INF("\tWARNING: !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!"); - - - pm_sleep_entry = 0; // 0=assisted, 1=HW - pm_sleep_exit = 0; // 0=assisted, 1=HW - pm_sleep_type = 1; // 0=fast, 1=deep - - // Due to L3 Hight Availability Write Pointers that must be - // saved upon a Deep Winkle Entry, this transition must be - // assisted. - pm_winkle_entry = 0; // 0=assisted, 1=HW - pm_winkle_exit = 0; // 0=assisted, 1=HW - pm_winkle_type = 1; // 0=fast, 1=deep - - - // ****************************************************************** - // Set PMGP1_REG - // ****************************************************************** - - FAPI_DBG("\t-----------------------------------------------------"); - FAPI_DBG("\tPMGP1_REG Configuration "); - FAPI_DBG("\t-----------------------------------------------------"); - FAPI_DBG("\t pm_sleep_entry => %d ", pm_sleep_entry ); - FAPI_DBG("\t pm_sleep_exit => %d ", pm_sleep_exit ); - FAPI_DBG("\t pm_sleep_type => %d ", pm_sleep_type ); - FAPI_DBG("\t pm_winkle_entry => %d ", pm_winkle_entry ); - FAPI_DBG("\t pm_winkle_exit => %d ", pm_winkle_exit ); - FAPI_DBG("\t pm_winkle_type => %d ", pm_winkle_type ); - FAPI_DBG("\t-----------------------------------------------------"); - - - FAPI_DBG("\t*************************************"); - FAPI_INF("\tSetup PMGP1_REG for EX %x", l_ex_number); - FAPI_DBG("\t*************************************"); - - // Initialize the set and clear vectors - e_rc |= clear_data.flushTo1(); // Set to 1s to be used for WAND - e_rc |= set_data.flushTo0(); // Set to 0s to be used for WOR - - // If sleep entry = 1 (hardware), sleep power down enable = 1 - // else sleep entry = 0 (assisted), sleep power down enable = 0 - if (pm_sleep_entry) - { - e_rc |= set_data.setBit(PM_SLEEP_POWER_DOWN_EN_BIT); - } - else - { - e_rc |= clear_data.clearBit(PM_SLEEP_POWER_DOWN_EN_BIT); - } + e_rc |= set_data.setBit(PM_SLEEP_POWER_OFF_SEL_BIT); - // If sleep exit = 1 (hardware), sleep power up enable = 1 - // else sleep exit = 0 (assisted), sleep power up enable = 0 - if (pm_sleep_exit) - { - e_rc |= set_data.setBit(PM_SLEEP_POWER_UP_EN_BIT); - } - else - { - e_rc |= clear_data.clearBit(PM_SLEEP_POWER_UP_EN_BIT); - } + } + else + { + e_rc |= clear_data.clearBit(PM_SLEEP_POWER_OFF_SEL_BIT); + } - // If sleep type = 1 (deep), sleep power up sel = 1 - // else sleep type = 0 (fast), sleep power up sel = 0 - if (pm_sleep_type) - { - e_rc |= set_data.setBit(PM_SLEEP_POWER_OFF_SEL_BIT); + // If winkle entry = 1 (hardware), winkle power down enable = 1 + // else winkle entry = 0 (assisted), winkle power down enable = 0 + if (pm_winkle_entry) + { + e_rc |= set_data.setBit(PM_WINKLE_POWER_DOWN_EN_BIT); + } + else + { + e_rc |= clear_data.clearBit(PM_WINKLE_POWER_DOWN_EN_BIT); + } - } - else - { - e_rc |= clear_data.clearBit(PM_SLEEP_POWER_OFF_SEL_BIT); - } + // If winkle exit = 1 (hardware), winkle power up enable = 1 + // else winkle exit = 0 (assisted), winkle power up enable = 0 + if (pm_winkle_exit) + { + e_rc |= set_data.setBit(PM_WINKLE_POWER_UP_EN_BIT); + } + else + { + e_rc |= clear_data.clearBit(PM_WINKLE_POWER_UP_EN_BIT); + } - // If winkle entry = 1 (hardware), winkle power down enable = 1 - // else winkle entry = 0 (assisted), winkle power down enable = 0 - if (pm_winkle_entry) - { - e_rc |= set_data.setBit(PM_WINKLE_POWER_DOWN_EN_BIT); - } - else - { - e_rc |= clear_data.clearBit(PM_WINKLE_POWER_DOWN_EN_BIT); - } + // If winkle type = 1 (deep), winkle power up sel = 1 + // else winkle type = 0 (fast), winkle power up sel = 0 + if (pm_winkle_type) + { + e_rc |= set_data.setBit(PM_WINKLE_POWER_OFF_SEL_BIT); - // If winkle exit = 1 (hardware), winkle power up enable = 1 - // else winkle exit = 0 (assisted), winkle power up enable = 0 - if (pm_winkle_exit) - { - e_rc |= set_data.setBit(PM_WINKLE_POWER_UP_EN_BIT); - } - else - { - e_rc |= clear_data.clearBit(PM_WINKLE_POWER_UP_EN_BIT); - } + } + else + { + e_rc |= clear_data.clearBit(PM_WINKLE_POWER_OFF_SEL_BIT); + } - // If winkle type = 1 (deep), winkle power up sel = 1 - // else winkle type = 0 (fast), winkle power up sel = 0 - if (pm_winkle_type) - { - e_rc |= set_data.setBit(PM_WINKLE_POWER_OFF_SEL_BIT); + // Check for any errors from set/clear ops into the buffers + if (e_rc) + { + FAPI_ERR("eCmdDataBuffer operation failed. rc = 0x%x", (uint32_t)e_rc); + rc.setEcmdError(e_rc); + break; + } - } - else - { - e_rc |= clear_data.clearBit(PM_WINKLE_POWER_OFF_SEL_BIT); - } + // The set and clear vectors are built. Write them to + // the respective addresses. + FAPI_DBG("\tEX_PMGP1_WOR 0x%16llx" , set_data.getDoubleWord(0)); + address = EX_PMGP1_REG_0_WORx100F0105 + (l_ex_number * 0x01000000); + rc=fapiPutScom(i_target, address, set_data); + if (rc) + { + FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. rc = 0x%x", (uint32_t)rc); + break; + } - // Check for any errors from set/clear ops into the buffers - if (e_rc) - { - FAPI_ERR("eCmdDataBuffer operation failed. rc = 0x%x", (uint32_t)e_rc); - l_rc.setEcmdError(e_rc); - break; - } + FAPI_DBG("\tEX_PMGP1_WAND 0x%16llx" , clear_data.getDoubleWord(0)); + address = EX_PMGP1_REG_0_WANDx100F0104 + (l_ex_number * 0x01000000); + rc=fapiPutScom(i_target, address, clear_data); + if (rc) + { + FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. rc = 0x%x", (uint32_t)rc); + break; + } - // The set and clear vectors are built. Write them to - // the respective addresses. - FAPI_DBG("\tEX_PMGP1_WOR 0x%16llx" , set_data.getDoubleWord(0)); - address = EX_PMGP1_REG_0_WORx100F0105 + (l_ex_number * 0x01000000); - l_rc=fapiPutScom(i_target, address, set_data); - if (l_rc) - { - FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. l_rc = 0x%x", (uint32_t)l_rc); - break; - } + FAPI_INF("\tDisable the PCBS Heartbeat EX %x", l_ex_number); + address = EX_SLAVE_CONFIG_0x100F001E + (l_ex_number * 0x01000000); + rc = fapiGetScom(i_target, address, data); + if(!rc.ok()) + { + FAPI_ERR("Scom error reading PCBS Slave Config"); + break; + } - FAPI_DBG("\tEX_PMGP1_WAND 0x%16llx" , clear_data.getDoubleWord(0)); - address = EX_PMGP1_REG_0_WANDx100F0104 + (l_ex_number * 0x01000000); - l_rc=fapiPutScom(i_target, address, clear_data); - if (l_rc) - { - FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. l_rc = 0x%x", (uint32_t)l_rc); - break; - } + e_rc |= data.setBit(4); + if (e_rc) + { + FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); + rc.setEcmdError(e_rc); + break; + } - FAPI_INF("\tDisable the PCBS Heartbeat EX %x", l_ex_number); - address = EX_SLAVE_CONFIG_0x100F001E + (l_ex_number * 0x01000000); - l_rc = fapiGetScom(i_target, address, data); - if(!l_rc.ok()) - { - FAPI_ERR("Scom error reading PCBS Slave Config"); - break; - } + rc=fapiPutScom(i_target, address, data); + if(!rc.ok()) + { + FAPI_ERR("Scom error writing PCBS Slave Config"); + break; + } + + // -------------------------------------- + FAPI_INF("\tSet PMGP0(46) to deal with HW259509 - winkle Pstate stepping hang"); + // This is a spare bit in Murano and Venice DD1s but + // is necessary to set in Murano and Venice DD2 to deal + // the hang condition that is fixed. As bit 46 is spare + // in the previous levels, setting it on all levels is not + // harmful. + address = EX_PMGP0_OR_0x100F0102 + (l_ex_number * 0x01000000); + e_rc |= data.flushTo0(); + e_rc |= data.setBit(46); + if (e_rc) + { + FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); + rc.setEcmdError(e_rc); + break; + } - e_rc |= data.setBit(4); + rc=fapiPutScom(i_target, address, data); + if(!rc.ok()) + { + FAPI_ERR("Scom error setting PMGP0"); + break; + } + + // -------------------------------------- + // Check that PM function is enabled (eg not disabled). + // If not, remove the disable + + address = EX_PMGP0_0x100F0100 + (l_ex_number * 0x01000000); + rc=fapiGetScom(i_target, address, data); + if(!rc.ok()) + { + FAPI_ERR("Scom error reading PMGP0"); + break; + } + + if (data.isBitSet(PM_DISABLE)) + { + + // Activate the PCBS-PM macro by clearing the PM_DISABLE bit + FAPI_INF("\tActivate the PCBS-PM for EX %x", l_ex_number); + + e_rc |= data.flushTo1(); + e_rc |= data.clearBit(PM_DISABLE); if (e_rc) { FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); - l_rc.setEcmdError(e_rc); + rc.setEcmdError(e_rc); break; } - l_rc=fapiPutScom(i_target, address, data); - if(!l_rc.ok()) + address = EX_PMGP0_AND_0x100F0101 + (l_ex_number * 0x01000000); + rc=fapiPutScom(i_target, address, data); + if(!rc.ok()) { - FAPI_ERR("Scom error writing PCBS Slave Config"); + FAPI_ERR("Scom error writing EX_PMGP0_OR"); break; } + } - // -------------------------------------- - // Check if SBE code has already cleared the OHA override. - // As chiplets may be enabled but offline (eg in Winkle) - // treat SCOM errors as off-line (eg skip it). If online - // and set, clear the override. - - /* GSS: removed as Cronus always puts a message out of (PCB_OFFLINE) - even though this code is meant to handle it. As this messge - can cause confusion in the lab, the check is being removed. - bool oha_accessible = true; - l_rc = fapiGetScom(l_exChiplets[j], EX_OHA_MODE_REG_RWx1002000D, data); - if(!l_rc.ok()) - { - l_rc = fapiGetCfamRegister( i_target, CFAM_FSI_STATUS_0x00001007, data ); - if(!l_rc.ok()) - { - FAPI_ERR("Error reading CFAM FSI Status Register"); - break; - } - FAPI_INF( "CFAM_FSI_STATUS_0x00001007: 0x%X", data.getWord(0)); - e_rc |= data.extractToRight( &fsierror, 17, 3 ); - if ( e_rc ) - { - l_rc.setEcmdError(e_rc); - break; - } - if (fsierror == PIB_OFFLINE_ERROR) - { - FAPI_INF( "Chiplet offline error detected. Skipping OHA Override clearing"); - oha_accessible = false; - } - else - { - FAPI_ERR("Scom reading OHA_MODE"); - break; - } - } - // Process if OHA accessible. - if (oha_accessible) - { - if (data.isBitSet(IDLE_STATE_OVERRIDE_EN)) - { - - FAPI_INF("\tClear the OHA Idle State Override for EX %x", l_ex_number); - e_rc |= data.clearBit(IDLE_STATE_OVERRIDE_EN); - if (e_rc) - { - FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); - l_rc.setEcmdError(e_rc); - break; - } - - l_rc = fapiPutScom(l_exChiplets[j], EX_OHA_MODE_REG_RWx1002000D, data); - if(!l_rc.ok()) - { - FAPI_ERR("Scom error writing OHA_MODE"); - break; - } - } - } - End of check removal - */ - - // -------------------------------------- - // Check that PM function is enabled (eg not disabled). - // If not, remove the disable + // -------------------------------------- + // Clear OCC Special Wake-up bit - only 1 bit in the register + address = EX_PMSpcWkupOCC_REG_0x100F010C + (l_ex_number * 0x01000000); + rc=fapiGetScom(i_target, address, data); + if(!rc.ok()) + { + FAPI_ERR("Scom error clearing EX_OCC_SPWKUP"); + break; + } - address = EX_PMGP0_0x100F0100 + (l_ex_number * 0x01000000); - l_rc=fapiGetScom(i_target, address, data); - if(!l_rc.ok()) + if (data.isBitSet(0)) + { + FAPI_INF("\tClear OCC Special Wake-up for EX %x", l_ex_number); + e_rc |= data.flushTo0(); + if (e_rc) { - FAPI_ERR("Scom error reading PMGP0"); + FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); + rc.setEcmdError(e_rc); break; } - if (data.isBitSet(PM_DISABLE)) - { - - // Activate the PCBS-PM macro by clearing the PM_DISABLE bit - FAPI_INF("\tActivate the PCBS-PM for EX %x", l_ex_number); - - e_rc |= data.flushTo1(); - e_rc |= data.clearBit(PM_DISABLE); - if (e_rc) - { - FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); - l_rc.setEcmdError(e_rc); - break; - } - - address = EX_PMGP0_AND_0x100F0101 + (l_ex_number * 0x01000000); - l_rc=fapiPutScom(i_target, address, data); - if(!l_rc.ok()) - { - FAPI_ERR("Scom error writing EX_PMGP0_OR"); - break; - } - } - - // -------------------------------------- - // Clear OCC Special Wake-up bit - only 1 bit in the register - address = EX_PMSpcWkupOCC_REG_0x100F010C + (l_ex_number * 0x01000000); - l_rc=fapiGetScom(i_target, address, data); - if(!l_rc.ok()) + rc=fapiPutScom(i_target, address, data); + if(!rc.ok()) { FAPI_ERR("Scom error clearing EX_OCC_SPWKUP"); break; } + } - if (data.isBitSet(0)) - { - FAPI_INF("\tClear OCC Special Wake-up for EX %x", l_ex_number); - e_rc |= data.flushTo0(); - if (e_rc) - { - FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); - l_rc.setEcmdError(e_rc); - break; - } - - l_rc=fapiPutScom(i_target, address, data); - if(!l_rc.ok()) - { - FAPI_ERR("Scom error clearing EX_OCC_SPWKUP"); - break; - } - } - core_flag = true; - } // Chiplet Enabled - else // Not Functional so skip it + // -------------------------------------- + // Initialize the special wake-up tracking attributes + FAPI_INF("\tInitialize the special wake-up tracking attributes"); + + FAPI_EXEC_HWP(rc, p8_cpu_special_wakeup, + l_exChiplets[j], + SPCWKUP_INIT, + SPW_ALL); + if(rc) { - // Do nothing + FAPI_ERR("Special wake-up initialization error"); + break; } - } - } // chiplet loop + } // Chiplet Enabled + } // chiplet loop } while(0); - return l_rc; + return rc; } } //end extern diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C index 92d41cb7a..e78029c68 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar.C @@ -21,7 +21,7 @@ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_set_pore_bar.C,v 1.4 2012/12/07 20:43:07 stillgs Exp $ +// $Id: p8_set_pore_bar.C,v 1.5 2013/08/02 19:34:02 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_set_pore_bar.C,v $ //------------------------------------------------------------------------------- // *! (C) Copyright International Business Machines Corp. 2011 @@ -38,18 +38,18 @@ /// \verbatim /// /// Address and size of SLW image for the target (chip) is passed based on -/// where the caller has placed the image for this target in the platform -/// memory. +/// where the caller has placed the image for this target in the platform +/// memory. /// /// The Base Address (BAR) and a mask for the region in which the SLW /// image is placed is passed. This is used to establish the PBA BAR and /// mask hardware to set the legal bounds for SLW accesses. /// -/// The BAR defines address bits 14:43 in natural bit alignment (eg no +/// The BAR defines address bits 14:43 in natural bit alignment (eg no /// shifting) /// /// The Size (in MB) of the region where image is located. -/// If not a power of two value, the value will be rounded up to the +/// If not a power of two value, the value will be rounded up to the /// next power of 2 for setting the hardware mask /// /// If 0 is defined and the BAR is also defined as 0, then the BAR @@ -130,9 +130,9 @@ fapi::ReturnCode pba_slave_reset( const fapi::Target& i_target, /// located /// \param[in] i_mem_bar Base address of the region where image is located /// \param[in] i_mem_size Size (in MB) of the region where image is located -/// if not a power of two value, the value will be -/// rounded up to the next power of 2 for setting the -/// hardware mask. The value of 0 is only legal if +/// if not a power of two value, the value will be +/// rounded up to the next power of 2 for setting the +/// hardware mask. The value of 0 is only legal if /// i_mem_bar is also 0; else an error is indicated. /// \param[in] i_mem_type Defines where the SLW image was loaded. See /// p8_set_pore_bar.H enum for valid values. @@ -163,7 +163,7 @@ p8_set_pore_bar( const fapi::Target& i_target, // uint64_t computed_last_image_address; uint64_t slw_branch_table_address; - + pba_slvctln_t ps; // PBA Slave // Hardcoded use of PBA BAR and Slave @@ -180,14 +180,14 @@ p8_set_pore_bar( const fapi::Target& i_target, FAPI_INF("Executing p8_set_pore_bar..."); image_address = (uint64_t) i_image; FAPI_DBG("Passed address 0x%16llX ", image_address); - - // Check if this is a BAR reset case. + + // Check if this is a BAR reset case. if (i_mem_size == 0) { if(i_mem_bar != 0) { - FAPI_ERR("SLW Size is 0 but BAR is non-zero: 0x%16llx", i_mem_bar ); - FAPI_SET_HWP_ERROR(rc, RC_PROCPM_POREBAR_SIZE0_ERROR); + FAPI_ERR("SLW Size is 0 but BAR is non-zero: 0x%16llx", i_mem_bar ); + FAPI_SET_HWP_ERROR(rc, RC_PROCPM_POREBAR_SIZE0_ERROR); break; } else @@ -201,16 +201,16 @@ p8_set_pore_bar( const fapi::Target& i_target, i_mem_bar, i_mem_size, slw_pba_cmd_scope); - + // No rc check is made as we're exiting anyway. - + // Exit the procedure as we don't want to access the image nor // touch the SLW TBA or MRR settings. break; - } + } } - - + + // Get the Table Base Address from the image l_ecmdRc = sbe_xip_get_scalar((void*) i_image, "slw_branch_table", @@ -360,12 +360,12 @@ p8_set_pore_bar( const fapi::Target& i_target, // Check that the bar address passed is 1MB aligned (eg bits 44:63 are zero) // region_masked_address = i_mem_bar & 0x00000000000FFFFF; - if (region_masked_address != 0 ) - { - FAPI_ERR("SLW BAR address is not 1MB aligned: 0x%16llx", i_mem_bar ); - FAPI_SET_HWP_ERROR(rc, RC_PROCPM_POREBAR_PBABAR_ERROR); + if (region_masked_address != 0 ) + { + FAPI_ERR("SLW BAR address is not 1MB aligned: 0x%16llx", i_mem_bar ); + FAPI_SET_HWP_ERROR(rc, RC_PROCPM_POREBAR_PBABAR_ERROR); break; - } + } // The PBA Mask indicates which bits from 23:43 (1MB grandularity) are @@ -459,8 +459,8 @@ p8_set_pore_bar( const fapi::Target& i_target, i_mem_bar, i_mem_size, slw_pba_cmd_scope); - if(rc) - { + if(rc) + { break; } @@ -532,7 +532,7 @@ p8_set_pore_bar( const fapi::Target& i_target, return rc; } -/// Reset a PBA slave with explicit timeout. +/// Reset a PBA slave with explicit timeout. /// /// \param id A PBA slave id in the range 0..3 /// @@ -550,23 +550,23 @@ p8_set_pore_bar( const fapi::Target& i_target, fapi::ReturnCode pba_slave_reset(const fapi::Target& i_target, uint32_t id) { - + uint32_t poll_count = 0; pba_slvrst_t psr; fapi::ReturnCode rc; uint32_t l_ecmdRc = 0; ecmdDataBufferBase data(64); - + // Tell PBA to reset the slave, then poll for completion with timeout. // The PBA is always polled at least twice to guarantee that we always // poll once after a timeout. psr.value = 0; psr.fields.set = PBA_SLVRST_SET(id); - + FAPI_DBG(" PBA_SLVRST%x: 0x%16llx", id, psr.value); - + l_ecmdRc |= data.setDoubleWord(0, psr.value); if(l_ecmdRc) { @@ -574,7 +574,7 @@ pba_slave_reset(const fapi::Target& i_target, uint32_t id) rc.setEcmdError(l_ecmdRc); return rc; } - + rc = fapiPutScom(i_target, PBA_SLVRST_0x00064001, data); if (rc) { @@ -582,7 +582,7 @@ pba_slave_reset(const fapi::Target& i_target, uint32_t id) } else { - do + do { rc = fapiGetScom(i_target, PBA_SLVRST_0x00064001, data); if (rc) @@ -592,21 +592,14 @@ pba_slave_reset(const fapi::Target& i_target, uint32_t id) } psr.value = data.getDoubleWord(0); - if(l_ecmdRc) - { - FAPI_ERR("Error (0x%x) manipulating ecmdDataBufferBase for PBA_SLVRST", l_ecmdRc); - rc.setEcmdError(l_ecmdRc); - break; - } - - if (!(psr.fields.in_prog & PBA_SLVRST_IN_PROG(id))) + if (!(psr.fields.in_prog & PBA_SLVRST_IN_PROG(id))) { break; } poll_count++; - if (poll_count == PBA_SLAVE_RESET_TIMEOUT) + if (poll_count == PBA_SLAVE_RESET_TIMEOUT) { FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PBA_SLVRST_TIMED_OUT); break; diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.C index e187704e7..bca3f4d60 100755 --- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.C +++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_oha_init.C,v 1.9 2013/04/30 18:17:25 mjjones Exp $ +// $Id: p8_oha_init.C,v 1.12 2013/08/02 19:00:04 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_oha_init.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -30,7 +30,7 @@ // *! OWNER NAME: Ralf Maier Email: ralf.maier@de.ibm.com // *! // *! General Description: -// *! +// *! // *! The purpose of this procedure is to do a initial setup of OHA // *! // *! Procedure Prereq: @@ -38,12 +38,13 @@ // *! //------------------------------------------------------------------------------ /// \file p8_oha_init.C -/// \brief Setup OHA ( AISS_HANG_DETECT_TIMER, Power Proxy Trace Timer and Low Activity detect range) -/// -/// -/// +/// \brief Setup OHA ( Power Proxy Trace Timer and Low Activity detect range) /// /// \version +/// \version 1.12 stillgs 06/04/13 Fix Gerrit comment on e_rc setting into rc for OHA +/// \version Mode register access +/// \version -------------------------------------------------------------------------- +/// \version 1.11 stillgs 05/20/13 Removed AISS reset call as unncessary for OCC reset use /// \version -------------------------------------------------------------------------- /// \version 1.9 mjjones 04/30/13 Removed unused variable /// \version -------------------------------------------------------------------------- @@ -71,7 +72,7 @@ /// \version -------------------------------------------------------------------------- /// \version 1.4 rmaier 03/13/12 Added modes-structure /// \version -------------------------------------------------------------------------- -/// \version 1.0 rmaier 12/01/11 Initial Version +/// \version 1.0 rmaier 12/01/11 Initial Version /// \version --------------------------------------------------------------------------- /// /// High-level procedure flow: @@ -83,36 +84,39 @@ /// /// /// if PM_CONFIG { -/// -/// convert_ppt_time() - Convert Power Proxy Trace Time to Power Proxy Trace Time Select and Match feature attributes +/// +/// convert_ppt_time() - Convert Power Proxy Trace Time to Power Proxy Trace Time Select and Match feature attributes /// With ATTR_PM_POWER_PROXY_TRACE_TIMER (binary in nanoseconds) to produce ATTR_PM_PPT_TIMER_MATCH_VALUE and ATTR_PM_PPT_TIMER_TICK /// 0=0.25us , 1=0.5us, 2=1us, and 3=2us /// /// else if PM_INIT { -/// loop over all valid chiplets { -/// Check if OHA is accessible as chiplet may not be enabled or are in winkle +/// loop over all valid chiplets { +/// Check if OHA is accessible as chiplet may not be enabled or are in winkle /// -/// Setup aiss hang time in oha_mode_reg -/// Set aiss_timeout to max -- oha_mode_reg (11:14) , ADR 1002000D (SCOM) -/// -- 9 => longest time 512 ms -/// Setup low activity in oha_low_activity_detect_mode_reg -/// -- oha_low_activity_detect_mode_reg, ADR 10020003 (SCOM) -/// \todo when should we enable the low activity detection or just setup the ranges?? -/// Set lad_enable = 1?? -/// Set lad_entry = 16 -- bit index of a 24 bit counter based on base counter 0: longest, 23: shortest interval -/// Set lad_exit = 17 -- bit index of a 24 bit counter based on base counter 0: longest, 23: shortest interval +/// Setup aiss hang time in oha_mode_reg +/// Set aiss_timeout to max -- oha_mode_reg (11:14) , ADR 1002000D (SCOM) +/// -- 9 => longest time 512 ms +/// Setup low activity in oha_low_activity_detect_mode_reg +/// -- oha_low_activity_detect_mode_reg, ADR 10020003 (SCOM) +/// \todo when should we enable the low activity detection or just setup the ranges?? +/// Set lad_enable = 1?? +/// Set lad_entry = 16 -- bit index of a 24 bit counter based on base counter 0: longest, 23: shortest interval +/// Set lad_exit = 17 -- bit index of a 24 bit counter based on base counter 0: longest, 23: shortest interval /// /// -/// Setup Power Proxy Trace in activity_sample_mode_reg -/// Set ppt_int_timer_select -- activity_sample_mode_reg (36:37) ADR 10020000 (SCOM) -/// -- select precounter for ppt timer ( 0=0.25us, 1=0.5us, 2=1us, 3=2us ) +/// Setup Power Proxy Trace in activity_sample_mode_reg +/// Set ppt_int_timer_select -- activity_sample_mode_reg (36:37) ADR 10020000 (SCOM) +/// -- select precounter for ppt timer ( 0=0.25us, 1=0.5us, 2=1us, 3=2us ) /// /// ) /// } else if PM_RESET { -/// loop over all valid chiplets { -/// Check if OHA is accessible as chiplet may not be enabled or are in winkle +/// loop over all valid chiplets { +/// Check if OHA is accessible as chiplet may not be enabled or are +// in winkle +/// +/// Note: no function is defined!!!! AISS reset was here but this +/// reset should not be associcated with OCC resets /// -/// AISS reset /// } /// } //end PM_RESET -mode /// @@ -136,7 +140,7 @@ extern "C" { - + using namespace fapi; //------------------------------------------------------------------------------ @@ -149,6 +153,7 @@ using namespace fapi; // Function prototypes // ---------------------------------------------------------------------- +fapi::ReturnCode oha_aiss_inject_winkle_entry(const fapi::Target & i_ex_target); typedef struct { int8_t AISS_HANG_DETECT_TIMER_SEL; // oha_mode_reg (11:14) - 0=1ms, 1=2ms, 3=4ms, ...9=512ms. others illegal @@ -162,15 +167,15 @@ typedef struct { // Function definitions // ---------------------------------------------------------------------- -// Reset function -fapi::ReturnCode p8_oha_init_reset( const fapi::Target& i_target, +// Reset function +fapi::ReturnCode p8_oha_init_reset( const fapi::Target& i_target, uint32_t i_mode); // Config function fapi::ReturnCode p8_oha_init_config(const fapi::Target& i_target); -// INIT -fapi::ReturnCode p8_oha_init_init( const fapi::Target& i_target, - struct_i_oha_val_init_type i_oha_val_init); +// Init function +fapi::ReturnCode p8_oha_init_init( const fapi::Target& i_target, + struct_i_oha_val_init_type i_oha_val_init); // ---------------------------------------------------------------------- // p8_oha_init wrapper to fetch the attributes and pass it on to p8_oha_init_core @@ -181,154 +186,182 @@ p8_oha_init(const fapi::Target &i_target, uint32_t i_mode) { fapi::ReturnCode rc; - if ( i_mode == PM_CONFIG ) + FAPI_INF("Procedure start"); + do { - - FAPI_INF(" : MODE: CONFIG Calling p8_oha_init_config"); - - rc=p8_oha_init_config(i_target); - if (rc) + + if ( i_mode == PM_CONFIG ) { - FAPI_ERR(" p8_oha_init_config failed. With rc = 0x%x", (uint32_t)rc); return rc; - } - } else if ( i_mode == PM_INIT ) { + FAPI_INF("MODE: CONFIG Calling p8_oha_init_config"); + + rc=p8_oha_init_config(i_target); + if (rc) + { + FAPI_ERR(" p8_oha_init_config failed. With rc = 0x%x", (uint32_t)rc); + break; + } + + } else if ( i_mode == PM_INIT ) { - FAPI_INF(" : MODE: INIT Calling p8_oha_init_init"); + FAPI_INF("MODE: INIT Calling p8_oha_init_init"); - //Declare parms struct - struct_i_oha_val_init_type i_oha_val_init; + //Declare parms struct + struct_i_oha_val_init_type i_oha_val_init; - //Assign values to parms in struct - // should come from MRWB - i_oha_val_init.AISS_HANG_DETECT_TIMER_SEL = 9; // oha_mode_reg (11:14) - 0=1ms, 1=2ms, 3=4ms, ...9=512ms. others illegal - i_oha_val_init.PPT_TIMER_SELECT = 3; // activity_sample_mode_reg (36:37) 0=0.25us, 1=0.5us, 2=1us, and 3=2us - i_oha_val_init.LAD_ENTRY = 16; - i_oha_val_init.LAD_EXIT = 17; + //Assign values to parms in struct + // should come from MRWB + i_oha_val_init.AISS_HANG_DETECT_TIMER_SEL = 9; // oha_mode_reg (11:14) - 0=1ms, 1=2ms, 3=4ms, ...9=512ms. others illegal + i_oha_val_init.PPT_TIMER_SELECT = 3; // activity_sample_mode_reg (36:37) 0=0.25us, 1=0.5us, 2=1us, and 3=2us + i_oha_val_init.LAD_ENTRY = 16; + i_oha_val_init.LAD_EXIT = 17; - rc=p8_oha_init_init(i_target, i_oha_val_init); - if (rc) + rc=p8_oha_init_init(i_target, i_oha_val_init); + if (rc) + { + FAPI_ERR(" p8_oha_init_init failed. With rc = 0x%x", (uint32_t)rc); + break; + } + + } + else if ( i_mode == PM_RESET ) { - FAPI_ERR(" p8_oha_init_init failed. With rc = 0x%x", (uint32_t)rc); - return rc; - } - } - else if ( i_mode == PM_RESET ) - { - - FAPI_INF(" : MODE: RESET Calling p8_oha_init_reset"); - - // ****************************************************************** - /// \todo should this values be attributes?? The get those attributes here - // FAPI_ATTR_GET("IVRMS_ENABLED", i_target,(unit8_t) ivrms_enabled); - - rc = p8_oha_init_reset( i_target, i_mode); - if (rc) - { - FAPI_ERR(" p8_oha_init_reset failed. With rc = 0x%x", (uint32_t)rc); - return rc; - } - } - else - { + FAPI_INF("MODE: RESET - none defined"); + /* - FAPI_ERR(" : Unknown mode %x ....\n", i_mode); - FAPI_SET_HWP_ERROR(rc, RC_PROC_OHA_CODE_BAD_MODE); + GSS: removed as this only resets (at this time) the AISS + functions which are not influenced by OCC FW and are detrimental + to operational chiplets - }; + FAPI_INF("MODE: RESET Calling p8_oha_init_reset"); + rc = p8_oha_init_reset( i_target, i_mode); + if (rc) + { + FAPI_ERR(" p8_oha_init_reset failed. With rc = 0x%x", (uint32_t)rc); + return rc; + } + */ + } + else + { - return rc; - -} + FAPI_ERR("Unknown mode %x ....\n", i_mode); + FAPI_SET_HWP_ERROR(rc, RC_PROC_OHA_CODE_BAD_MODE); + + } + } while (0); + + FAPI_INF("Procedure end...\n"); + + return rc; + +} //------------------------------------------------------------------------------ // OHA Config Function //------------------------------------------------------------------------------ fapi::ReturnCode -p8_oha_init_config(const fapi::Target& i_target) +p8_oha_init_config(const fapi::Target& i_target) { fapi::ReturnCode rc; - + uint8_t attr_pm_aiss_timeout; uint32_t attr_pm_power_proxy_trace_timer; uint32_t attr_pm_ppt_timer_tick; uint32_t attr_pm_ppt_timer_match_value; - FAPI_INF(" : Executing config ....\n"); + FAPI_INF("OHA config start..."); + do + { + + // ****************************************************************** + // Get Attributes for OHA Timers Delay + // ****************************************************************** + // set defaults if not available + + // Write all the timer attributes with defaults. This also allocates + // the attributes in Cronus environments. + // If overrides exist, the overridden values will be returned when + // read back. + + attr_pm_ppt_timer_tick = 2; // Default 2: 1us - // ****************************************************************** - // Get Attributes for OHA Timers Delay - // ****************************************************************** - // set defaults if not available - - attr_pm_ppt_timer_tick = 2; // Default 2: 1us - - /// \todo PLAT attr ... not there yet - attr_pm_aiss_timeout = 5; // Default 5: 32ms - // rc = FAPI_ATTR_GET(ATTR_PM_AISS_TIMEOUT, &i_target, attr_pm_aiss_timeout); - // if (rc) - // { - // FAPI_ERR("fapiGetAttribute of ATTR_PM_AISS_TIMEOUT with rc = 0x%x", (uint32_t)rc); - // return rc; - // } - // - - /// \todo PLAT attr ... not there yet - attr_pm_power_proxy_trace_timer = 64000; // Default 1us,,, 32us...64ms - // rc = FAPI_ATTR_GET(ATTR_PM_POWER_PROXY_TRACE_TIMER, &i_target, attr_pm_power_proxy_trace_timer); - // if (rc) - //..{ - // FAPI_ERR("fapiGetAttribute of ATTR_PM_POWER_PROXY_TRACE_TIMER with rc = 0x%x", (uint32_t)rc); - // return rc; - // } - - // ****************************************************************** - // Calculate OHA timer settings - // ****************************************************************** - - FAPI_DBG(" : Calculate OHA timer settings"); - FAPI_DBG(" : Calculate:"); - FAPI_DBG(" : ATTR_PM_PPT_TIMER_MATCH_VALUE"); - FAPI_DBG(" : ATTR_PM_PPT_TIMER_TICK"); - FAPI_DBG(" : using:"); - FAPI_DBG(" : ATTR_PM_POWER_PROXY_TRACE_TIMER"); - - FAPI_DBG(" : Set ATTR_PM_AISS_TIMEOUT to 5 (32ms)"); - attr_pm_ppt_timer_match_value = attr_pm_power_proxy_trace_timer / 32 ; //time in us / 32us - - FAPI_DBG(" : attr_pm_aiss_timeout : %X", attr_pm_aiss_timeout); - FAPI_DBG(" : attr_pm_ppt_timer_match_value : %X", attr_pm_ppt_timer_match_value); - - - // ****************************************************************** - // Set Attributes for OHA timers - // ****************************************************************** - - // rc = FAPI_ATTR_SET(ATTR_PM_AISS_TIMEOUT, &i_target, attr_pm_aiss_timeout); - // if (rc) { FAPI_ERR("fapiGetAttribute of ATTR_PM_AISS_TIMEOUT with rc = 0x%x", (uint32_t)rc); return; } - - rc = FAPI_ATTR_SET(ATTR_PM_PPT_TIMER_MATCH_VALUE, &i_target, attr_pm_ppt_timer_match_value); - if (rc) - { - FAPI_ERR("fapiSetAttribute of ATTR_PM_PPT_TIMER_MATCH_VALUE with rc = 0x%x", (uint32_t)rc); - return rc; - } + SETATTR(rc, + ATTR_PM_PPT_TIMER_TICK, + "ATTR_PM_PPT_TIMER_TICK", + &i_target, + attr_pm_ppt_timer_tick); + + GETATTR(rc, + ATTR_PM_PPT_TIMER_TICK, + "ATTR_PM_PPT_TIMER_TICK", + &i_target, + attr_pm_ppt_timer_tick); + + attr_pm_aiss_timeout = 5; // Default 5: 32ms + + SETATTR(rc, + ATTR_PM_AISS_TIMEOUT, + "ATTR_PM_AISS_TIMEOUT", + &i_target, + attr_pm_aiss_timeout); + + GETATTR(rc, + ATTR_PM_AISS_TIMEOUT, + "ATTR_PM_AISS_TIMEOUT", + &i_target, + attr_pm_aiss_timeout); + + attr_pm_power_proxy_trace_timer = 64000; // Default 1us,,, 32us...64ms + + SETATTR(rc, + ATTR_PM_POWER_PROXY_TRACE_TIMER, + "ATTR_PM_POWER_PROXY_TRACE_TIMER", + &i_target, + attr_pm_power_proxy_trace_timer); + + GETATTR(rc, + ATTR_PM_POWER_PROXY_TRACE_TIMER, + "ATTR_PM_POWER_PROXY_TRACE_TIMER", + &i_target, + attr_pm_power_proxy_trace_timer); + + // ****************************************************************** + // Calculate OHA timer settings + // ****************************************************************** + + FAPI_DBG("Calculate OHA timer settings"); + FAPI_DBG("Calculate:"); + FAPI_DBG(" ATTR_PM_PPT_TIMER_MATCH_VALUE"); + FAPI_DBG(" ATTR_PM_PPT_TIMER_TICK"); + FAPI_DBG("using:"); + FAPI_DBG(" ATTR_PM_POWER_PROXY_TRACE_TIMER"); + + FAPI_DBG("Set ATTR_PM_AISS_TIMEOUT to %X", attr_pm_aiss_timeout); + attr_pm_ppt_timer_match_value = attr_pm_power_proxy_trace_timer / 32 ; //time in us / 32us + + FAPI_DBG("Set ATTR_PM_PPT_TIMER_MATCH_VALUE to %X", attr_pm_ppt_timer_match_value); + + + // ****************************************************************** + // Set Attributes for OHA timers + // ****************************************************************** + + SETATTR(rc, + ATTR_PM_PPT_TIMER_MATCH_VALUE, + "ATTR_PM_PPT_TIMER_MATCH_VALUE", + &i_target, + attr_pm_ppt_timer_match_value); + + } while (0); - rc = FAPI_ATTR_SET(ATTR_PM_PPT_TIMER_TICK, &i_target, attr_pm_ppt_timer_tick); - if (rc) - { - FAPI_ERR("fapiSetAttribute of ATTR_PM_PPT_TIMER_TICK with rc = 0x%x", (uint32_t)rc); - return rc; - } - - FAPI_INF(""); - FAPI_INF(" : Finished config ....\n"); - + FAPI_INF("OHA config end...\n"); + return rc; - + } //end CONFIG @@ -337,100 +370,74 @@ p8_oha_init_config(const fapi::Target& i_target) // OHA Init Function //------------------------------------------------------------------------------ fapi::ReturnCode -p8_oha_init_init(const fapi::Target& i_target, struct_i_oha_val_init_type i_oha_val_init) +p8_oha_init_init(const fapi::Target& i_target, struct_i_oha_val_init_type i_oha_val_init) { fapi::ReturnCode rc; uint32_t l_rc; - + ecmdDataBufferBase data(64); ecmdDataBufferBase mask(64); - + std::vector l_exChiplets; // std::vector::iterator itr; - uint8_t l_functional = 0; uint8_t l_ex_number = 0; - - uint8_t attr_pm_aiss_timeout; + + uint8_t attr_pm_aiss_timeout = 0; uint32_t attr_pm_tod_pulse_count_match_val = 1024; uint32_t attr_pm_ppt_timer_tick; uint32_t attr_pm_ppt_timer_match_value; - - FAPI_INF(" : Executing init ....\n"); - // ****************************************************************** - // Get Attributes for OHA Timers Delay - // ****************************************************************** - #ifndef ATTRIBUTES_AVAIL - // ****************************************************************** - // set defaults if not available - attr_pm_ppt_timer_tick = 2; // Default 2: 1us - attr_pm_ppt_timer_match_value = 0x7FF; // Default 0x7FF: 64ms - attr_pm_aiss_timeout = 5; // Default 5: 32ms - #else - /// \todo PLAT attr ... not there yet - //rc = FAPI_ATTR_GET(ATTR_PM_AISS_TIMEOUT, &i_target, attr_pm_aiss_timeout); - //if (rc) - //{ - // FAPI_ERR("fapiGetAttribute of ATTR_PM_AISS_TIMEOUT with rc = 0x%x", (uint32_t)rc); - // return rc; - //} - - rc = FAPI_ATTR_GET(ATTR_PM_PPT_TIMER_TICK, &i_target, attr_pm_ppt_timer_tick); - if (rc) - { - FAPI_ERR("fapiGetAttribute of ATTR_PM_PPT_TIMER_TICK with rc = 0x%x", (uint32_t)rc); - return rc; - } - rc = FAPI_ATTR_GET(ATTR_PM_PPT_TIMER_MATCH_VALUE, &i_target, attr_pm_ppt_timer_match_value); - if (rc) - { - FAPI_ERR("fapiGetAttribute of ATTR_PM_PPT_TIMER_MATCH_VALUE with rc = 0x%x", (uint32_t)rc); - return rc; - } - #endif - - // ****************************************************************** - // initialize all oha_reg with scan-zero values upfront - // ****************************************************************** - - rc = fapiGetChildChiplets ( i_target, - TARGET_TYPE_EX_CHIPLET, - l_exChiplets, - TARGET_STATE_FUNCTIONAL); - if (rc) - { - FAPI_ERR("Error from fapiGetChildChiplets!"); - return rc; - } - FAPI_DBG(" : Number of chiplets => %u", l_exChiplets.size()); - - // Iterate through the returned chiplets - //for (itr = l_exChiplets.begin(); itr != l_exChiplets.end(); itr++) - for (uint8_t c=0; c < l_exChiplets.size(); c++) + FAPI_INF("OHA init start..."); + do { - // Determine if it's functional - //rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, itr, l_functional); - rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &l_exChiplets[c], l_functional); + + + // ****************************************************************** + // Get Attributes for OHA Timers Delay + // ****************************************************************** + + GETATTR(rc, + ATTR_PM_PPT_TIMER_TICK, + "ATTR_PM_PPT_TIMER_TICK", + &i_target, + attr_pm_ppt_timer_tick); + + GETATTR(rc, + ATTR_PM_PPT_TIMER_MATCH_VALUE, + "ATTR_PM_PPT_TIMER_MATCH_VALUE", + &i_target, + attr_pm_ppt_timer_match_value); + + // ****************************************************************** + // initialize all oha_reg with scan-zero values upfront + // ****************************************************************** + + rc = fapiGetChildChiplets ( i_target, + TARGET_TYPE_EX_CHIPLET, + l_exChiplets, + TARGET_STATE_FUNCTIONAL); if (rc) { - FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error"); + FAPI_ERR("Error from fapiGetChildChiplets!"); break; } - - // With TARGET_STATE_FUNCTIONAL above, this check may be redundant - if ( l_functional ) - { + FAPI_DBG("Number of chiplets => %u", l_exChiplets.size()); + + // Iterate through the returned chiplets + //for (itr = l_exChiplets.begin(); itr != l_exChiplets.end(); itr++) + for (uint8_t c=0; c < l_exChiplets.size(); c++) + { // Get the core number - //rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, itr, c); - rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[c], l_ex_number); + //rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, itr, c); + rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[c], l_ex_number); if (rc) { FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error"); break; } - FAPI_DBG(" : Processing core : %d ", l_ex_number); - + FAPI_DBG("Processing core : %d ", l_ex_number); + // ****************************************************************** // AISS hang timer setup // ****************************************************************** @@ -443,29 +450,30 @@ p8_oha_init_init(const fapi::Target& i_target, struct_i_oha_val_init_type i_oha_ // Read register content //rc = fapiGetScom( (*itr), EX_OHA_MODE_REG_RWx1002000D , data ); rc = fapiGetScom( l_exChiplets[c], EX_OHA_MODE_REG_RWx1002000D , data ); - if (rc) + if (rc) { - FAPI_ERR("fapiGetScom(EX_OHA_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc); - return rc; + FAPI_ERR("fapiGetScom(EX_OHA_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc); + break; } FAPI_DBG ("Content of EX_OHA_MODE_REG_0x1002000D : %016llX", data.getDoubleWord(0)); //data.flushTo0(); - l_rc = data.insertFromRight(attr_pm_aiss_timeout ,11,4); - l_rc |= data.insertFromRight(attr_pm_tod_pulse_count_match_val ,17,14); - if (l_rc) + l_rc = data.insertFromRight(attr_pm_aiss_timeout ,11,4); + l_rc |= data.insertFromRight(attr_pm_tod_pulse_count_match_val ,17,14); + if (l_rc) { - FAPI_ERR("Bit operation failed. With rc = 0x%x", (uint32_t)l_rc); rc.setEcmdError(l_rc); - return rc; + FAPI_ERR("Bit operation failed. With rc = 0x%x", (uint32_t)l_rc); rc.setEcmdError(l_rc); + break; } // rc = fapiPutScom( (*itr), EX_OHA_MODE_REG_RWx1002000D , data ); rc = fapiPutScom( l_exChiplets[c], EX_OHA_MODE_REG_RWx1002000D , data ); - if (rc) + if (rc) { - FAPI_ERR("fapiPutScom(EX_OHA_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc); return rc; - } + FAPI_ERR("fapiPutScom(EX_OHA_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc); + break; + } // ****************************************************************** @@ -476,37 +484,36 @@ p8_oha_init_init(const fapi::Target& i_target, struct_i_oha_val_init_type i_oha_ // - set LAD for entry // - set LAD for exit // ****************************************************************** - //FAPI_DBG("**********************************************************************************************"); + FAPI_INF(" Setup Low Activity Detect (LAD) in oha_low_activity_detect_mode_reg 10020003, but NOT ENABLED"); - //FAPI_DBG("**********************************************************************************************"); // Read register content // rc = fapiGetScom( (*itr), EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG_RWx10020003 , data ); rc = fapiGetScom( l_exChiplets[c], EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG_RWx10020003 , data ); - if (rc) - { - FAPI_ERR("fapiGetScom(EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG_RWx10020003) failed. With rc = 0x%x", (uint32_t)rc); - return rc; + if (rc) + { + FAPI_ERR("fapiGetScom(EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG_RWx10020003) failed. With rc = 0x%x", (uint32_t)rc); + break; } FAPI_DBG(" Pre write content of EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG_RWx10020003 : %016llX", data.getDoubleWord(0)); - l_rc = data.setByte(0, i_oha_val_init.LAD_ENTRY); // 16 + l_rc = data.setByte(0, i_oha_val_init.LAD_ENTRY); // 16 l_rc |= data.setByte(1, i_oha_val_init.LAD_EXIT); // 17 - l_rc |= data.shiftRight(1); // LAD entry/exit starts at bit 1 + l_rc |= data.shiftRight(1); // LAD entry/exit starts at bit 1 l_rc |= data.clearBit(0); - if (l_rc) - { - FAPI_ERR("Bit operation failed. With rc = 0x%x", (uint32_t)l_rc); - rc.setEcmdError(l_rc); - return rc; + if (l_rc) + { + FAPI_ERR("Bit operation failed. With rc = 0x%x", (uint32_t)l_rc); + rc.setEcmdError(l_rc); + break; } // rc = fapiPutScom((*itr), EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG_RWx10020003 , data ); rc = fapiPutScom( l_exChiplets[c], EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG_RWx10020003 , data ); - if (rc) + if (rc) { - FAPI_ERR("fapiGetScom(EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc); - return rc; + FAPI_ERR("fapiGetScom(EX_OHA_LOW_ACTIVITY_DETECT_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc); + break; } FAPI_INF ("Done LAD setup. LAD Disabled " ); @@ -518,61 +525,61 @@ p8_oha_init_init(const fapi::Target& i_target, struct_i_oha_val_init_type i_oha_ // - set ppt_timer_select // - set ppt_trace_timer_match_val // ****************************************************************** - //FAPI_DBG("********************************************************************************"); + FAPI_INF(" Setup Power Proxy Trace (PPT) in oha_activity_sample_mode_reg 10020000"); - //FAPI_DBG("********************************************************************************"); - // Read register content + // Read register content // rc = fapiGetScom( (*itr), EX_OHA_ACTIVITY_SAMPLE_MODE_REG_RWx10020000 , data ); rc = fapiGetScom( l_exChiplets[c], EX_OHA_ACTIVITY_SAMPLE_MODE_REG_RWx10020000 , data ); - if (rc) + if (rc) { - FAPI_ERR("fapiGetScom(EX_OHA_ACTIVITY_SAMPLE_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc); - return rc; + FAPI_ERR("fapiGetScom(EX_OHA_ACTIVITY_SAMPLE_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc); + break; } FAPI_DBG(" Pre write content of EX_OHA_ACTIVITY_SAMPLE_MODE_REG_RWx10020000 : %016llX", data.getDoubleWord(0)); - // set ppt_int_timer_select to longest interval "11" = 2us + // set ppt_int_timer_select to longest interval "11" = 2us //l_rc = data.setBit(36); - //if (l_rc) + //if (l_rc) //{ - // FAPI_ERR("Bit operation failed."); - // FAPI_SET_HWP_ERROR(rc, RC_PROC_OHA_CODE_BITOP_FAILED); - //} + // FAPI_ERR("Bit operation failed."); + // FAPI_SET_HWP_ERROR(rc, RC_PROC_OHA_CODE_BITOP_FAILED); + //} //l_rc = data.setBit(37); - //if (l_rc) - //{ - // FAPI_ERR("Bit operation failed."); + //if (l_rc) + //{ + // FAPI_ERR("Bit operation failed."); // FAPI_SET_HWP_ERROR(rc, RC_PROC_OHA_CODE_BITOP_FAILED); - //} - - l_rc = data.insertFromRight(attr_pm_ppt_timer_match_value ,24,11); - l_rc |= data.insertFromRight(attr_pm_ppt_timer_tick ,36,2); - if (l_rc) - { - FAPI_ERR("Bit operation failed. With rc = 0x%x", (uint32_t)l_rc); - rc.setEcmdError(l_rc); - return rc; + //} + + l_rc = data.insertFromRight(attr_pm_ppt_timer_match_value ,24,11); + l_rc |= data.insertFromRight(attr_pm_ppt_timer_tick ,36,2); + if (l_rc) + { + FAPI_ERR("Bit operation failed. With rc = 0x%x", (uint32_t)l_rc); + rc.setEcmdError(l_rc); + break; } // rc = fapiPutScom((*itr), EX_OHA_ACTIVITY_SAMPLE_MODE_REG_RWx10020000 , data ); rc = fapiPutScom( l_exChiplets[c], EX_OHA_ACTIVITY_SAMPLE_MODE_REG_RWx10020000 , data ); - if (rc) + if (rc) { - FAPI_ERR("fapiGetScom(EX_OHA_ACTIVITY_SAMPLE_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc); - return rc; + FAPI_ERR("fapiGetScom(EX_OHA_ACTIVITY_SAMPLE_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc); + break; } - - FAPI_INF (" : Done PPT timer setup." ); - } - } - - FAPI_INF(" : Finished init ....\n"); + FAPI_INF ("Done PPT timer setup." ); + } // Chiplet loop + + // Error break is naturally handled + + } while(0); + FAPI_INF("OHA init end...\n"); return rc; - + } //end INIT @@ -584,181 +591,157 @@ fapi::ReturnCode p8_oha_init_reset(const Target &i_target, uint32_t i_mode) { fapi::ReturnCode rc; + fapi::ReturnCode e_rc; uint32_t l_rc = 0; ecmdDataBufferBase data(64); ecmdDataBufferBase mask(64); - + // std::vector::iterator itr; std::vector l_exChiplets; - uint8_t l_functional = 0; uint8_t l_ex_number = 0; - - - FAPI_INF(" : Executing reset ....\n");; - rc = fapiGetChildChiplets ( i_target, - TARGET_TYPE_EX_CHIPLET, - l_exChiplets, - TARGET_STATE_FUNCTIONAL); - if (rc) - { - FAPI_ERR("Error from fapiGetChildChiplets!"); - return rc; - } - FAPI_DBG(" : Number of chiplets => %u", l_exChiplets.size()); + uint8_t platform; - // Iterate through the returned chiplets - //for (itr = l_exChiplets.begin(); itr != l_exChiplets.end(); itr++) - for (uint8_t c=0; c < l_exChiplets.size(); c++) + FAPI_INF("OHA init start..."); + do { - // Determine if it's functional - //rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, itr, l_functional); - rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &l_exChiplets[c], l_functional); + rc = fapiGetChildChiplets ( i_target, + TARGET_TYPE_EX_CHIPLET, + l_exChiplets, + TARGET_STATE_FUNCTIONAL); if (rc) { - FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error"); + FAPI_ERR("Error from fapiGetChildChiplets!"); break; } - - // With TARGET_STATE_FUNCTIONAL above, this check may be redundant - if ( l_functional ) + FAPI_DBG("Number of chiplets => %u", l_exChiplets.size()); + + // Iterate through the returned chiplets + //for (itr = l_exChiplets.begin(); itr != l_exChiplets.end(); itr++) + for (uint8_t c=0; c < l_exChiplets.size(); c++) { + // Get the core number - //rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, itr, c); - rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[c], l_ex_number); + //rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, itr, c); + rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[c], l_ex_number); if (rc) { FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error"); break; } - FAPI_DBG(" : Processing core : %d ", l_ex_number); - - - - // -------------------------------------- - // Check if SBE code has already cleared the OHA override. - // As chiplets may be enabled but offline (eg in Winkle) - // treat SCOM errors as off-line (eg skip it). If online - // and set, clear the override. - - // GSS: removed as Cronus always puts a message out of (PCB_OFFLINE) - // even though this code is meant to handle it. As this messge - // can cause confusion in the lab, the check is being removed. - bool oha_accessible = true; - uint32_t fsierror = 0; - const uint32_t IDLE_STATE_OVERRIDE_EN = 6; - - - rc = fapiGetScom(l_exChiplets[c], EX_OHA_MODE_REG_RWx1002000D, data); - if(!rc.ok()) - { - FAPI_ERR("Error reading EX_OHA_MODE_REG_RWx1002000D . Further debugging"); - rc = fapiGetCfamRegister( i_target, CFAM_FSI_STATUS_0x00001007, data ); - if(!rc.ok()) - { - FAPI_ERR("Error reading CFAM FSI Status Register"); - break; - } - FAPI_INF( "CFAM_FSI_STATUS_0x00001007: 0x%X", data.getWord(0)); - l_rc |= data.extractToRight( &fsierror, 17, 3 ); - if ( l_rc ) - { - rc.setEcmdError(l_rc); - break; - } - if (fsierror == PIB_OFFLINE_ERROR) - { - FAPI_INF( "Chiplet offline error detected. Skipping OHA Override clearing"); - oha_accessible = false; - } - else - { - FAPI_ERR("Scom reading OHA_MODE"); - break; - } - } - // Process if OHA accessible. - if (oha_accessible) - { - if (data.isBitSet(IDLE_STATE_OVERRIDE_EN)) - { - - FAPI_INF("\tClear the OHA Idle State Override for EX %x", l_ex_number); - l_rc |= data.clearBit(IDLE_STATE_OVERRIDE_EN); - if (l_rc) - { - FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_rc); - rc.setEcmdError(l_rc); - break; - } - - rc = fapiPutScom(l_exChiplets[c], EX_OHA_MODE_REG_RWx1002000D, data); - if(!rc.ok()) - { - FAPI_ERR("Scom error writing OHA_MODE"); - break; - } - } - } - // End of check removal - - - - - - - FAPI_INF("Reset AISS "); - FAPI_INF("Write to register OHA_ARCH_IDLE_STATE_REG "); - - // rc = fapiGetScom( (*itr), EX_OHA_ARCH_IDLE_STATE_REG_RWx10020011, data); - rc = fapiGetScom( l_exChiplets[c], EX_OHA_ARCH_IDLE_STATE_REG_RWx10020011, data); - if (rc) - { - FAPI_ERR("fapiGetScom(EX_OHA_ARCH_IDLE_STATE_REG) failed. With rc = 0x%x", (uint32_t)rc); - return rc; - } - FAPI_DBG(" Pre write content of EX_OHA_ARCH_IDLE_STATE_REG_RWx10020011 : %016llX", data.getDoubleWord(0) ); - - l_rc = data.setBit(9); //reset_idle_state_sequencer_in ... reset pulse gets generated. Not unsetting required - if (l_rc) - { - FAPI_ERR("Bit operation failed. With rc = 0x%x", (uint32_t)l_rc); - rc.setEcmdError(l_rc); - return rc; - } + FAPI_DBG("Processing core : %d ", l_ex_number); + + // -------------------------------------- + // Check if SBE code has already cleared the OHA override. + // As chiplets may be enabled but offline (eg in Winkle) + // treat SCOM errors as off-line (eg skip it). If online + // and set, clear the override. + + // GSS: removed as Cronus always puts a message out of (PCB_OFFLINE) + // even though this code is meant to handle it. As this message + // can cause confusion in the lab, the check is being removed. + bool oha_accessible = true; + uint32_t fsierror = 0; + const uint32_t IDLE_STATE_OVERRIDE_EN = 6; - // rc = fapiPutScom((*itr), EX_OHA_ARCH_IDLE_STATE_REG_RWx10020011 , data ); - rc = fapiPutScom( l_exChiplets[c], EX_OHA_ARCH_IDLE_STATE_REG_RWx10020011 , data ); - if (rc) + + e_rc = fapiGetScom(l_exChiplets[c], EX_OHA_MODE_REG_RWx1002000D, data); + if(!e_rc.ok()) { - FAPI_ERR("fapiPutScom(EX_OHA_ARCH_IDLE_STATE_REG) failed. With rc = 0x%x", (uint32_t)rc); - return rc; + FAPI_ERR("Error reading EX_OHA_MODE_REG_RWx1002000D . Further debugging"); + + // Based on the execution platorm, access different facilities to + // determine the error code + GETATTR(rc, + ATTR_EXECUTION_PLATFORM, + "ATTR_EXECUTION_PLATFORM", + NULL, + platform); + + if( platform == fapi::ENUM_ATTR_EXECUTION_PLATFORM_FSP) + { + rc = fapiGetCfamRegister( i_target, CFAM_FSI_STATUS_0x00001007, data ); + if(!rc.ok()) + { + FAPI_ERR("Error reading CFAM FSI Status Register"); + break; + } + FAPI_INF( "CFAM_FSI_STATUS_0x00001007: 0x%X", data.getWord(0)); + l_rc |= data.extractToRight( &fsierror, 17, 3 ); + + if ( l_rc ) + { + rc.setEcmdError(l_rc); + break; + } + } + else if( platform == fapi::ENUM_ATTR_EXECUTION_PLATFORM_HOST ) + { + // Find the ADU status reg with the same PIB scresp + + } + else + { + FAPI_ERR("Invalid execution platform: %X", platform); + // \todo Add CML point + break; + } + if (fsierror == PIB_OFFLINE_ERROR) + { + FAPI_INF( "Chiplet offline error detected. Skipping OHA Override clearing"); + oha_accessible = false; + } + else + { + FAPI_ERR("Scom reading OHA_MODE"); + uint32_t & ERRORS = fsierror; + rc = e_rc ; + FAPI_SET_HWP_ERROR(rc, RC_PROC_OHA_CODE_PUTGETSCOM_FAILED); + break; + } } - - // rc = fapiGetScom( (*itr), EX_OHA_ARCH_IDLE_STATE_REG_RWx10020011, data); - rc = fapiGetScom( l_exChiplets[c], EX_OHA_ARCH_IDLE_STATE_REG_RWx10020011, data); - if (rc) return rc; - FAPI_DBG(" Post write content of EX_OHA_ARCH_IDLE_STATE_REG_RWx10020011 : %016llX", data.getDoubleWord(0) ); - //} - if (rc) + // Process if OHA accessible. + if (oha_accessible) { - FAPI_ERR("fapiGetScom(EX_OHA_ARCH_IDLE_STATE_REG) failed. With rc = 0x%x", (uint32_t)rc); - return rc; + if (data.isBitSet(IDLE_STATE_OVERRIDE_EN)) + { + + FAPI_INF("\tClear the OHA Idle State Override for EX %x", l_ex_number); + l_rc |= data.clearBit(IDLE_STATE_OVERRIDE_EN); + if (l_rc) + { + FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_rc); + rc.setEcmdError(l_rc); + break; + } + + rc = fapiPutScom(l_exChiplets[c], EX_OHA_MODE_REG_RWx1002000D, data); + if(!rc.ok()) + { + FAPI_ERR("Scom error writing OHA_MODE"); + break; + } + } } - } - else - { - FAPI_INF(" : Skipping non-functional core. Number unknown at this time!"); - } - } + // End of check removal + + // GSS: removed AISS reset as this should only be used for SLW + // recovery, not OCC reset. + // + // If this function were to ever be restored here (for whatever + // reason), a check for special wake-up state must be made. + // This, too, needs care in implementation as AISS reset affects + // the special wake-up condition and must be forced from the PCBS-PM + // via the override mechanism there. - FAPI_INF(" : Finished reset ....\n"); + } // chiplet loop + } while(0); + FAPI_INF("OHA reset end...\n"); return rc; } } //end extern C - diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.H index 558c923e2..ce355f9e5 100755 --- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.H +++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.H @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_oha_init.H,v 1.2 2012/11/27 18:11:53 stillgs Exp $ +// $Id: p8_oha_init.H,v 1.3 2013/08/02 19:00:26 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_oha_init.H,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -45,12 +45,13 @@ extern "C" /// \brief Initialize OHA /// - /// \param[in] &i_target Chip target - /// \param[in] i_mode Mode 1: CONFIG-Mode - /// Mode 2: RESET-Mode - /// Mode 3: INIT-Mode + /// \param[in] &i_target Chip target + /// \param[in] i_mode CONFIG-Mode + /// RESET-Mode + /// INIT-Mode + /// defined in p8_pm.H, enum P8_PM_FLOW_MODE -fapi::ReturnCode p8_oha_init (const fapi::Target& i_target, uint32_t i_mode); +fapi::ReturnCode p8_oha_init (const fapi::Target& i_target, uint32_t i_mode); } diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pba_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pba_init.C index aa1b4dd8c..954e3d957 100755 --- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pba_init.C +++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pba_init.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_pba_init.C,v 1.11 2013/04/01 04:11:57 stillgs Exp $ +// $Id: p8_pba_init.C,v 1.12 2013/08/02 19:30:40 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pba_init.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -28,44 +28,44 @@ // *! *** IBM Confidential *** //------------------------------------------------------------------------------ // *! OWNER NAME: Klaus P. Gungl Email: kgungl@de.ibm.com -// *! -// *! +// *! +// *! /// \file p8_pba_init.C -/// \brief Initialize PBA registers for modes PM_INIT, PM_RESET and PM_CONFIG -// *! +/// \brief Initialize PBA registers for modes PM_INIT, PM_RESET and PM_CONFIG +// *! // *! Functional description: setup the PBA registers depending on mode -// *! calling parameters: +// *! calling parameters: // *! : Target i_target // target according to calling conventions // *! uint64_t mode // mode according to power_up spec: PM_CONFIG, PM_INIT, PM_RESET -// *! +// *! // *! high level flow: -// *! if (mode == PM_CONFIG) { -// *! rc = p8_pba_init_PM_CONFIG(i_target); +// *! if (mode == PM_CONFIG) { +// *! rc = p8_pba_init_PM_CONFIG(i_target); // *! } else { -// *! if (mode == PM_INIT) { -// *! rc = p8_pba_init_PM_INIT(i_target); -// *! } else { -// *! if (mode == PM_RESET) { -// *! rc = p8_pba_init_PM_RESET(i_target); +// *! if (mode == PM_INIT) { +// *! rc = p8_pba_init_PM_INIT(i_target); +// *! } else { +// *! if (mode == PM_RESET) { +// *! rc = p8_pba_init_PM_RESET(i_target); // *! } else { -// *! FAPI_SET_HWP_ERROR(rc,RC_P8_PBA_INIT_INCORRECT_MODE); -// *! } +// *! FAPI_SET_HWP_ERROR(rc,RC_PMPROC_PBA_INIT_INCORRECT_MODE); +// *! } // *! } // *! } // endif -// *! } // endif -// *! -// *! +// *! } // endif +// *! +// *! // *! list of changes // *! 2012/10/11 applied changes and error corrections according to Terry Opie and reformatting if-else // *! 2012/10/11 applied changes according to Terry Opie -// *! 2012/07/26 applied the changes as recommended by Greg's second review, pbax attributes included, +// *! 2012/07/26 applied the changes as recommended by Greg's second review, pbax attributes included, // *! 2012/07/18 applied the changes as recommended by Greg, attribute coding, TODO: correct constants -// *! 2012/05/09 global variables removed, "mode" used according to common rules. -// *! 2012/05/17 temporary commented out the accesses assumed wrong address +// *! 2012/05/09 global variables removed, "mode" used according to common rules. +// *! 2012/05/17 temporary commented out the accesses assumed wrong address // *! //------------------------------------------------------------------------------ - + // ---------------------------------------------------------------------- // Includes // ---------------------------------------------------------------------- @@ -76,11 +76,11 @@ // get the constants from here #include "pgp_pba.h" -#include "pgp_common.h" - +#include "pgp_common.h" + extern "C" { - -using namespace fapi; + +using namespace fapi; // ---------------------------------------------------------------------- // Constant definitions @@ -109,33 +109,34 @@ fapi::ReturnCode pba_slave_reset(const Target& i_target); // ********************************************************************************************** // ----------------------------------------------- p8_pba_init -------------------------------- -// function: +// function: // set the pba registers depending on "mode", no default mode // returns: fapi return codes fapi::ReturnCode -p8_pba_init(const Target& i_target, +p8_pba_init(const Target& i_target, uint64_t mode ) { fapi::ReturnCode rc; // calling the selected function from here - - if (mode == PM_CONFIG) - { - rc = p8_pba_init_PM_CONFIG(i_target); - } - else if (mode == PM_INIT) - { - rc = p8_pba_init_PM_INIT(i_target); - } - else if (mode == PM_RESET) - { - rc = p8_pba_init_PM_RESET(i_target); + + if (mode == PM_CONFIG) + { + rc = p8_pba_init_PM_CONFIG(i_target); } - else + else if (mode == PM_INIT) { - FAPI_ERR("Unknown mode passed to p8_pba_init. Mode %08llx ", mode); - FAPI_SET_HWP_ERROR(rc,RC_P8_PBA_INIT_INCORRECT_MODE); + rc = p8_pba_init_PM_INIT(i_target); + } + else if (mode == PM_RESET) + { + rc = p8_pba_init_PM_RESET(i_target); + } + else + { + FAPI_ERR("Unknown mode passed to p8_pba_init. Mode %08llx ", mode); + const uint64_t& PM_MODE = mode; + FAPI_SET_HWP_ERROR(rc, RC_PMPROC_PBA_INIT_INCORRECT_MODE); } // endif @@ -155,141 +156,172 @@ p8_pba_init_PM_RESET(const Target& i_target) do { - + // Reset each slave and wait for completion. rc = pba_slave_reset(i_target); - if (rc) - { - FAPI_ERR("pba_slave_reset failed."); - break; + if (rc) + { + FAPI_ERR("pba_slave_reset failed."); + break; } - - + + FAPI_INF("mode = PM_RESET..."); l_rc = data.setDoubleWord(0, 0x0); - if (l_rc) - { - FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc); - rc.setEcmdError(l_rc); - break; - } // end if + if (l_rc) + { + rc.setEcmdError(l_rc); + break; + } // For reset phase, write these with 0x0 - // No content for config or init phase as all initialization is done by OCC FW + // No content for config or init phase as all initialization is done by OCC FW rc = fapiPutScom(i_target, PBA_BCDE_CTL_0x00064010 , data); - if (rc) - { + if (rc) + { FAPI_ERR("fapiPutScom(PBA_BCDE_CTL_0x00064010 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + break; } rc = fapiPutScom(i_target, PBA_BCDE_SET_0x00064011 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_BCDE_SET_0x00064011 ) failed. With rc = 0x%x", (uint32_t)rc); - break; - } + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_BCDE_SET_0x00064011 ) failed. With rc = 0x%x", (uint32_t)rc); + break; + } rc = fapiPutScom(i_target, PBA_BCDE_STAT_0x00064012 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_BCDE_STAT_0x00064012 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_BCDE_STAT_0x00064012 ) failed. With rc = 0x%x", (uint32_t)rc); + break; } rc = fapiPutScom(i_target, PBA_BCDE_PBADR_0x00064013 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_BCDE_PBADR_0x00064013 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_BCDE_PBADR_0x00064013 ) failed. With rc = 0x%x", (uint32_t)rc); + break; } rc = fapiPutScom(i_target, PBA_BCDE_OCIBAR_0x00064014 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_BCDE_OCIBAR_0x00064014 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_BCDE_OCIBAR_0x00064014 ) failed. With rc = 0x%x", (uint32_t)rc); + break; } rc = fapiPutScom(i_target, PBA_BCUE_CTL_0x00064015 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_BCUE_CTL_0x0006401 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_BCUE_CTL_0x0006401 ) failed. With rc = 0x%x", (uint32_t)rc); + break; } rc = fapiPutScom(i_target, PBA_BCUE_SET_0x00064016 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_BCUE_SET_0x00064016 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_BCUE_SET_0x00064016 ) failed. With rc = 0x%x", (uint32_t)rc); + break; } rc = fapiPutScom(i_target, PBA_BCUE_STAT_0x00064017 , data); - if (rc) - { - FAPI_ERR("fapiPutScom(PBA_BCUE_STAT_0x00064017 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom(PBA_BCUE_STAT_0x00064017 ) failed. With rc = 0x%x", (uint32_t)rc); + break; } rc = fapiPutScom(i_target, PBA_BCUE_PBADR_0x00064018 , data); - if (rc) - { - FAPI_ERR("fapiPutScom(PBA_BCUE_PBADR_0x00064018 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom(PBA_BCUE_PBADR_0x00064018 ) failed. With rc = 0x%x", (uint32_t)rc); + break; } rc = fapiPutScom(i_target, PBA_BCUE_OCIBAR_0x00064019 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_BCUE_OCIBAR_0x00064019 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_BCUE_OCIBAR_0x00064019 ) failed. With rc = 0x%x", (uint32_t)rc); + break; + } + + // For reset, written with 0x0s to disable + rc = fapiPutScom(i_target, PBAXSHBR0_00064026 , data); + if (rc) + { + FAPI_ERR("fapiPutScom( PBAXSHBR0_00064026 ) failed. With rc = 0x%x", (uint32_t)rc); + break; + } + + rc = fapiPutScom(i_target, PBAXSHCS0_00064027 , data); + if (rc) + { + FAPI_ERR("fapiPutScom( PBAXSHCS0_00064027 ) failed. With rc = 0x%x", (uint32_t)rc); + break; + } + + rc = fapiPutScom(i_target, PBAXSHBR1_0006402A , data); + if (rc) + { + FAPI_ERR("fapiPutScom( PBAXSHBR1_0006402A ) failed. With rc = 0x%x", (uint32_t)rc); + break; + } + + rc = fapiPutScom(i_target, PBAXSHBR1_0006402B , data); + if (rc) + { + FAPI_ERR("fapiPutScom( PBAXSHBR1_0006402B ) failed. With rc = 0x%x", (uint32_t)rc); + break; } // For reset, written with 0x0s to restore to fresh value. rc = fapiPutScom(i_target, PBA_SLVCTL0_0x00064004 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_SLVCTL0_0x00064004 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_SLVCTL0_0x00064004 ) failed. With rc = 0x%x", (uint32_t)rc); + break; } rc = fapiPutScom(i_target, PBA_SLVCTL1_0x00064005 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_SLVCTL1_0x00064005 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_SLVCTL1_0x00064005 ) failed. With rc = 0x%x", (uint32_t)rc); + break; } +/* Removed as this is done by p8_set_port_bar.C for the SLW used path + through the PBA + rc = fapiPutScom(i_target, PBA_SLVCTL2_0x00064006 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_SLVCTL2_0x00064006 ) failed. With rc = 0x%x", (uint32_t)rc); - break; - } + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_SLVCTL2_0x00064006 ) failed. With rc = 0x%x", (uint32_t)rc); + break; + } +*/ rc = fapiPutScom(i_target, PBA_SLVCTL3_0x00064007 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_SLVCTL3_0x00064007 ) failed. With rc = 0x%x", (uint32_t)rc); - break; - } + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_SLVCTL3_0x00064007 ) failed. With rc = 0x%x", (uint32_t)rc); + break; + } // Clear the PBA FIR (Reset) only l_rc = data.setDoubleWord(0, 0x0); - if (l_rc) - { - FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc); - rc.setEcmdError(l_rc); - break; - } // end if - + if (l_rc) + { + rc.setEcmdError(l_rc); + break; + } + rc = fapiPutScom(i_target, PBA_FIR_0x02010840 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_FIR_0x02010840 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_FIR_0x02010840 ) failed. With rc = 0x%x", (uint32_t)rc); + break; } // For reset, this register should be written with the value from figtree @@ -298,26 +330,27 @@ p8_pba_init_PM_RESET(const Target& i_target) // reset case // data still 0 rc = fapiPutScom(i_target, PBA_CONFIG_0x0201084B , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_CONFIG_0x0201084B ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_CONFIG_0x0201084B ) failed. With rc = 0x%x", (uint32_t)rc); + break; } +/* // pba slave register handling for PM_RESET rc = pba_slave_setup_reset(i_target); - if (rc) - { - FAPI_ERR("pba_slave_setup_reset failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("pba_slave_setup_reset failed. With rc = 0x%x", (uint32_t)rc); + break; } - +*/ // For reset, written with 0x0s to restore to fresh value. rc = fapiPutScom(i_target, PBA_ERR_RPT0_0x0201084C , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_ERR_RPT0_0x0201084C ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_ERR_RPT0_0x0201084C ) failed. With rc = 0x%x", (uint32_t)rc); + break; } // the following operations are not required, keep this in mind, don't erase them here @@ -329,30 +362,31 @@ p8_pba_init_PM_RESET(const Target& i_target) // if(l_rc) { FAPI_SET_HWP_ERROR(l_rc, RC_PROC_PBA_INIT_PUTSCOM_FAILED); return l_rc; } // else {FAPI_INF("Done with PBA_ERR_RPT2_0x0201084E \n ") }; - +/* Redundant with above // The following apply to Reset mode rc = fapiPutScom(i_target, PBA_SLVRST_0x00064001 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_SLVRST_0x00064001 ) failed. With rc = 0x%x", (uint32_t)rc); - break; - } + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_SLVRST_0x00064001 ) failed. With rc = 0x%x", (uint32_t)rc); + break; + } // last step: pba slave setup for reset rc = pba_slave_setup_reset (i_target); - if (rc) - { - FAPI_ERR("fapi pba_slave_setup_reset failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapi pba_slave_setup_reset failed. With rc = 0x%x", (uint32_t)rc); + break; } +*/ } while(0); - + return rc; } // endif (mode == PM_RESET) - - + + // *********************************************************************************************** // ************************************************************ mode = PM_INIT ******************* // call pba_slave_setup @@ -376,12 +410,11 @@ p8_pba_init_PM_INIT(const Target& i_target) // if (mode == PM_INIT) { FAPI_INF("mode = PM_INIT..."); l_rc = data.setDoubleWord(0, 0x0); - if (l_rc) - { - FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc); - rc.setEcmdError(l_rc); - break; - } // end if + if (l_rc) + { + rc.setEcmdError(l_rc); + break; + } // For reset, this register should be written with the value from figtree to restore the // initial hardware state. @@ -390,20 +423,20 @@ p8_pba_init_PM_INIT(const Target& i_target) FAPI_INF("flusing PBA_CONFIG register "); rc = fapiPutScom(i_target, PBA_CONFIG_0x0201084B , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_CONFIG_0x0201084B ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_CONFIG_0x0201084B ) failed. With rc = 0x%x", (uint32_t)rc); + break; } // Clear the PBA FIR (Reset) only // data still 0 FAPI_INF("flusing PBA_FIR register "); rc = fapiPutScom(i_target, PBA_FIR_0x02010840 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_FIR_0x02010840 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_FIR_0x02010840 ) failed. With rc = 0x%x", (uint32_t)rc); + break; } // The following registers are ROX, hence need not be touched: @@ -428,44 +461,44 @@ p8_pba_init_PM_INIT(const Target& i_target) // a reset, the BARS/MASKS are retained. this applies to // PBA_BAR0_0x02013F00 // PBA_BARMSK0_0x02013F04 - // PBA_BARMSK1_0x02013F05 // PBA_BAR1_0x02013F01 + // PBA_BARMSK1_0x02013F05 // PBA_BAR2_0x02013F02 // PBA_BAR3_0x02013F03 - // PBA_TRUSTMODE_0x02013F08 + // PBA_TRUSTMODE_0x02013F08 // any checkreads => NO - + rc = FAPI_ATTR_GET ( ATTR_PM_PBAX_RCV_RESERV_TIMEOUT , &i_target, ATTR_PM_PBAX_RCV_RESERV_TIMEOUT_value ); - if (rc) - { - FAPI_ERR("fapi_attr_get( ATTR_PM_PBAX_RCV_RESERV_TIMEOUT ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapi_attr_get( ATTR_PM_PBAX_RCV_RESERV_TIMEOUT ) failed. With rc = 0x%x", (uint32_t)rc); + break; } // end if rc = FAPI_ATTR_GET ( ATTR_PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE , &i_target, ATTR_PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE_value ); - if (rc) - { - FAPI_ERR("fapi_attr_get( ATTR_PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapi_attr_get( ATTR_PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE ) failed. With rc = 0x%x", (uint32_t)rc); + break; } // end if - rc = FAPI_ATTR_GET ( ATTR_PM_PBAX_SND_RETRY_THRESHOLD , &i_target, ATTR_PM_PBAX_SND_RETRY_THRESHOLD_value ); - if (rc) - { - FAPI_ERR("fapi_attr_get( ATTR_PM_PBAX_SND_RETRY_THRESHOLD ) failed. With rc = 0x%x", (uint32_t)rc); - break; + rc = FAPI_ATTR_GET ( ATTR_PM_PBAX_SND_RETRY_THRESHOLD , &i_target, ATTR_PM_PBAX_SND_RETRY_THRESHOLD_value ); + if (rc) + { + FAPI_ERR("fapi_attr_get( ATTR_PM_PBAX_SND_RETRY_THRESHOLD ) failed. With rc = 0x%x", (uint32_t)rc); + break; } // end if - rc = FAPI_ATTR_GET ( ATTR_PM_PBAX_SND_RESERV_TIMEOUT , &i_target, ATTR_PM_PBAX_SND_RESERV_TIMEOUT_value ); - if (rc) - { - FAPI_ERR("fapi_attr_get( ATTR_PM_PBAX_SND_RESERV_TIMEOUT ) failed. With rc = 0x%x", (uint32_t)rc); - break; + rc = FAPI_ATTR_GET ( ATTR_PM_PBAX_SND_RESERV_TIMEOUT , &i_target, ATTR_PM_PBAX_SND_RESERV_TIMEOUT_value ); + if (rc) + { + FAPI_ERR("fapi_attr_get( ATTR_PM_PBAX_SND_RESERV_TIMEOUT ) failed. With rc = 0x%x", (uint32_t)rc); + break; } // end if - - - + + + // assemble the attributes // 20:24, ATTR_PM_PBAX_RCV_RESERV_TIMEOUT_value // 27; ATTR_PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE_value @@ -477,27 +510,26 @@ p8_pba_init_PM_INIT(const Target& i_target) pbaxcfg_setup.fields.ATTR_PM_PBAX_SND_RESERV_TIMEOUT = ATTR_PM_PBAX_SND_RESERV_TIMEOUT_value; // put the attribute values into PBAXCFG - l_rc = data.setDoubleWord(0, pbaxcfg_setup.value); - if (l_rc) - { - FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc); - rc.setEcmdError(l_rc); - break; - } // end if + l_rc = data.setDoubleWord(0, pbaxcfg_setup.value); + if (l_rc) + { + rc.setEcmdError(l_rc); + break; + } rc = fapiPutScom(i_target, PBAXCFG_00064021 , data); - if (rc) - { - FAPI_ERR("fapiPutScom(PBAXCFG_00064021) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom(PBAXCFG_00064021) failed. With rc = 0x%x", (uint32_t)rc); + break; } // last step: pba slave setup for init rc = pba_slave_setup_init (i_target); - if (rc) - { - FAPI_ERR("fapi pba_slave_setup_init failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapi pba_slave_setup_init failed. With rc = 0x%x", (uint32_t)rc); + break; } } while(0); @@ -505,32 +537,24 @@ p8_pba_init_PM_INIT(const Target& i_target) } // end PM_INIT - + // ************************************************************************************************* // ************************************************************* mode = PM_CONFIG ****************** -// +// /// Configuration: perform translation of any Platform Attributes into /// Feature Attributes that are applied during Initalization of PBAX fapi::ReturnCode p8_pba_init_PM_CONFIG(const Target& i_target) { fapi::ReturnCode rc; - ecmdDataBufferBase data(64); - uint32_t l_rc; // local returncode + FAPI_INF("mode = PM_CONFIG..."); - l_rc = data.setDoubleWord(0, 0x0); - if (l_rc) - { - FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc); - rc.setEcmdError(l_rc); - return rc; - } - - FAPI_INF("PBAX configuration..."); - FAPI_INF("Getting PBAX configuration values via attribute settings."); + FAPI_INF("PBAX configuration..."); + FAPI_INF("TODO: Getting PBAX configuration values via attribute settings."); + return rc; -}; +}; // ************************************************************************************************ @@ -602,32 +626,31 @@ pba_slave_setup_init(const Target& i_target) pm.fields.pba_region = PBA_OCI_REGION; pm.fields.bcde_ocitrans = PBA_BCE_OCI_TRANSACTION_64_BYTES; pm.fields.bcue_ocitrans = PBA_BCE_OCI_TRANSACTION_64_BYTES; - pm.fields.en_marker_ack = 1; + pm.fields.en_marker_ack = 1; pm.fields.oci_marker_space = (PBA_OCI_MARKER_BASE >> 16) & 0x7; - pm.fields.en_slave_fairness = 1; - pm.fields.dis_slvmatch_order = 1; + pm.fields.en_slave_fairness = 1; + pm.fields.dis_slvmatch_order = 1; pm.fields.en_second_wrbuf = 1; l_rc = data.setDoubleWord(0, pm.value); - if (l_rc) - { - FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc); - rc.setEcmdError(l_rc); - return rc; + if (l_rc) + { + rc.setEcmdError(l_rc); + return rc; } // write the prepared value rc = fapiPutScom(i_target, PBA_MODE_0x00064000 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_MODE_0x00064000 ) failed. With rc = 0x%x", (uint32_t)rc); - return rc; - } + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_MODE_0x00064000 ) failed. With rc = 0x%x", (uint32_t)rc); + return rc; + } // Slave 0 (PORE-GPE). This is a read/write slave. We only do 'static' // setup here. Dynamic setup will be done by each GPE program that needs // to access mainstore, before issuing any trasactions targeting the PBA - // bridge. + // bridge. // pba_slave_reset(PBA_SLAVE_PORE_GPE); ps.value = 0; @@ -639,18 +662,18 @@ pba_slave_setup_init(const Target& i_target) ps.fields.buf_alloc_c = 1; ps.fields.buf_alloc_w = 1; l_rc = data.setDoubleWord(0, ps.value); - if (l_rc) - { - FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc); rc.setEcmdError(l_rc); - return rc; - } // end if - + if (l_rc) + { + FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc); rc.setEcmdError(l_rc); + return rc; + } // end if + rc = fapiPutScom(i_target, PBA_SLVCTL0_0x00064004 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_SLVCTL0_0x00064004 ) failed. With rc = 0x%x", (uint32_t)rc); - return rc; - } + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_SLVCTL0_0x00064004 ) failed. With rc = 0x%x", (uint32_t)rc); + return rc; + } // Slave 1 (405 ICU/DCU). This is a read/write slave. Write gethering is // allowed, but with the shortest possible timeout. This slave is @@ -669,22 +692,25 @@ pba_slave_setup_init(const Target& i_target) ps.fields.buf_alloc_b = 1; ps.fields.buf_alloc_c = 1; ps.fields.buf_alloc_w = 1; - + l_rc = data.setDoubleWord(0, ps.value); - if (l_rc) - { - FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc); - rc.setEcmdError(l_rc); - return rc; - } // end if - + if (l_rc) + { + FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc); + rc.setEcmdError(l_rc); + return rc; + } // end if + rc = fapiPutScom(i_target, PBA_SLVCTL1_0x00064005 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_SLVCTL1_0x00064005 ) failed. With rc = 0x%x", (uint32_t)rc); - return rc; - } - + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_SLVCTL1_0x00064005 ) failed. With rc = 0x%x", (uint32_t)rc); + return rc; + } + +/* Removed as this is done by p8_set_port_bar.C for the SLW-used path + through the PBA + // Slave 2 (PORE-SLW). This is a read/write slave. Write gathering is // allowed, but with the shortest possible timeout. The slave is set up // to allow normal reads and writes at initialization. The 24x7 code may @@ -705,19 +731,20 @@ pba_slave_setup_init(const Target& i_target) ps.fields.buf_alloc_c = 1; ps.fields.buf_alloc_w = 1; l_rc = data.setDoubleWord(0, ps.value); - if (l_rc) - { - FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc); - rc.setEcmdError(l_rc); - return rc; - } // end if - + if (l_rc) + { + FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc); + rc.setEcmdError(l_rc); + return rc; + } // end if + rc = fapiPutScom(i_target, PBA_SLVCTL2_0x00064006 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_SLVCTL2_0x00064006 ) failed. With rc = 0x%x", (uint32_t)rc); - return rc; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_SLVCTL2_0x00064006 ) failed. With rc = 0x%x", (uint32_t)rc); + return rc; } +*/ // Slave 3 (OCB). This is a read/write slave. Write gathering is // allowed, but with the shortest possible timeout. @@ -735,17 +762,17 @@ pba_slave_setup_init(const Target& i_target) ps.fields.buf_alloc_b = 1; ps.fields.buf_alloc_c = 1; ps.fields.buf_alloc_w = 1; - + l_rc = data.setDoubleWord(0, ps.value); - if (l_rc) - { - FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc); rc.setEcmdError(l_rc); return rc; + if (l_rc) + { + FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc); rc.setEcmdError(l_rc); return rc; } // end if - + rc = fapiPutScom(i_target, PBA_SLVCTL3_0x00064007 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_SLVCTL3_0x00064007 ) failed. With rc = 0x%x", (uint32_t)rc); return rc; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_SLVCTL3_0x00064007 ) failed. With rc = 0x%x", (uint32_t)rc); return rc; } return rc; @@ -765,48 +792,51 @@ pba_slave_setup_reset(const Target& i_target) do { l_rc= data.setDoubleWord(0, 0x00000000); - if (l_rc) - { + if (l_rc) + { FAPI_ERR("data.setDoubleWord ( ) failed. With rc = 0x%x", (uint32_t)l_rc); - rc.setEcmdError(l_rc); - break; - } // end if + rc.setEcmdError(l_rc); + break; + } // end if rc = fapiPutScom(i_target, PBA_MODE_0x00064000 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_MODE_0x00064000 ) failed. With rc = 0x%x", (uint32_t)rc); - break; - } + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_MODE_0x00064000 ) failed. With rc = 0x%x", (uint32_t)rc); + break; + } rc = fapiPutScom(i_target, PBA_SLVCTL0_0x00064004 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_SLVCTL0_0x00064004 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_SLVCTL0_0x00064004 ) failed. With rc = 0x%x", (uint32_t)rc); + break; } rc = fapiPutScom(i_target, PBA_SLVCTL1_0x00064005 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_SLVCTL1_0x00064005 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_SLVCTL1_0x00064005 ) failed. With rc = 0x%x", (uint32_t)rc); + break; } +/* Removed as this is done by p8_set_port_bar.C for the SLW used path + through the PBA + rc = fapiPutScom(i_target, PBA_SLVCTL2_0x00064006 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_SLVCTL2_0x00064006 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_SLVCTL2_0x00064006 ) failed. With rc = 0x%x", (uint32_t)rc); + break; } - +*/ rc = fapiPutScom(i_target, PBA_SLVCTL3_0x00064007 , data); - if (rc) - { - FAPI_ERR("fapiPutScom( PBA_SLVCTL3_0x00064007 ) failed. With rc = 0x%x", (uint32_t)rc); - break; + if (rc) + { + FAPI_ERR("fapiPutScom( PBA_SLVCTL3_0x00064007 ) failed. With rc = 0x%x", (uint32_t)rc); + break; } } while(0); - + return rc; } // end pba_slave_setup_reset @@ -822,77 +852,92 @@ pba_slave_reset(const Target& i_target) { fapi::ReturnCode rc; ecmdDataBufferBase data(64); - bool error_flag = false; bool poll_failure = false; + uint32_t p; + - do - { + { for (int s=0; s<= 3; s++) - { - + { + + // Skip Slave 2 has this is handled in p8_set_pore_bars.C as part + // of the SLW setup + if (s == 2) + { + continue; + } + FAPI_INF("Reseting PBA Slave %x", s); poll_failure = true; - // for (int p=0; p l_exChiplets; - - - // ****************************************************************** - // PCBS_PM - // ****************************************************************** - - FAPI_INF("Executing: p8_pcbs_init.C in mode %x", mode); - - if ( i_target.getType() != TARGET_TYPE_NONE ) - { - FAPI_EXEC_HWP(l_fapi_rc, p8_pcbs_init, i_target, mode); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed PCBS_PM result"); - return l_fapi_rc; - } - } - - - if ( i_target2.getType() != TARGET_TYPE_NONE ) - { - FAPI_EXEC_HWP(l_fapi_rc, p8_pcbs_init, i_target2, mode); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed PCBS_PM result"); - return l_fapi_rc; - } - } - // ****************************************************************** - // PMC - // ****************************************************************** - - FAPI_INF("Executing: p8_pmc_init in mode %x", mode); - - FAPI_EXEC_HWP(l_fapi_rc, p8_pmc_init, i_target, i_target2, mode); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed PMC result"); - return l_fapi_rc; - } - - // ****************************************************************** - // PORE Sleep/Winkle engine - // ****************************************************************** - - FAPI_INF("Executing: p8_poreslw_init in mode %x", mode); - if ( i_target.getType() != TARGET_TYPE_NONE ) - { - FAPI_EXEC_HWP(l_fapi_rc, p8_poreslw_init, i_target, mode); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed PORE SLW result"); - return l_fapi_rc; - } - } - - if ( i_target2.getType() != TARGET_TYPE_NONE ) - { - FAPI_EXEC_HWP(l_fapi_rc, p8_poreslw_init, i_target2, mode); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed PORE SLW result"); - return l_fapi_rc; - } - } - // ****************************************************************** - // PORE General Purpose Engines - // ****************************************************************** - - FAPI_INF("Executing: p8_poregpe_init in mode %x", mode); - - if ( i_target.getType() != TARGET_TYPE_NONE ) - { - FAPI_EXEC_HWP(l_fapi_rc, p8_poregpe_init, i_target, mode , GPEALL); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed PORE GPE result"); - return l_fapi_rc; - } - - } - - if ( i_target2.getType() != TARGET_TYPE_NONE ) - { - FAPI_EXEC_HWP(l_fapi_rc, p8_poregpe_init, i_target2, mode , GPEALL); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed PORE GPE result"); - return l_fapi_rc; - } - - } - // ****************************************************************** - // OHA - // ****************************************************************** - - FAPI_INF("Executing: p8_oha_init in mode %x", mode); - - if ( i_target.getType() != TARGET_TYPE_NONE ) - { - FAPI_EXEC_HWP(l_fapi_rc, p8_oha_init, i_target, mode); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed OHA result"); - return l_fapi_rc; - } - } - - if ( i_target2.getType() != TARGET_TYPE_NONE ) - { - FAPI_EXEC_HWP(l_fapi_rc, p8_oha_init, i_target2, mode); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed OHA result"); - return l_fapi_rc; - } - } - - // ****************************************************************** - // OCC-SRAM - // ****************************************************************** - - - FAPI_INF("Executing: p8_occ_sram_init in mode %x", mode); - - if ( i_target.getType() != TARGET_TYPE_NONE ) - { - FAPI_EXEC_HWP(l_fapi_rc, p8_occ_sram_init, i_target, mode ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed OCC-SRAM result"); - return l_fapi_rc; - } - } - - if ( i_target2.getType() != TARGET_TYPE_NONE ) - { - FAPI_EXEC_HWP(l_fapi_rc, p8_occ_sram_init, i_target2, mode ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed OCC-SRAM result"); - return l_fapi_rc; - } - } - - // ****************************************************************** - // OCB - // ****************************************************************** - - FAPI_INF("Executing: p8_ocb_init in mode %x", mode); - if ( i_target.getType() != TARGET_TYPE_NONE ) - { - - FAPI_EXEC_HWP(l_fapi_rc, p8_ocb_init, i_target, mode,OCB_CHAN0,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 0"); - return l_fapi_rc; - } - - FAPI_EXEC_HWP(l_fapi_rc, p8_ocb_init, i_target, mode,OCB_CHAN1,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 1"); - return l_fapi_rc; - } - - FAPI_EXEC_HWP(l_fapi_rc, p8_ocb_init, i_target, mode,OCB_CHAN2,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 2"); - return l_fapi_rc; - } - - FAPI_EXEC_HWP(l_fapi_rc, p8_ocb_init, i_target, mode,OCB_CHAN3,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 0"); - return l_fapi_rc; - } - - } - - if ( i_target2.getType() != TARGET_TYPE_NONE ) - { - - - FAPI_EXEC_HWP(l_fapi_rc, p8_ocb_init, i_target2, mode,OCB_CHAN0,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 0"); - return l_fapi_rc; - } - - FAPI_EXEC_HWP(l_fapi_rc, p8_ocb_init, i_target2, mode,OCB_CHAN1,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 1"); - return l_fapi_rc; - } - - FAPI_EXEC_HWP(l_fapi_rc, p8_ocb_init, i_target2, mode,OCB_CHAN2,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 2"); - return l_fapi_rc; - } - - FAPI_EXEC_HWP(l_fapi_rc, p8_ocb_init, i_target2, mode,OCB_CHAN3,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 0"); - return l_fapi_rc; - } - - } - - - // ****************************************************************** - // PSS - // ****************************************************************** - - FAPI_INF("Executing:p8_pss_init in mode %x", mode); - - if ( i_target.getType() != TARGET_TYPE_NONE ) - { - - FAPI_EXEC_HWP(l_fapi_rc, p8_pss_init, i_target, mode ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed PSS result"); - return l_fapi_rc; - } - } - - if ( i_target2.getType() != TARGET_TYPE_NONE ) - { - FAPI_EXEC_HWP(l_fapi_rc, p8_pss_init, i_target2, mode ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed PSS result"); - return l_fapi_rc; - } - } - - // ****************************************************************** - // PBA - // ****************************************************************** - - FAPI_INF("Executing: p8_pba_init in mode %x", mode); - if ( i_target.getType() != TARGET_TYPE_NONE ) - { - FAPI_EXEC_HWP(l_fapi_rc, p8_pba_init, i_target, mode ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed PBA result"); - return l_fapi_rc; - } - } - - if ( i_target2.getType() != TARGET_TYPE_NONE ) - { - FAPI_EXEC_HWP(l_fapi_rc, p8_pba_init, i_target2, mode ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_init detected failed PBA result"); - return l_fapi_rc; - } - } - - - - - - - // loop over all the core chiplets - - if (mode == PM_INIT) - { - - - - // ****************************************************************** - // FIRINIT - // ****************************************************************** - - - FAPI_INF("Executing:p8_pm_firinit in mode %x", mode); - - if ( i_target.getType() != TARGET_TYPE_NONE ) - { - - FAPI_EXEC_HWP(l_fapi_rc, p8_pm_firinit, i_target , mode ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_firinit detected failed result"); - return l_fapi_rc; - } - } - - if ( i_target2.getType() != TARGET_TYPE_NONE ) - { - - FAPI_EXEC_HWP(l_fapi_rc, p8_pm_firinit, i_target2 , mode ); - if (l_fapi_rc) - { - FAPI_ERR("ERROR: p8_pm_firinit detected failed result"); - return l_fapi_rc; - } - } - - - // ****************************************************************** - // CPU_SPECIAL_WAKEUP switch off - // ****************************************************************** - - - if ( i_target.getType() != TARGET_TYPE_NONE ) - { - l_fapi_rc = fapiGetChildChiplets ( i_target, - TARGET_TYPE_EX_CHIPLET, - l_exChiplets, - TARGET_STATE_PRESENT); - if (l_fapi_rc) - { - FAPI_ERR("Error from fapiGetChildChiplets!"); - return l_fapi_rc; - } - - FAPI_DBG("\tChiplet vector size => %u ", l_exChiplets.size()); - - // Iterate through the returned chiplets - for (uint8_t j=0; j < l_exChiplets.size(); j++) - { - - // Determine if it's functional - l_fapi_rc = FAPI_ATTR_GET( ATTR_FUNCTIONAL, - &l_exChiplets[j], - l_functional); - if (l_fapi_rc) - { - FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error"); - break; - } - - if ( l_functional ) - { - // The ex is functional let's build the SCOM address - l_fapi_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number); - FAPI_DBG("Running special wakeup on ex chiplet %d ", l_ex_number); - - // Set special wakeup for EX - // Commented due to attribute errors - SP_WKUP_REG_ADDRS = PM_SPECIAL_WKUP_OCC_0x100F010C + (l_ex_number * 0x01000000) ; - l_fapi_rc=fapiGetScom(i_target, SP_WKUP_REG_ADDRS , data); if(l_fapi_rc) return l_fapi_rc; - FAPI_DBG(" Before clear of SPWKUP_REG PM_SPECIAL_WKUP_OCC_(0x%08llx) => =>0x%16llx", SP_WKUP_REG_ADDRS, data.getDoubleWord(0)); - - if (data.isBitSet(0)) - { - // FAPI_EXEC_HWP(l_fapi_rc, p8_cpu_special_wakeup, l_exChiplets[j], SPCWKUP_DISABLE , HOST); - l_fapi_rc = fapiSpecialWakeup(l_exChiplets[j], false); - if (l_fapi_rc) { FAPI_ERR("p8_cpu_special_wakeup: Failed to put CORE into special wakeup. With rc = 0x%x", (uint32_t)l_fapi_rc); return l_fapi_rc; } - - - } - } - } // chiplet loop - - } - ///////////////////////////////////////////// SLAVE TARGET ///////////////////////////////////////////////// - - - if ( i_target2.getType() != TARGET_TYPE_NONE ) - { - l_fapi_rc = fapiGetChildChiplets ( i_target2, - TARGET_TYPE_EX_CHIPLET, - l_exChiplets, - TARGET_STATE_PRESENT); - if (l_fapi_rc) - { - FAPI_ERR("Error from fapiGetChildChiplets!"); - return l_fapi_rc; - } - - FAPI_DBG("\tChiplet vector size => %u ", l_exChiplets.size()); - - // Iterate through the returned chiplets - for (uint8_t j=0; j < l_exChiplets.size(); j++) - { - - // Determine if it's functional - l_fapi_rc = FAPI_ATTR_GET( ATTR_FUNCTIONAL, - &l_exChiplets[j], - l_functional); - if (l_fapi_rc) - { - FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error"); - break; - } - - if ( l_functional ) - { - // The ex is functional let's build the SCOM address - l_fapi_rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number); - FAPI_DBG("Running special wakeup on ex chiplet %d ", l_ex_number); - - // Set special wakeup for EX - // Commented due to attribute errors - SP_WKUP_REG_ADDRS = PM_SPECIAL_WKUP_OCC_0x100F010C + (l_ex_number * 0x01000000) ; - l_fapi_rc=fapiGetScom(i_target2, SP_WKUP_REG_ADDRS , data); if(l_fapi_rc) return l_fapi_rc; - FAPI_DBG(" Before clear of SPWKUP_REG PM_SPECIAL_WKUP_OCC_(0x%08llx) => =>0x%16llx", SP_WKUP_REG_ADDRS, data.getDoubleWord(0)); - - if (data.isBitSet(0)) - { - // FAPI_EXEC_HWP(l_fapi_rc, p8_cpu_special_wakeup, l_exChiplets[j], SPCWKUP_DISABLE , HOST); - l_fapi_rc = fapiSpecialWakeup(l_exChiplets[j], false); - if (l_fapi_rc) { FAPI_ERR("p8_cpu_special_wakeup: Failed to put CORE into special wakeup. With rc = 0x%x", (uint32_t)l_fapi_rc); return l_fapi_rc; } - - - } - } - } // chiplet loop - } - - - - - - } - return l_fapi_rc; - -} + std::vector l_exChiplets; + FAPI_INF("Executing p8_pm_list in mode %x start", mode); + + do + { + if (mode == PM_RESET_SOFT || mode == PM_RESET) + { + effective_mode = PM_RESET; + FAPI_DBG("A Reset mode is detected. Setting effective reset for non-PMC procedures to PM_RESET (mode %x)", + effective_mode); + } + else + { + effective_mode = mode; + } + + + // ****************************************************************** + // PCBS_PM + // ****************************************************************** + + FAPI_INF("Executing: p8_pcbs_init.C in mode %x", mode); + + if ( i_target.getType() != TARGET_TYPE_NONE ) + { + FAPI_EXEC_HWP(rc, p8_pcbs_init, i_target, effective_mode); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed PCBS_PM result"); + break; + } + } + + + if ( i_target2.getType() != TARGET_TYPE_NONE ) + { + FAPI_EXEC_HWP(rc, p8_pcbs_init, i_target2, effective_mode); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed PCBS_PM result"); + break; + } + } + // ****************************************************************** + // PMC + // ****************************************************************** + + FAPI_INF("Executing: p8_pmc_init in mode %x", mode); + + FAPI_EXEC_HWP(rc, p8_pmc_init, i_target, i_target2, mode); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed PMC result"); + break; + } + + // ****************************************************************** + // PORE Sleep/Winkle engine + // ****************************************************************** + + // Run SLW for hard reset and hard init and any config. So as to not + // touch the hardware, skip for soft reset and soft init. + if (!(mode == PM_INIT_SOFT || mode == PM_RESET_SOFT )) + { + FAPI_INF("Executing: p8_poreslw_init in mode %x", mode); + if ( i_target.getType() != TARGET_TYPE_NONE ) + { + FAPI_EXEC_HWP(rc, p8_poreslw_init, i_target, mode); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed PORE SLW result"); + break; + } + } + + if ( i_target2.getType() != TARGET_TYPE_NONE ) + { + FAPI_EXEC_HWP(rc, p8_poreslw_init, i_target2, mode); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed PORE SLW result"); + break; + } + } + } + else + { + FAPI_INF("Skipping p8_poreslw_init for mode %x - either soft init or soft reset", mode); + } + // ****************************************************************** + // PORE General Purpose Engines + // ****************************************************************** + + FAPI_INF("Executing: p8_poregpe_init in mode %x", effective_mode); + + if ( i_target.getType() != TARGET_TYPE_NONE ) + { + FAPI_EXEC_HWP(rc, p8_poregpe_init, i_target, effective_mode , GPEALL); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed PORE GPE result"); + break; + } + } + + if ( i_target2.getType() != TARGET_TYPE_NONE ) + { + FAPI_EXEC_HWP(rc, p8_poregpe_init, i_target2, effective_mode , GPEALL); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed PORE GPE result"); + break; + } + } + // ****************************************************************** + // OHA + // ****************************************************************** + + FAPI_INF("Executing: p8_oha_init in mode %x", effective_mode); + + if ( i_target.getType() != TARGET_TYPE_NONE ) + { + FAPI_EXEC_HWP(rc, p8_oha_init, i_target, effective_mode); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed OHA result"); + break; + } + } + + if ( i_target2.getType() != TARGET_TYPE_NONE ) + { + FAPI_EXEC_HWP(rc, p8_oha_init, i_target2, effective_mode); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed OHA result"); + break; + } + } + + // ****************************************************************** + // OCC-SRAM + // ****************************************************************** + + + FAPI_INF("Executing: p8_occ_sram_init in mode %x", effective_mode); + + if ( i_target.getType() != TARGET_TYPE_NONE ) + { + FAPI_EXEC_HWP(rc, p8_occ_sram_init, i_target, effective_mode ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed OCC-SRAM result"); + break; + } + } + + if ( i_target2.getType() != TARGET_TYPE_NONE ) + { + FAPI_EXEC_HWP(rc, p8_occ_sram_init, i_target2, effective_mode ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed OCC-SRAM result"); + break; + } + } + + // ****************************************************************** + // OCB + // ****************************************************************** + + FAPI_INF("Executing: p8_ocb_init in mode %x", effective_mode); + if ( i_target.getType() != TARGET_TYPE_NONE ) + { + + FAPI_EXEC_HWP(rc, p8_ocb_init, i_target, effective_mode,OCB_CHAN0,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 0"); + break; + } + + FAPI_EXEC_HWP(rc, p8_ocb_init, i_target, effective_mode,OCB_CHAN1,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 1"); + break; + } + + FAPI_EXEC_HWP(rc, p8_ocb_init, i_target, effective_mode,OCB_CHAN2,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 2"); + break; + } + + FAPI_EXEC_HWP(rc, p8_ocb_init, i_target, effective_mode,OCB_CHAN3,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 0"); + break; + } + + } + + if ( i_target2.getType() != TARGET_TYPE_NONE ) + { + + + FAPI_EXEC_HWP(rc, p8_ocb_init, i_target2, effective_mode,OCB_CHAN0,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 0"); + break; + } + + FAPI_EXEC_HWP(rc, p8_ocb_init, i_target2, effective_mode,OCB_CHAN1,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 1"); + break; + } + + FAPI_EXEC_HWP(rc, p8_ocb_init, i_target2, effective_mode,OCB_CHAN2,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 2"); + break; + } + + FAPI_EXEC_HWP(rc, p8_ocb_init, i_target2, effective_mode,OCB_CHAN3,OCB_TYPE_NULL, 0x10000000, 1 , OCB_Q_OUFLOW_EN , OCB_Q_ITPTYPE_NOTFULL ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed OCB result on channel 0"); + break; + } + } + + + // ****************************************************************** + // PSS + // ****************************************************************** + + FAPI_INF("Executing:p8_pss_init in effective_mode %x", effective_mode); + + if ( i_target.getType() != TARGET_TYPE_NONE ) + { + + FAPI_EXEC_HWP(rc, p8_pss_init, i_target, effective_mode ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed PSS result"); + break; + } + } + + if ( i_target2.getType() != TARGET_TYPE_NONE ) + { + FAPI_EXEC_HWP(rc, p8_pss_init, i_target2, effective_mode ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed PSS result"); + break; + } + } + + // ****************************************************************** + // PBA + // ****************************************************************** + + FAPI_INF("Executing: p8_pba_init in effective_mode %x", effective_mode); + if ( i_target.getType() != TARGET_TYPE_NONE ) + { + FAPI_EXEC_HWP(rc, p8_pba_init, i_target, effective_mode ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed PBA result"); + break; + } + } + + if ( i_target2.getType() != TARGET_TYPE_NONE ) + { + FAPI_EXEC_HWP(rc, p8_pba_init, i_target2, effective_mode ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_init detected failed PBA result"); + break; + } + } + + if (effective_mode == PM_INIT) + { + // ****************************************************************** + // FIRINIT + // ****************************************************************** + + + FAPI_INF("Executing:p8_pm_firinit in effective_mode %x", mode); + + if ( i_target.getType() != TARGET_TYPE_NONE ) + { + + FAPI_EXEC_HWP(rc, p8_pm_firinit, i_target , mode ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_firinit detected failed result"); + break; + } + } + + if ( i_target2.getType() != TARGET_TYPE_NONE ) + { + + FAPI_EXEC_HWP(rc, p8_pm_firinit, i_target2 , mode ); + if (rc) + { + FAPI_ERR("ERROR: p8_pm_firinit detected failed result"); + break; + } + } + + // ****************************************************************** + // CPU_SPECIAL_WAKEUP switch off + // ****************************************************************** + + if ( i_target.getType() != TARGET_TYPE_NONE ) + { + rc = fapiGetChildChiplets ( i_target, + TARGET_TYPE_EX_CHIPLET, + l_exChiplets, + TARGET_STATE_FUNCTIONAL); + if (rc) + { + FAPI_ERR("Error from fapiGetChildChiplets!"); + break; + } + + FAPI_DBG("\tChiplet vector size => %u ", l_exChiplets.size()); + + // Iterate through the returned chiplets + for (uint8_t j=0; j < l_exChiplets.size(); j++) + { + + // Build the SCOM address + rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number); + FAPI_DBG("Running special wakeup on ex chiplet %d ", l_ex_number); + + // Set special wakeup for EX + // Commented due to attribute errors + SP_WKUP_REG_ADDRS = PM_SPECIAL_WKUP_OCC_0x100F010C + (l_ex_number * 0x01000000) ; + rc=fapiGetScom(i_target, SP_WKUP_REG_ADDRS , data); + if(rc) + { + break; + } + FAPI_DBG(" Before clear of SPWKUP_REG PM_SPECIAL_WKUP_OCC_(0x%08llx) => =>0x%16llx", SP_WKUP_REG_ADDRS, data.getDoubleWord(0)); + + if (data.isBitSet(0)) + { + rc = fapiSpecialWakeup(l_exChiplets[j], false); + if (rc) + { + FAPI_ERR("p8_cpu_special_wakeup: Failed to put CORE into special wakeup. With rc = 0x%x", (uint32_t)rc); + break; + } + } + } // chiplet loop + if (!rc.ok()) + { + break; + } + } // Master target + + ///////////////////////////////////////////// SLAVE TARGET ///////////////////////////////////////////////// + + + if ( i_target2.getType() != TARGET_TYPE_NONE ) + { + rc = fapiGetChildChiplets ( i_target2, + TARGET_TYPE_EX_CHIPLET, + l_exChiplets, + TARGET_STATE_FUNCTIONAL); + if (rc) + { + FAPI_ERR("Error from fapiGetChildChiplets!"); + break; + } + + FAPI_DBG("\tChiplet vector size => %u ", l_exChiplets.size()); + + // Iterate through the returned chiplets + for (uint8_t j=0; j < l_exChiplets.size(); j++) + { + + // Build the SCOM address + rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number); + if (rc) + { + FAPI_ERR("Error from ATTR_GET for chip position!"); + break; + } + FAPI_DBG("Running special wakeup on ex chiplet %d ", l_ex_number); + + // Set special wakeup for EX + // Commented due to attribute errors + SP_WKUP_REG_ADDRS = PM_SPECIAL_WKUP_OCC_0x100F010C + (l_ex_number * 0x01000000) ; + rc=fapiGetScom(i_target2, SP_WKUP_REG_ADDRS , data); + if(rc) + { + FAPI_ERR("Error from GetScom of OCC SPWKUP"); + break; + } + FAPI_DBG(" Before clear of SPWKUP_REG PM_SPECIAL_WKUP_OCC_(0x%08llx) => =>0x%16llx", SP_WKUP_REG_ADDRS, data.getDoubleWord(0)); + + if (data.isBitSet(0)) + { + rc = fapiSpecialWakeup(l_exChiplets[j], false); + if (rc) + { + FAPI_ERR("p8_cpu_special_wakeup: Failed to put CORE into special wakeup. With rc = 0x%x", (uint32_t)rc); + break; + } + } + } // chiplet loop + if (!rc.ok()) + { + break; + } + } // Slave target + } // PM_INIT special stuff + } while(0); + + FAPI_INF("Executing p8_pm_list in mode %x end", mode); + + return rc; + +} - //#ifdef FAPIECMD } //end extern C -//#endif + diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C index 969fa15e7..642b05ef2 100755 --- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C +++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_pm_pcbs_firinit.C,v 1.10 2013/04/01 04:25:41 stillgs Exp $ +// $Id: p8_pm_pcbs_firinit.C,v 1.11 2013/08/02 19:08:41 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pcbs_firinit.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -137,37 +137,27 @@ p8_pm_pcbs_firinit(const fapi::Target &i_target , uint32_t mode ) for (uint8_t c=0; c< l_exChiplets.size(); c++) { - rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &l_exChiplets[c], l_functional); + + rc = FAPI_ATTR_GET( ATTR_CHIP_UNIT_POS, + &l_exChiplets[c], + l_ex_number); if (rc) { - FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL with rc = 0x%x", (uint32_t)rc); - break; + FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS with rc = 0x%x", (uint32_t)rc); + break; } - if (l_functional) + FAPI_DBG("Core number = %d", l_ex_number); + // Use the l_ex_number to build the SCOM address; + rc = fapiPutScom( i_target, + EX_PMErrMask_REG_0x100F010A + + (l_ex_number * 0x01000000), + mask ); + if (rc) { - // The ex is functional let's build the SCOM address - rc = FAPI_ATTR_GET( ATTR_CHIP_UNIT_POS, - &l_exChiplets[c], - l_ex_number); - if (rc) - { - FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS with rc = 0x%x", (uint32_t)rc); - break; - } - - FAPI_DBG("Core number = %d", l_ex_number); - // Use the l_ex_number to build the SCOM address; - rc = fapiPutScom( i_target, - EX_PMErrMask_REG_0x100F010A + - (l_ex_number * 0x01000000), - mask ); - if (rc) - { - FAPI_ERR("fapiPutScom(EX_PMErrMask_REG_0x100F010A) failed."); - break; - } - } // Functional + FAPI_ERR("fapiPutScom(EX_PMErrMask_REG_0x100F010A) failed."); + break; + } } // Chiplet loop } else diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C index ab9c24044..94cda8525 100755 --- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C +++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_pm_pmc_firinit.C,v 1.13 2013/04/12 01:17:27 stillgs Exp $ +// $Id: p8_pm_pmc_firinit.C,v 1.14 2013/08/02 19:19:40 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pmc_firinit.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -150,6 +150,7 @@ p8_pm_pmc_firinit(const fapi::Target& i_target , uint32_t mode ) { if (mode == PM_RESET) { + FAPI_INF("Hard reset detected. Full PMC LFIR is masked"); e_rc = mask.flushTo0(); e_rc |= mask.setBit(0,PMC_FIR_REGISTER_LENGTH); if (e_rc) @@ -168,6 +169,39 @@ p8_pm_pmc_firinit(const fapi::Target& i_target , uint32_t mode ) break; } } + else if (mode == PM_RESET_SOFT) + { + FAPI_INF("Soft reset detected. Only non-idle PMC LFIR bits are masked"); + // Only mask the bits that that do not deal with SLW + rc = fapiGetScom(i_target, PMC_LFIR_MASK_0x01010843, mask ); + if (rc) + { + FAPI_ERR("fapiGetScom(PMC_LFIR_MASK_0x01010843) failed."); + break; + } + + // The following is done to keep SIMICS model from complaining about + // setting non-implemented bits. + + e_rc |= mask.setBit(0,IDLE_PORESW_FATAL_ERR); + e_rc |= mask.setBit(IDLE_INTERNAL_ERR+1, + PMC_FIR_REGISTER_LENGTH-IDLE_INTERNAL_ERR); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } + + //--****************************************************************************** + //-- PMC_FIR_MASK (W0_OR_45) (WR_43) (WO_AND_44) + //--****************************************************************************** + rc = fapiPutScom(i_target, PMC_LFIR_MASK_0x01010843, mask ); + if (rc) + { + FAPI_ERR("fapiPutScom(PMC_LFIR_MASK_0x01010843) failed."); + break; + } + } else { e_rc |= fir.flushTo0(); diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C index 9882bf2aa..7e5c6e518 100644 --- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C +++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_pm_prep_for_reset.C,v 1.20 2013/06/20 12:56:24 pchatnah Exp $ +// $Id: p8_pm_prep_for_reset.C,v 1.21 2013/08/02 19:12:40 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_prep_for_reset.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -37,8 +37,6 @@ // *! //------------------------------------------------------------------------------ /// -/// -/// /// \version -------------------------------------------------------------------------- /// \version 1.5 rmaier 09/19/12 Added review feedback /// \version -------------------------------------------------------------------------- @@ -58,74 +56,41 @@ /// High-level procedure flow: /// /// \verbatim -/// -/// /// - call p8_occ_control.C *chiptarget, ENUM:OCC_STOP ppc405_reset_ctrl = 2 /// - OCC PPC405 put into reset /// - PMC moves to Vsafe value due to heartbeat loss /// -/// - evaluate RC -/// /// - call p8_cpu_special_wakeup.C *chiptarget, ENUM:OCC_SPECIAL_WAKEUP /// - For each chiplet, put into Special Wake-up via the OCC special wake-up bit /// -/// - evaluate RC -/// /// - call p8_pmc_force_vsafe.C *chiptarget, /// - Forces the Vsafe value into the voltage controller /// -/// - evaluate RC -/// /// - call p8_pcbs_init.C *chiptarget, ENUM:PCBSPM_RESET /// -/// - evaluate RC -/// /// - call p8_pmc_init.C *chiptarget, ENUM:PMC_RESET /// - Issue reset to the PMC /// -/// - evaluate RC -/// -/// - call p8_poresw_init.C *chiptarget, ENUM:PORESLW_RESET -/// -/// - evaluate RC +/// - call p8_poreslw_init.C *chiptarget, ENUM:PORESLW_RESET /// /// - call p8_poregpe_init.C *chiptarget, ENUM:POREGPE_RESET /// -/// - evaluate RC -/// -/// - call p8_oha_init.C *chiptarget, ENUM:OHA_RESET -/// -/// - evaluate RC /// /// - call p8_pba_init.C *chiptarget, ENUM:PBA_RESET /// -/// - evaluate RC -/// /// - call p8_occ_sram_init.C *chiptarget, ENUM:OCC_SRAM_RESET /// -/// - evaluate RC -/// /// - call p8_ocb_init .C *chiptarget, ENUM:OCC_OCB_RESET -/// - evaluate RC -/// /// /// \endverbatim /// - -//------------------------------------------------------------------------------ -//---------------------------------------------------------------------- -// eCMD Includes -//---------------------------------------------------------------------- -#include - // ---------------------------------------------------------------------- // Includes // ---------------------------------------------------------------------- -#include -#include "p8_scom_addresses.H" + +#include "p8_pm.H" #include "p8_pm_prep_for_reset.H" -// #include "p8_cpu_special_wakeup.H" extern "C" { @@ -134,10 +99,6 @@ using namespace fapi; // ---------------------------------------------------------------------- // Constant definitions // ---------------------------------------------------------------------- -// Address definition for chiplet EX01 with base address 0x10000000 -// Example: getscom pu.ex 10000001 -c3 ---> scom address 0x13000001 - -CONST_UINT64_T( EX_PMGP0_0x150F0100 , ULL(0x150F0100) ); // ---------------------------------------------------------------------- // Global variables @@ -146,60 +107,67 @@ CONST_UINT64_T( EX_PMGP0_0x150F0100 // ---------------------------------------------------------------------- // Function prototypes // ---------------------------------------------------------------------- -// \temporary -fapi::ReturnCode corestat(const fapi::Target& i_target); // ---------------------------------------------------------------------- // Function definitions // ---------------------------------------------------------------------- -/// i_primary_chip_target Primary Chip target which will be passed -/// to all the procedures -/// i_secondary_chip_target Secondary Chip target will be passed for -/// pmc_init -reset only if it is DCM otherwise -/// this should be NULL. - +//------------------------------------------------------------------------------ +/** + * p8_pm_prep_for_reset Call underlying unit procedure to perform readiness for + * reinitialization of PM complex. + * + * @param[in] i_primary_chip_target Primary Chip target which will be passed + * to all the procedures + * @param[in] i_secondary_chip_target Secondary Chip target will be passed for + * pmc_init -reset only if it is DCM otherwise this should be NULL. + * @param[in] i_mode (PM_RESET (hard - will kill the PMC); + * PM_RESET_SOFT (will not fully reset the PMC)) + * + * @retval ECMD_SUCCESS + * @retval ERROR defined in xml + */ fapi::ReturnCode -p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , - const fapi::Target &i_secondary_chip_target ) +p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target, + const fapi::Target &i_secondary_chip_target, + uint32_t i_mode ) { -// Procedures executed in this file -/// FAPI_EXEC_HWP(rc, p8_occ_control, i_primary_chip_target, PM_RESET, 0); -/// FAPI_EXEC_HWP(rc, proc_cpu_special_wakeup, l_exChiplets[j], SPCWKUP_ENABLE , HOST); -/// FAPI_EXEC_HWP(rc, p8_pmc_force_vsafe, i_primary_chip_target); -/// FAPI_EXEC_HWP(rc, p8_pcbs_init, i_primary_chip_target, PM_RESET); -/// FAPI_EXEC_HWP(rc, p8_pmc_init, i_primary_chip_target, i_secondary_chip_target, PM_RESET); -/// FAPI_EXEC_HWP(rc, p8_poreslw_init, i_primary_chip_target, PM_RESET); -/// FAPI_EXEC_HWP(rc, p8_poregpe_init, i_primary_chip_target, PM_RESET, GPEALL ); -/// FAPI_EXEC_HWP(rc, p8_oha_init, i_primary_chip_target, PM_RESET ); -/// FAPI_EXEC_HWP(rc, p8_pba_init, i_primary_chip_target, PM_RESET ); -/// FAPI_EXEC_HWP(rc, p8_occ_sram_init, i_primary_chip_target, PM_RESET ); -/// FAPI_EXEC_HWP(rc, p8_ocb_init, i_primary_chip_target, PM_RESET,0 , 0, 0, 0, 0, 0 ); - - - - fapi::ReturnCode rc; - // uint8_t l_functional = 0; + fapi::ReturnCode rc; uint8_t l_ex_number = 0; std::vector l_exChiplets; ecmdDataBufferBase data(64); ecmdDataBufferBase mask(64); - // std::vector l_chiplets; fapi::Target dummy; do { - FAPI_INF("Executing p8_pm_prep_for_reset ...."); + FAPI_INF("p8_pm_prep_for_reset start ...."); + if (i_mode == PM_RESET) + { + FAPI_INF("Hard reset detected"); + } + else if (i_mode == PM_RESET_SOFT) + { + FAPI_INF("Soft reset detected. Idle functions will not be affected"); + } + else + { + FAPI_ERR("Mode parameter value not supported: %u", i_mode); + uint32_t & MODE = i_mode; + FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PREP_UNSUPPORTED_MODE_ERR); + break; + } + if ( i_secondary_chip_target.getType() == TARGET_TYPE_NONE ) { if ( i_primary_chip_target.getType() == TARGET_TYPE_NONE ) { - FAPI_ERR("Set primay target properly for SCM " ) ; + FAPI_ERR("Set primay target properly for SCM " ); FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PREP_TARGET_ERR); break; } @@ -210,7 +178,6 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , FAPI_DBG("Running on DCM"); } - // ****************************************************************** // Put OCC PPC405 into reset // ****************************************************************** @@ -237,14 +204,6 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , FAPI_ERR("p8_occ_control: Failed to prepare OCC for RESET. With rc = 0x%x", (uint32_t)rc); break; } - - // rc = fapiGetScom( i_secondary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // FAPI_DBG(" EX_PMGP0_0x150F0100 secondary = %016llX", data.getDoubleWord(0) ); } // ****************************************************************** @@ -252,7 +211,7 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , // ***************************************************************** // - call proc_cpu_special_wakeup.C *chiptarget, ENUM:OCC_SPECIAL_WAKEUP // - For each chiplet, put into Special Wake-up via the OCC special wake-up bit - + //////////////////////// PRIMARY TARGET //////////////////////////////// rc = fapiGetChildChiplets ( i_primary_chip_target, TARGET_TYPE_EX_CHIPLET, @@ -266,39 +225,22 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , FAPI_DBG("Number of EX chiplet on primary => %u ", l_exChiplets.size()); - // Iterate through the returned chiplets + // Iterate through the returned chiplets for (uint8_t j=0; j < l_exChiplets.size(); j++) - { + { - /* - // Determine if it's functional - rc = FAPI_ATTR_GET( ATTR_FUNCTIONAL, - &l_exChiplets[j], - l_functional); - if (rc) - { - FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error"); - break; - } - - if ( l_functional ) - { - */ - // The ex is functional let's build the SCOM address - rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number); - FAPI_DBG("Running special wakeup on ex chiplet %d ", l_ex_number); - - // Set special wakeup for EX - // Commented due to attribute errors - //FAPI_EXEC_HWP(rc, proc_cpu_special_wakeup, l_exChiplets[j], SPCWKUP_ENABLE , HOST); - rc = fapiSpecialWakeup(l_exChiplets[j], true); - if (rc) - { - FAPI_ERR("fapiSpecialWakeup: Failed to put CORE %d into special wakeup. With rc = 0x%x", l_ex_number, (uint32_t)rc); - break; - } + // Build the SCOM address + rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number); + FAPI_DBG("Running special wakeup on ex chiplet %d ", l_ex_number); + + // Set special wakeup for EX + rc = fapiSpecialWakeup(l_exChiplets[j], true); + if (rc) + { + FAPI_ERR("fapiSpecialWakeup: Failed to put CORE %d into special wakeup. With rc = 0x%x", l_ex_number, (uint32_t)rc); + break; + } - //} } // chiplet loop // Exit if error @@ -307,16 +249,6 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , break; } - - // rc = fapiGetScom( i_primary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // - // FAPI_DBG(" EX_PMGP0_0x150F0100_prim = %016llX", data.getDoubleWord(0) ); - //////////////////////// SECONDARY TARGET //////////////////////////////// if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE ) { @@ -336,35 +268,17 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , for (uint8_t j=0; j < l_exChiplets.size(); j++) { + rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number); + FAPI_DBG("Running special wakeup on EX chiplet %d ", l_ex_number); - /* - // Determine if it's functional - rc = FAPI_ATTR_GET( ATTR_FUNCTIONAL, - &l_exChiplets[j], - l_functional); - if (rc) - { - FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error"); - break; - } - - if ( l_functional ) - { - */ - // The ex is functional - rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number); - FAPI_DBG("Running special wakeup on EX chiplet %d ", l_ex_number); - - // Set special wakeup for EX - // Commented due to attribute errors - //FAPI_EXEC_HWP(rc, proc_cpu_special_wakeup, l_exChiplets[j], SPCWKUP_ENABLE , HOST); - rc = fapiSpecialWakeup(l_exChiplets[j], true); - if (rc) - { - FAPI_ERR("fapiSpecialWakeup: Failed to put CORE %d into special wakeup. With rc = 0x%x", l_ex_number, (uint32_t)rc); - break; - } - // } + // Set special wakeup for EX + rc = fapiSpecialWakeup(l_exChiplets[j], true); + if (rc) + { + FAPI_ERR("fapiSpecialWakeup: Failed to put CORE %d into special wakeup. With rc = 0x%x", l_ex_number, (uint32_t)rc); + break; + } + } // chiplet loop // Exit if error @@ -373,26 +287,15 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , break; } - - // rc = fapiGetScom( i_secondary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // - // FAPI_DBG(" EX_PMGP0_0x150F0100 = %016llX", data.getDoubleWord(0) ); - } - // ****************************************************************** // Mask the FIRs // ****************************************************************** FAPI_INF("Executing:p8_pm_firinit in mode PM_RESET"); - FAPI_EXEC_HWP(rc, p8_pm_firinit, i_primary_chip_target , PM_RESET ); + FAPI_EXEC_HWP(rc, p8_pm_firinit, i_primary_chip_target , i_mode ); if (rc) { FAPI_ERR("ERROR: p8_pm_firinit detected failed result"); @@ -410,13 +313,6 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , } } - - - - - - - // ****************************************************************** // Force Vsafe value into voltage controller // ****************************************************************** @@ -433,20 +329,9 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , if (rc) { FAPI_ERR("Failed to force Vsafe value into voltage controller. With rc = 0x%x", (uint32_t)rc); - FAPI_ERR("Contining with reset of Power Management functions"); - - //break; + FAPI_ERR("Continiing with reset of Power Management functions"); } -// rc = fapiGetScom( i_primary_chip_target, EX_PMGP0_0x150F0100 , data); -// if (rc) -// { -// FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); -// break; -// } -// FAPI_DBG(" EX_PMGP0_0x150F0100 = %016llX", data.getDoubleWord(0) ); - - //////////////////////// SECONDARY TARGET //////////////////////////////// if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE ) { @@ -455,17 +340,7 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , { FAPI_ERR("Failed to force Vsafe value into voltage controller. With rc = 0x%x", (uint32_t)rc); FAPI_ERR("Contining with reset of Power Management functions"); - - //break; } - - // rc = fapiGetScom( i_secondary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // FAPI_DBG(" EX_PMGP0_0x150F0100 = %016llX", data.getDoubleWord(0) ); } // ****************************************************************** @@ -485,19 +360,8 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , FAPI_ERR("p8_pcbs_init: Failed to prepare PCBSLV_PM for RESET. With rc = 0x%x", (uint32_t)rc); break; } - - // >>>>> temp debug only <<<<<< - // rc = fapiGetScom( i_primary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // FAPI_DBG(" EX_PMGP0_0x150F0100 = %016llX", data.getDoubleWord(0) ); - - + //////////////////////// SECONDARY TARGET //////////////////////////////// - if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE ) { @@ -507,46 +371,28 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , FAPI_ERR("p8_pcbs_init: Failed to prepare PCBSLV_PM for RESET. With rc = 0x%x", (uint32_t)rc); break; } - - // >>>>> temp debug only <<<<<< - // rc = fapiGetScom( i_secondary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // FAPI_DBG(" EX_PMGP0_0x150F0100 = %016llX", data.getDoubleWord(0) ); - } // ****************************************************************** // Reset PMC // ****************************************************************** - // - call p8_pmc_init.C *chiptarget, ENUM:PMC_RESET + // - call p8_pmc_init.C *chiptarget, ENUM:PMC_RESET_SOFT // FAPI_INF("Issue reset to PMC"); FAPI_DBG("Executing: p8_pmc_init.C"); - FAPI_EXEC_HWP(rc, p8_pmc_init, i_primary_chip_target, i_secondary_chip_target, PM_RESET); + FAPI_EXEC_HWP(rc, p8_pmc_init, i_primary_chip_target, i_secondary_chip_target, i_mode); if (rc) { FAPI_ERR("p8_pmc_init: Failed to issue PMC reset. With rc = 0x%x", (uint32_t)rc); break; } - // rc = fapiGetScom( i_primary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // FAPI_DBG(" EX_PMGP0_0x150F0100 = %016llX", data.getDoubleWord(0) ); - // ****************************************************************** // Issue reset to PSS macro // ****************************************************************** - // - call p8_poreslw_init.C *chiptarget, ENUM:PORESLW_RESET + // - call p8_pss_init.C *chiptarget, ENUM:PM_RESET // FAPI_INF("Issue reset to PSS macro"); @@ -560,15 +406,6 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , break; } - // rc = fapiGetScom( i_primary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // FAPI_DBG(" EX_PMGP0_0x150F0100 = %016llX", data.getDoubleWord(0) ); - - //////////////////////// SECONDARY TARGET //////////////////////////////// if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE ) { @@ -581,41 +418,27 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , FAPI_ERR("p8_pss_init: Failed to issue reset to PSS macro. With rc = 0x%x", (uint32_t)rc); break; } - - // rc = fapiGetScom( i_secondary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // FAPI_DBG(" EX_PMGP0_0x150F0100 = %016llX", data.getDoubleWord(0) ); } - // ****************************************************************** - // Issue reset to PORE Sleep/Winkle engine - // ****************************************************************** - // - call p8_poreslw_init.C *chiptarget, ENUM:PORESLW_RESET - - FAPI_INF("Issue reset to PORE Sleep/Winkle engine"); - FAPI_DBG("Executing: p8_poreslw_init.C"); - - //////////////////////// PRIMARY TARGET //////////////////////////////// - FAPI_EXEC_HWP(rc, p8_poreslw_init, i_primary_chip_target, PM_RESET); - if (rc) + if (i_mode == PM_RESET) { - FAPI_ERR("p8_poreslw_init: Failed to issue reset to PORE Sleep/Winkle engine. With rc = 0x%x", (uint32_t)rc); - break; - } + FAPI_INF("Hard reset detected..."); + // ****************************************************************** + // Issue reset to PORE Sleep/Winkle engine + // ****************************************************************** + // - call p8_poreslw_init.C *chiptarget, ENUM:PORESLW_RESET - // >>>>> temp debug only <<<<<< - // rc = fapiGetScom( i_primary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // FAPI_DBG(" EX_PMGP0_0x150F0100 = %016llX", data.getDoubleWord(0) ); + FAPI_INF("Issue reset to PORE Sleep/Winkle engine."); + FAPI_DBG("Executing: p8_poreslw_init.C"); + //////////////////////// PRIMARY TARGET //////////////////////////////// + FAPI_EXEC_HWP(rc, p8_poreslw_init, i_primary_chip_target, PM_RESET); + if (rc) + { + FAPI_ERR("p8_poreslw_init: Failed to issue reset to PORE Sleep/Winkle engine. With rc = 0x%x", (uint32_t)rc); + break; + } + } //////////////////////// SECONDARY TARGET //////////////////////////////// if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE ) @@ -626,16 +449,6 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , FAPI_ERR("p8_poreslw_init: Failed to issue reset to PORE Sleep/Winkle engine. With rc = 0x%x", (uint32_t)rc); break; } - - // >>>>> temp debug only <<<<<< - // rc = fapiGetScom( i_secondary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // FAPI_DBG(" EX_PMGP0_0x150F0100 = %016llX", data.getDoubleWord(0) ); - } // ****************************************************************** @@ -654,14 +467,6 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , break; } - // rc = fapiGetScom( i_primary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // FAPI_DBG(" EX_PMGP0_0x150F0100 = %016llX", data.getDoubleWord(0) ); - //////////////////////// SECONDARY TARGET //////////////////////////////// if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE ) { @@ -671,46 +476,8 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , FAPI_ERR("p8_poregpe_init: Failed to issue reset to PORE General Purpose Engine. With rc = 0x%x", (uint32_t)rc); break; } - - // rc = fapiGetScom( i_secondary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // FAPI_DBG(" EX_PMGP0_0x150F0100 = %016llX", data.getDoubleWord(0) ); } - // ****************************************************************** - // Issue reset to OHA - // ****************************************************************** - // // - call p8_oha_init.C *chiptarget, ENUM:OHA_RESET - // // - // FAPI_DBG(""); - // // FAPI_DBG("*************************************"); - // FAPI_INF("Issue reset to PORE General Purpose Engine"); - // FAPI_DBG("Executing: p8_oha_init.C"); - // // FAPI_DBG("*************************************"); - // FAPI_DBG("FAPI_EXEC_HWP(rc, p8_oha_init, i_primary_chip_target, PM_RESET );"); - // FAPI_DBG(""); - - // // - // FAPI_EXEC_HWP(rc, p8_oha_init, i_primary_chip_target, PM_RESET ); - // if (rc) - // { - // FAPI_ERR("p8_oha_init: Failed to issue reset to OHA. With rc = 0x%x", (uint32_t)rc); - // break; - // } - - - // rc = fapiGetScom( i_primary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // FAPI_DBG(" EX_PMGP0_0x150F0100 = %016llX", data.getDoubleWord(0) ); - // ****************************************************************** // Issue reset to PBA // ****************************************************************** @@ -728,14 +495,6 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , break; } - // rc = fapiGetScom( i_primary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // FAPI_DBG(" EX_PMGP0_0x150F0100 = %016llX", data.getDoubleWord(0) ); - //////////////////////// SECONDARY TARGET //////////////////////////////// if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE ) { @@ -745,15 +504,6 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , FAPI_ERR("p8_pba_init: Failed to issue reset to PBA. With rc = 0x%x", (uint32_t)rc); break; } - - // rc = fapiGetScom( i_secondary_chip_target, EX_PMGP0_0x150F0100 , data); - // if (rc) - // { - // FAPI_ERR("fapiGetScom EX_PMGP0_0x150F0100 failed. With rc = 0x%x", (uint32_t)rc); - // break; - // } - // FAPI_DBG(" EX_PMGP0_0x150F0100 = %016llX", data.getDoubleWord(0) ); - } // ****************************************************************** @@ -812,91 +562,12 @@ p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , } } while(0); - // fapiDelay(300 , 3000 ); - FAPI_INF("Exiting p8_pm_prep_for_reset"); - + FAPI_INF("p8_pm_prep_for_reset start ...."); + return rc; } // Procedure - - // ***************************************************** BACKUPS ********************************************************************************* - -//------------------------------------------------------------------------------ -// Core Status -//------------------------------------------------------------------------------ -// fapi::ReturnCode -// corestat(const fapi::Target& i_target) -// { -// fapi::ReturnCode rc; - -// ecmdDataBufferBase data(64); - -// std::vector l_exChiplets; -// uint8_t l_functional = 0; -// uint8_t l_ex_number = 0; - - -// FAPI_INF("Core Status ..."); - -// rc = fapiGetChildChiplets ( i_target, -// TARGET_TYPE_EX_CHIPLET, -// l_exChiplets, -// TARGET_STATE_FUNCTIONAL); -// if (rc) -// { -// FAPI_ERR("Error from fapiGetChildChiplets!"); -// return rc; -// } -// FAPI_DBG("Number of chiplets => %u", l_exChiplets.size()); - -// // Iterate through the returned chiplets -// //for (itr = l_exChiplets.begin(); itr != l_exChiplets.end(); itr++) -// for (uint8_t c=0; c < l_exChiplets.size(); c++) -// { -// // Determine if it's functional -// //rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, itr, l_functional); -// rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &l_exChiplets[c], l_functional); -// if (rc) -// { -// FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error"); -// break; -// } - -// // With TARGET_STATE_FUNCTIONAL above, this check may be redundant -// if ( l_functional ) -// { -// // Get the core number -// //rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, itr, c); -// rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[c], l_ex_number); -// if (rc) -// { -// FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error"); -// break; -// } - -// FAPI_DBG("Processing core : %d ", l_ex_number); - -// // Read register content - -// rc = fapiGetScom( l_exChiplets[c], EX_PERV_SCRATCH0_10013283 , data ); -// if (rc) -// { -// FAPI_ERR("fapiGetScom(EX_OHA_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc); -// return rc; -// } - -// FAPI_DBG ("EX_PERV_SCRATCH0_10013283 : %016llX", data.getDoubleWord(0)); - -// } -// } - -// return rc; - -// } //corestat - - - } //end extern C diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.H index ca581bcf0..495068cef 100644 --- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.H +++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.H @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_pm_prep_for_reset.H,v 1.9 2013/06/20 09:36:24 pchatnah Exp $ +// $Id: p8_pm_prep_for_reset.H,v 1.10 2013/08/02 19:13:48 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_prep_for_reset.H,v $ //------------------------------------------------------------------------------ @@ -40,7 +40,6 @@ #define UNIT_CONFIG 0x1 #define UNIT_RESET 0x2 -// #include "proc_cpu_special_wakeup.H" #include "p8_pm.H" #include "p8_poregpe_init.H" #include "p8_pcbs_init.H" @@ -48,7 +47,7 @@ #include "p8_poreslw_init.H" #include "p8_poregpe_init.H" #include "p8_oha_init.H" -#include "p8_pba_init.H" //FIXME was not compiling check with Klaus +#include "p8_pba_init.H" #include "p8_occ_sram_init.H" #include "p8_ocb_init.H" #include "p8_pss_init.H" @@ -56,71 +55,34 @@ #include "p8_occ_control.H" #include "p8_pm_firinit.H" - -/** -* @brief Function pointer typedef. -*/ -// typedef fapi::ReturnCode (*p8_occ_control_FP_t) (Target i_target, uint32_t ppc405_reset_ctrl, uint32_t sram_bv_ctrl); -// //typedef fapi::ReturnCode (*p8_cpu_special_wakeup_FP_t)(Target i_target, uint32_t mode); -// //typedef fapi::ReturnCode (*p8_cpu_special_wakeup_FP_t)(Target i_target, uint8_t, uint8_t); - -// typedef fapi::ReturnCode (*p8_pmc_force_vsafe_FP_t) (Target i_target); -// typedef fapi::ReturnCode (*p8_pcbs_init_FP_t) (const fapi::Target&, uint32_t ); -// typedef fapi::ReturnCode (*p8_pmc_init_FP_t) (const fapi::Target&, uint32_t ); -// typedef fapi::ReturnCode (*p8_poreslw_init_FP_t) (const fapi::Target&, uint32_t); -// typedef fapi::ReturnCode (*p8_poregpe_init_FP_t) (const fapi::Target&, uint32_t, uint32_t); -// typedef fapi::ReturnCode (*p8_oha_init_FP_t) (const fapi::Target&, uint32_t); -// typedef fapi::ReturnCode (*p8_pba_init_FP_t) (const fapi::Target&, uint32_t); -// typedef fapi::ReturnCode (*p8_occ_sram_init_FP_t) (const fapi::Target&, uint32_t); -// typedef fapi::ReturnCode (*p8_ocb_init_FP_t) (const fapi::Target&, uint32_t); - typedef fapi::ReturnCode (*p8_pm_prep_for_reset_FP_t) (const fapi::Target &i_primary_chip_target , const fapi::Target &i_secondary_chip_target ); +typedef fapi::ReturnCode (*p8_pm_prep_for_reset_FP_t) (const fapi::Target &, + const fapi::Target &, + uint32_t); extern "C" { - /// \brief Prepare powermanagement components for reset - /// i_primary_chip_target Primary Chip target which will be passed to all the procedures - /// i_secondary_chip_target Secondary Chip target will be passed for pmc_init -reset only if it is DCM otherwise - - fapi::ReturnCode p8_pm_prep_for_reset(const fapi::Target &i_primary_chip_target , const fapi::Target &i_secondary_chip_target ); +//------------------------------------------------------------------------------ +/** + * p8_pm_prep_for_reset Call underlying unit procedures to perform readiness for + * reinitialization of PM complex. + * + * @param[in] i_primary_chip_target Primary Chip target which will be passed + * to all the procedures + * @param[in] i_secondary_chip_target Secondary Chip target will be passed for + * pmc_init -reset only if it is DCM otherwise this should be NULL. + * @param[in] i_mode (PM_RESET (hard - will kill the PMC); + * PM_RESET_SOFT (will not fully reset the PMC)) + * + * @retval ECMD_SUCCESS + * @retval ERROR defined in xml + */ +fapi::ReturnCode p8_pm_prep_for_reset( const fapi::Target &i_primary_chip_target , + const fapi::Target &i_secondary_chip_target, + uint32_t i_mode); -// p8_occ_control -// fapi::ReturnCode p8_occ_control(Target &i_target, uint32_t ppc405_reset_ctrl, uint32_t sram_bv_ctrl); - -// // p8_cpu_special_wakeup -// //fapi::ReturnCode p8_cpu_special_wakeup(const Target &i_target, uint32_t mode); -// //fapi::ReturnCode p8_cpu_special_wakeup(const Target &i_target, uint8_t entity, uint8_t operation); - -// // p8_pmc_force_vsafe -// fapi::ReturnCode p8_pmc_force_vsafe(const Target &i_target); - -// // p8_pcbs_init -// fapi::ReturnCode p8_pcbs_init(const Target &i_target, uint32_t mode); - -// // p8_pmc_init -// fapi::ReturnCode p8_pmc_init(const Target &i_target, uint32_t mode); - -// //p8_poreslw_init -// fapi::ReturnCode p8_poreslw_init(const fapi::Target& i_target, uint32_t mode); - -// //p8_poregpe_init -// fapi::ReturnCode p8_poregpe_init(const fapi::Target& i_target, uint32_t mode, uint32_t engine); - -// //p8_oha_init -// fapi::ReturnCode p8_oha_init(const fapi::Target& i_target, uint32_t mode); - -// //p8_pba_init -// fapi::ReturnCode p8_pba_init(const fapi::Target& i_target, uint32_t mode); - -// //p8_occ_sram_init -// fapi::ReturnCode p8_occ_sram_init(const fapi::Target& i_target, uint32_t mode); - -// //p8_ocb_init -// fapi::ReturnCode p8_ocb_init(const fapi::Target& i_target, uint32_t mode); - - } diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.C index b83468c9a..05a8ef333 100755 --- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.C +++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.C @@ -20,7 +20,8 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_poregpe_init.C,v 1.3 2013/04/01 04:11:56 stillgs Exp $ + +// $Id: p8_poregpe_init.C,v 1.4 2013/08/02 19:09:35 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_poregpe_init.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -36,17 +37,17 @@ /// \todo add to required proc ENUM requests /// /// High-level procedure flow: -/// \verbatim -/// +/// \verbatim +/// /// Check for valid parameters /// if PM_CONFIG { /// Do nothing (done by OCC programs) -/// } else if PM_RESET { -/// for each GPE, +/// } else if PM_RESET { +/// for each GPE, /// set and then reset bit 0 in the GPEx_RESET_REGISTER -/// +/// /// } -/// +/// /// Procedure Prereq: /// - System clocks are running /// \endverbatim @@ -63,7 +64,7 @@ #ifdef FAPIECMD extern "C" { -#endif +#endif using namespace fapi; @@ -88,23 +89,23 @@ fapi::ReturnCode poregpe_reset(const Target& i_target, const uint32_t engine); /// \param[in] i_target Chip target -/// \param[in] mode Control mode for the procedure +/// \param[in] mode Control mode for the procedure /// (PM_CONFIG, PM_INIT, PM_RESET) /// \param[in] engine Targeted engine: GPE0, GPE1, GPEALL -/// \retval FAPI_RC_SUCCESS -/// \retval ERROR defined in xml +/// \retval FAPI_RC_SUCCESS +/// \retval ERROR defined in xml fapi::ReturnCode p8_poregpe_init(const Target& i_target, uint32_t mode, uint32_t engine) { fapi::ReturnCode l_rc; - + do { FAPI_INF("Executing p8_poregpe_init in mode %x for engine %x....", mode, engine); - if (!(engine == GPE0 || engine == GPE1 || engine == GPEALL) ) + if (!(engine == GPE0 || engine == GPE1 || engine == GPEALL) ) { FAPI_ERR("Unknown engine passed to p8_poregpe_init. Engine %x ....", @@ -116,49 +117,57 @@ p8_poregpe_init(const Target& i_target, uint32_t mode, uint32_t engine) /// ------------------------------- /// Configuration: perform translation of any Platform Attributes into /// Feature Attributes that are applied during Initalization - if (mode == PM_CONFIG) + if (mode == PM_CONFIG) { FAPI_INF("PORE-GPE configuration..."); - FAPI_INF("---> None is defined...done by OCC firmware"); - } + FAPI_INF("---> None is defined...done by OCC firmware"); + } /// ------------------------------- /// Initialization: perform order or dynamic operations to initialize - /// the GPEs using necessary Platform or Feature attributes. - else if (mode == PM_INIT) + /// the GPEs using necessary Platform or Feature attributes. + else if (mode == PM_INIT) { FAPI_INF("PORE-GPE initialization..."); - FAPI_INF("---> None is defined...done by OCC firmware"); - } + FAPI_INF("---> None is defined...done by OCC firmware"); + } /// ------------------------------- - /// Reset: perform reset of GPE engines so that they can reconfigured - /// and reinitialized - else if (mode == PM_RESET) + /// Reset: perform reset of GPE engines so that they can reconfigured + /// and reinitialized + else if (mode == PM_RESET) { // GPE0 - if (engine == GPE0 || engine == GPEALL) - { + if (engine == GPE0 || engine == GPEALL) + { l_rc = poregpe_reset(i_target, GPE0); + if (!l_rc.ok()) + { + break; + } } - - if (engine == GPE1 || engine == GPEALL) - { + + if (engine == GPE1 || engine == GPEALL) + { l_rc = poregpe_reset(i_target, GPE1); + if (!l_rc.ok()) + { + break; + } } - - } + + } /// ------------------------------- /// Unsupported Mode - else + else { FAPI_ERR("Unknown mode passed to p8_poregpe_init. Mode %x ....", mode); FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_GPE_CODE_BAD_MODE); } } while(0); - + return l_rc; } @@ -179,22 +188,22 @@ poregpe_reset(const Target& i_target, const uint32_t engine) uint64_t control_reg; uint64_t reset_reg; uint64_t status_reg; - - + + FAPI_INF("PORE-GPE reset...Engine: %x", engine); - + do { // Set the address offset values based on which engine is being operated - // on - if (engine == GPE0) - { + // on + if (engine == GPE0) + { control_reg = PORE_GPE0_CONTROL_0x00060001; reset_reg = PORE_GPE0_RESET_0x00060002; status_reg = PORE_GPE0_STATUS_0x00060000; } - else if (engine == GPE1) + else if (engine == GPE1) { control_reg = PORE_GPE1_CONTROL_0x00060021; reset_reg = PORE_GPE1_RESET_0x00060022; @@ -208,11 +217,11 @@ poregpe_reset(const Target& i_target, const uint32_t engine) } // Reset the GPEsusing the Reset Register bits 0 and 1. - // Note: This resets ALL registers (including debug registers) with + // Note: This resets ALL registers (including debug registers) with // the exception of Error Mask // set PORE run bit to stop - l_rc=fapiGetScom(i_target, control_reg, data); + l_rc=fapiGetScom(i_target, control_reg, data); if(!l_rc.ok()) { FAPI_ERR("Scom error reading PORE_GPE%x_CONTROL_%08llx", engine, control_reg); @@ -234,8 +243,8 @@ poregpe_reset(const Target& i_target, const uint32_t engine) break; } - // Reset PORE (state machines and PIBMS_DBG registers) and PIB2OCI - // interface write Reset_Register(0:1) with 0b11 to trigger the reset. + // Reset PORE (state machines and PIBMS_DBG registers) and PIB2OCI + // interface write Reset_Register(0:1) with 0b11 to trigger the reset. // Check that these are cleared to 0 to validate the reset occured. e_rc |= data.flushTo0(); e_rc |= data.setBit(0, 2); @@ -251,13 +260,13 @@ poregpe_reset(const Target& i_target, const uint32_t engine) l_rc=fapiPutScom(i_target, reset_reg, data); if(!l_rc.ok()) { - FAPI_ERR("Scom error writing PORE_GPE%x_CONTROL", engine); + FAPI_ERR("Scom error writing PORE_GPE%x_CONTROL", engine); break; } // poll until PORE has returned to WAIT state 3:6=0b0001 wait_state_detected = false; - for (poll_count=0; poll_count %d ", hwctrl_frame_size); - FAPI_INF(" " ); - FAPI_INF(" " ); - // FAPI_INF(" -----------------------------------------------------"); - - rc = fapiPutScom(i_target, SPIPSS_ADC_CTRL_REG0_0x00070000, data ); - if (rc) { - FAPI_ERR("fapiPutScom(SPIPSS_ADC_CTRL_REG0_0x00070000) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiPutScom(SPIPSS_ADC_CTRL_REG0_0x00070000) failed."); + break; } - - // ****************************************************************** - // - set SPIPSS_ADC_CTRL_REG1 - // adc_fsm_enable = disable - // adc_device = APSS - // adc_cpol = 0 - // adc_cpha = 0 - // adc_clock_divider = set to 10Mhz - // adc_nr_of_frames (4b) = 16 (for auto 2 mode) + // - set SPIPSS_ADC_CTRL_REG1 + // adc_fsm_enable = disable + // adc_device = APSS + // adc_cpol = 0 + // adc_cpha = 0 + // adc_clock_divider = set to 10Mhz + // adc_nr_of_frames (4b) = 16 (for auto 2 mode) // ****************************************************************** rc = fapiGetScom(i_target, SPIPSS_ADC_CTRL_REG1_0x00070001, data ); - if (rc) { - FAPI_ERR("fapiGetScom(SPIPSS_ADC_CTRL_REG1) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiGetScom(SPIPSS_ADC_CTRL_REG1) failed."); + break; } - // modify_data here - - uint8_t hwctrl_fsm_enable = 0x1 ; - uint8_t hwctrl_nr_of_frames = 0x10 ; - - - // data.flushTo0(); - // rc=data.setWord(1, 0x41000100); if (rc) return rc; - e_rc=data.insertFromRight(hwctrl_fsm_enable ,0,1); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(hwctrl_device ,1,1); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(hwctrl_clk_pol ,2,1); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(hwctrl_clk_pha ,3,1); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(hwctrl_clk_divider ,4,10); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(hwctrl_nr_of_frames ,14,4); if (e_rc) { rc.setEcmdError(e_rc); return rc; } + uint8_t hwctrl_fsm_enable = 0x1 ; + uint8_t hwctrl_nr_of_frames = 0x10 ; + + e_rc |= data.insertFromRight(hwctrl_fsm_enable ,0,1); + e_rc |= data.insertFromRight(hwctrl_device ,1,1); + e_rc |= data.insertFromRight(hwctrl_clk_pol ,2,1); + e_rc |= data.insertFromRight(hwctrl_clk_pha ,3,1); + e_rc |= data.insertFromRight(hwctrl_clk_divider ,4,10); + e_rc |= data.insertFromRight(hwctrl_nr_of_frames ,14,4); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } - // FAPI_INF(" -----------------------------------------------------"); FAPI_INF(" SPIPSS ADC CTRL_REG_1 Configuration "); - // FAPI_INF(" -----------------------------------------------------"); FAPI_INF(" hwctrl_fsm_enable => %d ", hwctrl_fsm_enable ); FAPI_INF(" nest_freq => %d ", nest_freq ); FAPI_INF(" hwctrl_target => %d ", hwctrl_target ); @@ -426,223 +426,166 @@ p8_pss_init(Target &i_target, uint32_t mode) FAPI_INF(" hwctrl_clk_pha => %d ", hwctrl_clk_pha ); FAPI_INF(" hwctrl_clk_divider => %d ", hwctrl_clk_divider ); FAPI_INF(" hwctrl_nr_of_frames => %d ", hwctrl_nr_of_frames); - FAPI_INF(" " ); - FAPI_INF(" " ); - // FAPI_INF(" -----------------------------------------------------"); - - rc = fapiPutScom(i_target, SPIPSS_ADC_CTRL_REG1_0x00070001, data ); - if (rc) { - FAPI_ERR("fapiPutScom(SPIPSS_ADC_CTRL_REG1_0x00070001) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiPutScom(SPIPSS_ADC_CTRL_REG1_0x00070001) failed."); + break; } - - // ****************************************************************** - // - set SPIPSS_ADC_CTRL_REG2 - // adc_inter_frame_delay = 0x0 + // - set SPIPSS_ADC_CTRL_REG2 + // adc_inter_frame_delay = 0x0 // ****************************************************************** rc = fapiGetScom(i_target, SPIPSS_ADC_CTRL_REG2_0x00070002, data ); - if (rc) { - FAPI_ERR("fapiGetScom(SPIPSS_ADC_CTRL_REG2) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiGetScom(SPIPSS_ADC_CTRL_REG2) failed."); + break; } - // FAPI_INF("sumne data %s " data.genHexLeftStr(0,64) ); - - // modify_data here - - // rc=data.flushTo0(); if (rc) return rc; - // rc=data.setWord(1, 0x41000100); if (rc) return rc; - e_rc=data.insertFromRight(hwctrl_inter_frame_delay,0,17); if (e_rc) { rc.setEcmdError(e_rc); return rc; } + e_rc = data.insertFromRight(hwctrl_inter_frame_delay,0,17); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } - // FAPI_INF(" -----------------------------------------------------"); FAPI_INF(" SPIPSS ADC CTRL_REG_2 Configuration "); - // FAPI_INF(" -----------------------------------------------------"); FAPI_INF(" hwctrl_inter_frm_delay => %d ", hwctrl_inter_frame_delay ); FAPI_INF(" " ); FAPI_INF(" " ); - // FAPI_INF(" -----------------------------------------------------"); - - rc = fapiPutScom(i_target, SPIPSS_ADC_CTRL_REG2_0x00070002, data ); - if (rc) { - FAPI_ERR("fapiPutScom(SPIPSS_ADC_CTRL_REG2_0x00070002) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiPutScom(SPIPSS_ADC_CTRL_REG2_0x00070002) failed."); + break; } - // ****************************************************************** - // - clear SPIPSS_ADC_Wdata_REG + // - clear SPIPSS_ADC_Wdata_REG // ****************************************************************** -// rc = fapiGetScom(i_target, SPIPSS_ADC_WDATA_REG_0x00070010, data ); -// if (rc) { -// FAPI_ERR("fapiGetScom(SPIPSS_ADC_WDATA_REG_0x00070010) failed."); return rc; -// } - - // modify_data here uint32_t hwctrl_wdata = 0x0; - e_rc=data.flushTo0(); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - - // e_rc=data.setWord(1, 0x41000100); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(hwctrl_wdata ,0,16); if (e_rc) { rc.setEcmdError(e_rc); return rc; } + e_rc |= data.flushTo0(); + e_rc |= data.insertFromRight(hwctrl_wdata ,0,16); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } - // FAPI_INF(" -----------------------------------------------------"); - FAPI_INF(" SPIPSS_WDATA_REG is cleared "); - // FAPI_INF(" -----------------------------------------------------"); + FAPI_INF(" SPIPSS_WDATA_REG is cleared "); FAPI_INF(" hwctrl_wdata => %d ", hwctrl_wdata ); - FAPI_INF(" " ); - FAPI_INF(" " ); - // FAPI_INF(" -----------------------------------------------------"); - - rc = fapiPutScom(i_target, SPIPSS_ADC_WDATA_REG_0x00070010, data ); - if (rc) { - FAPI_ERR("fapiPutScom(SPIPSS_ADC_WDATA_REG_0x00070010) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiPutScom(SPIPSS_ADC_WDATA_REG_0x00070010) failed."); + break; } - // ****************************************************************** - // - set SPIPSS_P2S_CTRL_REG0 (24b) - // p2s_frame_size = 16 + // - set SPIPSS_P2S_CTRL_REG0 (24b) + // p2s_frame_size = 16 // ****************************************************************** rc = fapiGetScom(i_target, SPIPSS_P2S_CTRL_REG0_0x00070040, data ); - if (rc) { - FAPI_ERR("fapiGetScom(SPIPSS_P2S_CTRL_REG0) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiGetScom(SPIPSS_P2S_CTRL_REG0) failed."); + break; } // modify_data here - uint8_t p2s_frame_size = 0x02 ; - uint8_t p2s_device = 0; - uint8_t p2s_clk_pol = 0; - uint8_t p2s_clk_pha = 0; + uint8_t p2s_frame_size = 0x02 ; + uint8_t p2s_device = 0; + uint8_t p2s_clk_pol = 0; + uint8_t p2s_clk_pha = 0; uint16_t p2s_clk_divider= 0x1D; - uint8_t p2s_target = 0xA;// DPSS - uint32_t p2s_inter_frame_delay = 0x0; -// uint8_t p2s_in_count1; -// uint8_t p2s_out_count1; - uint8_t p2s_in_delay; -// uint8_t p2s_in_count2; -// uint8_t p2s_out_count2; -// uint8_t p2s_in_delay2; - - -// if (p2s_target == 13) -// { -// p2s_device = 1; -// FAPI_INF(" p2s_target_DPSS " ); -// } -// else if (p2s_target == 10) -// { -// p2s_device = 0; -// FAPI_INF(" p2s_target_APSS " ); -// } -// else -// { FAPI_INF(" " ); -// FAPI_ERR("wrong device taget : make sure that you use 0xA=APSS and 0XD=DPSS no other value works"); -// FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PSS_WRONG_DEVICE); -// return rc; -// } - - - - -// p2s_frame_size = 0x10 ; -// p2s_clk_pol = 0; -// p2s_clk_pha = 0; -// p2s_clk_divider= 0x1D; -// p2s_inter_frame_delay = 0x0; - - // calculation of clock divider -// p2s_clk_divider= nest_freq/spipss_freq/8-1 ; - - - p2s_frame_size = attr_pm_spipss_frame_size ; - // p2s_out_count = attr_pm_spipss_out_count ; - p2s_in_delay = attr_pm_spipss_in_delay ; - // p2s_in_count = attr_pm_spipss_in_count ; - p2s_clk_pol = attr_pm_spipss_clock_polarity ; - p2s_clk_pha = attr_pm_spipss_clock_phase ; - p2s_clk_divider = attr_pm_spipss_clock_divider ; - p2s_inter_frame_delay = attr_pm_spipss_inter_frame_delay ; - // nest_freq = attr_p8_pss_init_nest_frequency ; - // spipss_freq = attr_pm_pss_init_spipss_frequency; - p2s_device = attr_pm_apss_chip_select; - + uint8_t p2s_target = 0xA;// DPSS + uint32_t p2s_inter_frame_delay = 0x0; + uint8_t p2s_in_delay; + p2s_frame_size = attr_pm_spipss_frame_size ; + p2s_in_delay = attr_pm_spipss_in_delay ; + p2s_clk_pol = attr_pm_spipss_clock_polarity ; + p2s_clk_pha = attr_pm_spipss_clock_phase ; + p2s_clk_divider = attr_pm_spipss_clock_divider ; + p2s_inter_frame_delay = attr_pm_spipss_inter_frame_delay ; + p2s_device = attr_pm_apss_chip_select; // ****************************************************************** - // - set SPIPSS_P2S_CTRL_REG0 + // - set SPIPSS_P2S_CTRL_REG0 // ****************************************************************** - rc = fapiGetScom(i_target, SPIPSS_P2S_CTRL_REG0_0x00070040, data ); - if (rc) { - FAPI_ERR("fapiGetScom(SPIPSS_P2S_CTRL_REG0) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiGetScom(SPIPSS_P2S_CTRL_REG0) failed."); + break; } + e_rc |= data.insertFromRight(p2s_frame_size,0,6); + e_rc |= data.insertFromRight(p2s_in_delay,12,6); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } - // e_rc=data.flushTo0(); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - // e_rc=data.setWord(1, 0x41000100); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(p2s_frame_size,0,6); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(p2s_in_delay,12,6); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - - // FAPI_INF(" -----------------------------------------------------"); FAPI_INF(" SPIPSS P2S CTRL_REG_0 Configuration "); - // FAPI_INF(" -----------------------------------------------------"); FAPI_INF(" frame size => %d ", p2s_frame_size); FAPI_INF(" p2s_in_delay => %d ", p2s_in_delay ); - FAPI_INF(" " ); - // FAPI_INF(" -----------------------------------------------------"); - - rc = fapiPutScom(i_target, SPIPSS_P2S_CTRL_REG0_0x00070040, data ); - if (rc) { - FAPI_ERR("fapiPutScom(SPIPSS_P2S_CTRL_REG0_0x00070040) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiPutScom(SPIPSS_P2S_CTRL_REG0_0x00070040) failed."); + break; } - - // ****************************************************************** - // - set SPIPSS_P2S_CTRL_REG1 - // p2s_fsm_enable = disable - // p2s_device = APSS - // p2s_cpol = 0 - // p2s_cpha = 0 - // p2s_clock_divider = set to 10Mhz - // p2s_nr_of_frames (4b) = 16 (for auto 2 mode) + // - set SPIPSS_P2S_CTRL_REG1 + // p2s_fsm_enable = disable + // p2s_device = APSS + // p2s_cpol = 0 + // p2s_cpha = 0 + // p2s_clock_divider = set to 10Mhz + // p2s_nr_of_frames (4b) = 16 (for auto 2 mode) // ****************************************************************** rc = fapiGetScom(i_target, SPIPSS_P2S_CTRL_REG1_0x00070041, data ); - if (rc) { - FAPI_ERR("fapiGetScom(SPIPSS_P2S_CTRL_REG1) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiGetScom(SPIPSS_P2S_CTRL_REG1) failed."); + break; } // modify_data here - uint8_t p2s_fsm_enable = 0x1 ; - uint8_t p2s_nr_of_frames = 0x10 ; - - // e_rc=data.flushTo0(); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - // e_rc=data.setWord(1, 0x41000100); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(p2s_fsm_enable ,0,1); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(p2s_device ,1,1); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(p2s_clk_pol ,2,1); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(p2s_clk_pha ,3,1); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(p2s_clk_divider ,4,10); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(p2s_nr_of_frames ,14,4); if (e_rc) { rc.setEcmdError(e_rc); return rc; } + uint8_t p2s_fsm_enable = 0x1 ; + uint8_t p2s_nr_of_frames = 0x10 ; + + e_rc |= data.insertFromRight(p2s_fsm_enable ,0,1); + e_rc |= data.insertFromRight(p2s_device ,1,1); + e_rc |= data.insertFromRight(p2s_clk_pol ,2,1); + e_rc |= data.insertFromRight(p2s_clk_pha ,3,1); + e_rc |= data.insertFromRight(p2s_clk_divider ,4,10); + e_rc |= data.insertFromRight(p2s_nr_of_frames ,14,4); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } - // FAPI_INF(" -----------------------------------------------------"); FAPI_INF(" SPIPSS P2S CTRL_REG_1 Configuration "); - // FAPI_INF(" -----------------------------------------------------"); FAPI_INF(" p2s_fsm_enable => %d ", p2s_fsm_enable ); FAPI_INF(" p2s_target => %d ", p2s_target ); FAPI_INF(" p2s_device => %d ", p2s_device ); @@ -650,322 +593,250 @@ p8_pss_init(Target &i_target, uint32_t mode) FAPI_INF(" p2s_clk_pha => %d ", p2s_clk_pha ); FAPI_INF(" p2s_clk_divider => %d ", p2s_clk_divider ); FAPI_INF(" p2s_nr_of_frames => %d ", p2s_nr_of_frames); - FAPI_INF(" " ); - FAPI_INF(" " ); - // FAPI_INF(" -----------------------------------------------------"); - - rc = fapiPutScom(i_target, SPIPSS_P2S_CTRL_REG1_0x00070041, data ); - if (rc) { - FAPI_ERR("fapiPutScom(SPIPSS_P2S_CTRL_REG1_0x00070041) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiPutScom(SPIPSS_P2S_CTRL_REG1_0x00070041) failed."); + break; } - // ****************************************************************** - // - set SPIPSS_P2S_CTRL_REG2 - // p2s_inter_frame_delay = 0x0 + // - set SPIPSS_P2S_CTRL_REG2 + // p2s_inter_frame_delay = 0x0 // ****************************************************************** rc = fapiGetScom(i_target, SPIPSS_P2S_CTRL_REG2_0x00070042, data ); - if (rc) { - FAPI_ERR("fapiGetScom(SPIPSS_P2S_CTRL_REG2) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiGetScom(SPIPSS_P2S_CTRL_REG2) failed."); + break; } - // modify_data here - - // e_rc=data.flushTo0(); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - // e_rc=data.setWord(1, 0x41000100); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(p2s_inter_frame_delay,0,17); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - + e_rc |= data.insertFromRight(p2s_inter_frame_delay,0,17); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } - // FAPI_INF(" -----------------------------------------------------"); FAPI_INF(" SPIPSS P2S CTRL_REG_2 Configuration "); - // FAPI_INF(" -----------------------------------------------------"); FAPI_INF(" p2s_inter_frm_delay => %d ", p2s_inter_frame_delay ); - FAPI_INF(" " ); - FAPI_INF(" " ); - // FAPI_INF(" -----------------------------------------------------"); - - rc = fapiPutScom(i_target, SPIPSS_P2S_CTRL_REG2_0x00070042, data ); - if (rc) { - FAPI_ERR("fapiPutScom(SPIPSS_P2S_CTRL_REG2_0x00070042) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiPutScom(SPIPSS_P2S_CTRL_REG2_0x00070042) failed."); + break; } // ****************************************************************** - // - clear SPIPSS_P2S_Wdata_REG + // - clear SPIPSS_P2S_Wdata_REG // ****************************************************************** rc = fapiGetScom(i_target, SPIPSS_P2S_WDATA_REG_0x00070050, data ); - if (rc) { - FAPI_ERR("fapiGetScom(SPIPSS_P2S_WDATA_REG_0x00070050) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiGetScom(SPIPSS_P2S_WDATA_REG_0x00070050) failed."); + break; } -// modify_data here - uint32_t p2s_wdata = 0x0; - e_rc=data.flushTo0(); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.insertFromRight(p2s_wdata ,0,16); if (e_rc) { rc.setEcmdError(e_rc); return rc; } + e_rc |= data.flushTo0(); + e_rc |= data.insertFromRight(p2s_wdata ,0,16); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } - // FAPI_INF(" -----------------------------------------------------"); FAPI_INF(" SPIPSS_P2S_WDATA_REG is cleared "); - // FAPI_INF(" -----------------------------------------------------"); FAPI_INF(" p2s_wdata => %d ", p2s_wdata ); FAPI_INF(" " ); - FAPI_INF(" " ); - // FAPI_INF(" -----------------------------------------------------"); - - - rc = fapiPutScom(i_target, SPIPSS_P2S_WDATA_REG_0x00070050, data ); - if (rc) { - FAPI_ERR("fapiPutScom(SPIPSS_P2Sb_WDATA_REG_0x00070050) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiPutScom(SPIPSS_P2Sb_WDATA_REG_0x00070050) failed."); + break; } - - // ****************************************************************** - // - Set 100ns Register for Interframe delay + // ****************************************************************** + // - Set 100ns Register for Interframe delay // ****************************************************************** rc = fapiGetScom(i_target, SPIPSS_100NS_REG_0x00070028, data ); - if (rc) { - FAPI_ERR("fapiGetScom(SPIPSS_100NS_REG_0x00070028) failed."); return rc; + if (rc) + { + FAPI_ERR("fapiGetScom(SPIPSS_100NS_REG_0x00070028) failed."); + break; } - // modify_data here - + e_rc=data.insertFromRight(spipss_100ns_div_value ,0,32); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } - e_rc=data.insertFromRight(spipss_100ns_div_value ,0,32); if (e_rc) { rc.setEcmdError(e_rc); return rc; } + FAPI_INF(" SPIPSS_100NS_REG is set the value "); + FAPI_INF(" spipss_100ns_div_value_hi => %d ", spipss_100ns_div_value ); + FAPI_INF(" nest_freq => %d ", nest_freq ); + FAPI_INF(" " ); + rc = fapiPutScom(i_target, SPIPSS_100NS_REG_0x00070028, data ); + if (rc) + { + FAPI_ERR("fapiPutScom(SPIPSS_100NS_REG_0x00070028) failed."); + break; + } - // FAPI_INF(" -----------------------------------------------------"); - FAPI_INF(" SPIPSS_100NS_REG is set the value "); - // FAPI_INF(" -----------------------------------------------------"); - FAPI_INF(" spipss_100ns_div_value_hi => %d ", spipss_100ns_div_value ); - FAPI_INF(" nest_freq => %d ", nest_freq ); - FAPI_INF(" " ); - // FAPI_INF(" -----------------------------------------------------"); + } while(0); - rc = fapiPutScom(i_target, SPIPSS_100NS_REG_0x00070028, data ); - if (rc) { - FAPI_ERR("fapiPutScom(SPIPSS_100NS_REG_0x00070028) failed."); return rc; - } + FAPI_INF("PSS initialization end...\n"); + return rc; +} // pss_init +//------------------------------------------------------------------------------ +/** + * pss_reset Performs the reset of the PSS function + * + * @param[in] i_target Chip target + * + * + * @retval ECMD_SUCCESS + * @retval ERROR defined in xml + */ +fapi::ReturnCode +pss_reset(const Target& i_target) +{ + fapi::ReturnCode rc; + uint32_t e_rc = 0; + ecmdDataBufferBase data(64); - FAPI_INF(""); - FAPI_INF("Executing p8_pss_init ...."); + uint32_t attr_proc_pss_init_nest_frequency; + float pss_cycle_ns; + uint32_t pollcount=0; + float max_polls; + uint32_t pss_timeout_us = 1000; - } - // ------------------------------- - /// Reset: perform reset of PSS - else if (mode == PM_RESET) + FAPI_INF("PSS reset start..."); + do { - FAPI_INF("PSS reset..."); - // FAPI_INF("PSS reset not yet supported!!!!..."); - - -// ****************************************************************** -// - POLLing status register for ongoing or errors + // Determine the PowerBus frequency to determine the clock speed + // of the PSS logic. This determines the number of polls needed + // for a given timeout interval. + GETATTR( rc, + ATTR_FREQ_PB, + "ATTR_FREQ_PB", + NULL, + attr_proc_pss_init_nest_frequency); + + pss_cycle_ns = ((1/(float)attr_proc_pss_init_nest_frequency)*4); + FAPI_DBG("pss_cycle_ns = %f; pss_nest_freq = %d", + pss_cycle_ns, attr_proc_pss_init_nest_frequency); + max_polls = (pss_timeout_us / (pss_cycle_ns / 1000)); + FAPI_DBG("computed max polls = %f; pss_timeout_us = %d; pss_cycle_ns = %f", + max_polls, pss_timeout_us, pss_cycle_ns); -// ****************************************************************** - rc = fapiGetScom(i_target, SPIPSS_ADC_STATUS_REG_0x00070003, data ); - if (rc) { - FAPI_ERR("fapiGetScom(SPIPSS_ADC_STATUS_REG_0x00070003) failed."); return rc; - } - FAPI_INF("polling for ongoing to go low ... "); - - while (data.isBitSet(0) && data.isBitClear(5) && pollcount < max_polls) - { - rc = fapiGetScom(i_target, SPIPSS_ADC_STATUS_REG_0x00070003, data ); - if (rc) { - FAPI_ERR("fapiGetScom(SPIPSS_ADC_STATUS_REG_0x00070003) failed."); return rc; - } - FAPI_INF("."); - pollcount++; - - } - - FAPI_INF("Send all the frames from ADC to the device.So now resetting it "); - - pollcount = 0; - -// ****************************************************************** -// - POLLing status register for ongoing or errors - -// ****************************************************************** - rc = fapiGetScom(i_target, SPIPSS_P2S_STATUS_REG_0x00070043, data ); - if (rc) { - FAPI_ERR("fapiGetScom(SPIPSS_P2S_STATUS_REG_0x00070043) failed."); return rc; - } - FAPI_INF("polling for ongoing to go low ... "); - - while (data.isBitSet(0) && data.isBitClear(5)&& pollcount < max_polls) - { - rc = fapiGetScom(i_target, SPIPSS_P2S_STATUS_REG_0x00070043, data ); - if (rc) { - FAPI_ERR("fapiGetScom(SPIPSS_P2S_STATUS_REG_0x00070043) failed."); return rc; - } - FAPI_INF("."); - pollcount++; - } - - FAPI_INF("Sent all the frames from P2S bridge to the device."); - - -// ****************************************************************** -// - Resetting both ADC and P2S bridge -// ****************************************************************** - - - FAPI_INF("Resetting P2S and ADC bridge."); + // ****************************************************************** + // - Poll status register for ongoing or errors to give the + // chance for on-going operations to complete + // ****************************************************************** + FAPI_DBG("Polling for ADC on-going to go low ... "); + + do + { + rc = fapiGetScom(i_target, SPIPSS_ADC_STATUS_REG_0x00070003, data ); + if (rc) + { + FAPI_ERR("fapiGetScom(SPIPSS_ADC_STATUS_REG_0x00070003) failed."); + break; + } + FAPI_INF("."); + pollcount++; + } while (data.isBitSet(0) && data.isBitClear(5) && pollcount < max_polls); + if (!rc.ok()) + { + break; + } + if (pollcount >= max_polls) + { + FAPI_INF("WARNING: SPI ADC did not go to idle in %d us. Reset of PSS macro is commencing anyway", pss_timeout_us); + break; + } + else + { + FAPI_INF("Send all the frames from ADC to the device.So now resetting it "); + } - e_rc=data.flushTo0(); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc=data.setBit(1); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - rc=fapiPutScom(i_target, SPIPSS_ADC_RESET_REGISTER_0x00070005 , data); if(rc) return rc; - rc=fapiPutScom(i_target, SPIPSS_P2S_RESET_REGISTER_0x00070045 , data); if(rc) return rc; + // ****************************************************************** + // - Poll status register for ongoing or errors to give the + // chance for on-going operations to complete + // ****************************************************************** - // Reset PMC. However, the bit used means the entire PMC must be reconfigured! - //e_rc=data.clear(); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - //e_rc=data.setBit(12); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - // rc=fapiPutScom(i_target, PMC_MODE_REG_0x00062000 , data); if(rc) return rc; + FAPI_INF("Polling for P2S on-going to go low ... "); + pollcount = 0; + do + { + rc = fapiGetScom(i_target, SPIPSS_P2S_STATUS_REG_0x00070043, data ); + if (rc) + { + FAPI_ERR("fapiGetScom(SPIPSS_P2S_STATUS_REG_0x00070043) failed."); + break; + } + FAPI_INF("."); + pollcount++; + } while (data.isBitSet(0) && data.isBitClear(5) && pollcount < max_polls); + if (!rc.ok()) + { + break; + } + if (pollcount >= max_polls) + { + FAPI_INF("WARNING: SPI P2S did not go to idle in %d us. Reset of PSS macro is commencing anyway", pss_timeout_us); + break; + } + else + { + FAPI_INF("Sent all the frames from P2S bridge to the device."); + } - FAPI_INF("Reset procedure is done ."); + // ****************************************************************** + // - Resetting both ADC and P2S bridge + // ****************************************************************** - } + FAPI_INF("Resetting P2S and ADC bridge."); - /// ------------------------------- - /// Unsupported Mode + e_rc=data.flushTo0(); + e_rc=data.setBit(1); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } - else { + rc = fapiPutScom(i_target, SPIPSS_ADC_RESET_REGISTER_0x00070005 , data); + if (rc) + { + FAPI_ERR("fapiPutScom(SPIPSS_ADC_RESET_REGISTER_0x00070005) failed."); + break; + } - FAPI_ERR("Unknown mode passed to p8_pss_init. Mode %x ....", mode); - uint32_t & MODE = mode; - FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PSS_CODE_BAD_MODE); + rc = fapiPutScom(i_target, SPIPSS_P2S_RESET_REGISTER_0x00070045 , data); + if (rc) + { + FAPI_ERR("fapiPutScom(SPIPSS_P2S_RESET_REGISTER_0x00070045) failed."); + break; + } - } + } while (0); + FAPI_INF("PSS reset end...\n"); return rc; - -} +} // pss_reset - -//#ifdef FAPIECMD } //end extern C -//#endif - - - -// Backups - -// ---------------------------------------------------------------------- -// Constant definitions -// ---------------------------------------------------------------------- -// CONST_UINT64_T( SPIPSS_ADC_CTRL_REG0_0x00070000 , ULL(0x00070000) ); -// CONST_UINT64_T( SPIPSS_ADC_CTRL_REG1_0x00070001 , ULL(0x00070001) ); -// CONST_UINT64_T( SPIPSS_ADC_CTRL_REG2_0x00070002 , ULL(0x00070002) ); -// CONST_UINT64_T( SPIPSS_ADC_STATUS_REG_0x00070003 , ULL(0x00070003) ); -// CONST_UINT64_T( SPIPSS_ADC_CMD_REG_0x00070004 , ULL(0x00070004) ); - -// CONST_UINT64_T( SPIPSS_ADC_WDATA_REG_0x00070010 , ULL(0x00070010) ); -// CONST_UINT64_T( SPIPSS_ADC_RDATA_REG0_0x00070020 , ULL(0x00070020) ); -// CONST_UINT64_T( SPIPSS_ADC_RDATA_REG1_0x00070021 , ULL(0x00070021) ); -// CONST_UINT64_T( SPIPSS_ADC_RDATA_REG2_0x00070022 , ULL(0x00070022) ); -// CONST_UINT64_T( SPIPSS_ADC_RDATA_REG3_0x00070023 , ULL(0x00070023) ); -// CONST_UINT64_T( SPIPSS_100NS_REG_0x00070028 , ULL(0x00070028) ); -// CONST_UINT64_T( SPIPSS_P2S_CTRL_REG0_0x00070040 , ULL(0x00070040) ); -// CONST_UINT64_T( SPIPSS_P2S_CTRL_REG1_0x00070041 , ULL(0x00070041) ); -// CONST_UINT64_T( SPIPSS_P2S_CTRL_REG2_0x00070042 , ULL(0x00070042) ); -// CONST_UINT64_T( SPIPSS_P2S_STATUS_REG_0x00070043 , ULL(0x00070043) ); -// CONST_UINT64_T( SPIPSS_P2S_COMMAND_REG_0x00070044 , ULL(0x00070044) ); - -// CONST_UINT64_T( SPIPSS_P2S_WDATA_REG_0x00070050 , ULL(0x00070050) ); -// CONST_UINT64_T( SPIPSS_P2S_RDATA_REG_0x00070060 , ULL(0x00070060) ); -// CONST_UINT64_T( SPIPSS_ADC_RESET_REGISTER_0x00070005 , ULL(0x00070005) ); -// CONST_UINT64_T( SPIPSS_P2S_RESET_REGISTER_0x00070045 , ULL(0x00070045) ); - - - - - - - -// if (hwctrl_target == 13) -// { -// hwctrl_device = 1; -// FAPI_INF(" hwctrl_target_DPSS " ); -// } -// else if (hwctrl_target == 10) -// { -// hwctrl_device = 0; -// FAPI_INF(" hwctrl_target_APSS " ); -// } -// else -// { -// FAPI_INF(" " ); -// FAPI_ERR("wrong device taget : make sure that you use 0xA=APSS and 0XD=DPSS no other value works"); -// FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PSS_WRONG_DEVICE); -// return rc; -// } - - // ********************************************** - // Add All Attributes related to hwctrl here - // ********************************************** - - -// hwctrl_frame_size = 0x10 ; -// hwctrl_clk_pol = 0; -// hwctrl_clk_pha = 0; -// hwctrl_clk_divider= 0x1D; -// hwctrl_inter_frame_delay = 0x0; -// nest_freq = 600; -// spipss_freq = 10; -// hwctrl_in_count=0; -// hwctrl_out_count=0; -// hwctrl_in_delay=0; - - - - -// uint8_t attr_pm_spipss_frame_size_set = 16 ; -// uint8_t attr_pm_spipss_out_count_set = 16; -// uint8_t attr_pm_spipss_in_delay_set = 0; -// uint8_t attr_pm_spipss_in_count_set = 16; -// uint8_t attr_pm_spipss_clock_polarity_set =0 ; -// uint8_t attr_pm_spipss_clock_phase_set = 0; -// //uint32_t attr_pm_spipss_clock_divider_set = 0; -// uint32_t attr_pm_spipss_inter_frame_delay_set = 1; - - - -// rc = FAPI_ATTR_SET(ATTR_PM_SPIPSS_FRAME_SIZE, &l_pTarget, attr_pm_spipss_frame_size_set); if (rc) return rc; -// rc = FAPI_ATTR_SET(ATTR_PM_SPIPSS_OUT_COUNT, &l_pTarget, attr_pm_spipss_out_count_set); if (rc) return rc; -// rc = FAPI_ATTR_SET(ATTR_PM_SPIPSS_IN_COUNT, &l_pTarget, attr_pm_spipss_in_count_set); if (rc) return rc; -// //---------------------------------------------------------- -// rc = FAPI_ATTR_SET(ATTR_PM_SPIPSS_IN_DELAY, &l_pTarget, attr_pm_spipss_in_delay_set); if (rc) return rc; - -// //---------------------------------------------------------- -// rc = FAPI_ATTR_SET(ATTR_PM_SPIPSS_CLOCK_POLARITY, &l_pTarget, attr_pm_spipss_clock_polarity_set); if (rc) return rc; - -// //---------------------------------------------------------- -// rc = FAPI_ATTR_SET(ATTR_PM_SPIPSS_CLOCK_PHASE, &l_pTarget, attr_pm_spipss_clock_phase_set); if (rc) return rc; - -// //---------------------------------------------------------- -// rc = FAPI_ATTR_SET(ATTR_PM_SPIPSS_INTER_FRAME_DELAY, &l_pTarget, attr_pm_spipss_inter_frame_delay_set); if (rc) return rc; - -// //---------------------------------------------------------- -// // rc = FAPI_ATTR_SET(ATTR_PM_SPIPSS_INTER_FRAME_DELAY_WRITE_SETTNG, &l_pTarget, attr_pm_spipss_interframe_delay_write_status_value_set); - - - -// //---------------------------------------------------------- -// // rc = FAPI_ATTR_SET(ATTR_PM_SPIPSS_CLOCK_DIVIDER, &l_pTarget, attr_pm_spipss_clock_divider_set); - - - - diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.H index b4c37bad1..6bc196142 100755 --- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.H +++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.H @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_pss_init.H,v 1.4 2012/11/27 18:11:55 stillgs Exp $ +// $Id: p8_pss_init.H,v 1.5 2013/08/02 19:21:26 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pss_init.H,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -33,13 +33,18 @@ // *! Initializes the PSS macro , resets it and configures the required // *! Attributes //------------------------------------------------------------------------------ -// Calls -/// \param[in] i_target Chip target -/// \param[in] mode - -// function pointer typedef definition for HWP call support +/** + * p8_pss_init calls the underlying routine based on mode parameter + * + * @param[in] i_target Chip target + * @param[in] mode Control mode for the procedure + * PM_INIT, PM_CONFIG, PM_RESET + * + * @retval ECMD_SUCCESS + * @retval ERROR defined in xml + */ typedef fapi::ReturnCode (*p8_pss_init_FP_t) (const fapi::Target&, uint32_t); extern "C" { diff --git a/src/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.C b/src/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.C index 8aafead51..c90e1b187 100644 --- a/src/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.C +++ b/src/usr/hwpf/hwp/occ/p8_pmc_force_vsafe.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_pmc_force_vsafe.C,v 1.11 2013/04/01 04:16:44 stillgs Exp $ +// $Id: p8_pmc_force_vsafe.C,v 1.12 2013/08/02 19:26:22 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pmc_force_vsafe.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -135,11 +135,12 @@ p8_pmc_force_vsafe(const fapi::Target& i_target ) { fapi::ReturnCode rc; ecmdDataBufferBase data(64); + ecmdDataBufferBase pmcstatusreg(64); uint32_t e_rc = 0; - + // maximum number of status poll attempts to make before giving up - const uint32_t MAX_POLL_ATTEMPTS = 0x200; - + const uint32_t MAX_POLL_ATTEMPTS = 0x200; + uint32_t count = 0; // size_t i; uint16_t pvsafe = 0; @@ -149,94 +150,107 @@ p8_pmc_force_vsafe(const fapi::Target& i_target ) uint16_t pstate_actual = 0; uint8_t DONE_FLAG = 0; uint8_t any_error = 0; - uint8_t any_ongoing =0; + uint8_t any_ongoing = 0; uint8_t dummy = 0; - uint8_t debug_mode = 1 ; - FAPI_INF("Executing p8_pmc_force_vsafe ...."); + FAPI_INF("p8_pmc_force_vsafe start ...."); - // ****************************************************************** - // - PMC_MODE_REG checking - // ****************************************************************** - rc = fapiGetScom(i_target, PMC_MODE_REG_0x00062000, data ); - if (rc) + do { - FAPI_ERR("fapiGetScom(PMC_MODE_REG_0x00062000) failed."); - return rc; - } + // ****************************************************************** + // - PMC_MODE_REG checking + // ****************************************************************** + rc = fapiGetScom(i_target, PMC_MODE_REG_0x00062000, data ); + if (rc) + { + FAPI_ERR("fapiGetScom(PMC_MODE_REG_0x00062000) failed."); + break; + } - if ( (data.isBitClear(0) && data.isBitClear(1) )) - { - FAPI_ERR("PMC is not in HARDWARE or FIRMWARE AUCTION MODE"); - // FAPI_SET_HWP_ERROR(rc, RC_PROCPM_INITAL_AUCTION_MODE_ERR); - return rc; - } + if ( (data.isBitClear(0) && data.isBitClear(1) )) + { + FAPI_INF("PMC is not in HARDWARE or FIRMWARE AUCTION MODE so hardware mechanism cannot be used."); + break; + } - if ( ( data.isBitClear(3) )) - { - FAPI_ERR("PMC is disabled for Voltage changes"); - FAPI_SET_HWP_ERROR(rc, RC_PROCPM_VOLTAGE_CHAGE_MODE_ERR); - return rc; - } + if ( ( data.isBitClear(3) )) + { + FAPI_ERR("PMC is disabled for Voltage changes"); + const uint64_t & PMCMODE = data.getDoubleWord(0); + FAPI_SET_HWP_ERROR(rc, RC_PROCPM_VOLTAGE_CHANGE_MODE_ERR); + break; + } - if ( ( !data.isBitClear(5) )) - { - FAPI_ERR("PMC is disabled PMC_MASTER_SEQUENCER"); - FAPI_SET_HWP_ERROR(rc, RC_PROCPM_MST_SEQUENCER_STATE_ERR); - return rc; - } + if ( ( !data.isBitClear(5) )) + { + FAPI_ERR("PMC is disabled PMC_MASTER_SEQUENCER"); + const uint64_t & PMCMODE = data.getDoubleWord(0); + FAPI_SET_HWP_ERROR(rc, RC_PROCPM_MST_SEQUENCER_STATE_ERR); + break; + } - // **************************************************************************** - // - PMC_STATE_MONITOR_AND_CTRL_REG PMC_PARAMETER_REG1 before the psafe - // **************************************************************************** + // **************************************************************************** + // - PMC_STATE_MONITOR_AND_CTRL_REG PMC_PARAMETER_REG1 before the psafe + // **************************************************************************** - rc = fapiGetScom(i_target, PMC_PARAMETER_REG1_0x00062006, data ); - if (rc) - { - FAPI_ERR("fapiGetScom(PMC_PARAMETER_REG1_0x00062006) failed."); - return rc; - } + rc = fapiGetScom(i_target, PMC_PARAMETER_REG1_0x00062006, data ); + if (rc) + { + FAPI_ERR("fapiGetScom(PMC_PARAMETER_REG1_0x00062006) failed."); + break; + } - e_rc = data.extractToRight( &pvsafe,22,8);if (e_rc) { rc.setEcmdError(e_rc); return rc; } + e_rc |= data.extractToRight( &pvsafe,22,8); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } - rc = fapiGetScom(i_target, PMC_PSTATE_MONITOR_AND_CTRL_REG_0x00062002, data ); - if (rc) - { - FAPI_ERR("fapiGetScom(PMC_PSTATE_MONITOR_AND_CTRL_REG_0x00062002) failed."); - return rc; - } + rc = fapiGetScom(i_target, PMC_PSTATE_MONITOR_AND_CTRL_REG_0x00062002, data ); + if (rc) + { + FAPI_ERR("fapiGetScom(PMC_PSTATE_MONITOR_AND_CTRL_REG_0x00062002) failed."); + break; + } - e_rc = data.extractToRight( &pstate_target,0,8);if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc = data.extractToRight( &pstate_step_target,8,8);if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc = data.extractToRight( &pstate_actual,16,8);if (e_rc) { rc.setEcmdError(e_rc); return rc; } - FAPI_INF(" voltage values before the hearbeat loss " ); - FAPI_INF(" pvsafe => %x , ptarget => %x , pstarget => %x ,pactual => %x " , pvsafe , pstate_target ,pstate_step_target , pstate_actual); + e_rc |= data.extractToRight( &pstate_target,0,8); + e_rc |= data.extractToRight( &pstate_step_target,8,8); + e_rc |= data.extractToRight( &pstate_actual,16,8); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } - // ****************************************************************** - // - SEE PMC_STATUS_REG if debug_mode ==1 - // ****************************************************************** + FAPI_INF(" voltage values before the hearbeat loss " ); + FAPI_INF(" pvsafe => %x , ptarget => %x , pstarget => %x ,pactual => %x " , pvsafe , pstate_target ,pstate_step_target , pstate_actual); - if (debug_mode) - { + // ****************************************************************** + // - SEE PMC_STATUS_REG if debug_mode ==1 + // ****************************************************************** rc = fapiGetScom(i_target, PMC_STATUS_REG_0x00062009, data ); if (rc) { FAPI_ERR("fapiGetScom(PMC_STATUS_REG_0x00062009) failed."); - return rc; + break; } FAPI_DBG(" debug_mode : status_b4_heartbeat_loss => 0x%16llx", data.getDoubleWord(0)); - + l_set = data.isBitSet(0); FAPI_DBG(" pstate_processing_is_susp => %x ", l_set ) ; l_set = data.isBitSet(1); FAPI_DBG(" gpsa_bdcst_error => %x ", l_set ); - e_rc = data.extractToRight( &dummy,2,3);if (e_rc) { rc.setEcmdError(e_rc); return rc; } + e_rc = data.extractToRight( &dummy,2,3); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } FAPI_DBG(" gpsa_bdcst_resp_info => %x ", dummy ); - // l_set = data.isBitSet(2); - // FAPI_DBG(" gpsa_bdcst_resp_dbgo => %x ", l_set ); l_set = data.isBitSet(5); FAPI_DBG(" gpsa_vchg_error => %x ", l_set ); l_set = data.isBitSet(6); @@ -254,200 +268,230 @@ p8_pmc_force_vsafe(const fapi::Target& i_target ) l_set = data.isBitSet(12); FAPI_DBG(" istate_processing_is_susp => %x ", l_set ); - } // if(debug_mode) - // ****************************************************************** - // - PMC_OCC_HEARTBEAT_REG - // ****************************************************************** + // ****************************************************************** + // - PMC_OCC_HEARTBEAT_REG + // ****************************************************************** - FAPI_INF("Forcing PMC Heartbeat loss "); + FAPI_INF("Forcing PMC Heartbeat loss "); - e_rc = data.flushTo0(); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - e_rc = data.setBit(16); if (e_rc) { rc.setEcmdError(e_rc); return rc; } - - rc = fapiPutScom(i_target, PMC_OCC_HEARTBEAT_REG_0x00062066, data ); - if (rc) - { - FAPI_ERR("fapiPutScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed."); return rc; - } + e_rc |= data.flushTo0(); + e_rc |= data.setBit(16); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } - rc = fapiPutScom(i_target, PMC_OCC_HEARTBEAT_REG_0x00062066, data ); - if (rc) - { - FAPI_ERR("fapiPutScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed."); return rc; - } - - // \todo check with Thomas B. on how immediate the on-going will assert. - // This delay may be covered under the "fapiGetScom" operation. - // rc = fapiDelay(); - DONE_FLAG = 0; - - // ****************************************************************** - // POLL for PMC_STATUS_REG --> BIT_8 to go to 0 or any errors - // ****************************************************************** - FAPI_DBG("Start polling for ongoing to go low ... "); - // Loop only if count is less thean poll attempts and DONE_FLAG = 0 and no error - for(count=0 , DONE_FLAG = 0 , any_error = 0; count<=MAX_POLL_ATTEMPTS && DONE_FLAG == 0 && any_error == 0; count++) - { - rc = fapiGetScom(i_target, PMC_STATUS_REG_0x00062009, data ); + rc = fapiPutScom(i_target, PMC_OCC_HEARTBEAT_REG_0x00062066, data ); if (rc) { - FAPI_ERR("fapiGetScom(PMC_STATUS_REG_0x00062009) failed."); - return rc; + FAPI_ERR("fapiPutScom(PMC_OCC_HEARTBEAT_REG_0x00062066) failed."); + break; } - FAPI_DBG(" poll_status => 0x%16llx", data.getDoubleWord(0)); - /* any_error = !(data.isBitClear(0) && data.isBitClear(1) && data.isBitClear(5) && - data.isBitClear(6) && data.isBitClear(10) && data.isBitClear(11) && - data.isBitClear(12)); - */ - any_error = !(data.isBitClear(1) && data.isBitClear(5) && - data.isBitClear(6) && data.isBitClear(10) && data.isBitClear(11) && - data.isBitClear(12)); - any_ongoing = !(data.isBitClear(8) && data.isBitClear(7)&& data.isBitClear(9)); - // Check for voltage change has any error - if ( any_error == 1) - { - // An error was detected - - // \todo These messages will fail in HostBoot as genHexRightStr - // cannot be used. - // Suggest doing a walking bit check (if (isBitSet(x))) to write - // which bits are on - // FAPI_DBG(" -----------------------------------------------------"); - FAPI_DBG(" PMC_STATUS_REG is Read after the opn ----------> "); - // FAPI_DBG(" -----------------------------------------------------"); - - l_set = data.isBitSet(0); - FAPI_ERR(" pstate_processing_is_susp => %x ", l_set ) ; - l_set = data.isBitSet(1); - FAPI_ERR(" gpsa_bdcst_error => %x ", l_set ); - - e_rc = data.extractToRight( &dummy,2,3);if (e_rc) { rc.setEcmdError(e_rc); return rc; } - FAPI_ERR(" gpsa_bdcst_resp_info => %x ", dummy ); - // l_set = data.isBitSet(2); - // FAPI_ERR(" gpsa_bdcst_resp_dbgo => %x ", l_set ); - l_set = data.isBitSet(5); - FAPI_ERR(" gpsa_vchg_error => %x ", l_set ); - l_set = data.isBitSet(6); - FAPI_ERR(" gpsa_timeout_error => %x ", l_set ); - l_set = data.isBitSet(7); - FAPI_ERR(" gpsa_chg_ongoing => %x ", l_set ); - l_set = data.isBitSet(8); - FAPI_ERR(" volt_chg_ongoing => %x ", l_set ); - l_set = data.isBitSet(9); - FAPI_ERR(" brd_cst_ongoing => %x ", l_set ); - l_set = data.isBitSet(10); - FAPI_ERR(" gpsa_table_error => %x ", l_set ); - l_set = data.isBitSet(11); - FAPI_ERR(" pstate_interchip_error => %x ", l_set ); - l_set = data.isBitSet(12); - FAPI_ERR(" istate_processing_is_susp => %x ", l_set ); - - // FAPI_DBG(" -----------------------------------------------------"); - - FAPI_ERR("Error detected with PMC on-going deassertion during safe voltage movement "); - FAPI_SET_HWP_ERROR(rc, RC_PROCPM_VLT_ERROR); - return rc; - - } // end of error if - else if (any_ongoing == 0) + // \todo check with Thomas B. on how immediate the on-going will assert. + // This delay may be covered under the "fapiGetScom" operation. + // rc = fapiDelay(); + + // ****************************************************************** + // POLL for PMC_STATUS_REG --> BIT_8 to go to 0 or any errors + // ****************************************************************** + FAPI_DBG("Start polling for ongoing to go low ... "); + // Loop only if count is less thean poll attempts and DONE_FLAG = 0 and no error + for(count=0; ((count<=MAX_POLL_ATTEMPTS) && (DONE_FLAG == 0) && (any_error == 0)); count++) { - // Voltage change done (not on-going) and not errors - - // \todo Check that PVSAFE Pstate (in PMC Parameter Reg1) is the value - // in the voltage stepper in the following fields of - // PMC_STATE_MONITOR_AND_CRTL_REG - // 0:7 - Global Pstate Target - // 8:15 - Global Pstate Step Target - // 16:23 - Global Pstate Actual - // if the above do not match, post an error - - FAPI_DBG(" status_after_heartbeat_loss => 0x%16llx", data.getDoubleWord(0)); - - l_set = data.isBitSet(0); - FAPI_DBG(" pstate_processing_is_susp => %x ", l_set ) ; - l_set = data.isBitSet(1); - FAPI_DBG(" gpsa_bdcst_error => %x ", l_set ); - - e_rc = data.extractToRight( &dummy,2,3);if (e_rc) { rc.setEcmdError(e_rc); return rc; } - FAPI_DBG(" gpsa_bdcst_resp_info => %x ", dummy ); - - l_set = data.isBitSet(5); - FAPI_DBG(" gpsa_vchg_error => %x ", l_set ); - l_set = data.isBitSet(6); - FAPI_DBG(" gpsa_timeout_error => %x ", l_set ); - l_set = data.isBitSet(7); - FAPI_DBG(" gpsa_chg_ongoing => %x ", l_set ); - l_set = data.isBitSet(8); - FAPI_DBG(" volt_chg_ongoing => %x ", l_set ); - l_set = data.isBitSet(9); - FAPI_DBG(" brd_cst_ongoing => %x ", l_set ); - l_set = data.isBitSet(10); - FAPI_DBG(" gpsa_table_error => %x ", l_set ); - l_set = data.isBitSet(11); - FAPI_DBG(" pstate_interchip_error => %x ", l_set ); - l_set = data.isBitSet(12); - FAPI_DBG(" istate_processing_is_susp => %x ", l_set ); - - FAPI_DBG("Voltage_change done without any error ... "); - rc = fapiGetScom(i_target, PMC_PARAMETER_REG1_0x00062006, data ); + rc = fapiGetScom(i_target, PMC_STATUS_REG_0x00062009, data ); if (rc) { - FAPI_ERR("fapiGetScom(PMC_PARAMETER_REG1_0x00062006) failed."); - return rc; + FAPI_ERR("fapiGetScom(PMC_STATUS_REG_0x00062009) failed."); + break; } - e_rc = data.extractToRight( &pvsafe,22,8); - if (e_rc) {rc.setEcmdError(e_rc); return rc; } + FAPI_DBG(" poll_status => 0x%16llx", data.getDoubleWord(0)); - rc = fapiGetScom(i_target, PMC_PSTATE_MONITOR_AND_CTRL_REG_0x00062002, data ); - if (rc) - { - FAPI_ERR("fapiGetScom(PMC_PSTATE_MONITOR_AND_CTRL_REG_0x00062002) failed."); - return rc; - } + any_error = !(data.isBitClear(1) && data.isBitClear(5) && + data.isBitClear(6) && data.isBitClear(10) && data.isBitClear(11) && + data.isBitClear(12)); - e_rc = data.extractToRight( &pstate_target,0,8); - e_rc = data.extractToRight( &pstate_step_target,8,8); - e_rc = data.extractToRight( &pstate_actual,16,8); - if (e_rc) - { - rc.setEcmdError(e_rc); - return rc; - } - FAPI_INF(" pvsafe => %x , ptarget => %x , pstarget => %x ,pactual => %x " , pvsafe , pstate_target ,pstate_step_target , pstate_actual); + any_ongoing = !(data.isBitClear(8) && data.isBitClear(7)&& data.isBitClear(9)); + + // Save PMC Status + pmcstatusreg = data; - if (pstate_target != pvsafe || pstate_step_target != pvsafe || pstate_actual != pvsafe ) + // Check for voltage change has any error + if (any_error == 1) + { + // An error was detected + + // \todo These messages will fail in HostBoot as genHexRightStr + // cannot be used. + // Suggest doing a walking bit check (if (isBitSet(x))) to write + // which bits are on + FAPI_DBG(" PMC_STATUS_REG is Read after the opn ----------> "); + + if (data.isBitSet(0)) + FAPI_ERR(" pstate_processing_is_susp active"); + if (data.isBitSet(1)) + FAPI_ERR(" gpsa_bdcst_error active"); + + e_rc = data.extractToRight( &dummy,2,3); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } + if (dummy) + FAPI_ERR(" gpsa_bdcst_resp_info is non-zero => %x ", dummy ); + + if (data.isBitSet(5)) + FAPI_ERR(" gpsa_vchg_error active"); + if (data.isBitSet(6)) + FAPI_ERR(" gpsa_timeout_error active"); + if (data.isBitSet(7)) + FAPI_ERR(" gpsa_chg_ongoing active"); + if (data.isBitSet(8)) + FAPI_ERR(" volt_chg_ongoing active"); + if (data.isBitSet(9)) + FAPI_ERR(" brd_cst_ongoing active"); + if (data.isBitSet(10)) + FAPI_ERR(" gpsa_table_error active"); + if (data.isBitSet(11)) + FAPI_ERR(" pstate_interchip_error active"); + if (data.isBitSet(12)) + FAPI_ERR(" istate_processing_is_susp active"); + + FAPI_ERR("Error detected with PMC on-going deassertion during safe voltage movement "); + const uint64_t & PMCSTATUS = data.getDoubleWord(0); + FAPI_SET_HWP_ERROR(rc, RC_PROCPM_VLT_ERROR); + break; + + } // end of error if + else if (any_ongoing == 0) { - FAPI_ERR("Pstate monitor and control register targets didnot match"); - FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PSTATE_MONITOR_ERR); - return rc; + // Voltage change done (not on-going) and not errors + + // \todo Check that PVSAFE Pstate (in PMC Parameter Reg1) is the value + // in the voltage stepper in the following fields of + // PMC_STATE_MONITOR_AND_CRTL_REG + // 0:7 - Global Pstate Target + // 8:15 - Global Pstate Step Target + // 16:23 - Global Pstate Actual + // if the above do not match, post an error + + FAPI_DBG(" status_after_heartbeat_loss => 0x%16llx", data.getDoubleWord(0)); + + l_set = data.isBitSet(0); + FAPI_DBG(" pstate_processing_is_susp => %x ", l_set ) ; + l_set = data.isBitSet(1); + FAPI_DBG(" gpsa_bdcst_error => %x ", l_set ); + + e_rc = data.extractToRight( &dummy,2,3); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } + FAPI_DBG(" gpsa_bdcst_resp_info => %x ", dummy ); + + l_set = data.isBitSet(5); + FAPI_DBG(" gpsa_vchg_error => %x ", l_set ); + l_set = data.isBitSet(6); + FAPI_DBG(" gpsa_timeout_error => %x ", l_set ); + l_set = data.isBitSet(7); + FAPI_DBG(" gpsa_chg_ongoing => %x ", l_set ); + l_set = data.isBitSet(8); + FAPI_DBG(" volt_chg_ongoing => %x ", l_set ); + l_set = data.isBitSet(9); + FAPI_DBG(" brd_cst_ongoing => %x ", l_set ); + l_set = data.isBitSet(10); + FAPI_DBG(" gpsa_table_error => %x ", l_set ); + l_set = data.isBitSet(11); + FAPI_DBG(" pstate_interchip_error => %x ", l_set ); + l_set = data.isBitSet(12); + FAPI_DBG(" istate_processing_is_susp => %x ", l_set ); + + // Save PMC Status + pmcstatusreg = data; + + FAPI_DBG("Voltage_change done without any error ... "); + rc = fapiGetScom(i_target, PMC_PARAMETER_REG1_0x00062006, data ); + if (rc) + { + FAPI_ERR("fapiGetScom(PMC_PARAMETER_REG1_0x00062006) failed."); + break; + } + + e_rc = data.extractToRight( &pvsafe,22,8); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } + + rc = fapiGetScom(i_target, PMC_PSTATE_MONITOR_AND_CTRL_REG_0x00062002, data ); + if (rc) + { + FAPI_ERR("fapiGetScom(PMC_PSTATE_MONITOR_AND_CTRL_REG_0x00062002) failed."); + break; + } + + e_rc |= data.extractToRight( &pstate_target,0,8); + e_rc |= data.extractToRight( &pstate_step_target,8,8); + e_rc |= data.extractToRight( &pstate_actual,16,8); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } + FAPI_INF(" pvsafe => %x , ptarget => %x , pstarget => %x ,pactual => %x " , pvsafe , pstate_target ,pstate_step_target , pstate_actual); + + if (pstate_target != pvsafe || pstate_step_target != pvsafe || pstate_actual != pvsafe ) + { + FAPI_ERR("Pstate monitor and control register targets did not match"); + const uint64_t & PSTATETARGET = (uint64_t)pstate_target; + const uint64_t & PSTATESTEPTARGET = (uint64_t)pstate_step_target; + const uint64_t & PSTATEACTUAL = (uint64_t)pstate_actual; + const uint64_t & PMCSTATUS = pmcstatusreg.getDoubleWord(0); + FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PSTATE_MONITOR_ERR); + break; + } + DONE_FLAG = 1; } - DONE_FLAG = 1; - } - else // voltage change is ongoing so wait and then poll again - { - FAPI_DBG(" status => 0x%16llx", data.getDoubleWord(0)); - - // wait for 1 millisecond in hardware, 1000 cycles in sim - rc = fapiDelay(1000*1000, 20000000); - if (rc) + else // voltage change is ongoing so wait and then poll again { - FAPI_ERR("fapi delay ends up with error"); - return rc ; + FAPI_DBG(" status => 0x%16llx", data.getDoubleWord(0)); + + // wait for 1 millisecond in hardware + rc = fapiDelay(1000*1000, 20000000); + if (rc) + { + FAPI_ERR("fapi delay ends up with error"); + break; + } } + } // For loop + // Inner loop error check + if (!rc.ok()) + { + break; } - } // For loop - // If we get here, the above loop timed out - if (count>=MAX_POLL_ATTEMPTS) - { - FAPI_ERR("Timed out wait for voltage change on-going to drop"); - FAPI_SET_HWP_ERROR(rc, RC_PROCPM_VLT_TIMEOUT); - return rc; - } - // simcheckpoint("pcn_o2s_poll_status_12"); + // Check if the above loop timed out + if (count>=MAX_POLL_ATTEMPTS) + { + FAPI_ERR("Timed out wait for voltage change on-going to drop"); + const uint64_t & PSTATETARGET = (uint64_t)pstate_target; + const uint64_t & PSTATESTEPTARGET = (uint64_t)pstate_step_target; + const uint64_t & PSTATEACTUAL = (uint64_t)pstate_actual; + const uint64_t & PMCSTATUS = pmcstatusreg.getDoubleWord(0); + FAPI_SET_HWP_ERROR(rc, RC_PROCPM_VLT_TIMEOUT); + break; + } + + } while(0); + + FAPI_INF("p8_pmc_force_vsafe end ...."); return rc ; } // Procedure diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_force_vsafe_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_force_vsafe_errors.xml index 908ff8c97..c8d820ab1 100644 --- a/src/usr/hwpf/hwp/runtime_errors/p8_force_vsafe_errors.xml +++ b/src/usr/hwpf/hwp/runtime_errors/p8_force_vsafe_errors.xml @@ -20,44 +20,49 @@ - + RC_PROCPM_VLT_TIMEOUT - voltage change timeout for the ongoing operation completion. + Voltage change timeout for the ongoing operation completion. + PSTATETARGET + PSTATESTEPTARGET + PSTATEACTUAL + PMCSTATUS RC_PROCPM_VLT_ERROR - voltage change not done because of errors on the status register. + Voltage change not done because of errors on the status register. + PMCSTATUS RC_PROCPM_PSTATE_MONITOR_ERR - voltage change done but expected pstate didnot match after completion. + Voltage change done but expected pstate did not match after completion. + PSTATETARGET + PSTATESTEPTARGET + PSTATEACTUAL + PMCSTATUS - RC_PROCPM_VOLTAGE_CHAGE_MODE_ERR + RC_PROCPM_VOLTAGE_CHANGE_MODE_ERR PMC is disabled for Voltage changes. + PMCMODE - RC_PROCPM_INITAL_AUCTION_MODE_ERR + RC_PROCPM_INITIAL_AUCTION_MODE_ERR PMC is not in HARDWARE or FIRMWARE AUCTION MODE. RC_PROCPM_MST_SEQUENCER_STATE_ERR PMC is disabled PMC_MASTER_SEQUENCER. + PMCMODE - - - - - - diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml index 357edc1de..fb613df03 100644 --- a/src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml +++ b/src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml @@ -20,19 +20,35 @@ - + - RC_P8_PBA_INIT_INCORRECT_MODE + RC_PMPROC_PBA_INIT_INCORRECT_MODE pba init procedure incorrect mode by calling function + PM_MODE - - RC_P8_PBA_INIT_PUTSCOM_FAILED + RC_PMPROC_PBA_INIT_PUTSCOM_FAILED pba init putscom failed . + + + RC_PMPROC_PBA_SLAVE_RESET_TIMEOUT + pba_init timed out waited for the PBA slave to reset. + POLLCOUNT + SLAVENUM + PBASLVREG + + + + RC_PMPROC_PBA_SLAVE_BUSY_AFTER_RESET + pba_init detected a busy PBA slave after the slave was reset. + POLLCOUNT + SLAVENUM + PBASLVREG + diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pm_prep_for_reset_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pm_prep_for_reset_errors.xml index f7c26cd96..9896f2bb3 100644 --- a/src/usr/hwpf/hwp/runtime_errors/p8_pm_prep_for_reset_errors.xml +++ b/src/usr/hwpf/hwp/runtime_errors/p8_pm_prep_for_reset_errors.xml @@ -20,16 +20,21 @@ - + + + + RC_PROCPM_PREP_UNSUPPORTED_MODE_ERR + Mode parameter value not supported + MODE + RC_PROCPM_PREP_TARGET_ERR Errors in Targets passed -- PM_RESET-MODE - RC_PROCPM_PREP_CODE_PROC_OCC Errors in proc_occ_control.C -- PM_RESET-MODE diff --git a/src/usr/runtime/common/hsvc_exdata.C b/src/usr/runtime/common/hsvc_exdata.C index 447f6246b..86cd1ebaa 100644 --- a/src/usr/runtime/common/hsvc_exdata.C +++ b/src/usr/runtime/common/hsvc_exdata.C @@ -46,6 +46,8 @@ HSVC_LOAD_ATTR( ATTR_CHIP_UNIT_POS ); HSVC_LOAD_ATTR( ATTR_PM_SPWUP_FSP ); HSVC_LOAD_ATTR( ATTR_PM_SPWUP_OCC ); HSVC_LOAD_ATTR( ATTR_PM_SPWUP_PHYP ); +HSVC_LOAD_ATTR( ATTR_PM_SPWUP_OHA_FLAG ); +HSVC_LOAD_ATTR( ATTR_PM_SPWUP_IGNORE_XSTOP_FLAG ); // -- Input: ../../xml/attribute_info/scratch_attributes.xml -- // No attributes found // -- Input: ../../xml/attribute_info/pm_plat_attributes.xml -- diff --git a/src/usr/runtime/populate_attributes.C b/src/usr/runtime/populate_attributes.C index 0af17b6d3..061283faf 100644 --- a/src/usr/runtime/populate_attributes.C +++ b/src/usr/runtime/populate_attributes.C @@ -181,7 +181,7 @@ struct node_data_t MAX_PROCS_RSV = P8_MAX_PROCS*2, //leave space for double MAX_EX_RSV = MAX_PROCS_RSV*P8_MAX_EX_PER_PROC, NUM_PROC_ATTRIBUTES = 150, - NUM_EX_ATTRIBUTES = 10, + NUM_EX_ATTRIBUTES = 20, MAX_ATTRIBUTES = MAX_PROCS_RSV*NUM_PROC_ATTRIBUTES + MAX_EX_RSV*NUM_EX_ATTRIBUTES }; diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index c0ddc3751..79aaad44b 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -572,6 +572,8 @@ OVERRIDE_MVPD_I_NEST_LAB_CURRENT OVERRIDE_MVPD_V_CS_LAB_VOLTAGE OVERRIDE_MVPD_I_CS_LAB_CURRENT + PM_SPWUP_OHA_FLAG + PM_SPWUP_IGNORE_XSTOP_FLAG -- cgit v1.2.1