From 5b24dd1c63f337b2f20c2af56e9b9f3562e8c12d Mon Sep 17 00:00:00 2001 From: Stephen Glancy Date: Tue, 3 Dec 2019 14:09:50 -0500 Subject: Updates MCBIST print statements Change-Id: Icb204ded9548ffe76fc01c55804f7f6a32cdd20c Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/87990 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: HWSV CI Reviewed-by: Louis Stermole Tested-by: Hostboot CI Reviewed-by: Mark Pizzutillo Reviewed-by: Jennifer A Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/88163 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Daniel M Crowell --- .../procedures/hwp/memory/lib/mc/exp_port.H | 4 + .../chips/p9/procedures/hwp/memory/lib/mc/port.H | 5 + .../generic/memory/lib/utils/mc/gen_mss_port.H | 109 +++++++++++++++++++++ 3 files changed, 118 insertions(+) (limited to 'src') diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H index dc46fc7bc..668d32bfd 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H @@ -105,6 +105,10 @@ class portTraits< mss::mc_type::EXPLORER > PORT_FAIL_DISABLE = EXPLR_SRQ_MBA_FARB0Q_CFG_PORT_FAIL_DISABLE, DFI_INIT_START = EXPLR_SRQ_MBA_FARB0Q_CFG_INIT_START, RCD_RECOVERY_DISABLE = EXPLR_SRQ_MBA_FARB0Q_CFG_DISABLE_RCD_RECOVERY, + BW_WINDOW_SIZE = EXPLR_SRQ_MBA_FARB0Q_CFG_BW_WINDOW_SIZE, + BW_WINDOW_SIZE_LEN = EXPLR_SRQ_MBA_FARB0Q_CFG_BW_WINDOW_SIZE_LEN, + BW_SNAPSHOT = EXPLR_SRQ_MBA_FARB6Q_CFG_BW_SNAPSHOT, + BW_SNAPSHOT_LEN = EXPLR_SRQ_MBA_FARB6Q_CFG_BW_SNAPSHOT_LEN, RECR_ENABLE_UE_NOISE_WINDOW = EXPLR_RDF_RECR_MBSECCQ_ENABLE_UE_NOISE_WINDOW, RECR_TCE_CORRECTION = EXPLR_RDF_RECR_MBSECCQ_ENABLE_TCE_CORRECTION, diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.H b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.H index e2fc56ca7..bf608ddc6 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.H @@ -82,6 +82,7 @@ class portTraits static constexpr uint64_t FARB0Q_REG = MCA_MBA_FARB0Q; static constexpr uint64_t FARB1Q_REG = MCA_MBA_FARB1Q; static constexpr uint64_t FARB5Q_REG = MCA_MBA_FARB5Q; + static constexpr uint64_t FARB6Q_REG = MCA_MBA_FARB6Q; static constexpr uint64_t REFRESH_REG = MCA_MBAREF0Q; static constexpr uint64_t ECC_REG = MCA_RECR; static constexpr uint64_t CAL0Q_REG = MCA_MBA_CAL0Q; @@ -138,6 +139,10 @@ class portTraits PORT_FAIL_DISABLE = MCA_MBA_FARB0Q_CFG_PORT_FAIL_DISABLE, OE_ALWAYS_ON = MCA_MBA_FARB0Q_CFG_OE_ALWAYS_ON, RCD_RECOVERY_DISABLE = MCA_MBA_FARB0Q_CFG_DISABLE_RCD_RECOVERY, + BW_WINDOW_SIZE = MCA_MBA_FARB0Q_CFG_BW_WINDOW_SIZE, + BW_WINDOW_SIZE_LEN = MCA_MBA_FARB0Q_CFG_BW_WINDOW_SIZE_LEN, + BW_SNAPSHOT = MCA_MBA_FARB6Q_CFG_BW_SNAPSHOT, + BW_SNAPSHOT_LEN = MCA_MBA_FARB6Q_CFG_BW_SNAPSHOT_LEN, CAL0Q_CAL_INTERVAL_TMR0_ENABLE = MCA_MBA_CAL0Q_CFG_CAL_INTERVAL_TMR0_ENABLE, CAL0Q_TIME_BASE_TMR0 = MCA_MBA_CAL0Q_CFG_TIME_BASE_TMR0, diff --git a/src/import/generic/memory/lib/utils/mc/gen_mss_port.H b/src/import/generic/memory/lib/utils/mc/gen_mss_port.H index d8351be54..01c704e89 100644 --- a/src/import/generic/memory/lib/utils/mc/gen_mss_port.H +++ b/src/import/generic/memory/lib/utils/mc/gen_mss_port.H @@ -47,6 +47,115 @@ namespace mss { +/// +/// @brief Reads the farb0q register +/// @tparam MC the memory controller type +/// @tparam T the fapi2 target type of the target +/// @tparam TT the class traits for the port +/// @param[in] i_target the target +/// @param[out] o_data data read from the register +/// @return FAPI2_RC_SUCCESS if and only if ok +/// @note Disable Port Fail after recurring RCD errors. +/// +template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T, typename TT = portTraits > +fapi2::ReturnCode read_farb0q( const fapi2::Target& i_target, fapi2::buffer& o_data ) +{ + FAPI_TRY( mss::getScom(i_target, TT::FARB0Q_REG, o_data) ); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Writes the farb0q register +/// @tparam MC the memory controller type +/// @tparam T the fapi2 target type of the target +/// @tparam TT the class traits for the port +/// @param[in] i_target the target +/// @param[in] i_data data read from the register +/// @return FAPI2_RC_SUCCESS if and only if ok +/// @note Disable Port Fail after recurring RCD errors. +/// +template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T, typename TT = portTraits > +fapi2::ReturnCode write_farb0q( const fapi2::Target& i_target, const fapi2::buffer& i_data ) +{ + FAPI_TRY( mss::putScom(i_target, TT::FARB0Q_REG, i_data) ); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Reads the farb6q register +/// @tparam MC the memory controller type +/// @tparam T the fapi2 target type of the target +/// @tparam TT the class traits for the port +/// @param[in] i_target the target +/// @param[out] o_data data read from the register +/// @return FAPI2_RC_SUCCESS if and only if ok +/// @note Disable Port Fail after recurring RCD errors. +/// +template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T, typename TT = portTraits > +fapi2::ReturnCode read_farb6q( const fapi2::Target& i_target, fapi2::buffer& o_data ) +{ + FAPI_TRY( mss::getScom(i_target, TT::FARB6Q_REG, o_data) ); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Writes the farb6q register +/// @tparam MC the memory controller type +/// @tparam T the fapi2 target type of the target +/// @tparam TT the class traits for the port +/// @param[in] i_target the target +/// @param[in] i_data data read from the register +/// @return FAPI2_RC_SUCCESS if and only if ok +/// @note Disable Port Fail after recurring RCD errors. +/// +template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T, typename TT = portTraits > +fapi2::ReturnCode write_farb6q( const fapi2::Target& i_target, const fapi2::buffer& i_data ) +{ + FAPI_TRY( mss::putScom(i_target, TT::FARB6Q_REG, i_data) ); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Gets the bandwidth window data +/// @tparam MC the memory controller type +/// @tparam TT the class traits for the port +/// @param[in] i_data data read from the register +/// @param[out] o_bw_window +/// @return FAPI2_RC_SUCCESS if and only if ok +/// @note Disable Port Fail after recurring RCD errors. +/// +template< mss::mc_type MC = DEFAULT_MC_TYPE, typename TT = portTraits > +void get_bw_window( const fapi2::buffer& i_data, uint64_t& o_bw_window ) +{ + o_bw_window = 0; + i_data.extractToRight(o_bw_window); +} + +/// +/// @brief Gets the bandwidth snapshot +/// @tparam MC the memory controller type +/// @tparam TT the class traits for the port +/// @param[in] i_data data read from the register +/// @param[out] o_bw_snapshot +/// @return FAPI2_RC_SUCCESS if and only if ok +/// @note Disable Port Fail after recurring RCD errors. +/// +template< mss::mc_type MC = DEFAULT_MC_TYPE, typename TT = portTraits > +void get_bw_snapshot( const fapi2::buffer& i_data, uint64_t& o_bw_snapshot ) +{ + o_bw_snapshot = 0; + i_data.extractToRight(o_bw_snapshot); +} + + /// /// @brief ATTR_MSS_MVPD_FWMS getter declare /// @tparam MC the memory controller type -- cgit v1.2.1