From 2dc7d14579cbf26881618be7635ad2520d81cd9c Mon Sep 17 00:00:00 2001 From: Christian Geddes Date: Wed, 16 Oct 2019 15:37:04 -0500 Subject: Update Part Number field side for DDR4 DDIMM spd layout Originally we had this set to 0x30 (48) bytes but now it seems the spec says its only 0x1E (30) bytes. This commit update to the new value that the spec is indicating. Change-Id: I3ba643411a51fdd0df731119dce371bd16435944 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/85432 Reviewed-by: Roland Veloz Tested-by: Jenkins Server Reviewed-by: Matt Derksen Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Nicholas E Bofferding --- src/usr/vpd/spdDDR4_DDIMM.H | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/usr/vpd/spdDDR4_DDIMM.H b/src/usr/vpd/spdDDR4_DDIMM.H index db115d36a..f6f05260d 100755 --- a/src/usr/vpd/spdDDR4_DDIMM.H +++ b/src/usr/vpd/spdDDR4_DDIMM.H @@ -105,7 +105,7 @@ const KeywordData ddr4DDIMMData[] = { TRCMIN_FINE_OFFSET, 0x78, 0x01, 0x00, 0x00, false, false, ALL }, // Note - All data below 128 is common across all DDR4 DIMMs, except DDIMM { MODULE_SERIAL_NUMBER, 0x205, 0x04, 0x00, 0x00, false, false, ALL }, - { MODULE_PART_NUMBER, 0x209, 0x30, 0x00, 0x00, false, false, ALL }, + { MODULE_PART_NUMBER, 0x209, 0x1E, 0x00, 0x00, false, false, ALL }, // Normal fields supported on DDR4 only { BANK_GROUP_BITS, 0x04, 0x01, 0xC0, 0x06, false, false, ALL }, { BANK_ADDRESS_BITS_DDR4, 0x04, 0x01, 0x30, 0x04, false, false, ALL }, -- cgit v1.2.1