From 4a1d5adf82c8309d387b6b7fccb46f78224b41fe Mon Sep 17 00:00:00 2001 From: Matt Derksen Date: Mon, 7 Nov 2016 09:53:56 -0600 Subject: Remove old PROC_PCIE_LANE_EQUALIZATION attribute Change-Id: I2a0d8831a797a227724089887525e8efe89122d1 RTC:160417 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32327 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Martin Gloff Reviewed-by: Corey V. Swenson Reviewed-by: Daniel M. Crowell --- src/usr/devtree/bld_devtree.C | 6 ---- src/usr/targeting/common/genHwsvMrwXml.pl | 2 +- .../targeting/common/xmltohb/attribute_types.xml | 32 ---------------------- .../common/xmltohb/simics_NIMBUS.system.xml | 7 ----- src/usr/targeting/common/xmltohb/target_types.xml | 1 - .../targeting/common/xmltohb/vbu_NIMBUS.system.xml | 7 ----- 6 files changed, 1 insertion(+), 54 deletions(-) (limited to 'src/usr') diff --git a/src/usr/devtree/bld_devtree.C b/src/usr/devtree/bld_devtree.C index ee2b15505..ca4e2b60f 100644 --- a/src/usr/devtree/bld_devtree.C +++ b/src/usr/devtree/bld_devtree.C @@ -802,9 +802,6 @@ void bld_xscom_node(devTree * i_dt, dtOffset_t & i_parentNode, /*PCIE*/ uint8_t l_phbActive = i_pProc->getAttr(); - TARGETING::ATTR_PROC_PCIE_LANE_EQUALIZATION_type l_laneEq = {{0}}; - assert(i_pProc->tryGetAttr( - l_laneEq)); TRACFCOMP( g_trac_devtree, "Chip %X PHB Active mask %X", i_chipid, l_phbActive); @@ -831,9 +828,6 @@ void bld_xscom_node(devTree * i_dt, dtOffset_t & i_parentNode, i_dt->addPropertyCells32(pcieNode, "reg", pcie_prop, 6); i_dt->addPropertyCell32(pcieNode, "ibm,phb-index", l_phb); i_dt->addProperty(pcieNode, "ibm,use-ab-detect"); - i_dt->addPropertyCells32(pcieNode, "ibm,lane-eq", - reinterpret_cast(l_laneEq[l_phb]), - (sizeof(l_laneEq[l_phb])/sizeof(uint32_t))); } /*I2C Masters*/ diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index 1e34f165e..901a32336 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -756,7 +756,7 @@ sub unhexify { # Determine values of proc pcie attributes # Currently -# PROC_PCIE_LANE_EQUALIZATION PROC_PCIE_IOP_CONFIG PROC_PCIE_PHB_ACTIVE +# PROC_PCIE_LANE_EQUALIZATION_GEN3/4 PROC_PCIE_IOP_CONFIG PROC_PCIE_PHB_ACTIVE sub pcie_init ($) { my $proc = $_[0]; diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index b2b1cf9d0..c9382e9bb 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -16828,38 +16828,6 @@ Measured in GB - - PROC_PCIE_LANE_EQUALIZATION - PCIE Lane Equalization values for each PHB - Creator: MRW - Purpose: Holds settings which are loaded into the HW to optimize the - PCIE lane signal eye between the chips + PCIE endpoints - Data Format: 4 PHBs x 32 bytes of EQ data per PHB. Each PHB has an EQ - value for each of its 16 lanes. Each value is a uint16 formatted as - follows: - Bit 0:3 - up_rx_hint (bit 0 reserved) - Bit 4:7 - up_tx_preset - Bit 8:11 - dn_rx_hint (bit 0 reserved) - Bit 12:15 - dn_tx_preset - - - 0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77, - 0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77, - 0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77, - 0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x0, - 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x77, - 0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77, - 0x77,0x77,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, - 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, - 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, - 0x0,0x0 - - 4,32 - - non-volatile - - - PROC_PCIE_IS_SLOT Indicates whether PCIE lanes terminate at a pluggable slot diff --git a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml index dceb3d538..9a55d1955 100644 --- a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml @@ -5349,13 +5349,6 @@ - - - PROC_PCIE_LANE_EQUALIZATION - 0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - - - PM_UNDERVOLTING_FRQ_MINIMUM diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 3e4362112..c45d89791 100755 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -269,7 +269,6 @@ reserved0 - PROC_PCIE_LANE_EQUALIZATION CDM_DOMAINFABRIC HOT_PLUG_POWER_CONTROLLER_INFO PROC_R_LOADLINE_VDD_UOHM diff --git a/src/usr/targeting/common/xmltohb/vbu_NIMBUS.system.xml b/src/usr/targeting/common/xmltohb/vbu_NIMBUS.system.xml index f7cb3dc58..d81674c7b 100644 --- a/src/usr/targeting/common/xmltohb/vbu_NIMBUS.system.xml +++ b/src/usr/targeting/common/xmltohb/vbu_NIMBUS.system.xml @@ -5340,13 +5340,6 @@ - - - PROC_PCIE_LANE_EQUALIZATION - 0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x68,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 - - - PM_UNDERVOLTING_FRQ_MINIMUM -- cgit v1.2.1