From 40e763ce8ad18132b6244a695ca9bc5f96a07674 Mon Sep 17 00:00:00 2001 From: Dan Crowell Date: Mon, 7 Mar 2016 11:40:44 -0600 Subject: Additional fapi2 hw_access support Moved function implementations into .C file Cleaned up cfam target check Change-Id: Ib25e6cdb336688eb23e2cfef7f3756781839753f RTC: 143118 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/867 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes Reviewed-by: Daniel M. Crowell --- src/usr/fapi2/fapi2.mk | 2 +- src/usr/fapi2/plat_hw_access.C | 672 ++++++++++++++++++++++++++++++++++++++ src/usr/fapi2/test/fapi2HwpTest.C | 63 +++- src/usr/fapi2/test/makefile | 1 + src/usr/fapi2/test/p9_hwtests.C | 192 +++++++++++ src/usr/fapi2/test/p9_hwtests.H | 67 ++++ 6 files changed, 995 insertions(+), 2 deletions(-) create mode 100644 src/usr/fapi2/plat_hw_access.C create mode 100644 src/usr/fapi2/test/p9_hwtests.C create mode 100644 src/usr/fapi2/test/p9_hwtests.H (limited to 'src/usr') diff --git a/src/usr/fapi2/fapi2.mk b/src/usr/fapi2/fapi2.mk index c7837e20e..7d1bcb40e 100755 --- a/src/usr/fapi2/fapi2.mk +++ b/src/usr/fapi2/fapi2.mk @@ -39,7 +39,7 @@ OBJS += plat_attribute_service.o OBJS += plat_attr_override_sync.o OBJS += plat_hwp_invoker.o OBJS += target.o - +OBJS += plat_hw_access.o #EKB Objects (mirrored in src/import) OBJS += error_info.o diff --git a/src/usr/fapi2/plat_hw_access.C b/src/usr/fapi2/plat_hw_access.C new file mode 100644 index 000000000..f7fae4b6c --- /dev/null +++ b/src/usr/fapi2/plat_hw_access.C @@ -0,0 +1,672 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fapi2/plat_hw_access.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// @file plat_hw_access.C +/// +/// @brief Implements hardware-access functions for the platform layer. +/// + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//@TODO-RTC:144504-Remove when the attribute shows up +//just use an existing string type for now +#define ATTR_FAPI_NAME_type ATTR_OPAL_MODEL_type + +namespace fapi2 +{ + +//------------------------------------------------------------------------------ +// HW Communication Functions to be implemented at the platform layer. +//------------------------------------------------------------------------------ + +/// @brief Platform-level implementation called by getScom() +ReturnCode platGetScom(const Target& i_target, + const uint64_t i_address, + buffer& o_data) +{ + ReturnCode l_rc; + errlHndl_t l_err = NULL; + + FAPI_DBG(ENTER_MRK "platGetScom"); + // Note: Trace is placed here in plat code because PPE doesn't support + // trace in common fapi2_hw_access.H + bool l_traceit = platIsScanTraceEnabled(); + + // Extract the component pointer + TARGETING::Target* l_target = + reinterpret_cast(i_target.get()); + + // Grab the name of the target + TARGETING::ATTR_FAPI_NAME_type l_targName = {0}; + fapi2::toString(i_target, l_targName, sizeof(l_targName)); + + // Perform SCOM read + size_t l_size = sizeof(uint64_t); + l_err = deviceRead(l_target, + &o_data(), + l_size, + DEVICE_SCOM_ADDRESS(i_address)); + if (l_err) + { + FAPI_ERR("platGetScom: deviceRead returns error!"); + FAPI_ERR("fapiGetScom failed - Target %s, Addr %.16llX", + l_targName, i_address); + l_rc.setPlatDataPtr(reinterpret_cast (l_err)); + } + + if (l_traceit) + { + uint64_t l_data = (uint64_t)o_data; + FAPI_SCAN("TRACE : GETSCOM : %s : %.16llX %.16llX", + l_targName, + i_address, + l_data); + } + + FAPI_DBG(EXIT_MRK "platGetScom"); + return l_rc; +} + +/// @brief Platform-level implementation called by putScom() +ReturnCode platPutScom(const Target& i_target, + const uint64_t i_address, + const buffer i_data) +{ + ReturnCode l_rc; + errlHndl_t l_err = NULL; + + FAPI_DBG(ENTER_MRK "platPutScom"); + // Note: Trace is placed here in plat code because PPE doesn't support + // trace in common fapi2_hw_access.H + bool l_traceit = platIsScanTraceEnabled(); + + // Extract the component pointer + TARGETING::Target* l_target = + reinterpret_cast(i_target.get()); + + // Grab the name of the target + TARGETING::ATTR_FAPI_NAME_type l_targName = {0}; + fapi2::toString(i_target, l_targName, sizeof(l_targName)); + + // Perform SCOM write + size_t l_size = sizeof(uint64_t); + uint64_t l_data = static_cast(i_data); + l_err = deviceWrite(l_target, + &l_data, + l_size, + DEVICE_SCOM_ADDRESS(i_address)); + if (l_err) + { + FAPI_ERR("platPutScom: deviceRead returns error!"); + FAPI_ERR("platPutScom failed - Target %s, Addr %.16llX", + l_targName, i_address); + l_rc.setPlatDataPtr(reinterpret_cast (l_err)); + } + + if (l_traceit) + { + FAPI_SCAN("TRACE : PUTSCOM : %s : %.16llX %.16llX", + l_targName, + i_address, + l_data); + } + + FAPI_DBG(EXIT_MRK "platPutScom"); + return l_rc; +} + +/// @brief Platform-level implementation called by putScomUnderMask() +ReturnCode platPutScomUnderMask(const Target& i_target, + const uint64_t i_address, + const buffer i_data, + const buffer i_mask) +{ + ReturnCode l_rc; + errlHndl_t l_err = NULL; + + FAPI_DBG(ENTER_MRK "platPutScomUnderMask"); + // Note: Trace is placed here in plat code because PPE doesn't support + // trace in common fapi2_hw_access.H + bool l_traceit = platIsScanTraceEnabled(); + + // Grab the name of the target + TARGETING::ATTR_FAPI_NAME_type l_targName = {0}; + fapi2::toString(i_target, l_targName, sizeof(l_targName)); + + do + { + // Extract the component pointer + TARGETING::Target* l_target = + reinterpret_cast(i_target.get()); + + // Get current value from HW + uint64_t l_data = 0; + size_t l_size = sizeof(uint64_t); + l_err = deviceRead(l_target, + &l_data, + l_size, + DEVICE_SCOM_ADDRESS(i_address)); + if (l_err) + { + FAPI_ERR("platPutScomUnderMask: deviceRead returns error!"); + l_rc.setPlatDataPtr(reinterpret_cast (l_err)); + break; + } + + // Calculate new value to write to reg + uint64_t l_inMaskInverted = ~i_mask; // Write mask inverted + uint64_t l_newMask = (i_data & i_mask); // Retain set data bits + + // l_data = current data set bits + l_data &= l_inMaskInverted; + + // l_data = current data set bit + set mask bits + l_data |= l_newMask; + + // Write new value + l_err = deviceWrite(l_target, + &l_data, + l_size, + DEVICE_SCOM_ADDRESS(i_address)); + if (l_err) + { + FAPI_ERR("platPutScomUnderMask: deviceWrite returns error!"); + l_rc.setPlatDataPtr(reinterpret_cast (l_err)); + break; + } + + } while (0); + + if (l_rc != fapi2::FAPI2_RC_SUCCESS) + { + FAPI_ERR("platPutScomUnderMask failed - Target %s, Addr %.16llX", + l_targName, i_address); + } + + if( l_traceit ) + { + uint64_t l_data = i_data; + uint64_t l_mask = i_mask; + FAPI_SCAN( "TRACE : PUTSCOMMASK : %s : %.16llX %.16llX %.16llX", + l_targName, + i_address, + l_data, + l_mask); + } + + FAPI_DBG(EXIT_MRK "platPutScomUnderMask"); + return l_rc; +} + +/// @brief Verify target of a cfam access +errlHndl_t verifyCfamAccessTarget(const TARGETING::Target* i_target, + const uint32_t i_address) +{ + errlHndl_t l_err = NULL; + + // Can't access cfam engine on the master processor + TARGETING::Target* l_pMasterProcChip = NULL; + TARGETING::targetService(). + masterProcChipTargetHandle( l_pMasterProcChip ); + + if( l_pMasterProcChip == i_target ) + { + FAPI_ERR("verifyCfamAccessTarget: Attempt to access CFAM register %.8X on the master processor chip", + i_address); + /*@ + * @errortype + * @moduleid fapi2::MOD_FAPI2_VERIFYCFAMACCESSTARGET + * @reasoncode fapi2::RC_INVALID_TARG_TARGET + * @userdata1 CFAM Address + * @userdata2 HUID of input target + * @devdesc verifyCfamAccessTarget> Attempt to access CFAM + * on the master processor + * @custdesc Internal firmware error + */ + l_err = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, + fapi2::MOD_FAPI2_VERIFYCFAMACCESSTARGET, + fapi2::RC_INVALID_TARG_TARGET, + i_address, + TARGETING::get_huid(i_target), + true /*SW error*/); + l_err->collectTrace(FAPI_TRACE_NAME); + } + + return l_err; +} + +/// @brief Internal function that gets the chip target for cfam access +errlHndl_t getCfamChipTarget(const TARGETING::Target* i_target, + TARGETING::Target*& o_chipTarget) +{ + errlHndl_t l_err = NULL; + + // Default to input target + o_chipTarget = const_cast(i_target); + + // Check to see if this is a chiplet + if (i_target->getAttr() == TARGETING::CLASS_UNIT) + { + // Look for its chip parent + TARGETING::PredicateCTM l_chipClass(TARGETING::CLASS_CHIP); + TARGETING::TargetHandleList l_list; + TARGETING::TargetService& l_targetService = TARGETING::targetService(); + (void) l_targetService.getAssociated( + l_list, + i_target, + TARGETING::TargetService::PARENT, + TARGETING::TargetService::ALL, + &l_chipClass); + + if ( l_list.size() == 1 ) + { + o_chipTarget = l_list[0]; + } + else + { + // Something is wrong here, can't have more than one parent chip + FAPI_ERR("getCfamChipTarget: Invalid number of parent chip for this target chiplet - # parent chips %d", l_list.size()); + } + } + return l_err; +} + +/// @brief Platform-level implementation called by getCfamRegister() +ReturnCode platGetCfamRegister(const Target& i_target, + const uint32_t i_address, + buffer& o_data) +{ + FAPI_DBG(ENTER_MRK "platGetCfamRegister"); + ReturnCode l_rc; + errlHndl_t l_err = NULL; + bool l_traceit = platIsScanTraceEnabled(); + + // Grab the name of the target + TARGETING::ATTR_FAPI_NAME_type l_targName = {0}; + fapi2::toString(i_target, l_targName, sizeof(l_targName)); + + do + { + // Extract the target pointer + TARGETING::Target* l_target = + reinterpret_cast(i_target.get()); + + // Get the chip target if l_target is not a chip + TARGETING::Target* l_myChipTarget = NULL; + l_err = getCfamChipTarget(l_target, l_myChipTarget); + if (l_err) + { + FAPI_ERR("platGetCfamRegister: getCfamChipTarget returns error!"); + FAPI_ERR("fapiGetCfamRegister failed - Target %s, Addr %.8X", + l_targName, i_address); + l_rc.setPlatDataPtr(reinterpret_cast (l_err)); + break; + } + + // Can't access cfam engine on master processor + l_err = verifyCfamAccessTarget(i_target,i_address); + if (l_err) + { + FAPI_ERR("platGetCfamRegister: verifyCfamAccessTarget returns error!"); + l_rc.setPlatDataPtr(reinterpret_cast (l_err)); + break; + } + + // Perform CFAM read via FSI + // Address needs to be multiply by 4 because register addresses are + // word offsets but the FSI addresses are byte offsets. + // However, we need to preserve the engine's offset in the top byte + uint64_t l_addr = ((i_address & 0x003F) << 2) | (i_address & 0xFF00); + size_t l_size = sizeof(uint32_t); + l_err = deviceRead(l_myChipTarget, + &o_data(), + l_size, + DEVICE_FSI_ADDRESS(l_addr)); + if (l_err) + { + FAPI_ERR("platGetCfamRegister: deviceRead returns error!"); + l_rc.setPlatDataPtr(reinterpret_cast (l_err)); + break; + } + + } while(0); + + if (l_rc != fapi2::FAPI2_RC_SUCCESS) + { + FAPI_ERR("fapiGetCfamRegister failed - Target %s, Addr %.8X", + l_targName, i_address); + } + + if( l_traceit ) + { + uint32_t l_data = (uint32_t)o_data; + FAPI_SCAN( "TRACE : GETCFAMREG : %s : %.8X %.8X", + l_targName, + i_address, + l_data); + } + + FAPI_DBG(EXIT_MRK "platGetCfamRegister"); + return l_rc; +} + +/// @brief Platform-level implementation called by putCfamRegister() +ReturnCode platPutCfamRegister(const Target& i_target, + const uint32_t i_address, + const buffer i_data) +{ + FAPI_DBG(ENTER_MRK "platPutCfamRegister"); + ReturnCode l_rc; + errlHndl_t l_err = NULL; + bool l_traceit = platIsScanTraceEnabled(); + + // Grab the name of the target + TARGETING::ATTR_FAPI_NAME_type l_targName = {0}; + fapi2::toString(i_target, l_targName, sizeof(l_targName)); + + do + { + // Extract the component pointer + TARGETING::Target* l_target = + reinterpret_cast(i_target.get()); + + // Get the chip target if l_target is not a chip + TARGETING::Target* l_myChipTarget = NULL; + l_err = getCfamChipTarget(l_target, l_myChipTarget); + if (l_err) + { + FAPI_ERR("platPutCfamRegister: getCfamChipTarget returns error!"); + l_rc.setPlatDataPtr(reinterpret_cast (l_err)); + break; + } + + // Can't access cfam engine on master processor + l_err = verifyCfamAccessTarget(i_target,i_address); + if (l_err) + { + FAPI_ERR("platPutCfamRegister: verifyCfamAccessTarget returns error!"); + l_rc.setPlatDataPtr(reinterpret_cast (l_err)); + break; + } + + // Perform CFAM write via FSI + // Address needs to be multiply by 4 because register addresses are word + // offsets but the FSI addresses are byte offsets + // However, we need to preserve the engine's offset in the top byte + uint64_t l_addr = ((i_address & 0x003F) << 2) | (i_address & 0xFF00); + size_t l_size = sizeof(uint32_t); + uint32_t l_data = static_cast(i_data); + l_err = deviceWrite(l_myChipTarget, + &l_data, + l_size, + DEVICE_FSI_ADDRESS(l_addr)); + if (l_err) + { + FAPI_ERR("platPutCfamRegister: deviceWrite returns error!"); + l_rc.setPlatDataPtr(reinterpret_cast (l_err)); + break; + } + + } while (0); + + if (l_rc != fapi2::FAPI2_RC_SUCCESS) + { + FAPI_ERR("platPutCfamRegister failed - Target %s, Addr %.8X", + l_targName, i_address); + } + + if( l_traceit ) + { + uint32_t l_data = i_data; + FAPI_SCAN( "TRACE : PUTCFAMREG : %s : %.8X %.8X", + l_targName, + i_address, + l_data); + } + + FAPI_DBG(EXIT_MRK "platPutCfamRegister"); + return l_rc; +} + + +/// @brief Modifying input 32-bit data with the specified mode +void platProcess32BitModifyMode( const ChipOpModifyMode i_modifyMode, + const buffer i_origDataBuf, + buffer& io_modifiedData ) +{ + switch( i_modifyMode ) + { + // OR operation + case( fapi2::CHIP_OP_MODIFY_MODE_OR ): + io_modifiedData |= i_origDataBuf; + break; + // AND operation + case( fapi2::CHIP_OP_MODIFY_MODE_AND ): + io_modifiedData &= i_origDataBuf; + break; + // XOR operation + case( fapi2::CHIP_OP_MODIFY_MODE_XOR ): + io_modifiedData ^= i_origDataBuf; + break; + + // deliberately have no default case to catch new modes + // at compile time + } + return; +} + +/// @brief String translation for modify mode +const char* platModeString( const ChipOpModifyMode i_modifyMode ) +{ + const char* l_modString = "???"; + switch( i_modifyMode ) + { + // OR operation + case( fapi2::CHIP_OP_MODIFY_MODE_OR ): + l_modString = "OR"; + break; + // AND operation + case( fapi2::CHIP_OP_MODIFY_MODE_AND ): + l_modString = "AND"; + break; + // XOR operation + case( fapi2::CHIP_OP_MODIFY_MODE_XOR ): + l_modString = "XOR"; + break; + + // deliberately have no default case to catch new modes + // at compile time + } + return l_modString; +} + +/// @brief Platform-level implementation of modifyCfamRegister() +ReturnCode platModifyCfamRegister(const Target& i_target, + const uint32_t i_address, + const buffer i_data, + const ChipOpModifyMode i_modifyMode) +{ + FAPI_DBG(ENTER_MRK "platModifyCfamRegister"); + ReturnCode l_rc; + errlHndl_t l_err = NULL; + bool l_traceit = platIsScanTraceEnabled(); + const char* l_modeString = platModeString(i_modifyMode); + + // Grab the name of the target + TARGETING::ATTR_FAPI_NAME_type l_targName = {0}; + fapi2::toString(i_target, l_targName, sizeof(l_targName)); + + do + { + // Can't access cfam engine on master processor + l_err = verifyCfamAccessTarget(i_target,i_address); + if (l_err) + { + FAPI_ERR("platModifyCfamRegister: verifyCfamAccessTarget returns error!"); + l_rc.setPlatDataPtr(reinterpret_cast (l_err)); + break; + } + + // Extract the component pointer + TARGETING::Target* l_target = + reinterpret_cast(i_target.get()); + + // Get the chip target if l_target is not a chip + TARGETING::Target* l_myChipTarget = NULL; + l_err = getCfamChipTarget(l_target, l_myChipTarget); + if (l_err) + { + FAPI_ERR("platModifyCfamRegister: getCfamChipTarget returns error!"); + l_rc.setPlatDataPtr(reinterpret_cast (l_err)); + break; + } + + // Read current value + // Address needs to be multiply by 4 because register addresses are word + // offsets but the FSI addresses are byte offsets. + // However, we need to preserve the engine's offset of 0x0C00 and 0x1000 + uint64_t l_addr = ((i_address & 0x003F) << 2) | (i_address & 0xFF00); + buffer l_data = 0; + size_t l_size = sizeof(uint32_t); + l_err = deviceRead(l_myChipTarget, + &l_data(), + l_size, + DEVICE_FSI_ADDRESS(l_addr)); + if (l_err) + { + FAPI_ERR("platModifyCfamRegister: deviceRead returns error!"); + l_rc.setPlatDataPtr(reinterpret_cast (l_err)); + break; + } + + // Applying modification + platProcess32BitModifyMode(i_modifyMode, i_data, l_data); + + // Write back + l_err = deviceWrite(l_target, + &l_data(), + l_size, + DEVICE_FSI_ADDRESS(l_addr)); + if (l_err) + { + FAPI_ERR("platModifyCfamRegister: deviceWrite returns error!"); + l_rc.setPlatDataPtr(reinterpret_cast (l_err)); + break; + } + + } while (0); + + if (l_rc != fapi2::FAPI2_RC_SUCCESS) + { + FAPI_ERR("platModifyCfamRegister failed - Target %s, Addr %.8X", + l_targName, i_address); + } + + if( l_traceit ) + { + uint32_t l_data = (uint32_t)i_data; + FAPI_SCAN( "TRACE : MODCFAMREG : %s : %.8X %.8X %s", + l_targName, + i_address, + l_data, + l_modeString ); + } + + FAPI_DBG(EXIT_MRK "platModifyCfamRegister"); + return l_rc; +} + +//@TODO RTC:126630 getRing is not yet supported + +#if 0 + +/// @brief Platform-level implementation called by fapiGetRing() +ReturnCode platGetRing(const Target& i_target, + const scanRingId_t i_address, + variable_buffer& o_data, + const RingMode i_ringMode) +{ + FAPI_DBG(ENTER_MRK "platGetRing"); + ReturnCode l_rc; + errlHndl_t l_err = NULL; + + // Extract the component pointer + TARGETING::Target* l_target = + reinterpret_cast(i_target.get()); + + // Output buffer must be set to ring's len by user + uint64_t l_ringLen = o_data.getBitLength(); + uint64_t l_flag = platGetDDScanMode(i_ringMode); + size_t l_size = o_data.getByteLength(); + l_err = deviceRead(l_target, + ecmdDataBufferBaseImplementationHelper::getDataPtr(&o_data), + l_size, + DEVICE_SCAN_ADDRESS(i_address, l_ringLen, l_flag)); + if (l_err) + { + l_rc.setPlatDataPtr(reinterpret_cast (l_err)); + } + + FAPI_DBG(EXIT_MRK "platGetRing"); + return l_rc; +} + + +/// @brief Platform-level implementation called by fapiPutRing() +inline ReturnCode platPutRing(const Target& i_target, + const scanRingId_t i_address, + variable_buffer& i_data, + const RingMode i_ringMode) +{ +} + +/// @brief Platform-level implementation called by fapiModifyRing() +ReturnCode modifyRing(const Target& i_target, + const scanRingId_t i_address, + variable_buffer& i_data, + const ChipOpModifyMode i_modifyMode, + const RingMode i_ringMode = 0) +{ +} + +#endif // End if 0 + +// -------------------------------------------------------------------------- +// NOTE: +// No spy access interface as HB doesn't allow spy access. +// -------------------------------------------------------------------------- + + +} // End namespace + diff --git a/src/usr/fapi2/test/fapi2HwpTest.C b/src/usr/fapi2/test/fapi2HwpTest.C index d8fb23c0c..35ce9bdc5 100644 --- a/src/usr/fapi2/test/fapi2HwpTest.C +++ b/src/usr/fapi2/test/fapi2HwpTest.C @@ -28,6 +28,7 @@ #include #include #include +#include namespace fapi2 { @@ -149,6 +150,66 @@ errlHndl_t fapi2HwpTest() numFails++; TS_FAIL("Error occured in p9_sample_procedure_proc !!"); } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_scomtest_getscom_fail, fapi2_procTarget); + if(l_errl != NULL) + { + delete l_errl; // delete expected error log + } + else + { + TS_FAIL("No error from p9_scomtest_getscom_fail !!"); + numFails++; + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_scomtest_putscom_fail, fapi2_procTarget); + if(l_errl != NULL) + { + delete l_errl; // delete expected error log + } + else + { + TS_FAIL("No error from p9_scomtest_putscom_fail !!"); + numFails++; + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_cfamtest_putcfam_fail, fapi2_procTarget); + if(l_errl != NULL) + { + delete l_errl; // delete expected error log + } + else + { + TS_FAIL("No error from p9_cfamtest_putcfam_fail !!"); + numFails++; + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_cfamtest_getcfam_fail, fapi2_procTarget); + if(l_errl != NULL) + { + delete l_errl; // delete expected error log + } + else + { + TS_FAIL("No error from p9_cfamtest_getcfam_fail !!"); + numFails++; + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_scomtest_getscom_pass, fapi2_procTarget); + if(l_errl) + { + TS_FAIL("Error from p9_scomtest_getscom_pass !!"); + numFails++; + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_scomtest_putscom_pass, fapi2_procTarget); + if(l_errl) + { + TS_FAIL("Error from p9_scomtest_putscom_pass !!"); + numFails++; + } + + numTests++; FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_eq, fapi2_eqTarget, scratchWriteValue); if(l_errl != NULL) @@ -274,4 +335,4 @@ errlHndl_t fapi2HwpTest() return l_errl; } -} \ No newline at end of file +} diff --git a/src/usr/fapi2/test/makefile b/src/usr/fapi2/test/makefile index ffebf05e3..5184e449e 100644 --- a/src/usr/fapi2/test/makefile +++ b/src/usr/fapi2/test/makefile @@ -37,6 +37,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/ # Procedures OBJS += p9_sample_procedure.o +OBJS += p9_hwtests.o OBJS += fapi2TestUtils.o TESTS += fapi2Test.H diff --git a/src/usr/fapi2/test/p9_hwtests.C b/src/usr/fapi2/test/p9_hwtests.C new file mode 100644 index 000000000..2f066aa4e --- /dev/null +++ b/src/usr/fapi2/test/p9_hwtests.C @@ -0,0 +1,192 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fapi2/test/p9_hwtests.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_hwtests.C +/// +/// @brief These procedures test the fapi2 hw_access interfaces. +//----------------------------------------------------------------------------- + +#include + + +fapi2::ReturnCode p9_scomtest_getscom_fail( + fapi2::Target& i_target) +{ + fapi2::buffer l_scomdata = 0; + + FAPI_INF("Entering p9_scomtest_getscom_fail..."); + + FAPI_INF("Do getscom on proc target"); + FAPI_TRY(fapi2::getScom(i_target, + 0x11223344, + l_scomdata)); + + fapi_try_exit: + + FAPI_INF("Exiting p9_scomtest_getscom_fail..."); + + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_scomtest_putscom_fail( + fapi2::Target& i_target) +{ + fapi2::buffer l_scomdata = 0; + + FAPI_INF("Entering p9_scomtest_putscom_fail..."); + + FAPI_INF("Do getscom on proc target"); + FAPI_TRY(fapi2::putScom(i_target, + 0x22334455, + l_scomdata)); + + fapi_try_exit: + + FAPI_INF("Exiting p9_scomtest_putscom_fail..."); + + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_cfamtest_getcfam_fail( + fapi2::Target& i_target) +{ + fapi2::buffer l_cfamdata = 0; + + FAPI_INF("Entering p9_cfamtest_getcfam_fail..."); + + FAPI_INF("Do getcfam on proc target"); + FAPI_TRY(fapi2::getCfamRegister(i_target, + 0x11223344, + l_cfamdata)); + + fapi_try_exit: + + FAPI_INF("Exiting p9_cfamtest_getcfam_fail..."); + + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_cfamtest_putcfam_fail( + fapi2::Target& i_target) +{ + fapi2::buffer l_cfamdata = 0; + + FAPI_INF("Entering p9_cfamtest_putcfam_fail..."); + + FAPI_INF("Do getcfam on proc target"); + FAPI_TRY(fapi2::putCfamRegister(i_target, + 0x22334455, + l_cfamdata)); + + fapi_try_exit: + + FAPI_INF("Exiting p9_cfamtest_putcfam_fail..."); + + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_scomtest_getscom_pass( + fapi2::Target& i_target) +{ + fapi2::buffer l_scomdata = 0; + + FAPI_INF("Entering p9_scomtest_getscom_pass..."); + + FAPI_INF("Do getscom on proc target"); + FAPI_TRY(fapi2::getScom(i_target, + 0x02010803, //CXA FIR Mask Register + l_scomdata)); + + fapi_try_exit: + + FAPI_INF("Exiting p9_scomtest_getscom_pass..."); + + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_scomtest_putscom_pass( + fapi2::Target& i_target) +{ + fapi2::buffer l_scomdata = 0; + + FAPI_INF("Entering p9_scomtest_putscom_pass..."); + + FAPI_INF("Do getscom on proc target"); + FAPI_TRY(fapi2::putScom(i_target, + 0x02010803, //CXA FIR Mask Register + l_scomdata)); + + fapi_try_exit: + + FAPI_INF("Exiting p9_scomtest_putscom_pass..."); + + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_cfamtest_getcfam_pass( + fapi2::Target& i_target) +{ + fapi2::buffer l_cfamdata = 0; + + FAPI_INF("Entering p9_cfamtest_getcfam_pass..."); + + FAPI_INF("Do getcfam on proc target"); + FAPI_TRY(fapi2::getCfamRegister(i_target, + 0x1000, //DATA_0 from FSI2PIB + l_cfamdata)); + + fapi_try_exit: + + FAPI_INF("Exiting p9_cfamtest_getcfam_pass..."); + + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_cfamtest_putcfam_pass( + fapi2::Target& i_target) +{ + fapi2::buffer l_cfamdata = 0; + + FAPI_INF("Entering p9_cfamtest_putcfam_pass..."); + + FAPI_INF("Do getcfam on proc target"); + FAPI_TRY(fapi2::putCfamRegister(i_target, + 0x1000, //DATA_0 from FSI2PIB + l_cfamdata)); + + fapi_try_exit: + + FAPI_INF("Exiting p9_cfamtest_putcfam_pass..."); + + return fapi2::current_err; + +} diff --git a/src/usr/fapi2/test/p9_hwtests.H b/src/usr/fapi2/test/p9_hwtests.H new file mode 100644 index 000000000..9143e2a64 --- /dev/null +++ b/src/usr/fapi2/test/p9_hwtests.H @@ -0,0 +1,67 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fapi2/test/p9_hwtests.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_hwtests.C +/// +/// @brief These procedures test the fapi2 hw_access interfaces. +//------------------------------------------------------------------------------ +#ifndef _P9_HWTESTS_H_ +#define _P9_HWTESTS_H_ + +#include + +fapi2::ReturnCode p9_scomtest_getscom_fail( + fapi2::Target& i_target); + + +fapi2::ReturnCode p9_scomtest_putscom_fail( + fapi2::Target& i_target); + + +fapi2::ReturnCode p9_cfamtest_getcfam_fail( + fapi2::Target& i_target); + + +fapi2::ReturnCode p9_cfamtest_putcfam_fail( + fapi2::Target& i_target); + + +fapi2::ReturnCode p9_scomtest_getscom_pass( + fapi2::Target& i_target); + + +fapi2::ReturnCode p9_scomtest_putscom_pass( + fapi2::Target& i_target); + + +fapi2::ReturnCode p9_cfamtest_getcfam_pass( + fapi2::Target& i_target); + + +fapi2::ReturnCode p9_cfamtest_putcfam_pass( + fapi2::Target& i_target); + + +#endif -- cgit v1.2.1