From 39157523786b6d297d41f42a641bf758b4293733 Mon Sep 17 00:00:00 2001 From: Bill Hoffa Date: Fri, 2 Feb 2018 12:44:34 -0600 Subject: Set Memory Enabled Bit for all Procs with Valid Memory - This is only done in Simulation Change-Id: I011ecc6ceb05613b29d8e8e38944b342622b58c0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53310 Tested-by: Jenkins Server Reviewed-by: Prachi Gupta Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Dean Sanner Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell --- .../istep14/call_proc_exit_cache_contained.C | 49 +++++++++++++++++----- 1 file changed, 39 insertions(+), 10 deletions(-) (limited to 'src/usr') diff --git a/src/usr/isteps/istep14/call_proc_exit_cache_contained.C b/src/usr/isteps/istep14/call_proc_exit_cache_contained.C index 94d133519..f018c452b 100644 --- a/src/usr/isteps/istep14/call_proc_exit_cache_contained.C +++ b/src/usr/isteps/istep14/call_proc_exit_cache_contained.C @@ -308,21 +308,50 @@ void* call_proc_exit_cache_contained (void *io_pArgs) if(Util::isSimicsRunning()) { + //Value to indicate memory is valid uint64_t l_memory_valid = 1; - // exit cache contained mode - l_errl = deviceWrite( l_masterProc, + + //Predicate(s) to get functional dimm for each proc + PredicateHwas l_functional; + l_functional.functional(true); + TargetHandleList l_dimms; + PredicateCTM l_dimm(CLASS_LOGICAL_CARD, TYPE_DIMM); + PredicatePostfixExpr l_checkExprFunctional; + l_checkExprFunctional.push(&l_dimm).push(&l_functional).And(); + + // Loop through all procs to find ones with valid memory + for (const auto & l_procChip: l_procList) + { + // Get the functional DIMMs for this proc + targetService().getAssociated(l_dimms, + l_procChip, + TargetService::CHILD_BY_AFFINITY, + TargetService::ALL, + &l_checkExprFunctional); + + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "%d functional dimms behind proc: %.8X", + l_dimms.size(), get_huid(l_procChip) ); + + // Check if this proc has memory + if(l_dimms.size()) + { + // exit cache contained mode + l_errl = deviceWrite( l_procChip, &l_memory_valid, //Memory is valid scom_size, //Size of Scom DEVICE_SCOM_ADDRESS(EXIT_CACHE_CONTAINED_SCOM_ADDR)); + } + + if ( l_errl ) + { + // Create IStep error log and cross reference to error + // that occurred + l_stepError.addErrorDetails( l_errl ); - if ( l_errl ) - { - // Create IStep error log and cross reference to error that - // occurred - l_stepError.addErrorDetails( l_errl ); - - // Commit Error - errlCommit( l_errl, HWPF_COMP_ID ); + // Commit Error + errlCommit( l_errl, HWPF_COMP_ID ); + } } } -- cgit v1.2.1