From 8549ce536fde780ad3b0bc2e0e3fdf8d63f1d6f4 Mon Sep 17 00:00:00 2001
From: Andrew Geissler <andrewg@us.ibm.com>
Date: Mon, 20 Jun 2016 10:12:52 -0500
Subject: Add in NV and remove PCI,PORE unit references

Note this also handles RTC 116091 (PCI targets data driven)

Change-Id: I92508623be7a56694d22a9aad250a2af94c9e60f
RTC: 149326
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26042
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
---
 src/usr/targeting/test/testtargeting.H | 83 ++++++++++++++++++++++++++++++++++
 1 file changed, 83 insertions(+)

(limited to 'src/usr/targeting/test')

diff --git a/src/usr/targeting/test/testtargeting.H b/src/usr/targeting/test/testtargeting.H
index 73f7c0d1b..e7312e694 100644
--- a/src/usr/targeting/test/testtargeting.H
+++ b/src/usr/targeting/test/testtargeting.H
@@ -312,6 +312,89 @@ class TargetingTestSuite : public CxxTest::TestSuite
         TS_TRACE(EXIT_MRK "testSignedAttribute");
     }
 
+    void testPciPhbTarget()
+    {
+        TS_TRACE(ENTER_MRK "testPciPhbTarget" );
+
+        using namespace ERRORLOG;
+        using namespace TARGETING;
+
+        TargetHandleList l_targs;
+
+        getAllChiplets( l_targs, TYPE_PCI);
+
+        // There is no PCI target in P9, ensure we got 0 back
+        if(l_targs.size() != 0)
+        {
+            TS_FAIL("TYPE_PCIE target incorrectly returned non-zero size: %d",
+                    l_targs.size());
+        }
+
+        // The PCI target is actually the PHB target in P9
+        getAllChiplets( l_targs, TYPE_PHB);
+        if(l_targs.size() == 0)
+        {
+            TS_FAIL("TYPE_PHB target incorrectly returned zero size");
+        }
+        else
+        {
+            TS_TRACE("Correctly returned non-zero number of PHB units: %d",
+                     l_targs.size());
+        }
+
+        for (auto l_targ : l_targs)
+        {
+            // Do a basic validation of PHB target by reading HUID
+            uint32_t l_huid = get_huid(l_targ);
+            if(l_huid == 0)
+            {
+                TS_FAIL("Failed to read HUID for a PHB target");
+            }
+            else
+            {
+                TS_TRACE("PHB HUID:0x%.8X",l_huid);
+            }
+        }
+
+        TS_TRACE(EXIT_MRK "testPciPhbTarget");
+    }
+
+    void testNvTarget()
+    {
+        TS_TRACE(ENTER_MRK "testNvTarget" );
+
+        using namespace ERRORLOG;
+        using namespace TARGETING;
+
+        TargetHandleList l_targs;
+
+        getAllChiplets( l_targs, TYPE_NV);
+        if(l_targs.size() == 0)
+        {
+            TS_FAIL("TYPE_NV target incorrectly returned zero size");
+        }
+        else
+        {
+            TS_TRACE("Correctly returned non-zero number of NV units: %d",
+                     l_targs.size());
+        }
+
+        for (auto l_targ : l_targs)
+        {
+            // Do a basic validation of NV target by reading HUID
+            uint32_t l_huid = get_huid(l_targ);
+            if(l_huid == 0)
+            {
+                TS_FAIL("Failed to read HUID for a NV target");
+            }
+            else
+            {
+                TS_TRACE("NV HUID:0x%.8X",l_huid);
+            }
+        }
+
+        TS_TRACE(EXIT_MRK "testNvTarget");
+    }
 };
 
 #endif // End __TARGETING_TESTTARGETING_H
-- 
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