From 23e85eef437248ac55ad710b5dff0a62db997f71 Mon Sep 17 00:00:00 2001 From: Van Lee Date: Tue, 6 Nov 2012 15:36:52 -0600 Subject: Add PCIE attributes support Change-Id: Icfd0639cf694622a9f2bdb23a48b7fb9f5b41961 RTC: 42175 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2242 Reviewed-by: Daniel M. Crowell Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III --- .../common/xmltohb/simics_MURANO.system.xml | 384 +++++++++++++++++++++ 1 file changed, 384 insertions(+) (limited to 'src/usr/targeting/common/xmltohb/simics_MURANO.system.xml') diff --git a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml index 60b92a9fe..40b269637 100644 --- a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml @@ -326,6 +326,102 @@ 0 + + + + PROC_PCIE_IOP_G2_PLL_CONTROL0 + + 0x18F4,0x18F4 + + + + PROC_PCIE_IOP_G3_PLL_CONTROL0 + + 0x086C,0x086C + + + + PROC_PCIE_IOP_PCS_CONTROL0 + + 0x3AE8,0x3AE8 + + + + PROC_PCIE_IOP_PCS_CONTROL1 + + 0x5CB9,0x5CB9 + + + + PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0 + + 0x146,0x146 + + + + PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1 + + 0x6D7,0x6D7 + + + + PROC_PCIE_IOP_RX_PEAK + + 0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B + + + + PROC_PCIE_IOP_RX_SDL + + 0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A + + + + PROC_PCIE_IOP_RX_VGA_CONTROL2 + + 0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451 + + + + PROC_PCIE_IOP_TX_BWLOSS1 + + 0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000 + + + + PROC_PCIE_IOP_TX_FIFO_OFFSET + + 0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294 + + + + PROC_PCIE_IOP_TX_RCVRDETCNTL + + 0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151 + + + + PROC_PCIE_IOP_ZCAL_CONTROL + + 0x000,0x000 + + + + + + + + PROC_PCIE_IOP_CONFIG + 0 + + + PROC_PCIE_IOP_SWAP + 0 + + + PROC_PCIE_PHB_ACTIVE + 0xE0 + @@ -927,6 +1023,102 @@ 0 + + + + PROC_PCIE_IOP_G2_PLL_CONTROL0 + + 0x18F4,0x18F4 + + + + PROC_PCIE_IOP_G3_PLL_CONTROL0 + + 0x086C,0x086C + + + + PROC_PCIE_IOP_PCS_CONTROL0 + + 0x3AE8,0x3AE8 + + + + PROC_PCIE_IOP_PCS_CONTROL1 + + 0x5CB9,0x5CB9 + + + + PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0 + + 0x146,0x146 + + + + PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1 + + 0x6D7,0x6D7 + + + + PROC_PCIE_IOP_RX_PEAK + + 0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B + + + + PROC_PCIE_IOP_RX_SDL + + 0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A + + + + PROC_PCIE_IOP_RX_VGA_CONTROL2 + + 0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451 + + + + PROC_PCIE_IOP_TX_BWLOSS1 + + 0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000 + + + + PROC_PCIE_IOP_TX_FIFO_OFFSET + + 0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294 + + + + PROC_PCIE_IOP_TX_RCVRDETCNTL + + 0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151 + + + + PROC_PCIE_IOP_ZCAL_CONTROL + + 0x000,0x000 + + + + + + + + PROC_PCIE_IOP_CONFIG + 0 + + + PROC_PCIE_IOP_SWAP + 0 + + + PROC_PCIE_PHB_ACTIVE + 0xE0 + @@ -1529,6 +1721,102 @@ 0 + + + + PROC_PCIE_IOP_G2_PLL_CONTROL0 + + 0x18F4,0x18F4 + + + + PROC_PCIE_IOP_G3_PLL_CONTROL0 + + 0x086C,0x086C + + + + PROC_PCIE_IOP_PCS_CONTROL0 + + 0x3AE8,0x3AE8 + + + + PROC_PCIE_IOP_PCS_CONTROL1 + + 0x5CB9,0x5CB9 + + + + PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0 + + 0x146,0x146 + + + + PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1 + + 0x6D7,0x6D7 + + + + PROC_PCIE_IOP_RX_PEAK + + 0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B + + + + PROC_PCIE_IOP_RX_SDL + + 0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A + + + + PROC_PCIE_IOP_RX_VGA_CONTROL2 + + 0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451 + + + + PROC_PCIE_IOP_TX_BWLOSS1 + + 0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000 + + + + PROC_PCIE_IOP_TX_FIFO_OFFSET + + 0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294 + + + + PROC_PCIE_IOP_TX_RCVRDETCNTL + + 0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151 + + + + PROC_PCIE_IOP_ZCAL_CONTROL + + 0x000,0x000 + + + + + + + + PROC_PCIE_IOP_CONFIG + 0 + + + PROC_PCIE_IOP_SWAP + 0 + + + PROC_PCIE_PHB_ACTIVE + 0xE0 + @@ -2132,6 +2420,102 @@ 0 + + + + PROC_PCIE_IOP_G2_PLL_CONTROL0 + + 0x18F4,0x18F4 + + + + PROC_PCIE_IOP_G3_PLL_CONTROL0 + + 0x086C,0x086C + + + + PROC_PCIE_IOP_PCS_CONTROL0 + + 0x3AE8,0x3AE8 + + + + PROC_PCIE_IOP_PCS_CONTROL1 + + 0x5CB9,0x5CB9 + + + + PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0 + + 0x146,0x146 + + + + PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1 + + 0x6D7,0x6D7 + + + + PROC_PCIE_IOP_RX_PEAK + + 0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B + + + + PROC_PCIE_IOP_RX_SDL + + 0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A + + + + PROC_PCIE_IOP_RX_VGA_CONTROL2 + + 0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451 + + + + PROC_PCIE_IOP_TX_BWLOSS1 + + 0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000 + + + + PROC_PCIE_IOP_TX_FIFO_OFFSET + + 0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294 + + + + PROC_PCIE_IOP_TX_RCVRDETCNTL + + 0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151 + + + + PROC_PCIE_IOP_ZCAL_CONTROL + + 0x000,0x000 + + + + + + + + PROC_PCIE_IOP_CONFIG + 0 + + + PROC_PCIE_IOP_SWAP + 0 + + + PROC_PCIE_PHB_ACTIVE + 0xE0 + -- cgit v1.2.1