From 6a3b0f5ac79e28f358e83464065fda5f85b810cb Mon Sep 17 00:00:00 2001 From: Joe McGill Date: Tue, 2 May 2017 13:21:24 -0500 Subject: security -- split p9_chiplet_scominit and p9_chiplet_enable_ridi isteps p9_chiplet_scominit, move from istep 8 to istep 10 shift content required for XBUS, fabric establishment into p9_chiplet_fabric_scominit, to be called in istep 8 p9_chiplet_enable_ridi, move from istep 8 to istep 10 shift content required for XBUS establishment into p9_xbus_enable_ridi, to be called in istep CMVC-Coreq: 1023401 Change-Id: I4c60e4c41211976c7919a603ab679357cc4af106 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39956 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Brent Wieman Dev-Ready: Brent Wieman Reviewed-by: Daniel M. Crowell Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39960 Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins --- src/usr/isteps/istep16/call_host_secure_rng.C | 117 +++++++++++++++++++++++ src/usr/isteps/istep16/call_p9_rng_init_phase2.C | 117 ----------------------- src/usr/isteps/istep16/makefile | 2 +- 3 files changed, 118 insertions(+), 118 deletions(-) create mode 100644 src/usr/isteps/istep16/call_host_secure_rng.C delete mode 100644 src/usr/isteps/istep16/call_p9_rng_init_phase2.C (limited to 'src/usr/isteps/istep16') diff --git a/src/usr/isteps/istep16/call_host_secure_rng.C b/src/usr/isteps/istep16/call_host_secure_rng.C new file mode 100644 index 000000000..5a5150475 --- /dev/null +++ b/src/usr/isteps/istep16/call_host_secure_rng.C @@ -0,0 +1,117 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep16/call_host_secure_rng.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +/** + * @file call_host_secure_rng.C + * + * Support file for IStep: core_activate + * Core Activate + * + * HWP_IGNORE_VERSION_CHECK + * + */ + +/******************************************************************************/ +// Includes +/******************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include +#include + +// targeting support +#include +#include + +// MVPD +#include +#include + +#include +#include +#include + +namespace ISTEP_16 +{ + +using namespace ISTEP; +using namespace ISTEP_ERROR; +using namespace ERRORLOG; +using namespace TARGETING; + +//****************************************************************************** +// wrapper function to call host_secure_rng +//****************************************************************************** +void* call_host_secure_rng( void *io_pArgs ) +{ + + errlHndl_t l_err = NULL; + IStepError l_StepError; + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "call_host_secure_rng entry" ); + // + // get a list of all the procs in the system + // + TARGETING::TargetHandleList l_cpuTargetList; + getAllChips(l_cpuTargetList, TYPE_PROC); + + // Loop through all processors including master + for (const auto & l_cpu_target: l_cpuTargetList) + { + const fapi2::Targetl_fapi2_proc_target( + l_cpu_target); + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Running host_secure_rng HWP on processor target %.8X", + TARGETING::get_huid(l_cpu_target) ); + + FAPI_INVOKE_HWP(l_err, p9_rng_init_phase2, l_fapi2_proc_target); + if(l_err) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR: call p9_rng_init_phase2, PLID=0x%x", + l_err->plid()); + l_StepError.addErrorDetails(l_err); + errlCommit(l_err, HWPF_COMP_ID); + } + + } // end of going through all processors + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "call_host_secure_rng exit"); + + return l_StepError.getErrorHandle(); +} + +}; // end namespace diff --git a/src/usr/isteps/istep16/call_p9_rng_init_phase2.C b/src/usr/isteps/istep16/call_p9_rng_init_phase2.C deleted file mode 100644 index 4aeb4917e..000000000 --- a/src/usr/isteps/istep16/call_p9_rng_init_phase2.C +++ /dev/null @@ -1,117 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/usr/isteps/istep16/call_p9_rng_init_phase2.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -/** - * @file call_p9_rng_init_phase2.C - * - * Support file for IStep: core_activate - * Core Activate - * - * HWP_IGNORE_VERSION_CHECK - * - */ - -/******************************************************************************/ -// Includes -/******************************************************************************/ - -#include - -#include -#include -#include - -#include -#include - -#include -#include - -// targeting support -#include -#include - -// MVPD -#include -#include - -#include -#include -#include - -namespace ISTEP_16 -{ - -using namespace ISTEP; -using namespace ISTEP_ERROR; -using namespace ERRORLOG; -using namespace TARGETING; - -//****************************************************************************** -// wrapper function to call p9_rng_init_phase2 -//****************************************************************************** -void* call_p9_rng_init_phase2( void *io_pArgs ) -{ - - errlHndl_t l_err = NULL; - IStepError l_StepError; - - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "call_p9_rng_init_phase2 entry" ); - // - // get a list of all the procs in the system - // - TARGETING::TargetHandleList l_cpuTargetList; - getAllChips(l_cpuTargetList, TYPE_PROC); - - // Loop through all processors including master - for (const auto & l_cpu_target: l_cpuTargetList) - { - const fapi2::Targetl_fapi2_proc_target( - l_cpu_target); - - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "Running p9_rng_init_phase2 HWP on processor target %.8X", - TARGETING::get_huid(l_cpu_target) ); - - FAPI_INVOKE_HWP(l_err, p9_rng_init_phase2, l_fapi2_proc_target); - if(l_err) - { - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "ERROR: call p9_rng_init_phase2, PLID=0x%x", - l_err->plid()); - l_StepError.addErrorDetails(l_err); - errlCommit(l_err, HWPF_COMP_ID); - } - - } // end of going through all processors - - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "call_p9_rng_init_phase2 exit"); - - return l_StepError.getErrorHandle(); -} - -}; // end namespace diff --git a/src/usr/isteps/istep16/makefile b/src/usr/isteps/istep16/makefile index c04dc08f2..03841b227 100644 --- a/src/usr/isteps/istep16/makefile +++ b/src/usr/isteps/istep16/makefile @@ -41,7 +41,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs/ OBJS += call_host_activate_master.o OBJS += call_host_activate_slave_cores.o -OBJS += call_p9_rng_init_phase2.o +OBJS += call_host_secure_rng.o OBJS += call_mss_scrub.o OBJS += call_host_ipl_complete.o -- cgit v1.2.1