From dfa5a46cfe90fd2a0fcfc1771622ee24494f26a6 Mon Sep 17 00:00:00 2001 From: Thi Tran Date: Mon, 16 Dec 2013 17:26:27 -0600 Subject: INITPROC: Hostboot - SW238462 Enable scan polling Change-Id: Idf642c2747a65406cc5f1559660550eee7f3aba0 CQ:SW238462 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7758 Tested-by: Jenkins Server Reviewed-by: Thi N. Tran Reviewed-by: A. Patrick Williams III --- .../p8_slw_build/p8_delta_scan_rw.h | 5 +- .../p8_slw_build/p8_image_help.C | 152 ++++++++++----------- .../p8_slw_build/p8_pore_table_gen_api.H | 9 +- .../p8_slw_build/p8_slw_build_fixed.C | 43 +++--- .../p8_slw_build/p8_xip_customize.C | 27 ++-- .../mss_eff_config/mss_eff_config_thermal.C | 31 ++--- .../hwpf/hwp/sbe_centaur_init/cen_xip_customize.C | 12 +- .../sbe_centaur_init/cen_xip_customize_errors.xml | 5 +- 8 files changed, 137 insertions(+), 147 deletions(-) (limited to 'src/usr/hwpf') diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_delta_scan_rw.h b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_delta_scan_rw.h index a472d8ed9..d9890863d 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_delta_scan_rw.h +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_delta_scan_rw.h @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_delta_scan_rw.h,v 1.47 2013/11/11 22:29:51 jmcgill Exp $ +// $Id: p8_delta_scan_rw.h,v 1.48 2013/12/03 05:45:04 cmolsen Exp $ #define OVERRIDE_OFFSET 8 // Byte offset of forward pointer's addr relative // to base forward pointer's addr. #define SIZE_IMAGE_BUF_MAX 5000000 // Max ~5MB image buffer size. @@ -253,7 +253,8 @@ int create_wiggle_flip_prg( uint32_t *o_wfInlineLenInWords, uint8_t i_flushOptimization, uint32_t i_scanMaxRotate, - uint32_t i_waitsScanDelay); + uint32_t i_waitsScanDelay, + uint32_t i_ddLevel); uint64_t calc_ring_layout_entry_offset( uint8_t i_typeRingLayout, diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C index 676a5043b..2f0e236e5 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_image_help.C,v 1.58 2013/10/07 14:29:08 jeshua Exp $ +// $Id: p8_image_help.C,v 1.59 2013/12/03 05:44:12 cmolsen Exp $ // /*------------------------------------------------------------------------------*/ /* *! TITLE : p8_image_help.C */ @@ -125,7 +125,8 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s uint32_t *o_wfInlineLenInWords, // final length of data stream uint8_t i_flushOptimization, // flush optimize or not uint32_t i_scanMaxRotate, // Max rotate bit len on 38xxx, or polling threshold on 39xxx. - uint32_t i_waitsScanDelay) // Temporary debug support. + uint32_t i_waitsScanDelay, // Temporary debug support. + uint32_t i_ddLevel) // DD level. { uint32_t rc=0; uint32_t i=0; @@ -141,6 +142,10 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s uint64_t pore_imm64b=0; uint32_t maxWfInlineLenInWords; PoreInlineContext ctx; +//#ifdef IMGBUILD_PPD_WF_POLLING_PROT + uint32_t waitsScanPoll=0; + uint32_t scanRing_baseAddr_long=0; +//#endif maxWfInlineLenInWords = *o_wfInlineLenInWords; @@ -159,10 +164,10 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s scanRing_baseAddr = P8_PORE_SHIFT_REG; scanRing_poreAddr = scanRing_baseAddr; -#ifdef IMGBUILD_PPD_WF_POLLING_PROT +//#ifdef IMGBUILD_PPD_WF_POLLING_PROT // Long (poll): 0x00039000: port 3, addr bit 16 must be set to 1 and bit 19 to 1. - uint32_t scanRing_baseAddr_long = P8_PORE_SHIFT_REG | 0x00001000; -#endif + scanRing_baseAddr_long = P8_PORE_SHIFT_REG | 0x00001000; +//#endif // Header check word for checking ring write was successful scanRingCheckWord = P8_SCAN_CHECK_WORD; @@ -198,27 +203,6 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s return ctx.error; } - // We can assume that atomic lock is already in effect prior to WF calls. - // It can probably also be assumed that functional clocks are stopped, but - // let's do it and check for it anyway. -/* CMO: 20120927 - Not working - Being debugged by EPM - PoreInlineLocation src0=0,tgt0=0; - pore_imm64b = uint64_t(0x8C200E00)<<32; - pore_STI(&ctx, P8_PORE_CLOCK_REGION_0x00030006, P0, pore_imm64b); - pore_LD(&ctx, D1, P8_PORE_CLOCK_STATUS_0x00030008, P1); - pore_imm64b = uint64_t(0xFFFFFFFF)<<32 | uint64_t(0xFFFFFFFF); - pore_XORI( &ctx, D1, D1, pore_imm64b); - PORE_LOCATION( &ctx, src0); - pore_BRAZ( &ctx, D1, src0); - pore_HALT( &ctx); - PORE_LOCATION( &ctx, tgt0); - pore_inline_branch_fixup( &ctx, src0, tgt0); - if (ctx.error > 0) { - MY_ERR("***inline_branch_fixup error (0) rc = %d", ctx.error); - return ctx.error; - } -*/ - // Program scanselq reg for scan clock control setup before ring scan pore_imm64b = ((uint64_t)i_scanSelectData) << 32; pore_STI(&ctx, scanSelectAddr, P0, pore_imm64b); @@ -230,8 +214,6 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s // Preload the scan data/shift reg with the scan header check word. // pore_imm64b = ((uint64_t)scanRingCheckWord) << 32; -// pore_LI(&ctx, D0, pore_imm64b ); -// pore_STD(&ctx, D0, scanRing_baseAddr, P0); pore_STI(&ctx, scanRing_baseAddr, P0, pore_imm64b); if (i_waitsScanDelay) { pore_WAITS(&ctx, i_waitsScanDelay); @@ -247,12 +229,7 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s if (remainder >0) count = count + 1; - // From P7+: skip first 32 bits associated with FSI engine - //TODO: check with perv design team if FSI 32 bit assumption is still valid in p8 - //remainingBits=i_ringBitLen-32; - // CMO: I changed the following to not skip the first 32-bit. - //remainingBits = i_ringBitLen-32; //Yong impl. - remainingBits = i_ringBitLen; //Mike impl. + remainingBits = i_ringBitLen; MY_DBG("count=%i rem=%i remBits=%i",count,remainder,remainingBits); @@ -280,20 +257,22 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s if (rotateLen > 0) { -#ifdef IMGBUILD_PPD_WF_POLLING_PROT - uint32_t nwait1=0; - PoreInlineLocation srcp1=0,tgtp1=0; +//#ifdef IMGBUILD_PPD_WF_POLLING_PROT + if (i_ddLevel>=0x20) { // Use polling protocol. + + PoreInlineLocation srcp1=0,tgtp1=0; pore_imm64b = uint64_t(rotateLen)<<32; -// pore_LI(&ctx, D0, pore_imm64b); -// pore_STD(&ctx, D0, scanRing_baseAddr_long, P0); pore_STI(&ctx, scanRing_baseAddr_long, P0, pore_imm64b); - nwait1 = rotateLen / 20 + 1; // 20x over sampling. + waitsScanPoll = rotateLen/OVER_SAMPLING_POLL; + if (waitsScanPoll 0) { MY_ERR("***LD D0 rc = %d", ctx.error); return ctx.error; } -#endif + + } +//#endif } // End of if (rotateLen>0) @@ -330,7 +313,6 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s // Take snapshot of present content of shift reg and put in D1. if (i_flushOptimization) { pore_LD(&ctx, D1, scanRing_baseAddr, P1); -// pore_WAITS(&ctx, i_waitsScanDelay); // Calculate shift reg cleanup mask and put in D0. The intent is to // clear bit in the ring data positions while keeping any header // check word content untouched. @@ -363,8 +345,6 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s if (i_flushOptimization) { pore_imm64b = ((uint64_t)myRev32(i_deltaRing[i])) << 32; // Shift it in by bitShift bits. -// pore_LI(&ctx, D0, pore_imm64b ); -// pore_STD(&ctx, D0, scanRing_poreAddr, P0); pore_STI(&ctx, scanRing_poreAddr, P0, pore_imm64b); } else { @@ -391,9 +371,10 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s else rotateLen = rotateLen + remainingBits; -#ifdef IMGBUILD_PPD_WF_POLLING_PROT - uint32_t nwait2=0; - PoreInlineLocation srcp2=0,tgtp2=0; +//#ifdef IMGBUILD_PPD_WF_POLLING_PROT + if (i_ddLevel>=0x20) { // Use polling protocol. + + PoreInlineLocation srcp2=0,tgtp2=0; // Max rotate length is 2^20-1, i.e., data BITS(12-31)=>0x000FFFFF if (rotateLen>=SCAN_MAX_ROTATE_LONG) { @@ -401,14 +382,19 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s MY_INF("480,000 bits but MAX_LONG_ROTATE=0x%0x and rotateLen=0x%0x\n", SCAN_MAX_ROTATE_LONG, rotateLen); pore_imm64b = uint64_t(SCAN_MAX_ROTATE_LONG)<<32; -// pore_LI(&ctx, D0, pore_imm64b); -// pore_STD(&ctx, D0, scanRing_baseAddr_long, P0); pore_STI(&ctx, scanRing_baseAddr_long, P0, pore_imm64b); - nwait2 = rotateLen / 20 + 1; // 20x over sampling. + if (ctx.error > 0) { + MY_ERR("***POLLING PROT(3a) rc = %d", ctx.error); + return ctx.error; + } + waitsScanPoll = rotateLen/OVER_SAMPLING_POLL; + if (waitsScanPolli_scanMaxRotate) { - //scanRing_poreAddr = scanRing_baseAddr | rotateLen; scanRing_poreAddr = scanRing_baseAddr | i_scanMaxRotate; pore_LD(&ctx, D0, scanRing_poreAddr, P1); -// pore_WAITS(&ctx, i_waitsScanDelay); if (ctx.error > 0) { MY_ERR("***LD D0 rc = %d", ctx.error); return ctx.error; } - //rotateLen = 0; rotateLen = rotateLen - i_scanMaxRotate; } -#endif + + } +//#endif } //end of else (i_deltaRing==0) @@ -445,20 +434,22 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s // If the scan ring has not been rotated to the original position // shift the ring by remaining shift bit length. if (rotateLen>0) { -#ifdef IMGBUILD_PPD_WF_POLLING_PROT - uint32_t nwait3=0; +//#ifdef IMGBUILD_PPD_WF_POLLING_PROT + if (i_ddLevel>=0x20) { // Use polling protocol. + PoreInlineLocation srcp3=0,tgtp3=0; pore_imm64b = uint64_t(rotateLen)<<32; -// pore_LI(&ctx, D0, pore_imm64b); -// pore_STD(&ctx, D0, scanRing_baseAddr_long, P0); pore_STI(&ctx, scanRing_baseAddr_long, P0, pore_imm64b); - nwait3 = rotateLen / 20 + 1; // 20x over sampling. + waitsScanPoll = rotateLen/OVER_SAMPLING_POLL; + if (waitsScanPoll 0) { MY_ERR("***LD D0 rc = %d", ctx.error); return ctx.error; } rotateLen=0; -#endif + + } +//#endif } // Finally, check that our header check word went through in one piece. @@ -509,7 +505,6 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s } // ...Load the output check word... pore_LD(&ctx, D0, scanRing_baseAddr, P1); -// pore_WAITS(&ctx, i_waitsScanDelay); // Compare against the reference header check word... pore_XORI( &ctx, D0, D0, ((uint64_t)scanRingCheckWord) << 32); PORE_LOCATION( &ctx, src5); @@ -550,11 +545,7 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s pore_BRAZ( &ctx, D0, tgt8); pore_HALT( &ctx); PORE_LOCATION( &ctx, tgt8); -// pore_LI( &ctx, D0, 0x0); // Do shadowing by setpulse. -// pore_MR( &ctx, D0, D1); -// pore_STD( &ctx, D0, GENERIC_CLK_SCAN_UPDATEDR_0x0003A000, P0); pore_STI(&ctx, GENERIC_CLK_SCAN_UPDATEDR_0x0003A000, P0, 0x0); -// pore_WAITS(&ctx, i_waitsScanDelay); pore_RET( &ctx); if (ctx.error > 0) { MY_ERR("***LD, XORI, BRANZ, RET or HALT went wrong rc = %d", ctx.error); @@ -1699,7 +1690,8 @@ int write_vpd_ring_to_slw_image(void *io_image, &wfInlineLenInWords, // Is 8-byte aligned on return. i_bufRs4Ring->iv_flushOptimization, (uint32_t)scanMaxRotate, - (uint32_t)waitsScanDelay); + (uint32_t)waitsScanDelay, + i_ddLevel ); if (rc) { MY_ERR("create_wiggle_flip_prg() failed w/rc=%i; ",rc); return IMGBUILD_ERR_WF_CREATE; diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api.H b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api.H index 896e8feb5..679b2119a 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api.H +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api.H @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_pore_table_gen_api.H,v 1.21 2013/05/23 21:10:40 dcrowell Exp $ +// $Id: p8_pore_table_gen_api.H,v 1.22 2013/12/03 05:43:33 cmolsen Exp $ /*------------------------------------------------------------------------------*/ /* *! (C) Copyright International Business Machines Corp. 2012 */ /* *! All Rights Reserved -- Property of IBM */ @@ -207,8 +207,11 @@ CONST_UINT64_T( SCRATCH0_RESET_VALUE, (0xABBA99EBBA33DADA) ); #define SCAN_MAX_ROTATE_38XXX_NAME "scan_max_rotate_38xxx" #define SCAN_ROTATE_DEFAULT 110 // Limit suggested by Tilman. #define SCAN_MAX_ROTATE 0x00000FE0 -//#define SCAN_MAX_ROTATE_LONG 0x000FFFFF // BITS 12->31. -#define SCAN_MAX_ROTATE_LONG 0x000007C7 // Experimental max val +#define SCAN_MAX_ROTATE_LONG 0x000FFFFF // All 1s in BITS 12->31. +//#define SCAN_MAX_ROTATE_LONG 0x000000D0 // Experimental max val + +#define OVER_SAMPLING_POLL 10 +#define WAITS_POLL_MIN 32 // RAM table defines #define XIPSIZE_RAM_ENTRY ( (sizeof(RamTableEntry)+7)/8*8 ) diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build_fixed.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build_fixed.C index 721756a91..79c1946a7 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build_fixed.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build_fixed.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_slw_build_fixed.C,v 1.16 2013/07/25 15:50:47 dcrowell Exp $ +// $Id: p8_slw_build_fixed.C,v 1.18 2013/12/16 21:41:47 cmolsen Exp $ /*------------------------------------------------------------------------------*/ /* *! TITLE : p8_slw_build_fixed */ /* *! DESCRIPTION : Extracts and decompresses delta ring states from EPROM */ @@ -31,27 +31,19 @@ // /* *! EXTENDED DESCRIPTION : */ // -/* *! USAGE : To build (for Hostboot) - */ -// buildfapiprcd -C "p8_image_help.C,p8_image_help_base.C,p8_scan_compression.C" -c "sbe_xip_image.c,pore_inline_assembler.c" -e "../../xml/error_info/p8_slw_build_errors.xml" p8_slw_build_fixed.C -// To build (for command-line) - -// buildfapiprcd -r ver-13-0 -C "p8_image_help.C,p8_image_help_base.C,p8_scan_compression.C" -c "sbe_xip_image.c,pore_inline_assembler.c" -e "../../xml/error_info/p8_slw_build_errors.xml" -u "SLW_COMMAND_LINE,IMGBUILD_PPD_IGNORE_XIPC" p8_slw_build_fixed.C -// Other Pre-Processor Directive (PPD) options - -// To add worst-case PIB access to wf programs: -// -u "IMGBUILD_PPD_WF_WORST_CASE_PIB" -// To add polling protocol to wf programs: -// -u "IMGBUILD_PPD_WF_POLLING_PROT" -// To NOT run xip_customize: -// -u "IMGBUILD_PPD_IGNORE_XIPC" +/* *! USAGE : + To build (for Hostboot) - + buildfapiprcd -C "p8_image_help.C,p8_image_help_base.C,p8_scan_compression.C" -c "sbe_xip_image.c,pore_inline_assembler.c" -e "../../xml/error_info/p8_slw_build_errors.xml,../../xml/error_info/proc_sbe_decompress_scan_halt_codes.xml" p8_slw_build_fixed.C + To build (for command-line) - + buildfapiprcd -C "p8_image_help.C,p8_image_help_base.C,p8_scan_compression.C" -c "sbe_xip_image.c,pore_inline_assembler.c" -e "../../xml/error_info/p8_slw_build_errors.xml,../../xml/error_info/proc_sbe_decompress_scan_halt_codes.xml" -u "SLW_COMMAND_LINE" p8_slw_build_fixed.C + To add polling protocol to wf programs: + -u "IMGBUILD_PPD_WF_POLLING_PROT" + To NOT run xip_customize: + -u "IMGBUILD_PPD_IGNORE_XIPC" */ // /* *! ASSUMPTIONS : */ // /* *! COMMENTS : */ -// - All image content, incl .rings content and ring layout, is handled -// in BE format. No matter which platform. -// - A ring may only be requested with the sysPhase=0 or 1. Any other -// sysPhase value, incl sysPhase=2, will cause no rings to be found. -// - io_sizeImageOut may only change value for SRAM mode 2. For modes 0 and 1, -// it should be the agreed upon fixed SLW image size of 1MB. // /*------------------------------------------------------------------------------*/ @@ -96,7 +88,7 @@ ReturnCode p8_slw_build_fixed( const fapi::Target &i_target, uint32_t ddLevel=0; uint8_t sysPhase=1; // SLW image build phase. uint32_t rcLoc=0, rcSearch=0, i, countWF=0; - uint32_t sizeImage=0, sizeImageIn=0, sizeImageOutMax, sizeImageTmp, sizeImageOld; + uint32_t sizeImage=0, sizeImageIn=0, sizeImageOutMax, sizeImageTmp; CompressedScanData *deltaRingRS4=NULL; DeltaRingLayout rs4RingLayout; void *nextRing=NULL; @@ -107,7 +99,6 @@ ReturnCode p8_slw_build_fixed( const fapi::Target &i_target, uint32_t dataTmp1, dataTmp2, dataTmp3; uint64_t ptrTmp1, ptrTmp2; uint32_t bufLC; - uint32_t bootCoreMask=0x000FFFF; // Sanity checks on buffers and image. // - validate image. @@ -542,7 +533,8 @@ ReturnCode p8_slw_build_fixed( const fapi::Target &i_target, &wfInlineLenInWords, deltaRingRS4->iv_flushOptimization, (uint32_t)scanMaxRotate, - (uint32_t)waitsScanDelay); + (uint32_t)waitsScanDelay, + ddLevel ); if (rcLoc) { FAPI_ERR("create_wiggle_flip_prg() failed w/rcLoc=%i",rcLoc); uint32_t & RC_LOCAL=rcLoc; @@ -631,12 +623,14 @@ ReturnCode p8_slw_build_fixed( const fapi::Target &i_target, return rc; } + FAPI_DBG("\tUpdating image w/WF prg + ring header was successful."); // Update some variables for debugging and error reporting. - sizeImageOld = sizeImageTmp; +#ifdef IMGBUILD_PPD_IGNORE_XIPC + uint32_t sizeImageOld = sizeImageTmp; +#endif countWF++; - FAPI_DBG("\tUpdating image w/WF prg + ring header was successful.sizeImageOld=%d",sizeImageOld); - + } // End of if (rcSearch!=DSLWB_RING_SEARCH_NO_MATCH) // ============================================================================ @@ -648,6 +642,7 @@ ReturnCode p8_slw_build_fixed( const fapi::Target &i_target, if (countWF==0) FAPI_INF("ZERO WF programs appended to .rings section."); #ifndef IMGBUILD_PPD_IGNORE_XIPC + uint32_t bootCoreMask=0x000FFFF; // // Do various customizations to image. // diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize.C index bcfee47c4..15497af81 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_xip_customize.C,v 1.65 2013/11/18 20:09:00 jmcgill Exp $ +// $Id: p8_xip_customize.C,v 1.66 2013/12/03 05:20:34 cmolsen Exp $ /*------------------------------------------------------------------------------*/ /* *! TITLE : p8_xip_customize */ /* *! DESCRIPTION : Obtains repair rings from VPD and adds them to either */ @@ -1778,27 +1778,24 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, // ========================================================================== uint8_t attrIvrmEnabled=0, attrFixIvrmWinkleBug=1; uint64_t slwControlVector=0; - + + rc = FAPI_ATTR_GET(ATTR_PM_IVRMS_ENABLED, &i_target, attrIvrmEnabled); + if (rc) { + FAPI_ERR("FAPI_ATTR_GET(ATTR_PM_IVRMS_ENABLED) returned error.\n"); + return rc; + } + #ifdef FAPIECMD // This section only included for Cronus builds. - //int type; - //fapi::fapiCheckIdType(ATTR_PM_IVRMS_ENABLED, type); - //FAPI_DBG("fapiCheckIdType(ATTR_PM_IVRMS_ENABLED) returned type=%i\n",type); - //if (!type) { // If attrib doesn't exist, create it and init to zero. - FAPI_DBG("ATTR_PM_IVRMS_ENABLED doesn't exit. Create and init to zero.\n"); + if (attrIvrmEnabled==0) { attrIvrmEnabled = 1; + FAPI_DBG("Setting ATTR_PM_IVRMS_ENABLED = 0x%x.\n",attrIvrmEnabled); rc = FAPI_ATTR_SET(ATTR_PM_IVRMS_ENABLED, &i_target, attrIvrmEnabled); if (rc) { - FAPI_ERR("FAPI_ATTR_PUT(ATTR_PM_IVRMS_ENABLED) return error.\n"); + FAPI_ERR("FAPI_ATTR_SET(ATTR_PM_IVRMS_ENABLED) return error.\n"); return rc; } - //} -#endif - - rc = FAPI_ATTR_GET(ATTR_PM_IVRMS_ENABLED, &i_target, attrIvrmEnabled); - if (rc) { - FAPI_ERR("FAPI_ATTR_GET(ATTR_PM_IVRMS_ENABLED) returned error.\n"); - return rc; } +#endif rc = FAPI_ATTR_GET(ATTR_CHIP_EC_FEATURE_IVRM_WINKLE_BUG, &i_target, attrFixIvrmWinkleBug); if (rc) { diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.C b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.C index 8ad67c94e..18be2ef3b 100644 --- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.C +++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.C @@ -145,7 +145,6 @@ const uint8_t ACTIVE_DIMM_UTILIZATION = 70; const uint8_t DATA_BUS_READ_PERCENT = 66; const uint8_t DATA_BUS_WRITE_PERCENT = 34; -//@thi - Change all FAPI_INF to FAPI_INF extern "C" { @@ -774,7 +773,7 @@ extern "C" { (rc, RC_MSS_DIMM_POWER_CURVE_DATA_INVALID); if (rc) fapiLogError(rc); } - FAPI_INF("CDIMM Power [P%d:D%d][SLOPE=%d:INT=%d cW][SLOPE2=%d:INT2=%d cW]", port, dimm, power_slope_array[port][dimm], power_int_array[port][dimm], power_slope2_array[port][dimm], power_int2_array[port][dimm]); + FAPI_DBG("CDIMM Power [P%d:D%d][SLOPE=%d:INT=%d cW][SLOPE2=%d:INT2=%d cW]", port, dimm, power_slope_array[port][dimm], power_int_array[port][dimm], power_slope2_array[port][dimm], power_int2_array[port][dimm]); } // ISDIMM power slope/intercept will come from equation else @@ -935,9 +934,9 @@ extern "C" { } found_entry_in_table = 1; - FAPI_INF("FOUND ENTRY: GEN=%s WIDTH=X%d RANK=%d IDLE(%d%%)=%d ACTIVE(%d%%)=%d ADDER[TYPE=%d WCTERM=%4.2f] Multiplier[VOLT=%4.2f FREQ=%4.2f]", dram_gen_str, power_table[entry].dram_width, power_table[entry].dimm_ranks, IDLE_DIMM_UTILIZATION, power_table[entry].rank_power.idle, ACTIVE_DIMM_UTILIZATION, power_table[entry].rank_power.active, dimm_power_adder_type, dimm_power_adder_termination_wc, dimm_power_multiplier_volt, dimm_power_mulitiplier_freq); - FAPI_INF("ISDIMM Power [P%d:D%d][%s:X%d:R%d/%d:%d:%d][IDLE(%d%%)=%4.2f:ACTIVE(%d%%)=%4.2f cW][SLOPE=%d:INT=%d cW]", port, dimm, dram_gen_str, power_table[entry].dram_width, dimm_master_ranks_array[port][dimm], (dimm_ranks_array[port][dimm] - dimm_master_ranks_array[port][dimm]), dimm_voltage, dimm_frequency, IDLE_DIMM_UTILIZATION, dimm_idle_power, ACTIVE_DIMM_UTILIZATION, dimm_active_power, power_slope_array[port][dimm], power_int_array[port][dimm]); - FAPI_INF("ISDIMM Power [P%d:D%d][SLOPE=%d:INT=%d cW][SLOPE2=%d:INT2=%d cW]", port, dimm, power_slope_array[port][dimm], power_int_array[port][dimm], power_slope2_array[port][dimm], power_int2_array[port][dimm]); + FAPI_DBG("FOUND ENTRY: GEN=%s WIDTH=X%d RANK=%d IDLE(%d%%)=%d ACTIVE(%d%%)=%d ADDER[TYPE=%d WCTERM=%4.2f] Multiplier[VOLT=%4.2f FREQ=%4.2f]", dram_gen_str, power_table[entry].dram_width, power_table[entry].dimm_ranks, IDLE_DIMM_UTILIZATION, power_table[entry].rank_power.idle, ACTIVE_DIMM_UTILIZATION, power_table[entry].rank_power.active, dimm_power_adder_type, dimm_power_adder_termination_wc, dimm_power_multiplier_volt, dimm_power_mulitiplier_freq); + FAPI_DBG("ISDIMM Power [P%d:D%d][%s:X%d:R%d/%d:%d:%d][IDLE(%d%%)=%4.2f:ACTIVE(%d%%)=%4.2f cW][SLOPE=%d:INT=%d cW]", port, dimm, dram_gen_str, power_table[entry].dram_width, dimm_master_ranks_array[port][dimm], (dimm_ranks_array[port][dimm] - dimm_master_ranks_array[port][dimm]), dimm_voltage, dimm_frequency, IDLE_DIMM_UTILIZATION, dimm_idle_power, ACTIVE_DIMM_UTILIZATION, dimm_active_power, power_slope_array[port][dimm], power_int_array[port][dimm]); + FAPI_DBG("ISDIMM Power [P%d:D%d][SLOPE=%d:INT=%d cW][SLOPE2=%d:INT2=%d cW]", port, dimm, power_slope_array[port][dimm], power_int_array[port][dimm], power_slope2_array[port][dimm], power_int2_array[port][dimm]); break; } @@ -1354,7 +1353,7 @@ extern "C" { (eff_term_rd + i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank]); } - FAPI_INF("[P%d:D%d:R%d] 0ODT0 RD TERMINATION = %4.2f (%d)", i_port, i_dimm, i_rank, eff_term_rd, i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank]); + FAPI_DBG("[P%d:D%d:R%d] 0ODT0 RD TERMINATION = %4.2f (%d)", i_port, i_dimm, i_rank, eff_term_rd, i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank]); } //------------------------------------------------------------------------------ @@ -1380,7 +1379,7 @@ extern "C" { (eff_term_rd + i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank]); } - FAPI_INF("[P%d:D%d:R%d] 0ODT1 RD TERMINATION = %4.2f (%d)", i_port, i_dimm, i_rank, eff_term_rd, i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank]); + FAPI_DBG("[P%d:D%d:R%d] 0ODT1 RD TERMINATION = %4.2f (%d)", i_port, i_dimm, i_rank, eff_term_rd, i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank]); } //------------------------------------------------------------------------------ // 1ODT0 @@ -1405,7 +1404,7 @@ extern "C" { (eff_term_rd + i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank]); } - FAPI_INF("[P%d:D%d:R%d] 1ODT0 RD TERMINATION = %4.2f (%d)", i_port, i_dimm, i_rank, eff_term_rd, i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank]); + FAPI_DBG("[P%d:D%d:R%d] 1ODT0 RD TERMINATION = %4.2f (%d)", i_port, i_dimm, i_rank, eff_term_rd, i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank]); } //------------------------------------------------------------------------------ // 1ODT1 @@ -1430,7 +1429,7 @@ extern "C" { (eff_term_rd + i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank]); } - FAPI_INF("[P%d:D%d:R%d] 1ODT1 RD TERMINATION = %4.2f (%d)", i_port, i_dimm, i_rank, eff_term_rd, i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank]); + FAPI_DBG("[P%d:D%d:R%d] 1ODT1 RD TERMINATION = %4.2f (%d)", i_port, i_dimm, i_rank, eff_term_rd, i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank]); } // calculate out effective read termination @@ -1526,7 +1525,7 @@ extern "C" { } } - FAPI_INF("[P%d:D%d:R%d] WR TERMINATION = %4.2f (%d/%d)", i_port, i_dimm, i_rank, eff_term_wr, i_dram_rtt_wr[i_port][i_dimm][i_rank], i_dram_rtt_nom[i_port][i_dimm][i_rank]); + FAPI_DBG("[P%d:D%d:R%d] WR TERMINATION = %4.2f (%d/%d)", i_port, i_dimm, i_rank, eff_term_wr, i_dram_rtt_wr[i_port][i_dimm][i_rank], i_dram_rtt_nom[i_port][i_dimm][i_rank]); } //------------------------------------------------------------------------------ // 0ODT0 @@ -1583,7 +1582,7 @@ extern "C" { } } - FAPI_INF("[P%d:D%d:R%d] 0ODT0 WR TERMINATION = %4.2f (%d/%d)", i_port, i_dimm, i_rank, eff_term_wr, i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank], i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt0_rank]); + FAPI_DBG("[P%d:D%d:R%d] 0ODT0 WR TERMINATION = %4.2f (%d/%d)", i_port, i_dimm, i_rank, eff_term_wr, i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank], i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt0_rank]); } //------------------------------------------------------------------------------ // 0ODT1 @@ -1640,7 +1639,7 @@ extern "C" { } } - FAPI_INF("[P%d:D%d:R%d] 0ODT1 WR TERMINATION = %4.2f (%d/%d)", i_port, i_dimm, i_rank, eff_term_wr, i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank], i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt1_rank]); + FAPI_DBG("[P%d:D%d:R%d] 0ODT1 WR TERMINATION = %4.2f (%d/%d)", i_port, i_dimm, i_rank, eff_term_wr, i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank], i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt1_rank]); } //------------------------------------------------------------------------------ // 1ODT0 @@ -1697,7 +1696,7 @@ extern "C" { } } - FAPI_INF("[P%d:D%d:R%d] 1ODT0 WR TERMINATION = %4.2f (%d/%d)", i_port, i_dimm, i_rank, eff_term_wr, i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank], i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt0_rank]); + FAPI_DBG("[P%d:D%d:R%d] 1ODT0 WR TERMINATION = %4.2f (%d/%d)", i_port, i_dimm, i_rank, eff_term_wr, i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank], i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt0_rank]); } //------------------------------------------------------------------------------ // 1ODT1 @@ -1754,7 +1753,7 @@ extern "C" { } } - FAPI_INF("[P%d:D%d:R%d] 1ODT1 WR TERMINATION = %4.2f (%d/%d)", i_port, i_dimm, i_rank, eff_term_wr, i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank], i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt1_rank]); + FAPI_DBG("[P%d:D%d:R%d] 1ODT1 WR TERMINATION = %4.2f (%d/%d)", i_port, i_dimm, i_rank, eff_term_wr, i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank], i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt1_rank]); } @@ -1810,8 +1809,8 @@ extern "C" { (float(ACTIVE_DIMM_UTILIZATION) / 100) * (float(DATA_BUS_WRITE_PERCENT) / 100) * (term_odt_mult_wr)) ); - FAPI_INF("%s TERM:[P%d:D%d:R%d] CEN[DRV=%d RCV=%d] DRAM[DRV=%d ODT_RD=%4.2f ODT_WR=%4.2f]", i_nom_or_wc_term, i_port, i_dimm, i_rank, cen_dq_dqs_drv_imp_value, i_cen_dq_dqs_rcv_imp[i_port], i_dimm_dram_ron[i_port][i_dimm], eff_term_rd, eff_term_wr); - FAPI_INF("%s TERM POWER:[P%d:D%d:R%d] RD[Nets=%d EffTerm=%3.2f ODTMult=%1.2f] WR[Nets=%d EffTerm=%3.2f ODTMult=%1.2f] TermPower(%d%%)=%2.2f W", i_nom_or_wc_term, i_port, i_dimm, i_rank, number_nets_term_rd, eff_net_term_rd, term_odt_mult_rd, number_nets_term_wr, eff_net_term_wr, term_odt_mult_wr, ACTIVE_DIMM_UTILIZATION, o_dimm_power_adder_termination); + FAPI_DBG("%s TERM:[P%d:D%d:R%d] CEN[DRV=%d RCV=%d] DRAM[DRV=%d ODT_RD=%4.2f ODT_WR=%4.2f]", i_nom_or_wc_term, i_port, i_dimm, i_rank, cen_dq_dqs_drv_imp_value, i_cen_dq_dqs_rcv_imp[i_port], i_dimm_dram_ron[i_port][i_dimm], eff_term_rd, eff_term_wr); + FAPI_DBG("%s TERM POWER:[P%d:D%d:R%d] RD[Nets=%d EffTerm=%3.2f ODTMult=%1.2f] WR[Nets=%d EffTerm=%3.2f ODTMult=%1.2f] TermPower(%d%%)=%2.2f W", i_nom_or_wc_term, i_port, i_dimm, i_rank, number_nets_term_rd, eff_net_term_rd, term_odt_mult_rd, number_nets_term_wr, eff_net_term_wr, term_odt_mult_wr, ACTIVE_DIMM_UTILIZATION, o_dimm_power_adder_termination); } else { diff --git a/src/usr/hwpf/hwp/sbe_centaur_init/cen_xip_customize.C b/src/usr/hwpf/hwp/sbe_centaur_init/cen_xip_customize.C index d3ce8f475..23b1aef05 100644 --- a/src/usr/hwpf/hwp/sbe_centaur_init/cen_xip_customize.C +++ b/src/usr/hwpf/hwp/sbe_centaur_init/cen_xip_customize.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: cen_xip_customize.C,v 1.11 2013/08/12 20:05:18 dcrowell Exp $ +// $Id: cen_xip_customize.C,v 1.12 2013/12/03 05:46:24 cmolsen Exp $ /*------------------------------------------------------------------------------*/ /* *! TITLE : cen_xip_customize.C */ /* *! DESCRIPTION : Customizes Centaur images from a Centaur reference image. */ @@ -28,8 +28,9 @@ // /* *! EXTENDED DESCRIPTION : */ // -/* *! USAGE : To build (for VBU/command-line) - */ -// buildfapiprcd -c "sbe_xip_image.c" -C "p8_image_help.C,p8_image_help_base.C" -e "../../xml/error_info/cen_xip_customize_errors.xml" -u "IMGBUILD_PPD_CEN_XIP_CUSTOMIZE,XIPC_COMMAND_LINE" cen_xip_customize.C +/* *! USAGE : + To build (for Hostboot) - + buildfapiprcd -c "sbe_xip_image.c,pore_inline_assembler.c,p8_ring_identification.c" -C "p8_image_help.C,p8_image_help_base.C,p8_pore_table_gen_api_fixed.C,p8_scan_compression.C" -e "../../xml/error_info/cen_xip_customize_errors.xml,../../xml/error_info/proc_sbe_decompress_scan_halt_codes.xml,../../../../../../hwpf/hwp/xml/error_info/mvpd_errors.xml" cen_xip_customize.C */ // /* *! ASSUMPTIONS : */ // @@ -221,9 +222,10 @@ ReturnCode cen_xip_customize(const fapi::Target &i_target, attrChipletId, //=0xff, &wfInline, &wfInlineLenInWords, // Is 8-byte aligned on return. - 1, + 1, // Always do flush optimization. (uint32_t)scanMaxRotate, - 0); // No need to use waits for Centaur. + 0, // No need to use waits for Centaur. + 0x00000010); // Centaur doesn't support scan polling. if (rcLoc) { FAPI_ERR("create_wiggle_flip_prg() failed w/rcLoc=%i",rcLoc); uint32_t &RC_LOCAL=rcLoc; diff --git a/src/usr/hwpf/hwp/sbe_centaur_init/cen_xip_customize_errors.xml b/src/usr/hwpf/hwp/sbe_centaur_init/cen_xip_customize_errors.xml index 9b5697ccd..7943f4bff 100644 --- a/src/usr/hwpf/hwp/sbe_centaur_init/cen_xip_customize_errors.xml +++ b/src/usr/hwpf/hwp/sbe_centaur_init/cen_xip_customize_errors.xml @@ -20,6 +20,7 @@ + @@ -41,7 +42,7 @@ PLL ring size returned from attribute is too large. DATA_ATTRIBUTE_RING_SIZE DATA_MAX_PLL_RING_SIZE - DATA_SIZE_OF_BUF1 + DATA_SIZE_OF_BUF1 @@ -54,7 +55,7 @@ RC_CEN_XIPC_PLL_RING_BLOCK_TOO_LARGE PLL ring block is too large. DATA_RING_BLOCK_SIZEOFTHIS - DATA_SIZE_OF_BUF1 + DATA_SIZE_OF_BUF1 -- cgit v1.2.1