From 5dca7cc4768d1963e4f1304996622cb658ad7a72 Mon Sep 17 00:00:00 2001 From: Matt Ploetz Date: Tue, 25 Feb 2014 16:34:40 -0600 Subject: INITPROC: Hostboot - SW243755 Horton 5/8 RAS changes Change-Id: Ie81c5b949d28b5f1eec9c705d37558e710764107 CQ:SW243755 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9149 Tested-by: Jenkins Server Reviewed-by: Thi N. Tran Reviewed-by: Brian H. Horton Reviewed-by: A. Patrick Williams III --- src/usr/hwpf/hwp/activate_powerbus/makefile | 21 +- src/usr/hwpf/hwp/bus_training/makefile | 4 +- src/usr/hwpf/hwp/bus_training/proc_fab_smp.C | 324 ---- src/usr/hwpf/hwp/bus_training/proc_fab_smp.H | 161 -- .../proc_pcie_config/proc_pcie_config.C | 7 +- .../proc_pcie_config/proc_pcie_config_errors.xml | 9 +- .../proc_setup_bars/proc_fab_smp.C | 13 +- .../proc_setup_bars/proc_fab_smp.H | 8 +- .../proc_setup_bars/proc_setup_bars.C | 1693 +++++++++----------- .../proc_setup_bars/proc_setup_bars.H | 137 +- .../proc_setup_bars/proc_setup_bars_errors.xml | 211 ++- .../proc_fab_iovalid/proc_fab_smp_errors.xml | 19 +- 12 files changed, 1000 insertions(+), 1607 deletions(-) delete mode 100644 src/usr/hwpf/hwp/bus_training/proc_fab_smp.C delete mode 100644 src/usr/hwpf/hwp/bus_training/proc_fab_smp.H (limited to 'src/usr/hwpf/hwp') diff --git a/src/usr/hwpf/hwp/activate_powerbus/makefile b/src/usr/hwpf/hwp/activate_powerbus/makefile index f65cec5d1..300a25644 100644 --- a/src/usr/hwpf/hwp/activate_powerbus/makefile +++ b/src/usr/hwpf/hwp/activate_powerbus/makefile @@ -1,25 +1,25 @@ # IBM_PROLOG_BEGIN_TAG # This is an automatically generated prolog. -# +# # $Source: src/usr/hwpf/hwp/activate_powerbus/makefile $ -# +# # IBM CONFIDENTIAL -# -# COPYRIGHT International Business Machines Corp. 2012 -# +# +# COPYRIGHT International Business Machines Corp. 2012,2014 +# # p1 -# +# # Object Code Only (OCO) source materials # Licensed Internal Code Source Materials # IBM HostBoot Licensed Internal Code -# +# # The source code for this program is not published or otherwise # divested of its trade secrets, irrespective of what has been # deposited with the U.S. Copyright Office. -# +# # Origin: 30 -# -# IBM_PROLOG_END_TAG +# +# IBM_PROLOG_END_TAG ROOTPATH = ../../../../.. @@ -36,6 +36,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/include EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/bus_training EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/edi_ei_initialization EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid +EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars ## NOTE: add the base istep dir here. EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/activate_powerbus diff --git a/src/usr/hwpf/hwp/bus_training/makefile b/src/usr/hwpf/hwp/bus_training/makefile index 03a29a6ef..75af4954a 100644 --- a/src/usr/hwpf/hwp/bus_training/makefile +++ b/src/usr/hwpf/hwp/bus_training/makefile @@ -5,7 +5,7 @@ # # IBM CONFIDENTIAL # -# COPYRIGHT International Business Machines Corp. 2012,2013 +# COPYRIGHT International Business Machines Corp. 2012,2014 # # p1 # @@ -35,7 +35,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_s ## pointer to common HWP files EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/include -OBJS = gcr_funcs.o io_funcs.o io_run_training.o pbusLinkSvc.o proc_fab_smp.o \ +OBJS = gcr_funcs.o io_funcs.o io_run_training.o pbusLinkSvc.o \ io_dccal.o \ io_power_down_lanes.o \ io_read_erepair.o \ diff --git a/src/usr/hwpf/hwp/bus_training/proc_fab_smp.C b/src/usr/hwpf/hwp/bus_training/proc_fab_smp.C deleted file mode 100644 index 1b031a621..000000000 --- a/src/usr/hwpf/hwp/bus_training/proc_fab_smp.C +++ /dev/null @@ -1,324 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/usr/hwpf/hwp/bus_training/proc_fab_smp.C $ */ -/* */ -/* IBM CONFIDENTIAL */ -/* */ -/* COPYRIGHT International Business Machines Corp. 2012,2013 */ -/* */ -/* p1 */ -/* */ -/* Object Code Only (OCO) source materials */ -/* Licensed Internal Code Source Materials */ -/* IBM HostBoot Licensed Internal Code */ -/* */ -/* The source code for this program is not published or otherwise */ -/* divested of its trade secrets, irrespective of what has been */ -/* deposited with the U.S. Copyright Office. */ -/* */ -/* Origin: 30 */ -/* */ -/* IBM_PROLOG_END_TAG */ -// $Id: proc_fab_smp.C,v 1.8 2013/09/23 22:01:31 jmcgill Exp $ -// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_fab_smp.C,v $ -//------------------------------------------------------------------------------ -// *| -// *! (C) Copyright International Business Machines Corp. 2011 -// *! All Rights Reserved -- Property of IBM -// *! *** IBM Confidential *** -// *| -// *! TITLE : proc_fab_smp.C -// *! DESCRIPTION : Common fabric structure defintions/utility functions (FAPI) -// *! -// *! OWNER NAME : Joe McGill Email: jmcgill@us.ibm.com -// *! -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ -#include "proc_fab_smp.H" - -extern "C" { - - -//------------------------------------------------------------------------------ -// Function definitions -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -// function: utility function to read & return fabric node ID attribute -// parameters: i_target => pointer to chip/chiplet target -// o_node_id => structure encapsulating node ID value -// returns: FAPI_RC_SUCCESS if attribute read is successful & value is valid, -// RC_PROC_FAB_SMP_FABRIC_NODE_ID_ATTR_ERR if attribute value is -// invalid, -// else FAPI_ATTR_GET return code -//------------------------------------------------------------------------------ -fapi::ReturnCode proc_fab_smp_get_node_id_attr( - const fapi::Target* i_target, - proc_fab_smp_node_id& o_node_id) -{ - // return code - fapi::ReturnCode rc; - // chiplet->chip target conversion - bool use_parent = false; - fapi::Target parent_target; - // temporary attribute storage used to build procedure data structures - uint8_t node_id_attr; - - // mark function entry - FAPI_DBG("proc_fab_smp_get_node_id_attr: Start"); - - do - { - if (i_target->getType() != fapi::TARGET_TYPE_PROC_CHIP) - { - use_parent = true; - // retrieve parent target if input target is a chiplet - rc = fapiGetParentChip(*i_target, - parent_target); - if (!rc.ok()) - { - FAPI_ERR("proc_fab_smp_get_node_id_attr: Error from fapiGetParentChip"); - break; - } - } - - // retrieve node ID attribute - rc = FAPI_ATTR_GET(ATTR_FABRIC_NODE_ID, - ((use_parent)? - (&parent_target): - (i_target)), - node_id_attr); - if (!rc.ok()) - { - FAPI_ERR("proc_fab_smp_get_node_id_attr: Error querying ATTR_FABRIC_NODE_ID"); - break; - } - - // print attribute value - FAPI_DBG("proc_fab_smp_get_node_id_attr: ATTR_FABRIC_NODE_ID = 0x%X", - node_id_attr); - - // translate to output value - switch (node_id_attr) - { - case 0: - o_node_id = FBC_NODE_ID_0; - break; - case 1: - o_node_id = FBC_NODE_ID_1; - break; - case 2: - o_node_id = FBC_NODE_ID_2; - break; - case 3: - o_node_id = FBC_NODE_ID_3; - break; - case 4: - o_node_id = FBC_NODE_ID_4; - break; - case 5: - o_node_id = FBC_NODE_ID_5; - break; - case 6: - o_node_id = FBC_NODE_ID_6; - break; - case 7: - o_node_id = FBC_NODE_ID_7; - break; - default: - FAPI_ERR("proc_fab_smp_get_node_id_attr: Invalid fabric node ID attribute value 0x%02X", - node_id_attr); - const uint8_t& ATTR_DATA = node_id_attr; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_FAB_SMP_FABRIC_NODE_ID_ATTR_ERR); - break; - } - } while(0); - - // mark function exit - FAPI_DBG("proc_fab_smp_get_node_id_attr: End"); - return rc; -} - - -//------------------------------------------------------------------------------ -// function: utility function to read & return fabric chip ID attribute -// parameters: i_target => pointer to chip/chiplet target -// o_chip_id => structure encapsulating chip ID value -// returns: FAPI_RC_SUCCESS if attribute read is successful & value is valid, -// RC_PROC_FAB_SMP_FABRIC_CHIP_ID_ATTR_ERR if attribute value is -// invalid, -// else FAPI_ATTR_GET return code -//------------------------------------------------------------------------------ -fapi::ReturnCode proc_fab_smp_get_chip_id_attr( - const fapi::Target* i_target, - proc_fab_smp_chip_id& o_chip_id) -{ - // return code - fapi::ReturnCode rc; - // chiplet->chip target conversion - bool use_parent = false; - fapi::Target parent_target; - // temporary attribute storage used to build procedure data structures - uint8_t chip_id_attr; - - // mark function entry - FAPI_DBG("proc_fab_smp_get_chip_id_attr: Start"); - - do - { - if (i_target->getType() != fapi::TARGET_TYPE_PROC_CHIP) - { - use_parent = true; - // retrieve parent target if input target is a chiplet - rc = fapiGetParentChip(*i_target, - parent_target); - if (!rc.ok()) - { - FAPI_ERR("proc_fab_smp_get_chip_id_attr: Error from fapiGetParentChip"); - break; - } - } - - // retrieve chip ID attribute - rc = FAPI_ATTR_GET(ATTR_FABRIC_CHIP_ID, - ((use_parent)? - (&parent_target): - (i_target)), - chip_id_attr); - if (!rc.ok()) - { - FAPI_ERR("proc_fab_smp_get_chip_id_attr: Error querying ATTR_FABRIC_CHIP_ID"); - break; - } - - // print attribute value - FAPI_DBG("proc_fab_smp_get_chip_id_attr: ATTR_FABRIC_CHIP_ID = 0x%X", - chip_id_attr); - - // translate to output value - switch (chip_id_attr) - { - case 0: - o_chip_id = FBC_CHIP_ID_0; - break; - case 1: - o_chip_id = FBC_CHIP_ID_1; - break; - case 2: - o_chip_id = FBC_CHIP_ID_2; - break; - case 3: - o_chip_id = FBC_CHIP_ID_3; - break; - case 4: - o_chip_id = FBC_CHIP_ID_4; - break; - case 5: - o_chip_id = FBC_CHIP_ID_5; - break; - case 6: - o_chip_id = FBC_CHIP_ID_6; - break; - case 7: - o_chip_id = FBC_CHIP_ID_7; - break; - default: - FAPI_ERR("proc_fab_smp_get_chip_id_attr: Invalid fabric chip ID attribute value 0x%02X", - chip_id_attr); - const uint8_t& ATTR_DATA = chip_id_attr; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_FAB_SMP_FABRIC_CHIP_ID_ATTR_ERR); - break; - } - } while(0); - - // mark function exit - FAPI_DBG("proc_fab_smp_get_chip_id_attr: End"); - return rc; -} - - -//------------------------------------------------------------------------------ -// function: utility function to read & return PCIe/DSMP mux attribute values -// parameters: i_target => pointer to chip target -// o_pcie_not_f_link => vector of boolean values representing state -// of PCIe/DSMP mux settings (one value per -// foreign link, true=PCIe function, false= -// DSMP function) -// returns: FAPI_RC_SUCCESS if attribute read is successful & value is valid, -// RC_PROC_FAB_SMP_PCIE_NOT_F_LINK_ATTR_ERR if attribute value is -// invalid, -// else FAPI_ATTR_GET return code -//------------------------------------------------------------------------------ -fapi::ReturnCode proc_fab_smp_get_pcie_dsmp_mux_attrs( - const fapi::Target* i_target, - bool o_pcie_not_f_link[PROC_FAB_SMP_NUM_F_LINKS]) -{ - // return code - fapi::ReturnCode rc; - // temporary attribute storage used to build procedure data structures - uint8_t pcie_not_f_link_attr[PROC_FAB_SMP_NUM_F_LINKS]; - - // mark function entry - FAPI_DBG("proc_fab_smp_get_pcie_dsmp_mux_attrs: Start"); - - do - { - // retrieve PCIe/DSMP mux attributes - rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_NOT_F_LINK, - i_target, - pcie_not_f_link_attr); - if (!rc.ok()) - { - FAPI_ERR("proc_fab_smp_get_pcie_dsmp_mux_attrs: Error querying ATTR_PROC_PCIE_NOT_F_LINK"); - break; - } - - // loop over all links - for (uint8_t l = 0; - l < PROC_FAB_SMP_NUM_F_LINKS; - l++) - { - // print attribute value - FAPI_DBG("proc_fab_smp_get_pcie_dsmp_mux_attrs: ATTR_PROC_PCIE_NOT_F_LINK[%d] = 0x%X", - l, pcie_not_f_link_attr[l]); - - // validate attribute value - switch (pcie_not_f_link_attr[l]) - { - case 0: - o_pcie_not_f_link[l] = false; - break; - case 1: - o_pcie_not_f_link[l] = true; - break; - default: - FAPI_ERR("proc_fab_smp_get_pcie_dsmp_mux_attrs: Invalid PCIe/DSMP mux attribute value 0x%02X", - pcie_not_f_link_attr[l]); - const uint8_t& ATTR_DATA = pcie_not_f_link_attr[l]; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_FAB_SMP_PCIE_NOT_F_LINK_ATTR_ERR); - break; - } - if (!rc.ok()) - { - break; - } - } - } while(0); - - // mark function exit - FAPI_DBG("proc_fab_smp_get_pcie_dsmp_mux_attrs: End"); - return rc; -} - - - -} // extern "C" diff --git a/src/usr/hwpf/hwp/bus_training/proc_fab_smp.H b/src/usr/hwpf/hwp/bus_training/proc_fab_smp.H deleted file mode 100644 index fb020c633..000000000 --- a/src/usr/hwpf/hwp/bus_training/proc_fab_smp.H +++ /dev/null @@ -1,161 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/usr/hwpf/hwp/bus_training/proc_fab_smp.H $ */ -/* */ -/* IBM CONFIDENTIAL */ -/* */ -/* COPYRIGHT International Business Machines Corp. 2012,2013 */ -/* */ -/* p1 */ -/* */ -/* Object Code Only (OCO) source materials */ -/* Licensed Internal Code Source Materials */ -/* IBM HostBoot Licensed Internal Code */ -/* */ -/* The source code for this program is not published or otherwise */ -/* divested of its trade secrets, irrespective of what has been */ -/* deposited with the U.S. Copyright Office. */ -/* */ -/* Origin: 30 */ -/* */ -/* IBM_PROLOG_END_TAG */ -// $Id: proc_fab_smp.H,v 1.8 2013/09/23 22:01:31 jmcgill Exp $ -// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_fab_smp.H,v $ -//------------------------------------------------------------------------------ -// *| -// *! (C) Copyright International Business Machines Corp. 2011 -// *! All Rights Reserved -- Property of IBM -// *! *** IBM Confidential *** -// *| -// *! TITLE : proc_fab_smp.H -// *! DESCRIPTION : Common fabric structure defintions/utility functions (FAPI) -// *! -// *! OWNER NAME : Joe McGill Email: jmcgill@us.ibm.com -// *! -//------------------------------------------------------------------------------ - -#ifndef _PROC_FAB_SMP_H_ -#define _PROC_FAB_SMP_H_ - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ -#include - - -//------------------------------------------------------------------------------ -// Structure definitions -//------------------------------------------------------------------------------ - -// define set of supported fabric node ID values -enum proc_fab_smp_node_id -{ - FBC_NODE_ID_0 = 0, - FBC_NODE_ID_1 = 1, - FBC_NODE_ID_2 = 2, - FBC_NODE_ID_3 = 3, - FBC_NODE_ID_4 = 4, - FBC_NODE_ID_5 = 5, - FBC_NODE_ID_6 = 6, - FBC_NODE_ID_7 = 7 -}; - -// define set of supported fabric chip ID values -enum proc_fab_smp_chip_id -{ - FBC_CHIP_ID_0 = 0, - FBC_CHIP_ID_1 = 1, - FBC_CHIP_ID_2 = 2, - FBC_CHIP_ID_3 = 3, - FBC_CHIP_ID_4 = 4, - FBC_CHIP_ID_5 = 5, - FBC_CHIP_ID_6 = 6, - FBC_CHIP_ID_7 = 7 -}; - -// define set of supported epsilon table types -enum proc_fab_smp_eps_table_type -{ - PROC_FAB_SMP_EPSILON_TABLE_TYPE_LE = 1, - PROC_FAB_SMP_EPSILON_TABLE_TYPE_HE = 2, - PROC_FAB_SMP_EPSILON_TABLE_TYPE_1S = 3 -}; - -// define set of supported broadcast/pump modes -enum proc_fab_smp_pump_mode -{ - PROC_FAB_SMP_PUMP_MODE1 = 1, - PROC_FAB_SMP_PUMP_MODE2 = 2 -}; - - -//------------------------------------------------------------------------------ -// Constant definitions -//------------------------------------------------------------------------------ - -// largest representable fabric real address given HW implementation -const uint64_t PROC_FAB_SMP_MAX_ADDRESS = ((1ULL << 50)-1ULL); - -// number of links supported per chip -const uint8_t PROC_FAB_SMP_NUM_A_LINKS = 3; -const uint8_t PROC_FAB_SMP_NUM_X_LINKS = 4; -const uint8_t PROC_FAB_SMP_NUM_F_LINKS = 2; - -// range of fabric node/chip ID fields -const uint8_t PROC_FAB_SMP_NUM_CHIP_IDS = 8; -const uint8_t PROC_FAB_SMP_NUM_NODE_IDS = 8; - -extern "C" -{ - -//------------------------------------------------------------------------------ -// Function prototypes -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// function: utility function to read & return fabric node ID attribute -// parameters: i_target => pointer to chip/chiplet target -// o_node_id => structure encapsulating node ID value -// returns: FAPI_RC_SUCCESS if attribute read is successful & value is valid, -// RC_PROC_FAB_SMP_FABRIC_NODE_ID_ATTR_ERR if attribute value is -// invalid, -// else FAPI_ATTR_GET return code -//------------------------------------------------------------------------------ -fapi::ReturnCode proc_fab_smp_get_node_id_attr( - const fapi::Target* i_target, - proc_fab_smp_node_id& o_node_id); - -//------------------------------------------------------------------------------ -// function: utility function to read & return fabric chip ID attribute -// parameters: i_target => pointer to chip/chiplet target -// o_chip_id => structure encapsulating chip ID value -// returns: FAPI_RC_SUCCESS if attribute read is successful & value is valid, -// RC_PROC_FAB_SMP_FABRIC_CHIP_ID_ATTR_ERR if attribute value is -// invalid, -// else FAPI_ATTR_GET return code -//------------------------------------------------------------------------------ -fapi::ReturnCode proc_fab_smp_get_chip_id_attr( - const fapi::Target* i_target, - proc_fab_smp_chip_id& o_chip_id); - -//------------------------------------------------------------------------------ -// function: utility function to read & return PCIe/DSMP mux attribute values -// parameters: i_target => pointer to chip target -// o_pcie_not_f_link => vector of boolean values representing state -// of PCIe/DSMP mux settings (one value per -// foreign link, true=PCIe function, false= -// DSMP function) -// returns: FAPI_RC_SUCCESS if attribute read is successful & value is valid, -// RC_PROC_FAB_SMP_PCIE_NOT_F_LINK_ATTR_ERR if attribute value is -// invalid, -// else FAPI_ATTR_GET return code -//------------------------------------------------------------------------------ -fapi::ReturnCode proc_fab_smp_get_pcie_dsmp_mux_attrs( - const fapi::Target* i_target, - bool o_pcie_not_f_link[PROC_FAB_SMP_NUM_F_LINKS]); - - -} // extern "C" - -#endif // _PROC_FAB_SMP_H_ diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config.C b/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config.C index 458e919ae..50f7acc20 100644 --- a/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config.C +++ b/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: proc_pcie_config.C,v 1.6 2014/01/14 19:25:02 jmcgill Exp $ +// $Id: proc_pcie_config.C,v 1.7 2014/01/27 05:22:15 jmcgill Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_pcie_config.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2012 @@ -39,7 +39,7 @@ // Includes //------------------------------------------------------------------------------ #include -#include "proc_pcie_config.H" +#include extern "C" { @@ -225,6 +225,7 @@ fapi::ReturnCode proc_pcie_config( if (i_target.getType() != fapi::TARGET_TYPE_PROC_CHIP) { FAPI_ERR("proc_pcie_config: Unsupported target type"); + const fapi::Target & TARGET = i_target; FAPI_SET_HWP_ERROR(rc, RC_PROC_PCIE_CONFIG_INVALID_TARGET); break; } @@ -259,7 +260,7 @@ fapi::ReturnCode proc_pcie_config( } else { - FAPI_DBG("proc_pcie_scominit: Skipping initialization (partial good)"); + FAPI_DBG("proc_pcie_config: Skipping initialization (partial good)"); } } while(0); diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config_errors.xml b/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config_errors.xml index c3508cb4e..2ba6f3a5f 100644 --- a/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config_errors.xml +++ b/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config_errors.xml @@ -5,7 +5,7 @@ - + @@ -20,12 +20,17 @@ - + RC_PROC_PCIE_CONFIG_INVALID_TARGET Invalid target type provided to HWP. + TARGET + + CODE + HIGH + diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_fab_smp.C b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_fab_smp.C index 1d9f3cada..2023d646b 100644 --- a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_fab_smp.C +++ b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_fab_smp.C @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2012,2013 */ +/* COPYRIGHT International Business Machines Corp. 2012,2014 */ /* */ /* p1 */ /* */ @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: proc_fab_smp.C,v 1.8 2013/09/23 22:01:31 jmcgill Exp $ +// $Id: proc_fab_smp.C,v 1.9 2014/01/27 05:22:07 jmcgill Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_fab_smp.C,v $ //------------------------------------------------------------------------------ // *| @@ -39,7 +39,7 @@ //------------------------------------------------------------------------------ // Includes //------------------------------------------------------------------------------ -#include "proc_fab_smp.H" +#include extern "C" { @@ -52,7 +52,7 @@ extern "C" { //------------------------------------------------------------------------------ // function: utility function to read & return fabric node ID attribute // parameters: i_target => pointer to chip/chiplet target -// o_node_id => structure encapsulating node ID value +// o_node_id => node ID value // returns: FAPI_RC_SUCCESS if attribute read is successful & value is valid, // RC_PROC_FAB_SMP_FABRIC_NODE_ID_ATTR_ERR if attribute value is // invalid, @@ -134,6 +134,7 @@ fapi::ReturnCode proc_fab_smp_get_node_id_attr( default: FAPI_ERR("proc_fab_smp_get_node_id_attr: Invalid fabric node ID attribute value 0x%02X", node_id_attr); + const fapi::Target & TARGET = *i_target; const uint8_t& ATTR_DATA = node_id_attr; FAPI_SET_HWP_ERROR(rc, RC_PROC_FAB_SMP_FABRIC_NODE_ID_ATTR_ERR); @@ -150,7 +151,7 @@ fapi::ReturnCode proc_fab_smp_get_node_id_attr( //------------------------------------------------------------------------------ // function: utility function to read & return fabric chip ID attribute // parameters: i_target => pointer to chip/chiplet target -// o_chip_id => structure encapsulating chip ID value +// o_chip_id => chip ID value // returns: FAPI_RC_SUCCESS if attribute read is successful & value is valid, // RC_PROC_FAB_SMP_FABRIC_CHIP_ID_ATTR_ERR if attribute value is // invalid, @@ -232,6 +233,7 @@ fapi::ReturnCode proc_fab_smp_get_chip_id_attr( default: FAPI_ERR("proc_fab_smp_get_chip_id_attr: Invalid fabric chip ID attribute value 0x%02X", chip_id_attr); + const fapi::Target & TARGET = *i_target; const uint8_t& ATTR_DATA = chip_id_attr; FAPI_SET_HWP_ERROR(rc, RC_PROC_FAB_SMP_FABRIC_CHIP_ID_ATTR_ERR); @@ -302,6 +304,7 @@ fapi::ReturnCode proc_fab_smp_get_pcie_dsmp_mux_attrs( default: FAPI_ERR("proc_fab_smp_get_pcie_dsmp_mux_attrs: Invalid PCIe/DSMP mux attribute value 0x%02X", pcie_not_f_link_attr[l]); + const fapi::Target & TARGET = *i_target; const uint8_t& ATTR_DATA = pcie_not_f_link_attr[l]; FAPI_SET_HWP_ERROR(rc, RC_PROC_FAB_SMP_PCIE_NOT_F_LINK_ATTR_ERR); diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_fab_smp.H b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_fab_smp.H index cbdb97e9b..ab04fd88f 100644 --- a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_fab_smp.H +++ b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_fab_smp.H @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2012,2013 */ +/* COPYRIGHT International Business Machines Corp. 2012,2014 */ /* */ /* p1 */ /* */ @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: proc_fab_smp.H,v 1.8 2013/09/23 22:01:31 jmcgill Exp $ +// $Id: proc_fab_smp.H,v 1.9 2014/01/27 05:22:15 jmcgill Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_fab_smp.H,v $ //------------------------------------------------------------------------------ // *| @@ -116,7 +116,7 @@ extern "C" //------------------------------------------------------------------------------ // function: utility function to read & return fabric node ID attribute // parameters: i_target => pointer to chip/chiplet target -// o_node_id => structure encapsulating node ID value +// o_node_id => node ID value // returns: FAPI_RC_SUCCESS if attribute read is successful & value is valid, // RC_PROC_FAB_SMP_FABRIC_NODE_ID_ATTR_ERR if attribute value is // invalid, @@ -129,7 +129,7 @@ fapi::ReturnCode proc_fab_smp_get_node_id_attr( //------------------------------------------------------------------------------ // function: utility function to read & return fabric chip ID attribute // parameters: i_target => pointer to chip/chiplet target -// o_chip_id => structure encapsulating chip ID value +// o_chip_id => chip ID value // returns: FAPI_RC_SUCCESS if attribute read is successful & value is valid, // RC_PROC_FAB_SMP_FABRIC_CHIP_ID_ATTR_ERR if attribute value is // invalid, diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars.C b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars.C index 931b5cd01..bf5ce91bb 100644 --- a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars.C +++ b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars.C @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2012,2013 */ +/* COPYRIGHT International Business Machines Corp. 2012,2014 */ /* */ /* p1 */ /* */ @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: proc_setup_bars.C,v 1.19 2013/10/11 14:58:56 jmcgill Exp $ +// $Id: proc_setup_bars.C,v 1.23 2014/02/24 17:47:37 jmcgill Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_setup_bars.C,v $ //------------------------------------------------------------------------------ // *| @@ -39,7 +39,7 @@ //------------------------------------------------------------------------------ // Includes //------------------------------------------------------------------------------ -#include "proc_setup_bars.H" +#include //------------------------------------------------------------------------------ // Constant definitions @@ -146,931 +146,532 @@ bool proc_setup_bars_common_check_bar( //------------------------------------------------------------------------------ -// function: utility function to check for overlapping address ranges -// parameters: i_ranges => vector of pointers to address range structures that -// should be checked -// returns: true if any ranges overlap, false otherwise -//------------------------------------------------------------------------------ -bool proc_setup_bars_common_do_ranges_overlap( - const std::vector i_ranges) -{ - bool overlap = false; - FAPI_DBG("proc_setup_bars_common_do_ranges_overlap: Start"); - - // check that ranges are non-overlapping - if (i_ranges.size() > 1) - { - for (size_t r = 0; (r < i_ranges.size()-1) && !overlap; r++) - { - for (size_t x = r+1; x < i_ranges.size(); x++) - { - if (i_ranges[r]->overlaps(*(i_ranges[x]))) - { - overlap = true; - break; - } - } - } - } - - FAPI_DBG("proc_setup_bars_common_do_ranges_overlap: End"); - return overlap; -} - - -//------------------------------------------------------------------------------ -// function: retrieve attributes defining non-mirrored memory range -// parameters: i_target => pointer to chip target -// io_addr_range => address range structure encapsulating attribute -// values (size will be rounded up to nearest -// power of two) -// returns: FAPI_RC_SUCCESS if all attribute reads are successful & values -// are valid, -// RC_PROC_SETUP_BARS_NON_MIRRORED_RANGE_ATTR_ERR if chip non-mirrored -// attribute content violates expected behavior, -// RC_PROC_SETUP_BARS_NON_MIRRORED_RANGE_OVERLAP_ATTR_ERR if chip -// non-mirrored range attributes specify overlapping ranges, -// RC_PROC_SETUP_BARS_NON_MIRRORED_RANGE_ERR if chip non-mirrored -// processed range content violates expected behavior, +// function: retrieve attribute (with optional indices) using FAPI AttributeId +// parameters: i_attr => attribute ID to query +// i_attr_id => enum identifying attribute function +// i_target => pointer to chip target +// i_attr_idx1 => attribute array index1 +// i_attr_idx2 => attribute array index1 +// o_val => output value +// returns: FAPI_RC_SUCCESS if attribute read is successful & output value +// is valid, +// RC_PROC_SETUP_BARS_ATTR_QUERY_ERR if FAPI attribute ID is +// unsupported, // else FAPI_ATTR_GET return code //------------------------------------------------------------------------------ -fapi::ReturnCode proc_setup_bars_memory_get_non_mirrored_attrs( +fapi::ReturnCode proc_setup_bars_query_attr( + const fapi::AttributeId i_attr, + const proc_setup_bars_attr_id i_attr_id, const fapi::Target* i_target, - proc_setup_bars_addr_range& io_addr_range) + const uint32_t i_attr_idx1, + const uint32_t i_attr_idx2, + uint64_t& o_val) { - // return code fapi::ReturnCode rc; - // temporary attribute storage used to build procedure data structures - uint64_t mem_bases_ack[PROC_SETUP_BARS_NUM_NON_MIRRORED_RANGES]; - uint64_t mem_sizes_ack[PROC_SETUP_BARS_NUM_NON_MIRRORED_RANGES]; - proc_setup_bars_addr_range non_mirrored_ranges[PROC_SETUP_BARS_NUM_NON_MIRRORED_RANGES]; - // mark function entry - FAPI_DBG("proc_setup_bars_memory_get_non_mirrored_attrs: Start"); + FAPI_DBG("proc_setup_bars_query_attr: Start"); - do + // ATTR_PROC_MEM_BASES_ACK + if (i_attr == fapi::ATTR_PROC_MEM_BASES_ACK) { - // retrieve non-mirrored memory base address/size ack attributes - rc = FAPI_ATTR_GET(ATTR_PROC_MEM_BASES_ACK, - i_target, - mem_bases_ack); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_memory_get_non_mirrored_attrs: Error querying ATTR_PROC_MEM_BASES_ACK"); - break; - } - - rc = FAPI_ATTR_GET(ATTR_PROC_MEM_SIZES_ACK, - i_target, - mem_sizes_ack); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_memory_get_non_mirrored_attrs: Error querying ATTR_PROC_MEM_SIZES_ACK"); - break; - } - - // process attributes into range structures - for (uint8_t r = 0; r < PROC_SETUP_BARS_NUM_NON_MIRRORED_RANGES; r++) - { - // build range content - non_mirrored_ranges[r].base_addr = mem_bases_ack[r]; - non_mirrored_ranges[r].size = mem_sizes_ack[r]; - // consider range enabled if size is non-zero - non_mirrored_ranges[r].enabled = (non_mirrored_ranges[r].size != 0x0); - // check attribute content - FAPI_DBG("proc_setup_bars_memory_get_non_mirrored_attrs: Range %d", r); - if (proc_setup_bars_common_check_bar( - non_mirrored_range_def, - non_mirrored_ranges[r]) != false) - { - FAPI_ERR("proc_setup_bars_memory_get_non_mirrored_attrs: Error from proc_setup_bars_common_check_bar"); - const uint64_t& BASE_ADDR = non_mirrored_ranges[r].base_addr; - const uint64_t& SIZE = non_mirrored_ranges[r].size; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_NON_MIRRORED_RANGE_ATTR_ERR); - break; - } - } - if (!rc.ok()) - { - break; - } - - // check that ranges are non-overlapping - std::vector check_ranges; - for (uint8_t r = 0; r < PROC_SETUP_BARS_NUM_NON_MIRRORED_RANGES; r++) - { - check_ranges.push_back(&non_mirrored_ranges[r]); - } - if (proc_setup_bars_common_do_ranges_overlap(check_ranges)) - { - FAPI_ERR("proc_setup_bars_memory_get_non_mirrored_attrs: Non-mirrored range attributes specify overlapping address regions"); - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_NON_MIRRORED_RANGE_OVERLAP_ATTR_ERR); - break; - } - - // ranges are non-overlapping, merge to single range - for (uint8_t r = 0; r < PROC_SETUP_BARS_NUM_NON_MIRRORED_RANGES; r++) - { - // merge to build single range - io_addr_range.merge(non_mirrored_ranges[r]); - } - - // ensure range is power of 2 aligned - if (io_addr_range.enabled && !io_addr_range.is_power_of_2()) - { - io_addr_range.round_next_power_of_2(); - } - - // check final range content - if (proc_setup_bars_common_check_bar( - non_mirrored_range_def, - io_addr_range) != false) - { - FAPI_ERR("proc_setup_bars_memory_get_non_mirrored_attrs: Error from proc_setup_bars_common_check_bar"); - const uint64_t& BASE_ADDR = io_addr_range.base_addr; - const uint64_t& SIZE = io_addr_range.size; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_NON_MIRRORED_RANGE_ERR); - break; - } - } while(0); - - // mark function exit - FAPI_DBG("proc_setup_bars_memory_get_non_mirrored_attrs: End"); - return rc; -} - - -//------------------------------------------------------------------------------ -// function: retrieve attributes defining mirrored memory range -// parameters: i_target => pointer to chip target -// io_addr_range => address range structure encapsulating attribute -// values (ranges will be merged and size rounded -// up to the nearest power of two) -// returns: FAPI_RC_SUCCESS if all attribute reads are successful & values -// are valid, -// RC_PROC_SETUP_BARS_MIRRORED_RANGE_ATTR_ERR if individual chip -// mirrored range attribute content violates expected behavior, -// RC_PROC_SETUP_BARS_MIRRORED_RANGE_OVERLAP_ATTR_ERR if chip mirrored -// range attributes specify overlapping ranges, -// RC_PROC_SETUP_BARS_MIRRORED_RANGE_ERR if chip mirrored processed -// range content violates expected behavior, -// else FAPI_ATTR_GET return code -//------------------------------------------------------------------------------ -fapi::ReturnCode proc_setup_bars_memory_get_mirrored_attrs( - const fapi::Target* i_target, - proc_setup_bars_addr_range& io_addr_range) -{ - // return code - fapi::ReturnCode rc; - // temporary attribute storage used to build procedure data structures - uint64_t mirror_bases_ack[PROC_SETUP_BARS_NUM_MIRRORED_RANGES]; - uint64_t mirror_sizes_ack[PROC_SETUP_BARS_NUM_MIRRORED_RANGES]; - proc_setup_bars_addr_range mirrored_ranges[PROC_SETUP_BARS_NUM_MIRRORED_RANGES]; - - // mark function entry - FAPI_DBG("proc_setup_bars_memory_get_mirrored_attrs: Start"); - - do + fapi::ATTR_PROC_MEM_BASES_ACK_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_MEM_BASES_ACK, i_target, attr_data); + o_val = attr_data[i_attr_idx1]; + } + // ATTR_PROC_MEM_SIZES_ACK + else if (i_attr == fapi::ATTR_PROC_MEM_SIZES_ACK) { - // retrieve mirrored memory base address/size ack attributes - rc = FAPI_ATTR_GET(ATTR_PROC_MIRROR_BASES_ACK, - i_target, - mirror_bases_ack); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_memory_get_mirrored_attrs: Error querying ATTR_PROC_MIRROR_BASES_ACK"); - break; - } - - rc = FAPI_ATTR_GET(ATTR_PROC_MIRROR_SIZES_ACK, - i_target, - mirror_sizes_ack); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_memory_get_mirrored_attrs: Error querying ATTR_PROC_MIRROR_SIZES_ACK"); - break; - } - - // process attributes into range structures - for (uint8_t r = 0; r < PROC_SETUP_BARS_NUM_MIRRORED_RANGES; r++) - { - // build range content - mirrored_ranges[r].base_addr = mirror_bases_ack[r]; - mirrored_ranges[r].size = mirror_sizes_ack[r]; - // consider range enabled if size is non-zero - mirrored_ranges[r].enabled = (mirrored_ranges[r].size != 0x0); - // check attribute content - FAPI_DBG("proc_setup_bars_memory_get_mirrored_attrs: Range %d", r); - if (proc_setup_bars_common_check_bar( - mirrored_range_def, - mirrored_ranges[r]) != false) - { - FAPI_ERR("proc_setup_bars_memory_get_mirrored_attrs: Error from proc_setup_bars_common_check_bar"); - const uint64_t& BASE_ADDR = mirrored_ranges[r].base_addr; - const uint64_t& SIZE = mirrored_ranges[r].size; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_MIRRORED_RANGE_ATTR_ERR); - break; - } - } - if (!rc.ok()) - { - break; - } - - // check that ranges are non-overlapping - std::vector check_ranges; - for (uint8_t r = 0; r < PROC_SETUP_BARS_NUM_MIRRORED_RANGES; r++) - { - check_ranges.push_back(&mirrored_ranges[r]); - } - if (proc_setup_bars_common_do_ranges_overlap(check_ranges)) - { - FAPI_ERR("proc_setup_bars_memory_get_mirrored_attrs: Mirrored range attributes specify overlapping address regions"); - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_MIRRORED_RANGE_OVERLAP_ATTR_ERR); - break; - } - - // ranges are non-overlapping, merge to single range - for (uint8_t r = 0; r < PROC_SETUP_BARS_NUM_MIRRORED_RANGES; r++) - { - // merge to build single range - io_addr_range.merge(mirrored_ranges[r]); - } - - // ensure range is power of 2 aligned - if (io_addr_range.enabled && !io_addr_range.is_power_of_2()) - { - io_addr_range.round_next_power_of_2(); - } - - // check final range content - if (proc_setup_bars_common_check_bar( - mirrored_range_def, - io_addr_range) != false) - { - FAPI_ERR("proc_setup_bars_memory_get_mirrored_attrs: Error from proc_setup_bars_common_check_bar"); - const uint64_t& BASE_ADDR = io_addr_range.base_addr; - const uint64_t& SIZE = io_addr_range.size; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_MIRRORED_RANGE_ERR); - break; - } - } while(0); - - // mark function exit - FAPI_DBG("proc_setup_bars_memory_get_mirrored_attrs: End"); - return rc; -} - - -//------------------------------------------------------------------------------ -// function: retrieve attributes defining foreign near memory range -// parameters: i_target => pointer to chip target -// io_addr_ranges => array of address range structures -// encapsulating attribute values -// (one per foreign link) -// returns: FAPI_RC_SUCCESS if all attribute reads are successful & values -// are valid, -// RC_PROC_SETUP_BARS_FOREIGN_NEAR_RANGE_ATTR_ERR if individual chip -// foriegn near range attribute content violates expected behavior, -// else FAPI_ATTR_GET return code -//------------------------------------------------------------------------------ -fapi::ReturnCode proc_setup_bars_memory_get_foreign_near_attrs( - const fapi::Target* i_target, - proc_setup_bars_addr_range io_addr_ranges[PROC_FAB_SMP_NUM_F_LINKS]) -{ - // return code - fapi::ReturnCode rc; - // temporary attribute storage used to build procedure data structures - uint64_t foreign_near_base_attr[PROC_FAB_SMP_NUM_F_LINKS]; - uint64_t foreign_near_size_attr[PROC_FAB_SMP_NUM_F_LINKS]; - - // mark function entry - FAPI_DBG("proc_setup_bars_memory_get_foreign_near_attrs: Start"); - - do + fapi::ATTR_PROC_MEM_SIZES_ACK_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_MEM_SIZES_ACK, i_target, attr_data); + o_val = attr_data[i_attr_idx1]; + } + // ATTR_PROC_MIRROR_BASES_ACK + else if (i_attr == fapi::ATTR_PROC_MIRROR_BASES_ACK) { - // retrieve foreign near base address/size attributes - rc = FAPI_ATTR_GET(ATTR_PROC_FOREIGN_NEAR_BASE, - i_target, - foreign_near_base_attr); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_memory_get_foreign_near_attrs: Error querying ATTR_PROC_FOREIGN_NEAR_BASE"); - break; - } - rc = FAPI_ATTR_GET(ATTR_PROC_FOREIGN_NEAR_SIZE, - i_target, - foreign_near_size_attr); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_memory_get_foreign_near_attrs: Error querying ATTR_PROC_FOREIGN_NEAR_SIZE"); - break; - } - - // process attributes into range structures - for (uint8_t r = 0; r < PROC_FAB_SMP_NUM_F_LINKS; r++) - { - // build range content - io_addr_ranges[r].base_addr = foreign_near_base_attr[r]; - io_addr_ranges[r].size = foreign_near_size_attr[r]; - io_addr_ranges[r].enabled = (foreign_near_size_attr[r] != 0x0); - - // check attribute content - FAPI_DBG("proc_setup_bars_memory_get_foreign_near_attrs: Link %d", r); - if (proc_setup_bars_common_check_bar( - common_f_scope_bar_def, - io_addr_ranges[r]) != false) - { - FAPI_ERR("proc_setup_bars_memory_get_foreign_near_attrs: Error from proc_setup_bars_common_check_bar"); - const uint64_t& BASE_ADDR = io_addr_ranges[r].base_addr; - const uint64_t& SIZE = io_addr_ranges[r].size; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_FOREIGN_NEAR_RANGE_ATTR_ERR); - break; - } - } - } while(0); - // mark function entry - FAPI_DBG("proc_setup_bars_memory_get_foreign_near_attrs: End"); - return rc; -} - - -//------------------------------------------------------------------------------ -// function: retrieve attributes defining foreign far memory range -// parameters: i_target => pointer to chip target -// io_addr_ranges => array of address range structures -// encapsulating attribute values -// (one per foreign link) -// returns: FAPI_RC_SUCCESS if all attribute reads are successful & values -// are valid, -// RC_PROC_SETUP_BARS_FOREIGN_FAR_RANGE_ATTR_ERR if individual chip -// foreign far range attribute content violates expected behavior, -// else FAPI_ATTR_GET return code -//------------------------------------------------------------------------------ -fapi::ReturnCode proc_setup_bars_memory_get_foreign_far_attrs( - const fapi::Target* i_target, - proc_setup_bars_addr_range io_addr_ranges[PROC_FAB_SMP_NUM_F_LINKS]) -{ - // return code - fapi::ReturnCode rc; - // temporary attribute storage used to build procedure data structures - uint64_t foreign_far_base_attr[PROC_FAB_SMP_NUM_F_LINKS]; - uint64_t foreign_far_size_attr[PROC_FAB_SMP_NUM_F_LINKS]; - - // mark function entry - FAPI_DBG("proc_setup_bars_memory_get_foreign_far_attrs: Start"); - - do + fapi::ATTR_PROC_MIRROR_BASES_ACK_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_MIRROR_BASES_ACK, i_target, attr_data); + o_val = attr_data[i_attr_idx1]; + } + // ATTR_PROC_MIRROR_SIZES_ACK + else if (i_attr == fapi::ATTR_PROC_MIRROR_SIZES_ACK) { - // retrieve foreign far base address/size attributes - rc = FAPI_ATTR_GET(ATTR_PROC_FOREIGN_FAR_BASE, - i_target, - foreign_far_base_attr); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_memory_get_foreign_far_attrs: Error querying ATTR_PROC_FOREIGN_FAR_BASE"); - break; - } - rc = FAPI_ATTR_GET(ATTR_PROC_FOREIGN_FAR_SIZE, - i_target, - foreign_far_size_attr); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_memory_get_foreign_far_attrs: Error querying ATTR_PROC_FOREIGN_FAR_SIZE"); - break; - } - - // process attributes into range structures - for (uint8_t r = 0; r < PROC_FAB_SMP_NUM_F_LINKS; r++) - { - // build range content - io_addr_ranges[r].base_addr = foreign_far_base_attr[r]; - io_addr_ranges[r].size = foreign_far_size_attr[r]; - io_addr_ranges[r].enabled = (foreign_far_size_attr[r] != 0x0); - - // check attribute content - FAPI_DBG("proc_setup_bars_memory_get_foreign_far_attrs: Link %d", r); - if (proc_setup_bars_common_check_bar( - common_f_scope_bar_def, - io_addr_ranges[r]) != false) - { - FAPI_ERR("proc_setup_bars_memory_get_foreign_far_attrs: Error from proc_setup_bars_common_check_bar"); - const uint64_t& BASE_ADDR = io_addr_ranges[r].base_addr; - const uint64_t& SIZE = io_addr_ranges[r].size; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_FOREIGN_FAR_RANGE_ATTR_ERR); - break; - } - } - } while(0); - - // mark function exit - FAPI_DBG("proc_setup_bars_memory_get_foreign_far_attrs: End"); - return rc; -} - - -//------------------------------------------------------------------------------ -// function: retrieve attributes defining PSI BAR programming -// parameters: i_target => pointer to chip target -// io_addr_range => address range structure encapsulating -// attribute values -// returns: FAPI_RC_SUCCESS if all attribute reads are successful & values -// are valid, -// RC_PROC_SETUP_BARS_PSI_BAR_ATTR_ERR if chip PSI range -// attribute content violates expected behavior, -// else FAPI_ATTR_GET return code -//------------------------------------------------------------------------------ -fapi::ReturnCode proc_setup_bars_psi_get_bar_attrs( - const fapi::Target* i_target, - proc_setup_bars_addr_range& io_addr_range) -{ - // return code - fapi::ReturnCode rc; - uint8_t bar_enabled; - - FAPI_DBG("proc_setup_bars_psi_get_bar_attrs: Start"); - do + fapi::ATTR_PROC_MIRROR_SIZES_ACK_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_MIRROR_SIZES_ACK, i_target, attr_data); + o_val = attr_data[i_attr_idx1]; + } + // ATTR_PROC_FOREIGN_NEAR_BASE + else if (i_attr == fapi::ATTR_PROC_FOREIGN_NEAR_BASE) { - // BAR base address - rc = FAPI_ATTR_GET(ATTR_PROC_PSI_BRIDGE_BAR_BASE_ADDR, - i_target, - io_addr_range.base_addr); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_psi_get_bar_attrs: Error querying ATTR_PROC_PSI_BRIDGE_BAR_BASE_ADDR"); - break; - } - - // BAR enable - rc = FAPI_ATTR_GET(ATTR_PROC_PSI_BRIDGE_BAR_ENABLE, - i_target, - bar_enabled); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_psi_get_bar_attrs: Error querying ATTR_PROC_PSI_BRIDGE_BAR_ENABLE"); - break; - } - io_addr_range.enabled = (bar_enabled == 0x1); - - // BAR size (implied to be 1MB) - io_addr_range.size = PROC_SETUP_BARS_SIZE_1_MB; - - // check BAR attribute content - if (proc_setup_bars_common_check_bar( - psi_bridge_bar_def, - io_addr_range) != false) - { - FAPI_ERR("proc_setup_bars_psi_get_bar_attrs: Error from proc_setup_bars_common_check_bar"); - const uint64_t& BASE_ADDR = io_addr_range.base_addr; - const uint64_t& SIZE = io_addr_range.size; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_PSI_BAR_ATTR_ERR); - break; - } - } while(0); - - FAPI_DBG("proc_setup_bars_psi_get_bar_attrs: End"); - return rc; -} - - -//------------------------------------------------------------------------------ -// function: retrieve attributes defining FSP BAR programming -// parameters: i_target => pointer to chip target -// io_addr_range => address range structure encapsulating -// attribute values -// returns: FAPI_RC_SUCCESS if all attribute reads are successful & values -// are valid, -// RC_PROC_SETUP_BARS_FSP_BAR_ATTR_ERR if chip FSP range -// attribute content violates expected behavior, -// else FAPI_ATTR_GET return code -//------------------------------------------------------------------------------ -fapi::ReturnCode proc_setup_bars_fsp_get_bar_attrs( - const fapi::Target* i_target, - proc_setup_bars_addr_range& io_addr_range) -{ - // return code - fapi::ReturnCode rc; - uint8_t bar_enabled; - - FAPI_DBG("proc_setup_bars_fsp_get_bar_attrs: Start"); - do + fapi::ATTR_PROC_FOREIGN_NEAR_BASE_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_FOREIGN_NEAR_BASE, i_target, attr_data); + o_val = attr_data[i_attr_idx1]; + } + // ATTR_PROC_FOREIGN_NEAR_SIZE + else if (i_attr == fapi::ATTR_PROC_FOREIGN_NEAR_SIZE) { - // BAR base address - rc = FAPI_ATTR_GET(ATTR_PROC_FSP_BAR_BASE_ADDR, - i_target, - io_addr_range.base_addr); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_fsp_get_bar_attrs: Error querying ATTR_PROC_FSP_BAR_BASE_ADDR"); - break; - } - - // BAR enable - rc = FAPI_ATTR_GET(ATTR_PROC_FSP_BAR_ENABLE, - i_target, - bar_enabled); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_fsp_get_bar_attrs: Error querying ATTR_PROC_FSP_BAR_ENABLE"); - break; - } - io_addr_range.enabled = (bar_enabled == 0x1); - - // BAR size - rc = FAPI_ATTR_GET(ATTR_PROC_FSP_BAR_SIZE, - i_target, - io_addr_range.size); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_fsp_get_bar_attrs: Error querying ATTR_PROC_FSP_BAR_SIZE"); - break; - } - - // check BAR attribute content - if (proc_setup_bars_common_check_bar( - fsp_bar_def, - io_addr_range) != false) - { - FAPI_ERR("proc_setup_bars_fsp_get_bar_attrs: Error from proc_setup_bars_common_check_bar"); - const uint64_t& BASE_ADDR = io_addr_range.base_addr; - const uint64_t& SIZE = io_addr_range.size; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_FSP_BAR_ATTR_ERR); - break; - } - } while(0); - - FAPI_DBG("proc_setup_bars_fsp_get_bar_attrs: End"); - return rc; -} - - -//------------------------------------------------------------------------------ -// function: retrieve attributes defining FSP MMIO mask programming -// parameters: i_target => pointer to chip target -// io_addr_range => address range structure encapsulating -// attribute values -// returns: FAPI_RC_SUCCESS if all attribute reads are successful & values -// are valid, -// RC_PROC_SETUP_BARS_FSP_MMIO_MASK_ATTR_ERR if chip MMIO mask -// attribute content violates expected behavior, -// else FAPI_ATTR_GET return code -//------------------------------------------------------------------------------ -fapi::ReturnCode proc_setup_bars_fsp_get_mmio_mask_attrs( - const fapi::Target* i_target, - proc_setup_bars_addr_range& io_addr_range) -{ - // return code - fapi::ReturnCode rc; - - FAPI_DBG("proc_setup_bars_fsp_get_mmio_mask_attrs: Start"); - do + fapi::ATTR_PROC_FOREIGN_NEAR_SIZE_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_FOREIGN_NEAR_SIZE, i_target, attr_data); + o_val = attr_data[i_attr_idx1]; + } + // ATTR_PROC_FOREIGN_FAR_BASE + else if (i_attr == fapi::ATTR_PROC_FOREIGN_FAR_BASE) { - // BAR base address (unused) - io_addr_range.base_addr = 0x0ULL; - - // BAR enable (unused) - io_addr_range.enabled = true; - - // BAR size - rc = FAPI_ATTR_GET(ATTR_PROC_FSP_MMIO_MASK_SIZE, - i_target, - io_addr_range.size); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_fsp_get_mmio_mask_attrs: Error querying ATTR_PROC_FSP_MMIO_MASK_SIZE"); - break; - } - - // check BAR attribute content - if (proc_setup_bars_common_check_bar( - fsp_mmio_mask_def, - io_addr_range) != false) - { - FAPI_ERR("proc_setup_bars_fsp_get_mmio_mask_attrs: Error from proc_setup_bars_common_check_bar"); - const uint64_t& SIZE = io_addr_range.size; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_FSP_MMIO_MASK_ATTR_ERR); - break; - } - } while(0); - - FAPI_DBG("proc_setup_bars_fsp_get_mmio_mask_attrs: End"); - return rc; -} - - -//------------------------------------------------------------------------------ -// function: retrieve attributes defining INTP BAR programming -// parameters: i_target => pointer to chip target -// io_addr_range => address range structure encapsulating -// attribute values -// returns: FAPI_RC_SUCCESS if all attribute reads are successful & values -// are valid, -// RC_PROC_SETUP_BARS_INTP_BAR_ATTR_ERR if chip INTP range -// attribute content violates expected behavior, -// else FAPI_ATTR_GET return code -//------------------------------------------------------------------------------ -fapi::ReturnCode proc_setup_bars_intp_get_bar_attrs( - const fapi::Target* i_target, - proc_setup_bars_addr_range& io_addr_range) -{ - // return code - fapi::ReturnCode rc; - uint8_t bar_enabled; - - FAPI_DBG("proc_setup_bars_intp_get_bar_attrs: Start"); - do + fapi::ATTR_PROC_FOREIGN_FAR_BASE_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_FOREIGN_FAR_BASE, i_target, attr_data); + o_val = attr_data[i_attr_idx1]; + } + // ATTR_PROC_FOREIGN_FAR_SIZE + else if (i_attr == fapi::ATTR_PROC_FOREIGN_FAR_SIZE) { - // BAR base address - rc = FAPI_ATTR_GET(ATTR_PROC_INTP_BAR_BASE_ADDR, - i_target, - io_addr_range.base_addr); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_intp_get_bar_attrs: Error querying ATTR_PROC_INTP_BAR_BASE_ADDR"); - break; - } - - // BAR enable - rc = FAPI_ATTR_GET(ATTR_PROC_INTP_BAR_ENABLE, - i_target, - bar_enabled); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_intp_get_bar_attrs: Error querying ATTR_PROC_INTP_BAR_ENABLE"); - break; - } - io_addr_range.enabled = (bar_enabled == 0x1); - - // BAR size (implied to be 1MB) - io_addr_range.size = PROC_SETUP_BARS_SIZE_1_MB; - - // check BAR attribute content - if (proc_setup_bars_common_check_bar( - intp_bar_def, - io_addr_range) != false) - { - FAPI_ERR("proc_setup_bars_intp_get_bar_attrs: Error from proc_setup_bars_common_check_bar"); - const uint64_t& BASE_ADDR = io_addr_range.base_addr; - const uint64_t& SIZE = io_addr_range.size; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_INTP_BAR_ATTR_ERR); - break; - } - } while(0); - - FAPI_DBG("proc_setup_bars_intp_get_bar_attrs: End"); - return rc; -} - - -//------------------------------------------------------------------------------ -// function: retrieve attributes defining NX MMIO BAR programming -// parameters: i_target => pointer to chip target -// io_addr_range => address range structure encapsulating -// attribute values -// returns: FAPI_RC_SUCCESS if all attribute reads are successful & values -// are valid, -// RC_PROC_SETUP_BARS_NX_MMIO_BAR_ATTR_ERR if chip NX MMIO range -// attribute content violates expected behavior, -// else FAPI_ATTR_GET return code -//------------------------------------------------------------------------------ -fapi::ReturnCode proc_setup_bars_nx_get_mmio_bar_attrs( - const fapi::Target* i_target, - proc_setup_bars_addr_range& io_addr_range) -{ - // return code - fapi::ReturnCode rc; - uint8_t bar_enabled; - - FAPI_DBG("proc_setup_bars_nx_get_mmio_bar_attrs: Start"); - do + fapi::ATTR_PROC_FOREIGN_FAR_SIZE_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_FOREIGN_FAR_SIZE, i_target, attr_data); + o_val = attr_data[i_attr_idx1]; + } + // ATTR_PROC_PSI_BRIDGE_BAR_BASE_ADDR + else if (i_attr == fapi::ATTR_PROC_PSI_BRIDGE_BAR_BASE_ADDR) { - // BAR base address - rc = FAPI_ATTR_GET(ATTR_PROC_NX_MMIO_BAR_BASE_ADDR, - i_target, - io_addr_range.base_addr); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_nx_get_mmio_bar_attrs: Error querying ATTR_PROC_NX_MMIO_BAR_BASE_ADDR"); - break; - } - - // BAR enable - rc = FAPI_ATTR_GET(ATTR_PROC_NX_MMIO_BAR_ENABLE, - i_target, - bar_enabled); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_nx_get_mmio_bar_attrs: Error querying ATTR_PROC_NX_MMIO_BAR_ENABLE"); - break; - } - io_addr_range.enabled = (bar_enabled == 0x1); - - // BAR size - rc = FAPI_ATTR_GET(ATTR_PROC_NX_MMIO_BAR_SIZE, - i_target, - io_addr_range.size); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_nx_get_mmio_bar_attrs: Error querying ATTR_PROC_NX_MMIO_BAR_SIZE"); - break; - } - - // check BAR attribute content - if (proc_setup_bars_common_check_bar( - nx_mmio_bar_def, - io_addr_range) != false) - { - FAPI_ERR("proc_setup_bars_nx_get_mmio_bar_attrs: Error from proc_setup_bars_common_check_bar"); - const uint64_t& BASE_ADDR = io_addr_range.base_addr; - const uint64_t& SIZE = io_addr_range.size; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_NX_MMIO_BAR_ATTR_ERR); - break; - } - } while(0); + fapi::ATTR_PROC_PSI_BRIDGE_BAR_BASE_ADDR_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_PSI_BRIDGE_BAR_BASE_ADDR, i_target, attr_data); + o_val = attr_data; + } + // ATTR_PROC_PSI_BRIDGE_BAR_ENABLE + else if (i_attr == fapi::ATTR_PROC_PSI_BRIDGE_BAR_ENABLE) + { + fapi::ATTR_PROC_PSI_BRIDGE_BAR_ENABLE_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_PSI_BRIDGE_BAR_ENABLE, i_target, attr_data); + o_val = attr_data; + } + // ATTR_PROC_FSP_BAR_BASE_ADDR + else if (i_attr == fapi::ATTR_PROC_FSP_BAR_BASE_ADDR) + { + fapi::ATTR_PROC_FSP_BAR_BASE_ADDR_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_FSP_BAR_BASE_ADDR, i_target, attr_data); + o_val = attr_data; + } + // ATTR_PROC_FSP_BAR_ENABLE + else if (i_attr == fapi::ATTR_PROC_FSP_BAR_ENABLE) + { + fapi::ATTR_PROC_FSP_BAR_ENABLE_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_FSP_BAR_ENABLE, i_target, attr_data); + o_val = attr_data; + } + // ATTR_PROC_FSP_BAR_SIZE + else if (i_attr == fapi::ATTR_PROC_FSP_BAR_SIZE) + { + fapi::ATTR_PROC_FSP_BAR_SIZE_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_FSP_BAR_SIZE, i_target, attr_data); + o_val = attr_data; + } + // ATTR_PROC_FSP_MMIO_MASK_SIZE + else if (i_attr == fapi::ATTR_PROC_FSP_MMIO_MASK_SIZE) + { + fapi::ATTR_PROC_FSP_MMIO_MASK_SIZE_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_FSP_MMIO_MASK_SIZE, i_target, attr_data); + o_val = attr_data; + } + // ATTR_PROC_INTP_BAR_BASE_ADDR + else if (i_attr == fapi::ATTR_PROC_INTP_BAR_BASE_ADDR) + { + fapi::ATTR_PROC_INTP_BAR_BASE_ADDR_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_INTP_BAR_BASE_ADDR, i_target, attr_data); + o_val = attr_data; + } + // ATTR_PROC_INTP_BAR_ENABLE + else if (i_attr == fapi::ATTR_PROC_INTP_BAR_ENABLE) + { + fapi::ATTR_PROC_INTP_BAR_ENABLE_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_INTP_BAR_ENABLE, i_target, attr_data); + o_val = attr_data; + } + // ATTR_PROC_NX_MMIO_BAR_BASE_ADDR + else if (i_attr == fapi::ATTR_PROC_NX_MMIO_BAR_BASE_ADDR) + { + fapi::ATTR_PROC_NX_MMIO_BAR_BASE_ADDR_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_NX_MMIO_BAR_BASE_ADDR, i_target, attr_data); + o_val = attr_data; + } + // ATTR_PROC_NX_MMIO_BAR_ENABLE + else if (i_attr == fapi::ATTR_PROC_NX_MMIO_BAR_ENABLE) + { + fapi::ATTR_PROC_NX_MMIO_BAR_ENABLE_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_NX_MMIO_BAR_ENABLE, i_target, attr_data); + o_val = attr_data; + } + // ATTR_PROC_NX_MMIO_BAR_SIZE + else if (i_attr == fapi::ATTR_PROC_NX_MMIO_BAR_SIZE) + { + fapi::ATTR_PROC_NX_MMIO_BAR_SIZE_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_NX_MMIO_BAR_SIZE, i_target, attr_data); + o_val = attr_data; + } + // ATTR_PROC_AS_MMIO_BAR_BASE_ADDR + else if (i_attr == fapi::ATTR_PROC_AS_MMIO_BAR_BASE_ADDR) + { + fapi::ATTR_PROC_AS_MMIO_BAR_BASE_ADDR_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_AS_MMIO_BAR_BASE_ADDR, i_target, attr_data); + o_val = attr_data; + } + // ATTR_PROC_AS_MMIO_BAR_ENABLE + else if (i_attr == fapi::ATTR_PROC_AS_MMIO_BAR_ENABLE) + { + fapi::ATTR_PROC_AS_MMIO_BAR_ENABLE_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_AS_MMIO_BAR_ENABLE, i_target, attr_data); + o_val = attr_data; + } + // ATTR_PROC_AS_MMIO_BAR_SIZE + else if (i_attr == fapi::ATTR_PROC_AS_MMIO_BAR_SIZE) + { + fapi::ATTR_PROC_AS_MMIO_BAR_SIZE_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_AS_MMIO_BAR_SIZE, i_target, attr_data); + o_val = attr_data; + } + // ATTR_PROC_PCIE_BAR_BASE_ADDR + else if (i_attr == fapi::ATTR_PROC_PCIE_BAR_BASE_ADDR) + { + fapi::ATTR_PROC_PCIE_BAR_BASE_ADDR_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_BAR_BASE_ADDR, i_target, attr_data); + o_val = attr_data[i_attr_idx1][i_attr_idx2]; + } + // ATTR_PROC_PCIE_BAR_ENABLE + else if (i_attr == fapi::ATTR_PROC_PCIE_BAR_ENABLE) + { + fapi::ATTR_PROC_PCIE_BAR_ENABLE_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_BAR_ENABLE, i_target, attr_data); + o_val = attr_data[i_attr_idx1][i_attr_idx2]; + } + // ATTR_PROC_PCIE_BAR_SIZE + else if (i_attr == fapi::ATTR_PROC_PCIE_BAR_SIZE) + { + fapi::ATTR_PROC_PCIE_BAR_SIZE_Type attr_data; + rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_BAR_SIZE, i_target, attr_data); + o_val = attr_data[i_attr_idx1][i_attr_idx2]; + } + else + { + FAPI_ERR("proc_setup_bars_query_attr: Unsupported FAPI Attribute ID"); + const fapi::Target & TARGET = *i_target; + const fapi::AttributeId & FAPI_ATTR_ID = i_attr; + const proc_setup_bars_attr_id & ATTR_ID = i_attr_id; + const uint32_t & ATTR_IDX1 = i_attr_idx1; + const uint32_t & ATTR_IDX2 = i_attr_idx2; + FAPI_SET_HWP_ERROR(rc, + RC_PROC_SETUP_BARS_ATTR_QUERY_ERR); + } - FAPI_DBG("proc_setup_bars_nx_get_mmio_bar_attrs: End"); + FAPI_DBG("proc_setup_bars_query_attr: End"); return rc; } //------------------------------------------------------------------------------ -// function: retrieve attributes defining AS MMIO BAR programming -// parameters: i_target => pointer to chip target -// io_addr_range => address range structure encapsulating -// attribute values +// function: retrieve attributes defining unit BAR/range programming +// parameters: i_target => pointer to chip target +// i_attr_id => enum identifying BAR/range function +// i_base_addr_attr => pointer to attribute ID associated with +// BAR/range base address +// i_enable_attr => pointer to attribute ID associated with +// BAR/range enable +// i_size_attr => pointer to attribute ID associated with +// BAR/range size +// i_attr_idx1 => attribute array index1 +// i_attr_idx2 => attribute array index2 +// i_bar_def => structure encapsulating BAR/range +// properties +// io_addr_range => address range structure encapsulating +// attribute values // returns: FAPI_RC_SUCCESS if all attribute reads are successful & values // are valid, -// RC_PROC_SETUP_BARS_AS_MMIO_BAR_ATTR_ERR if chip AS MMIO range +// RC_PROC_SETUP_BARS_ATTR_LOOKUP_ERR if no rule is +// provided to set BAR/range address/enable/size, +// RC_PROC_SETUP_BARS_ATTR_CONTENT_ERR if BAR/range // attribute content violates expected behavior, // else FAPI_ATTR_GET return code //------------------------------------------------------------------------------ -fapi::ReturnCode proc_setup_bars_as_get_mmio_bar_attrs( +fapi::ReturnCode proc_setup_bars_get_range_attrs( const fapi::Target* i_target, + const proc_setup_bars_attr_id i_attr_id, + const fapi::AttributeId* i_base_addr_attr, + const fapi::AttributeId* i_enable_attr, + const fapi::AttributeId* i_size_attr, + const uint32_t i_attr_idx1, + const uint32_t i_attr_idx2, + const proc_setup_bars_bar_def& i_bar_def, proc_setup_bars_addr_range& io_addr_range) { // return code fapi::ReturnCode rc; - uint8_t bar_enabled; + uint64_t bar_enabled; - FAPI_DBG("proc_setup_bars_as_get_mmio_bar_attrs: Start"); + FAPI_DBG("proc_setup_bars_get_range_attrs: Start"); do { // BAR base address - rc = FAPI_ATTR_GET(ATTR_PROC_AS_MMIO_BAR_BASE_ADDR, - i_target, - io_addr_range.base_addr); - if (!rc.ok()) + if ((i_attr_id == PROC_SETUP_BARS_ATTR_ID_FSP_MMIO) && !i_attr_idx1 && !i_attr_idx2) + { + io_addr_range.base_addr = 0x0; + } + else if (i_base_addr_attr) + { + rc = proc_setup_bars_query_attr( + *i_base_addr_attr, + i_attr_id, + i_target, + i_attr_idx1, i_attr_idx2, + io_addr_range.base_addr); + if (!rc.ok()) + { + FAPI_ERR("proc_setup_bars_get_range_attrs: Error querying BAR base address attribute (Unit/Range ID = 0x%X, FAPI Attribute ID = %08X)", + i_attr_id, *i_base_addr_attr); + break; + } + } + else { - FAPI_ERR("proc_setup_bars_as_get_mmio_bar_attrs: Error querying ATTR_PROC_AS_MMIO_BAR_BASE_ADDR"); + FAPI_ERR("proc_setup_bars_get_range_attrs: No rule to set range base address"); + const fapi::Target & TARGET = *i_target; + const proc_setup_bars_attr_id & ATTR_ID = i_attr_id; + const uint32_t & ATTR_IDX1 = i_attr_idx1; + const uint32_t & ATTR_IDX2 = i_attr_idx2; + const proc_setup_bars_attr_lookup_err_type & ERR_TYPE = PROC_SETUP_BARS_BASE_ADDR_ATTR_LOOKUP_ERR; + FAPI_SET_HWP_ERROR(rc, + RC_PROC_SETUP_BARS_ATTR_LOOKUP_ERR); break; } - // BAR enable - rc = FAPI_ATTR_GET(ATTR_PROC_AS_MMIO_BAR_ENABLE, - i_target, - bar_enabled); - if (!rc.ok()) + // BAR size + if (((i_attr_id == PROC_SETUP_BARS_ATTR_ID_PSI) || + (i_attr_id == PROC_SETUP_BARS_ATTR_ID_INTP)) && + !i_attr_idx1 && !i_attr_idx2) + { + io_addr_range.size = PROC_SETUP_BARS_SIZE_1_MB; + } + else if (i_size_attr) + { + rc = proc_setup_bars_query_attr( + *i_size_attr, + i_attr_id, + i_target, + i_attr_idx1, i_attr_idx2, + io_addr_range.size); + if (!rc.ok()) + { + FAPI_ERR("proc_setup_bars_get_range_attrs: Error querying BAR size attribute (Unit/Range ID = 0x%X, FAPI Attribute ID = 0x%08X)", + i_attr_id, *i_size_attr); + break; + } + } + else { - FAPI_ERR("proc_setup_bars_as_get_mmio_bar_attrs: Error querying ATTR_PROC_AS_MMIO_BAR_ENABLE"); + FAPI_ERR("proc_setup_bars_get_range_attrs: No rule to set range size"); + const fapi::Target & TARGET = *i_target; + const proc_setup_bars_attr_id & ATTR_ID = i_attr_id; + const uint32_t & ATTR_IDX1 = i_attr_idx1; + const uint32_t & ATTR_IDX2 = i_attr_idx2; + const proc_setup_bars_attr_lookup_err_type & ERR_TYPE = PROC_SETUP_BARS_SIZE_ATTR_LOOKUP_ERR; + FAPI_SET_HWP_ERROR(rc, + RC_PROC_SETUP_BARS_ATTR_LOOKUP_ERR); break; } - io_addr_range.enabled = (bar_enabled == 0x1); - // BAR size - rc = FAPI_ATTR_GET(ATTR_PROC_AS_MMIO_BAR_SIZE, - i_target, - io_addr_range.size); - if (!rc.ok()) + // BAR enable + if ((i_attr_id == PROC_SETUP_BARS_ATTR_ID_FSP_MMIO) && !i_attr_idx1 && !i_attr_idx2) + { + io_addr_range.enabled = true; + } + + else if (((i_attr_id == PROC_SETUP_BARS_ATTR_ID_NM) && (i_attr_idx1 < PROC_SETUP_BARS_NUM_NON_MIRRORED_RANGES) && !i_attr_idx2) || + ((i_attr_id == PROC_SETUP_BARS_ATTR_ID_M) && (i_attr_idx1 < PROC_SETUP_BARS_NUM_MIRRORED_RANGES) && !i_attr_idx2) || + ((i_attr_id == PROC_SETUP_BARS_ATTR_ID_FN) && (i_attr_idx1 < PROC_FAB_SMP_NUM_F_LINKS) && !i_attr_idx2) || + ((i_attr_id == PROC_SETUP_BARS_ATTR_ID_FF) && (i_attr_idx1 < PROC_FAB_SMP_NUM_F_LINKS) && !i_attr_idx2)) + { + io_addr_range.enabled = (io_addr_range.size != 0); + } + else if (i_enable_attr) + { + rc = proc_setup_bars_query_attr( + *i_enable_attr, + i_attr_id, + i_target, + i_attr_idx1, i_attr_idx2, + bar_enabled); + if (!rc.ok()) + { + FAPI_ERR("proc_setup_bars_get_range_attrs: Error querying BAR enable attribute (Unit/Range ID = 0x%X, FAPI Attribute ID = 0x%08X)", + i_attr_id, *i_enable_attr); + break; + } + io_addr_range.enabled = (bar_enabled == 0x1ULL); + } + else { - FAPI_ERR("proc_setup_bars_as_get_mmio_bar_attrs: Error querying ATTR_PROC_AS_MMIO_BAR_SIZE"); + FAPI_ERR("proc_setup_bars_get_range_attrs: No rule to set range enable"); + const fapi::Target & TARGET = *i_target; + const proc_setup_bars_attr_id & ATTR_ID = i_attr_id; + const uint32_t & ATTR_IDX1 = i_attr_idx1; + const uint32_t & ATTR_IDX2 = i_attr_idx2; + const proc_setup_bars_attr_lookup_err_type & ERR_TYPE = PROC_SETUP_BARS_ENABLE_ATTR_LOOKUP_ERR; + FAPI_SET_HWP_ERROR(rc, + RC_PROC_SETUP_BARS_ATTR_LOOKUP_ERR); break; } // check BAR attribute content if (proc_setup_bars_common_check_bar( - as_mmio_bar_def, + i_bar_def, io_addr_range) != false) { - FAPI_ERR("proc_setup_bars_as_get_mmio_bar_attrs: Error from proc_setup_bars_common_check_bar"); - const uint64_t& BASE_ADDR = io_addr_range.base_addr; - const uint64_t& SIZE = io_addr_range.size; + FAPI_ERR("proc_setup_bars_get_range_attrs: Error from proc_setup_bars_common_check_bar"); + const fapi::Target & TARGET = *i_target; + const proc_setup_bars_attr_id & ATTR_ID = i_attr_id; + const uint32_t & ATTR_IDX1 = i_attr_idx1; + const uint32_t & ATTR_IDX2 = i_attr_idx2; + const uint64_t & BASE_ADDR = io_addr_range.base_addr; + const bool & ENABLED = io_addr_range.enabled; + const uint64_t & SIZE = io_addr_range.size; FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_AS_MMIO_BAR_ATTR_ERR); + RC_PROC_SETUP_BARS_ATTR_CONTENT_ERR); break; } } while(0); - FAPI_DBG("proc_setup_bars_as_get_mmio_bar_attrs: End"); + FAPI_DBG("proc_setup_bars_get_range_attrs: End"); return rc; } //------------------------------------------------------------------------------ -// function: retrieve attributes defining PCIe IO BAR programming -// parameters: i_target => pointer to chip target -// io_addr_ranges => 2D array of address range structures -// encapsulating attribute values -// (first dimension = unit, second dimension = -// links per unit) +// function: retrieve attributes defining non-mirrored/mirrored memory ranges +// parameters: i_target => pointer to chip target +// i_range_id => enum identifying range function +// i_base_addr_attr => pointer to attribute ID associated with +// ange base addresses +// i_size_attr => pointer to attribute ID associated with +// range sizes +// i_num_ranges => number of ranges (attribute dimension) +// i_range_def => structure encapsulating range +// properties +// io_addr_range => address range structure encapsulating +// attribute +// values (size will be rounded up to nearest +// power of two) // returns: FAPI_RC_SUCCESS if all attribute reads are successful & values // are valid, -// RC_PROC_SETUP_BARS_PCIE_BAR_ATTR_ERR if individual chip PCIe IO -// range attribute content violates expected behavior, -// else FAPI_ATTR_GET return code +// RC_PROC_SETUP_BARS_CHIP_MEMORY_RANGE_ATTR_OVERLAP_ERR if chip +// memory range attributes specify overlapping address ranges, +// RC_PROC_SETUP_BARS_CHIP_MEMORY_RANGE_ERR if merged chip +// memory address range is invalid, +// RC_PROC_SETUP_BARS_ATTR_CONTENT_ERR if BAR/range +// attribute content violates expected behavior, +// else proc_setup_bars_get_range_attrs failing return code //------------------------------------------------------------------------------ -fapi::ReturnCode proc_setup_bars_pcie_get_bar_attrs( +fapi::ReturnCode proc_setup_bars_get_memory_range_attrs( const fapi::Target* i_target, - proc_setup_bars_addr_range io_addr_ranges[PROC_SETUP_BARS_PCIE_NUM_UNITS][PROC_SETUP_BARS_PCIE_RANGES_PER_UNIT]) + const proc_setup_bars_attr_id i_range_id, + const fapi::AttributeId i_base_addr_attr, + const fapi::AttributeId i_size_attr, + const uint8_t i_num_ranges, + const proc_setup_bars_bar_def& i_range_def, + proc_setup_bars_addr_range& io_addr_range) { // return code fapi::ReturnCode rc; - // temporary attribute storage used to build procedure data structures - uint64_t pcie_bar_addr[PROC_SETUP_BARS_PCIE_NUM_UNITS][PROC_SETUP_BARS_PCIE_RANGES_PER_UNIT]; - uint64_t pcie_bar_size[PROC_SETUP_BARS_PCIE_NUM_UNITS][PROC_SETUP_BARS_PCIE_RANGES_PER_UNIT]; - uint8_t pcie_bar_en[PROC_SETUP_BARS_PCIE_NUM_UNITS][PROC_SETUP_BARS_PCIE_RANGES_PER_UNIT]; + // set of ranges, to be checked/merged into single range + std::vector ranges(i_num_ranges); + + // mark function entry + FAPI_DBG("proc_setup_bars_get_memory_range_attrs: Start"); - FAPI_DBG("proc_setup_bars_pcie_get_bar_attrs: Start"); do { - // IO BAR base addresses - rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_BAR_BASE_ADDR, - i_target, - pcie_bar_addr); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_pcie_get_bar_attrs: Error querying ATTR_PROC_PCIE_BAR_BASE_ADDR"); - break; - } - - // IO BAR enable - rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_BAR_ENABLE, - i_target, - pcie_bar_en); - if (!rc.ok()) + // build individual ranges + for (uint8_t r = 0; r < i_num_ranges; r++) { - FAPI_ERR("proc_setup_bars_pcie_get_bar_attrs: Error querying ATTR_PROC_PCIE_BAR_ENABLE"); - break; + rc = proc_setup_bars_get_range_attrs( + i_target, + i_range_id, + &i_base_addr_attr, + NULL, + &i_size_attr, + r, 0, + i_range_def, + ranges[r]); + if (!rc.ok()) + { + FAPI_ERR("proc_setup_bars_get_memory_range_attrs: Error from proc_setup_bars_get_range_attrs (Range ID = 0x%X, Range index = %d)", + i_range_id, r); + break; + } } - - // IO BAR sizes - rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_BAR_SIZE, - i_target, - pcie_bar_size); if (!rc.ok()) { - FAPI_ERR("proc_setup_bars_pcie_get_bar_attrs: Error querying ATTR_PROC_PCIE_BAR_SIZE"); break; } - // loop over all units - for (uint8_t u = 0; - (u < PROC_SETUP_BARS_PCIE_NUM_UNITS) && (rc.ok()); - u++) + // check that ranges are non-overlapping + if (i_num_ranges > 1) { - for (uint8_t r = 0; - r < PROC_SETUP_BARS_PCIE_RANGES_PER_UNIT; - r++) + for (uint8_t r = 0; (r < i_num_ranges-1) && rc.ok(); r++) { - // fill chip range structures - io_addr_ranges[u][r].base_addr = pcie_bar_addr[u][r]; - io_addr_ranges[u][r].size = pcie_bar_size[u][r]; - io_addr_ranges[u][r].enabled = pcie_bar_en[u][r]; - // check BAR attribute content - FAPI_DBG("proc_setup_bars_pcie_get_bar_attrs: Unit %d Range %d", - u, r); - if (proc_setup_bars_common_check_bar( - ((PROC_SETUP_BARS_PCIE_RANGE_TYPE_MMIO[r])? - (pcie_mmio_bar_def): - (pcie_phb_bar_def)), - io_addr_ranges[u][r]) != false) + for (uint8_t x = r+1; x < i_num_ranges; x++) { - FAPI_ERR("proc_setup_bars_pcie_get_bar_attrs: Error from proc_setup_bars_common_check_bar"); - const uint8_t& UNIT = u; - const uint8_t& RANGE = r; - const uint64_t& BASE_ADDR = io_addr_ranges[u][r].base_addr; - const uint64_t& SIZE = io_addr_ranges[u][r].size; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_PCIE_BAR_ATTR_ERR); - break; + if (ranges[r].overlaps(ranges[x])) + { + FAPI_ERR("proc_setup_bars_get_memory_range_attrs: Memory range attributes specify overlapping address regions (Range ID = 0x%X, Range index1 = %d, Range index2 = %d)", + i_range_id, r, x); + const fapi::Target & TARGET = *i_target; + const proc_setup_bars_attr_id & RANGE_ID = i_range_id; + const uint32_t & ATTR_IDX1 = r; + const uint64_t & BASE_ADDR1 = ranges[r].base_addr; + const uint64_t & END_ADDR1 = ranges[r].end_addr(); + const bool & ENABLED1 = ranges[r].enabled; + const uint32_t & ATTR_IDX2 = x; + const uint64_t & BASE_ADDR2 = ranges[x].base_addr; + const uint64_t & END_ADDR2 = ranges[x].end_addr(); + const bool & ENABLED2 = ranges[x].enabled; + FAPI_SET_HWP_ERROR(rc, + RC_PROC_SETUP_BARS_CHIP_MEMORY_RANGE_ATTR_OVERLAP_ERR); + break; + } } } + if (!rc.ok()) + { + break; + } + } + + // ranges are non-overlapping, merge to single range + for (uint8_t r = 0; r < i_num_ranges; r++) + { + // merge to build single range + io_addr_range.merge(ranges[r]); + } + + // ensure range is power of 2 aligned + if (io_addr_range.enabled && !io_addr_range.is_power_of_2()) + { + io_addr_range.round_next_power_of_2(); + } + + // check final range content + if (proc_setup_bars_common_check_bar( + i_range_def, + io_addr_range) != false) + { + FAPI_ERR("proc_setup_bars_get_memory_range_attrs: Error from proc_setup_bars_common_check_bar"); + const fapi::Target & TARGET = *i_target; + const proc_setup_bars_attr_id & RANGE_ID = i_range_id; + const uint64_t & BASE_ADDR = io_addr_range.base_addr; + const uint64_t & END_ADDR = io_addr_range.end_addr(); + const bool & ENABLED = io_addr_range.enabled; + FAPI_SET_HWP_ERROR(rc, + RC_PROC_SETUP_BARS_CHIP_MEMORY_RANGE_ERR); + break; } } while(0); - FAPI_DBG("proc_setup_bars_pcie_get_bar_attrs: End"); + // mark function exit + FAPI_DBG("proc_setup_bars_get_memory_range_attrs: End"); return rc; } @@ -1096,114 +697,215 @@ fapi::ReturnCode proc_setup_bars_get_bar_attrs( do { FAPI_DBG("proc_setup_bars_get_bar_attrs: Querying base address/size attributes for non-mirrored memory range"); - rc = proc_setup_bars_memory_get_non_mirrored_attrs( + rc = proc_setup_bars_get_memory_range_attrs( &(io_smp_chip.chip->this_chip), + PROC_SETUP_BARS_ATTR_ID_NM, + fapi::ATTR_PROC_MEM_BASES_ACK, + fapi::ATTR_PROC_MEM_SIZES_ACK, + PROC_SETUP_BARS_NUM_NON_MIRRORED_RANGES, + non_mirrored_range_def, io_smp_chip.non_mirrored_range); if (!rc.ok()) { - FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_memory_get_non_mirrored_attrs"); + FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_get_memory_range_attrs (non-mirrored)"); break; } FAPI_DBG("proc_setup_bars_get_bar_attrs: Querying base address/size attributes for mirrored memory range"); - rc = proc_setup_bars_memory_get_mirrored_attrs( + rc = proc_setup_bars_get_memory_range_attrs( &(io_smp_chip.chip->this_chip), + PROC_SETUP_BARS_ATTR_ID_M, + fapi::ATTR_PROC_MIRROR_BASES_ACK, + fapi::ATTR_PROC_MIRROR_SIZES_ACK, + PROC_SETUP_BARS_NUM_MIRRORED_RANGES, + mirrored_range_def, io_smp_chip.mirrored_range); if (!rc.ok()) { - FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_memory_get_mirrored_attrs"); + FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_get_memory_range_attrs (mirrored)"); break; } FAPI_DBG("proc_setup_bars_get_bar_attrs: Querying base address/size attributes for foreign near memory ranges"); - rc = proc_setup_bars_memory_get_foreign_near_attrs( - &(io_smp_chip.chip->this_chip), - io_smp_chip.foreign_near_ranges); + for (uint8_t l = 0; l < PROC_FAB_SMP_NUM_F_LINKS; l++) + { + rc = proc_setup_bars_get_range_attrs( + &(io_smp_chip.chip->this_chip), + PROC_SETUP_BARS_ATTR_ID_FN, + &f_near_range_base_addr_attr, + NULL, + &f_near_range_size_attr, + l, 0, + common_f_scope_bar_def, + io_smp_chip.foreign_near_ranges[l]); + + if (!rc.ok()) + { + FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_get_range_attrs (foreign near, link = %d)", + l); + break; + } + } if (!rc.ok()) { - FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_memory_get_foreign_near_attrs"); break; } FAPI_DBG("proc_setup_bars_get_bar_attrs: Querying base address/size attributes for foreign far memory ranges"); - rc = proc_setup_bars_memory_get_foreign_far_attrs( - &(io_smp_chip.chip->this_chip), - io_smp_chip.foreign_far_ranges); + for (uint8_t l = 0; l < PROC_FAB_SMP_NUM_F_LINKS; l++) + { + rc = proc_setup_bars_get_range_attrs( + &(io_smp_chip.chip->this_chip), + PROC_SETUP_BARS_ATTR_ID_FF, + &f_far_range_base_addr_attr, + NULL, + &f_far_range_size_attr, + l, 0, + common_f_scope_bar_def, + io_smp_chip.foreign_far_ranges[l]); + + if (!rc.ok()) + { + FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_get_range_attrs (foreign far, link = %d)", + l); + break; + } + } if (!rc.ok()) { - FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_memory_get_foreign_far_attrs"); break; } FAPI_DBG("proc_setup_bars_get_bar_attrs: Querying base address/size attributes for PSI address range"); - rc = proc_setup_bars_psi_get_bar_attrs( + rc = proc_setup_bars_get_range_attrs( &(io_smp_chip.chip->this_chip), + PROC_SETUP_BARS_ATTR_ID_PSI, + &psi_bridge_bar_base_addr_attr, + &psi_bridge_bar_en_attr, + NULL, + 0, 0, + psi_bridge_bar_def, io_smp_chip.psi_range); + if (!rc.ok()) { - FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_psi_get_bar_attrs"); + FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_get_range_attrs (PSI)"); break; } FAPI_DBG("proc_setup_bars_get_bar_attrs: Querying base address/size attributes for FSP address range"); - rc = proc_setup_bars_fsp_get_bar_attrs( + rc = proc_setup_bars_get_range_attrs( &(io_smp_chip.chip->this_chip), + PROC_SETUP_BARS_ATTR_ID_FSP, + &fsp_bar_base_addr_attr, + &fsp_bar_en_attr, + &fsp_bar_size_attr, + 0, 0, + fsp_bar_def, io_smp_chip.fsp_range); if (!rc.ok()) { - FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_fsp_get_bar_attrs"); + FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_get_range_attrs (FSP)"); break; } FAPI_DBG("proc_setup_bars_get_bar_attrs: Querying base address/size attributes for FSP MMIO mask"); - rc = proc_setup_bars_fsp_get_mmio_mask_attrs( + rc = proc_setup_bars_get_range_attrs( &(io_smp_chip.chip->this_chip), + PROC_SETUP_BARS_ATTR_ID_FSP_MMIO, + NULL, + NULL, + &fsp_mmio_mask_size_attr, + 0, 0, + fsp_mmio_mask_def, io_smp_chip.fsp_mmio_mask_range); if (!rc.ok()) { - FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_fsp_get_mmio_mask_attrs"); + FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_get_range_addrs (FSP MMIO)"); break; } FAPI_DBG("proc_setup_bars_get_bar_attrs: Querying base address/size attributes for INTP address range"); - rc = proc_setup_bars_intp_get_bar_attrs( + rc = proc_setup_bars_get_range_attrs( &(io_smp_chip.chip->this_chip), + PROC_SETUP_BARS_ATTR_ID_INTP, + &intp_bar_base_addr_attr, + &intp_bar_en_attr, + NULL, + 0, 0, + intp_bar_def, io_smp_chip.intp_range); if (!rc.ok()) { - FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_intp_get_bar_attrs"); + FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_get_range_attrs (INTP)"); break; } FAPI_DBG("proc_setup_bars_get_bar_attrs: Querying base address/size attributes for NX MMIO address range"); - rc = proc_setup_bars_nx_get_mmio_bar_attrs( + rc = proc_setup_bars_get_range_attrs( &(io_smp_chip.chip->this_chip), + PROC_SETUP_BARS_ATTR_ID_NX, + &nx_mmio_bar_base_addr_attr, + &nx_mmio_bar_en_attr, + &nx_mmio_bar_size_attr, + 0, 0, + nx_mmio_bar_def, io_smp_chip.nx_mmio_range); if (!rc.ok()) { - FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_intp_get_bar_attrs"); + FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_get_range_attrs (NX)"); break; } FAPI_DBG("proc_setup_bars_get_bar_attrs: Querying base address/size attributes for AS MMIO address range"); - rc = proc_setup_bars_as_get_mmio_bar_attrs( + rc = proc_setup_bars_get_range_attrs( &(io_smp_chip.chip->this_chip), + PROC_SETUP_BARS_ATTR_ID_AS, + &as_mmio_bar_base_addr_attr, + &as_mmio_bar_en_attr, + &as_mmio_bar_size_attr, + 0, 0, + as_mmio_bar_def, io_smp_chip.as_mmio_range); if (!rc.ok()) { - FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_intp_get_bar_attrs"); + FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_get_range_attrs (AS)"); break; } FAPI_DBG("proc_setup_bars_get_bar_attrs: Querying base address/size attributes for PCIe address ranges"); - rc = proc_setup_bars_pcie_get_bar_attrs( - &(io_smp_chip.chip->this_chip), - io_smp_chip.pcie_ranges); + for (uint8_t u = 0; + (u < PROC_SETUP_BARS_PCIE_NUM_UNITS) && (rc.ok()); + u++) + { + for (uint8_t r = 0; + r < PROC_SETUP_BARS_PCIE_RANGES_PER_UNIT; + r++) + { + rc = proc_setup_bars_get_range_attrs( + &(io_smp_chip.chip->this_chip), + PROC_SETUP_BARS_ATTR_ID_PCIE, + &pcie_mmio_bar_base_addr_attr, + &pcie_mmio_bar_en_attr, + &pcie_mmio_bar_size_attr, + u, r, + ((PROC_SETUP_BARS_PCIE_RANGE_TYPE_MMIO[r])? + (pcie_mmio_bar_def): + (pcie_phb_bar_def)), + io_smp_chip.pcie_ranges[u][r]); + if (!rc.ok()) + { + FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_get_range_attrs (PCIE, unit = %d, range=%d)", + u, r); + break; + } + } + } if (!rc.ok()) { - FAPI_ERR("proc_setup_bars_get_bar_attrs: Error from proc_setup_bars_pcie_get_bar_attrs"); break; } + } while(0); // mark function exit @@ -1303,7 +1005,7 @@ fapi::ReturnCode proc_setup_bars_process_chip( rc = proc_setup_bars_get_bar_attrs(io_smp_chip); if (!rc.ok()) { - FAPI_ERR("proc_setup_bars_process_chip: Error from proc_fab_smp_get_mem_attrs"); + FAPI_ERR("proc_setup_bars_process_chip: Error from proc_setup_bars_get_bar_attrs"); break; } } while(0); @@ -1325,13 +1027,7 @@ fapi::ReturnCode proc_setup_bars_process_chip( // are valid, // RC_PROC_SETUP_BARS_NODE_ADD_INTERNAL_ERR if node map insert fails, // RC_PROC_SETUP_BARS_DUPLICATE_FABRIC_ID_ERR if chips with duplicate -// fabric node/chip IDs are detected, -// RC_PROC_SETUP_BARS_NODE_NON_MIRRORED_RANGE_OVERLAP_ERR if overlap -// is detected between existing node non-mirrored range -// and that of new chip being processed, -// RC_PROC_SETUP_BARS_NODE_MIRRORED_RANGE_OVERLAP_ERR if overlap -// is detected between existing node mirrored range -// and that of new chip being processed +// fabric node/chip IDs are detected //------------------------------------------------------------------------------ fapi::ReturnCode proc_setup_bars_insert_chip( proc_setup_bars_smp_chip& i_smp_chip, @@ -1370,7 +1066,9 @@ fapi::ReturnCode proc_setup_bars_insert_chip( n_iter = ret.first; if (!ret.second) { - FAPI_ERR("proc_setup_bars_insert_chip: Error encountered adding node to SMP"); + FAPI_ERR("proc_setup_bars_insert_chip: Error encountered adding node to SMP map"); + const fapi::Target & TARGET = i_smp_chip.chip->this_chip; + const proc_fab_smp_node_id & NODE_ID = node_id; FAPI_SET_HWP_ERROR(rc, RC_PROC_SETUP_BARS_NODE_ADD_INTERNAL_ERR); break; @@ -1386,8 +1084,10 @@ fapi::ReturnCode proc_setup_bars_insert_chip( if (p_iter != io_smp.nodes[node_id].chips.end()) { FAPI_ERR("proc_setup_bars_insert_chip: Duplicate fabric node ID / chip ID found"); - const uint8_t& NODE_ID = node_id; - const uint8_t& CHIP_ID = chip_id; + const fapi::Target & TARGET1 = i_smp_chip.chip->this_chip; + const fapi::Target & TARGET2 = p_iter->second.chip->this_chip; + const proc_fab_smp_node_id & NODE_ID = node_id; + const proc_fab_smp_chip_id & CHIP_ID = chip_id; FAPI_SET_HWP_ERROR(rc, RC_PROC_SETUP_BARS_DUPLICATE_FABRIC_ID_ERR); break; @@ -1396,12 +1096,15 @@ fapi::ReturnCode proc_setup_bars_insert_chip( io_smp.nodes[node_id].chips[chip_id] = i_smp_chip; // update node address regions - io_smp.nodes[node_id].non_mirrored_ranges.push_back(&(io_smp.nodes[node_id].chips[chip_id].non_mirrored_range)); i_smp_chip.non_mirrored_range.print(); + io_smp.nodes[node_id].non_mirrored_range.print(); + io_smp.nodes[node_id].non_mirrored_range.merge(io_smp.nodes[node_id].chips[chip_id].non_mirrored_range); + io_smp.nodes[node_id].non_mirrored_range.print(); - io_smp.nodes[node_id].mirrored_ranges.push_back(&(io_smp.nodes[node_id].chips[chip_id].mirrored_range)); i_smp_chip.mirrored_range.print(); - + io_smp.nodes[node_id].mirrored_range.print(); + io_smp.nodes[node_id].mirrored_range.merge(io_smp.nodes[node_id].chips[chip_id].mirrored_range); + io_smp.nodes[node_id].mirrored_range.print(); } while(0); // mark function exit @@ -1472,48 +1175,12 @@ fapi::ReturnCode proc_setup_bars_process_chips( { FAPI_DBG("Performing final adjustment on n%d", n_iter->first); - // merge into single range - for (uint8_t r = 0; r < n_iter->second.non_mirrored_ranges.size(); r++) - { - n_iter->second.non_mirrored_ranges[r]->print(); - } - - // before merging, check that non-mirrored & mirrored ranges are non-overlapping - if (proc_setup_bars_common_do_ranges_overlap(n_iter->second.non_mirrored_ranges)) - { - FAPI_ERR("proc_setup_bars_process_chips: Existing node non-mirrored range overlaps chip non-mirrored range"); - const uint8_t& NODE_ID = n_iter->first; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_NODE_NON_MIRRORED_RANGE_OVERLAP_ERR); - break; - } - - if (proc_setup_bars_common_do_ranges_overlap(n_iter->second.mirrored_ranges)) - { - FAPI_ERR("proc_setup_bars_process_chips: Existing node mirrored range overlaps chip mirrored range"); - const uint8_t& NODE_ID = n_iter->first; - FAPI_SET_HWP_ERROR(rc, - RC_PROC_SETUP_BARS_NODE_MIRRORED_RANGE_OVERLAP_ERR); - break; - } - - // merge into single range - for (uint8_t r = 0; r < n_iter->second.non_mirrored_ranges.size(); r++) - { - n_iter->second.non_mirrored_range.merge(*(n_iter->second.non_mirrored_ranges[r])); - } - - for (uint8_t r = 0; r < n_iter->second.mirrored_ranges.size(); r++) - { - n_iter->second.mirrored_range.merge(*(n_iter->second.mirrored_ranges[r])); - } - // update node address ranges (non-mirrored & mirrored) FAPI_DBG("proc_setup_bars_process_chips: Ranges after merging:"); n_iter->second.non_mirrored_range.print(); n_iter->second.mirrored_range.print(); - // update node address ranges (non-mirrored & mirrored) t + // update node address ranges (non-mirrored & mirrored) to // ensure ranges are power of 2 aligned FAPI_DBG("proc_setup_bars_process_chips: Node %d ranges after power of two alignment:", n_iter->first); @@ -1595,9 +1262,12 @@ fapi::ReturnCode proc_setup_bars_common_write_bar_reg( else if (i_bar_reg_def.base_shift != PROC_SETUP_BARS_SHIFT_NONE) { FAPI_ERR("proc_setup_bars_common_write_bar_reg: Invalid base shift value in register definition"); - FAPI_SET_HWP_ERROR( - rc, - RC_PROC_SETUP_BARS_INVALID_BAR_REG_DEF); + const fapi::Target & TARGET = i_target; + const uint32_t & SCOM_ADDR = i_scom_addr; + const uint64_t & BASE_ADDR = i_addr_range.base_addr; + const bool & ENABLED = i_addr_range.enabled; + const uint64_t & SIZE = i_addr_range.size; + FAPI_SET_HWP_ERROR(rc, RC_PROC_SETUP_BARS_INVALID_BAR_REG_DEF); break; } // set mask @@ -1626,7 +1296,11 @@ fapi::ReturnCode proc_setup_bars_common_write_bar_reg( { FAPI_ERR("proc_setup_bars_common_write_bar_reg: Unsupported BAR size 0x%016llX", i_addr_range.size); - const uint64_t& SIZE = i_addr_range.size; + const fapi::Target & TARGET = i_target; + const uint32_t & SCOM_ADDR = i_scom_addr; + const uint64_t & BASE_ADDR = i_addr_range.base_addr; + const bool & ENABLED = i_addr_range.enabled; + const uint64_t & SIZE = i_addr_range.size; FAPI_SET_HWP_ERROR(rc, RC_PROC_SETUP_BARS_SIZE_XLATE_ERR); break; } @@ -1667,7 +1341,7 @@ fapi::ReturnCode proc_setup_bars_common_write_bar_reg( bar_data_mask); if (!rc.ok()) { - FAPI_ERR("proc_setup_bars_common_f_scope_write_bar_reg: fapiPutScomUnderMask error (%08X)", + FAPI_ERR("proc_setup_bars_common_write_bar_reg: fapiPutScomUnderMask error (%08X)", i_scom_addr); break; } @@ -1694,7 +1368,7 @@ fapi::ReturnCode proc_setup_bars_common_write_bar_reg( //------------------------------------------------------------------------------ fapi::ReturnCode proc_setup_bars_l3_write_local_chip_memory_bar_attr( const fapi::Target* i_target, - const bool& i_is_non_mirrored_range, + const bool i_is_non_mirrored_range, const proc_setup_bars_addr_range& i_addr_range) { // return code @@ -1721,7 +1395,11 @@ fapi::ReturnCode proc_setup_bars_l3_write_local_chip_memory_bar_attr( { FAPI_ERR("proc_setup_bars_l3_write_local_chip_memory_bar_attr: Unsupported BAR size 0x%016llX", i_addr_range.size); - const uint64_t& SIZE = i_addr_range.size; + const fapi::Target & TARGET = *i_target; + const uint32_t & SCOM_ADDR = EX_L3_BAR1_REG_0x1001080B; + const uint64_t & BASE_ADDR = i_addr_range.base_addr; + const bool & ENABLED = i_addr_range.enabled; + const uint64_t & SIZE = i_addr_range.size; FAPI_SET_HWP_ERROR(rc, RC_PROC_SETUP_BARS_SIZE_XLATE_ERR); break; } @@ -1862,7 +1540,7 @@ fapi::ReturnCode proc_setup_bars_pcie_write_local_chip_memory_bars( //------------------------------------------------------------------------------ fapi::ReturnCode proc_setup_bars_l3_write_local_node_memory_bar_attr( const fapi::Target* i_target, - const bool& i_is_non_mirrored_range, + const bool i_is_non_mirrored_range, const proc_setup_bars_addr_range& i_node_addr_range, const proc_setup_bars_addr_range& i_chip_addr_range) { @@ -3330,7 +3008,9 @@ proc_setup_bars_find_node( // no match node found, exit if (n_iter == i_smp.nodes.end()) { - FAPI_ERR("proc_setup_bars_find_node: insert_chip: Error encountered finding node in SMP"); + FAPI_ERR("proc_setup_bars_find_node: insert_chip: Error encountered finding node in SMP map"); + const fapi::Target & TARGET = i_target; + const proc_fab_smp_node_id & NODE_ID = node_id; FAPI_SET_HWP_ERROR(rc, RC_PROC_SETUP_BARS_NODE_FIND_INTERNAL_ERR); break; @@ -3342,6 +3022,122 @@ proc_setup_bars_find_node( return rc; } +//------------------------------------------------------------------------------ +// function: check that all address ranges are non-overlapping +// parameters: i_smp => structure encapsulating fully +// specified SMP topology +// returns: FAPI_RC_SUCCESS if all ranges are non-overlapping +// else RC_PROC_SETUP_BARS_SYSTEM_RANGE_OVERLAP_ERR +//------------------------------------------------------------------------------ +fapi::ReturnCode +proc_setup_bars_check_bars( + proc_setup_bars_smp_system& i_smp) +{ + // return code + fapi::ReturnCode rc; + std::map::iterator n_iter; + std::map::iterator p_iter; + + std::vector sys_ranges; + std::vector targets; + + // fsp_mmio_mask_range specifically excluded, as this range by itself + // does not represent an active portion of real address space + const uint32_t ranges_per_chip = 7 + + (2* PROC_FAB_SMP_NUM_F_LINKS) + + (PROC_SETUP_BARS_PCIE_NUM_UNITS * PROC_SETUP_BARS_PCIE_RANGES_PER_UNIT); + + FAPI_DBG("proc_setup_bars_check_bars: Start"); + + do + { + for (n_iter = i_smp.nodes.begin(); + n_iter != i_smp.nodes.end(); + n_iter++) + { + for (p_iter = n_iter->second.chips.begin(); + p_iter != n_iter->second.chips.end(); + p_iter++) + { + targets.push_back(&(p_iter->second.chip->this_chip)); + + sys_ranges.push_back(&(p_iter->second.non_mirrored_range)); + sys_ranges.push_back(&(p_iter->second.mirrored_range)); + for (uint8_t l = 0; l < PROC_FAB_SMP_NUM_F_LINKS; l++) + { + sys_ranges.push_back(&(p_iter->second.foreign_near_ranges[l])); + } + for (uint8_t l = 0; l < PROC_FAB_SMP_NUM_F_LINKS; l++) + { + sys_ranges.push_back(&(p_iter->second.foreign_far_ranges[l])); + } + sys_ranges.push_back(&(p_iter->second.psi_range)); + sys_ranges.push_back(&(p_iter->second.fsp_range)); + sys_ranges.push_back(&(p_iter->second.intp_range)); + sys_ranges.push_back(&(p_iter->second.nx_mmio_range)); + sys_ranges.push_back(&(p_iter->second.as_mmio_range)); + for (uint8_t u = 0; u < PROC_SETUP_BARS_PCIE_NUM_UNITS; u++) + { + for (uint8_t r = 0; r < PROC_SETUP_BARS_PCIE_RANGES_PER_UNIT; r++) + { + sys_ranges.push_back(&(p_iter->second.pcie_ranges[u][r])); + } + } + } + } + + // check that ranges are non-overlapping + if (sys_ranges.size() > 1) + { + for (uint32_t r = 0; (r < sys_ranges.size()-1) && rc.ok(); r++) + { + for (uint32_t x = r+1; x < sys_ranges.size(); x++) + { + if (sys_ranges[r]->overlaps(*(sys_ranges[x]))) + { + uint32_t target_r = r / ranges_per_chip; + uint32_t range_r = r % ranges_per_chip; + uint32_t target_x = x / ranges_per_chip; + uint32_t range_x = x % ranges_per_chip; + + FAPI_ERR("proc_setup_bars_check_bars: Overlapping address regions detected"); + FAPI_ERR(" target: %s, Range index = %d", + targets[target_r]->toEcmdString(), range_r); + sys_ranges[r]->print(); + FAPI_ERR(" target: %s, Range index = %d", + targets[target_x]->toEcmdString(), range_x); + sys_ranges[x]->print(); + + const fapi::Target & TARGET1 = *(targets[target_r]); + const uint32_t RANGE_ID1 = range_r; + const uint64_t & BASE_ADDR1 = sys_ranges[r]->base_addr; + const uint64_t & END_ADDR1 = sys_ranges[r]->end_addr(); + const bool & ENABLED1 = sys_ranges[r]->enabled; + + const fapi::Target & TARGET2 = *(targets[target_x]); + const uint32_t RANGE_ID2 = range_x; + const uint64_t & BASE_ADDR2 = sys_ranges[x]->base_addr; + const uint64_t & END_ADDR2 = sys_ranges[x]->end_addr(); + const bool & ENABLED2 = sys_ranges[x]->enabled; + + FAPI_SET_HWP_ERROR(rc, + RC_PROC_SETUP_BARS_SYSTEM_RANGE_OVERLAP_ERR); + break; + } + } + } + if (!rc.ok()) + { + break; + } + } + + } while(0); + + FAPI_DBG("proc_setup_bars_check_bars: End"); + return rc; +} + //------------------------------------------------------------------------------ // function: wrapper function to write all chip BARs @@ -3357,7 +3153,7 @@ proc_setup_bars_find_node( fapi::ReturnCode proc_setup_bars_write_bars( proc_setup_bars_smp_system& i_smp, - const bool& i_init_local_chip_local_node) + const bool i_init_local_chip_local_node) { // return code fapi::ReturnCode rc; @@ -3479,7 +3275,7 @@ proc_setup_bars_write_bars( //------------------------------------------------------------------------------ fapi::ReturnCode proc_setup_bars_config_mcd( proc_setup_bars_smp_system& i_smp, - const bool& i_init_local_chip_local_node) + const bool i_init_local_chip_local_node) { // return code fapi::ReturnCode rc; @@ -3488,8 +3284,8 @@ fapi::ReturnCode proc_setup_bars_config_mcd( ecmdDataBufferBase mcd_fir_mask_data(64); ecmdDataBufferBase mcd_recov_data(64); ecmdDataBufferBase mcd_recov_mask(64); - std::map::iterator n_iter; - std::map::iterator p_iter; + std::map::const_iterator n_iter; + std::map::const_iterator p_iter; FAPI_DBG("proc_setup_bars_config_mcd: Start"); @@ -3543,24 +3339,7 @@ fapi::ReturnCode proc_setup_bars_config_mcd( if (config_mcd) { - uint64_t mcd_fir_mask; - uint8_t mcd_hang_poll_bug; - rc = FAPI_ATTR_GET(ATTR_CHIP_EC_FEATURE_MCD_HANG_RECOVERY_BUG, - &(p_iter->second.chip->this_chip), - mcd_hang_poll_bug); - if (!rc.ok()) - { - FAPI_ERR("proc_setup_bars_config_mcd: Error querying ATTR_CHIP_EC_FEATURE_MCD_HANG_RECOVERY_BUG"); - } - - if (mcd_hang_poll_bug != 0) - { - mcd_fir_mask = MCD_FIR_MASK_RUNTIME_VAL_MCD_HANG_POLL_BUG; - } - else - { - mcd_fir_mask = MCD_FIR_MASK_RUNTIME_VAL_NO_MCD_HANG_POLL_BUG; - } + uint64_t mcd_fir_mask = MCD_FIR_MASK_RUNTIME_VAL; // unmask MCD FIR rc_ecmd |= mcd_fir_mask_data.setDoubleWord( @@ -3644,7 +3423,7 @@ fapi::ReturnCode proc_setup_bars_config_mcd( //------------------------------------------------------------------------------ fapi::ReturnCode proc_setup_bars( std::vector& i_proc_chips, - const bool& i_init_local_chip_local_node) + const bool i_init_local_chip_local_node) { // return code fapi::ReturnCode rc; @@ -3667,7 +3446,13 @@ fapi::ReturnCode proc_setup_bars( break; } - // TODO: add more extensive range checking + // check that all ranges are non-overlapping + rc = proc_setup_bars_check_bars(smp); + if (!rc.ok()) + { + FAPI_ERR("proc_setup_bars: Error from proc_setup_bars_check_bars"); + break; + } // write BAR registers rc = proc_setup_bars_write_bars(smp, @@ -3680,7 +3465,7 @@ fapi::ReturnCode proc_setup_bars( // configure MCD resources rc = proc_setup_bars_config_mcd(smp, - i_init_local_chip_local_node); + i_init_local_chip_local_node); if (!rc.ok()) { FAPI_ERR("proc_setup_bars: Error from proc_setup_bars_config_mcd"); diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars.H b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars.H index eb640ac0d..fc991c6a5 100644 --- a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars.H +++ b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars.H @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2012,2013 */ +/* COPYRIGHT International Business Machines Corp. 2012,2014 */ /* */ /* p1 */ /* */ @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: proc_setup_bars.H,v 1.13 2013/10/11 14:58:57 jmcgill Exp $ +// $Id: proc_setup_bars.H,v 1.15 2014/02/03 18:46:03 jmcgill Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_setup_bars.H,v $ //------------------------------------------------------------------------------ // *| @@ -46,15 +46,17 @@ // *! proc_fab_smp_get_node_id_attr() // *! proc_fab_smp_get_chip_id_attr() // *! proc_setup_bars_get_bar_attrs() -// *! proc_setup_bars_memory_get_non_mirrored_attrs() -// *! proc_setup_bars_memory_get_mirrored_attrs() -// *! proc_setup_bars_memory_get_foreign_near_attrs() -// *! proc_setup_bars_memory_get_foreign_far_attrs() -// *! proc_setup_bars_psi_get_bar_attrs() -// *! proc_setup_bars_fsp_get_bar_attrs() -// *! proc_setup_bars_fsp_get_mmio_mask_attrs() -// *! proc_setup_bars_intp_get_bar_attrs() -// *! proc_setup_bars_pcie_get_bar_attrs() +// *! proc_setup_bars_get_memory_range_attrs (non-mirrored) +// *! proc_setup_bars_get_memory_range_attrs (mirrored) +// *! proc_setup_bars_get_range_attrs (foreign, near) +// *! proc_setup_bars_get_range_attrs (foreign, far) +// *! proc_setup_bars_get_range_attrs (psi) +// *! proc_setup_bars_get_range_attrs (fsp) +// *! proc_setup_bars_get_range_attrs (fsp mmio mask) +// *! proc_setup_bars_get_range_attrs (intp) +// *! proc_setup_bars_get_range_attrs (nx) +// *! proc_setup_bars_get_range_attrs (as) +// *! proc_setup_bars_get_range_attrs (pcie) // *! proc_setup_bars_insert_chip() // *! proc_setup_bars_write_bars() // *! proc_setup_bars_write_local_chip_region_bars() @@ -178,7 +180,7 @@ struct proc_setup_bars_proc_chip // function pointer typedef definition for HWP call support typedef fapi::ReturnCode (*proc_setup_bars_FP_t)(std::vector&, - const bool&); + const bool); // structure to represent range of FBC real address space struct proc_setup_bars_addr_range @@ -348,9 +350,7 @@ struct proc_setup_bars_smp_node // real address ranges covered for mirrored & non-mirrored regions // (considering all chips in node) proc_setup_bars_addr_range non_mirrored_range; - std::vector non_mirrored_ranges; proc_setup_bars_addr_range mirrored_range; - std::vector mirrored_ranges; }; // structure to represent collection of nodes in SMP topology @@ -608,6 +608,30 @@ enum proc_setup_bars_shift_base PROC_SETUP_BARS_SHIFT_NONE }; +// set of BAR/range attribute identifiers +enum proc_setup_bars_attr_id +{ + PROC_SETUP_BARS_ATTR_ID_NM = 0, + PROC_SETUP_BARS_ATTR_ID_M = 1, + PROC_SETUP_BARS_ATTR_ID_FN = 2, + PROC_SETUP_BARS_ATTR_ID_FF = 3, + PROC_SETUP_BARS_ATTR_ID_PSI = 4, + PROC_SETUP_BARS_ATTR_ID_FSP = 5, + PROC_SETUP_BARS_ATTR_ID_FSP_MMIO = 6, + PROC_SETUP_BARS_ATTR_ID_INTP = 7, + PROC_SETUP_BARS_ATTR_ID_NX = 8, + PROC_SETUP_BARS_ATTR_ID_AS = 9, + PROC_SETUP_BARS_ATTR_ID_PCIE = 10 +}; + +// encoding for RC_PROC_SETUP_BARS_ATTR_LOOKUP_ERR types +enum proc_setup_bars_attr_lookup_err_type +{ + PROC_SETUP_BARS_BASE_ADDR_ATTR_LOOKUP_ERR = 0, + PROC_SETUP_BARS_ENABLE_ATTR_LOOKUP_ERR = 1, + PROC_SETUP_BARS_SIZE_ATTR_LOOKUP_ERR = 2 +}; + // structure to represent physical HW BAR register programming struct proc_setup_bars_bar_reg_def { @@ -635,6 +659,7 @@ struct proc_setup_bars_bar_reg_def // Constant definitions //------------------------------------------------------------------------------ +// non-mirrored range constants const proc_setup_bars_bar_def non_mirrored_range_def = { 0xFFFC0000FFFFFFFFULL, // base: RA 14:63 @@ -643,6 +668,7 @@ const proc_setup_bars_bar_def non_mirrored_range_def = false }; +// mirrored range constants const proc_setup_bars_bar_def mirrored_range_def = { 0xFFFC0000FFFFFFFFULL, // base: RA 14:63 @@ -678,6 +704,12 @@ const proc_setup_bars_bar_reg_def common_nf_scope_bar_reg_def = }; // shared foreign BAR design (near/far regions) constants +const fapi::AttributeId f_near_range_base_addr_attr = fapi::ATTR_PROC_FOREIGN_NEAR_BASE; +const fapi::AttributeId f_near_range_size_attr = fapi::ATTR_PROC_FOREIGN_NEAR_SIZE; + +const fapi::AttributeId f_far_range_base_addr_attr = fapi::ATTR_PROC_FOREIGN_FAR_BASE; +const fapi::AttributeId f_far_range_size_attr = fapi::ATTR_PROC_FOREIGN_FAR_SIZE; + const proc_setup_bars_bar_def common_f_scope_bar_def = { 0xFFFC000000FFFFFFULL, // base: RA 14:39 @@ -704,6 +736,9 @@ const proc_setup_bars_bar_reg_def common_f_scope_bar_reg_def = }; // PSI BAR constants +const fapi::AttributeId psi_bridge_bar_base_addr_attr = fapi::ATTR_PROC_PSI_BRIDGE_BAR_BASE_ADDR; +const fapi::AttributeId psi_bridge_bar_en_attr = fapi::ATTR_PROC_PSI_BRIDGE_BAR_ENABLE; + const proc_setup_bars_bar_def psi_bridge_bar_def = { 0xFFFC0000000FFFFFULL, // base: RA 14:43 @@ -730,6 +765,10 @@ const proc_setup_bars_bar_reg_def psi_bridge_bar_reg_def = }; // FSP BAR constants +const fapi::AttributeId fsp_bar_base_addr_attr = fapi::ATTR_PROC_FSP_BAR_BASE_ADDR; +const fapi::AttributeId fsp_bar_en_attr = fapi::ATTR_PROC_FSP_BAR_ENABLE; +const fapi::AttributeId fsp_bar_size_attr = fapi::ATTR_PROC_FSP_BAR_SIZE; + const proc_setup_bars_bar_def fsp_bar_def = { 0xFFFC0000000FFFFFULL, // base: RA 14:43 @@ -790,6 +829,8 @@ const proc_setup_bars_bar_reg_def fsp_bar_en_reg_def = }; // FSP MMIO mask constants +const fapi::AttributeId fsp_mmio_mask_size_attr = fapi::ATTR_PROC_FSP_MMIO_MASK_SIZE; + const proc_setup_bars_bar_def fsp_mmio_mask_def = { 0xFFFFFFFFFFFFFFFFULL, // base: unused @@ -816,6 +857,9 @@ const proc_setup_bars_bar_reg_def fsp_mmio_mask_reg_def = }; // INTP BAR constants +const fapi::AttributeId intp_bar_base_addr_attr = fapi::ATTR_PROC_INTP_BAR_BASE_ADDR; +const fapi::AttributeId intp_bar_en_attr = fapi::ATTR_PROC_INTP_BAR_ENABLE; + const proc_setup_bars_bar_def intp_bar_def = { 0xFFFC0000000FFFFFULL, // base: RA 14:43 @@ -857,6 +901,10 @@ const uint32_t L3_BAR_GROUP_MASK_MIRROR_MASK_END_BIT = 33; const uint32_t L3_BAR_GROUP_MASK_MIRROR_ENABLE_BIT = 34; // NX MMIO BAR constants +const fapi::AttributeId nx_mmio_bar_base_addr_attr = fapi::ATTR_PROC_NX_MMIO_BAR_BASE_ADDR; +const fapi::AttributeId nx_mmio_bar_en_attr = fapi::ATTR_PROC_NX_MMIO_BAR_ENABLE; +const fapi::AttributeId nx_mmio_bar_size_attr = fapi::ATTR_PROC_NX_MMIO_BAR_SIZE; + const proc_setup_bars_bar_def nx_mmio_bar_def = { 0xFFFC000000000FFFULL, // base: RA 14:51 @@ -883,6 +931,10 @@ const proc_setup_bars_bar_reg_def nx_mmio_bar_reg_def = }; // AS MMIO BAR constants +const fapi::AttributeId as_mmio_bar_base_addr_attr = fapi::ATTR_PROC_AS_MMIO_BAR_BASE_ADDR; +const fapi::AttributeId as_mmio_bar_en_attr = fapi::ATTR_PROC_AS_MMIO_BAR_ENABLE; +const fapi::AttributeId as_mmio_bar_size_attr = fapi::ATTR_PROC_AS_MMIO_BAR_SIZE; + const proc_setup_bars_bar_def as_mmio_bar_def = { 0xFFFC000000000FFFULL, // base: RA 14:51 @@ -997,8 +1049,7 @@ const proc_setup_bars_bar_reg_def mcd_f1_bar_reg_def = }; // MCD FIR Register constants -const uint64_t MCD_FIR_MASK_RUNTIME_VAL_MCD_HANG_POLL_BUG = 0x2F00000000000000ULL; -const uint64_t MCD_FIR_MASK_RUNTIME_VAL_NO_MCD_HANG_POLL_BUG = 0x2700000000000000ULL; +const uint64_t MCD_FIR_MASK_RUNTIME_VAL = 0x2FC0000000000000ULL; // MCD Evn/Odd Recovery Control Register field/bit definitions const uint8_t PROC_SETUP_BARS_NUM_MCD_CFG = 4; @@ -1078,6 +1129,10 @@ const uint8_t PROC_SETUP_BARS_PCIE_RANGE_TYPE_MMIO[PROC_SETUP_BARS_PCIE_RANGES_P false, // BAR 2 = PHB }; +const fapi::AttributeId pcie_mmio_bar_base_addr_attr = fapi::ATTR_PROC_PCIE_BAR_BASE_ADDR; +const fapi::AttributeId pcie_mmio_bar_en_attr = fapi::ATTR_PROC_PCIE_BAR_ENABLE; +const fapi::AttributeId pcie_mmio_bar_size_attr = fapi::ATTR_PROC_PCIE_BAR_SIZE; + const proc_setup_bars_bar_def pcie_mmio_bar_def = { 0xFFFC00000000FFFFULL, // base: RA 14:47 @@ -1234,56 +1289,30 @@ extern "C" // of BARs tied to local chip/local // node regions // returns: FAPI_RC_SUCCESS if all register writes are successful, -// RC_PROC_SETUP_BARS_NON_MIRRORED_RANGE_ATTR_ERR if chip non-mirrored -// attribute content violates expected behavior, -// RC_PROC_SETUP_BARS_NON_MIRRORED_RANGE_OVERLAP_ATTR_ERR if chip -// non-mirrored range attributes specify overlapping ranges, -// RC_PROC_SETUP_BARS_NON_MIRRORED_RANGE_ERR if chip non-mirrored -// processed range content violates expected behavior, -// RC_PROC_SETUP_BARS_MIRRORED_RANGE_ATTR_ERR if individual chip -// mirrored range attribute content violates expected behavior, -// RC_PROC_SETUP_BARS_MIRRORED_RANGE_OVERLAP_ATTR_ERR if chip mirrored -// range attributes specify overlapping ranges, -// RC_PROC_SETUP_BARS_MIRRORED_RANGE_ERR if chip mirrored processed -// range content violates expected behavior, -// RC_PROC_SETUP_BARS_FOREIGN_NEAR_RANGE_ATTR_ERR if individual chip -// foriegn near range attribute content violates expected behavior, -// RC_PROC_SETUP_BARS_FOREIGN_FAR_RANGE_ATTR_ERR if individual chip -// foreign far range attribute content violates expected behavior, -// RC_PROC_SETUP_BARS_PSI_BAR_ATTR_ERR if chip PSI range -// attribute content violates expected behavior, -// RC_PROC_SETUP_BARS_FSP_BAR_ATTR_ERR if chip FSP range -// attribute content violates expected behavior, -// RC_PROC_SETUP_BARS_FSP_MMIO_MASK_ATTR_ERR if chip MMIO mask -// attribute content violates expected behavior, -// RC_PROC_SETUP_BARS_INTP_BAR_ATTR_ERR if chip INTP range -// attribute content violates expected behavior, -// RC_PROC_SETUP_BARS_NX_MMIO_BAR_ATTR_ERR if chip NX MMIO range -// attribute content violates expected behavior, -// RC_PROC_SETUP_BARS_NX_MMIO_BAR_ATTR_ERR if chip AS MMIO range -// attribute content violates expected behavior, -// RC_PROC_SETUP_BARS_PCIE_BAR_ATTR_ERR if individual chip PCIe IO -// range attribute content violates expected behavior, +// RC_PROC_SETUP_BARS_ATTR_LOOKUP_ERR if no rule is found to set +// BAR/range address, enable, or size, +// RC_PROC_SETUP_BARS_ATTR_CONTENT_ERR if BAR/range attribute content +// violates expected behavior, +// RC_PROC_SETUP_BARS_CHIP_MEMORY_RANGE_ATTR_OVERLAP_ERR if chip +// memory range attributes specify overlapping address ranges, +// RC_PROC_SETUP_BARS_CHIP_MEMORY_RANGE_ERR if merged +// chip memory address range is invalid, // RC_PROC_SETUP_BARS_NODE_ADD_INTERNAL_ERR if node map insert fails, // RC_PROC_SETUP_BARS_NODE_FIND_INTERNAL_ERR if node map lookup is // unsuccessful, // RC_PROC_SETUP_BARS_DUPLICATE_FABRIC_ID_ERR if chips with duplicate // fabric node/chip IDs are detected, -// RC_PROC_SETUP_BARS_NODE_NON_MIRRORED_RANGE_OVERLAP_ERR if overlap -// is detected between existing node non-mirrored range -// and that of new chip being processed, -// RC_PROC_SETUP_BARS_NODE_MIRRORED_RANGE_OVERLAP_ERR if overlap -// is detected between existing node mirrored range -// and that of new chip being processed, // RC_PROC_SETUP_BARS_INVALID_BAR_REG_DEF if BAR register definition // structure is invalid, -// RC_PROC_SETUP_BARS_SIZE_XLATE_ERR if logical->physical size +// RC_PROC_SETUP_BARS_SIZE_XLATE_ERR if BAR logical->physical size // translation is unsuccessful, +// RC_PROC_SETUP_BARS_SYSTEM_RANGE_OVERLAP_ERR if any overapping +// ranges are detected, considering all ranges in system, // else failing return code //------------------------------------------------------------------------------ fapi::ReturnCode proc_setup_bars( std::vector& i_proc_chips, - const bool& i_init_local_chip_local_node); + const bool i_init_local_chip_local_node); } // extern "C" diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_errors.xml b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_errors.xml index c8db40655..b2d51158f 100644 --- a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_errors.xml +++ b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_errors.xml @@ -5,7 +5,7 @@ - + @@ -20,128 +20,167 @@ - + - RC_PROC_SETUP_BARS_NON_MIRRORED_RANGE_ATTR_ERR - Invalid definition for non-mirrored address range (from platform attributes). - BASE_ADDR - SIZE - - - RC_PROC_SETUP_BARS_NON_MIRRORED_RANGE_OVERLAP_ATTR_ERR - Invalid definition for non-mirrored address ranges (from platform attributes), two or more ranges on this chip overlap. - - - RC_PROC_SETUP_BARS_NON_MIRRORED_RANGE_ERR - Invalid definition for non-mirrored address range. - BASE_ADDR - SIZE - - - RC_PROC_SETUP_BARS_MIRRORED_RANGE_ATTR_ERR - Invalid definition for mirrored address range (from platform attributes). - BASE_ADDR - SIZE - - - RC_PROC_SETUP_BARS_MIRRORED_RANGE_OVERLAP_ATTR_ERR - Invalid definition for mirrored address ranges (from platform attributes), two or more ranges on this chip overlap. - - - RC_PROC_SETUP_BARS_MIRRORED_RANGE_ERR - Invalid definition for mirrored address range. - BASE_ADDR - SIZE - - - RC_PROC_SETUP_BARS_FOREIGN_NEAR_RANGE_ATTR_ERR - Invalid definition for foreign near address range (from platform attributes). - BASE_ADDR - SIZE - - - RC_PROC_SETUP_BARS_FOREIGN_FAR_RANGE_ATTR_ERR - Invalid definition for foreign far address range (from platform attributes). - BASE_ADDR - SIZE - - - RC_PROC_SETUP_BARS_PSI_BAR_ATTR_ERR - Invalid definition for PSI Bridge BAR address range (from platform attributes). - BASE_ADDR - SIZE - - - RC_PROC_SETUP_BARS_FSP_BAR_ATTR_ERR - Invalid definition for FSP BAR address range (from platform attributes). - BASE_ADDR - SIZE - - - RC_PROC_SETUP_BARS_FSP_MMIO_MASK_ATTR_ERR - Invalid definition for FSP MMIO Mask address range (from platform attributes). - SIZE + RC_PROC_SETUP_BARS_ATTR_QUERY_ERR + Unsupported attribute query + TARGET + FAPI_ATTR_ID + ATTR_ID + ATTR_IDX1 + ATTR_IDX2 + + CODE + HIGH + + - RC_PROC_SETUP_BARS_INTP_BAR_ATTR_ERR - Invalid definition for INTP BAR address range (from platform attributes). - BASE_ADDR - SIZE + RC_PROC_SETUP_BARS_ATTR_LOOKUP_ERR + No rule provided to set BAR/range address, enable, or size. + TARGET + ATTR_ID + ATTR_IDX1 + ATTR_IDX2 + ERR_TYPE + + CODE + HIGH + + - RC_PROC_SETUP_BARS_NX_MMIO_BAR_ATTR_ERR - Invalid definition for NX MMIO BAR address range (from platform attributes). + RC_PROC_SETUP_BARS_ATTR_CONTENT_ERR + BAR attribute content violates expected behavior. + TARGET + ATTR_ID + ATTR_IDX1 + ATTR_IDX2 BASE_ADDR + ENABLED SIZE + + CODE + HIGH + + - RC_PROC_SETUP_BARS_AS_MMIO_BAR_ATTR_ERR - Invalid definition for AS MMIO BAR address range (from platform attributes). - BASE_ADDR - SIZE + RC_PROC_SETUP_BARS_CHIP_MEMORY_RANGE_ATTR_OVERLAP_ERR + Chip memory range attributes specify overlapping address ranges. + TARGET + RANGE_ID + ATTR_IDX1 + BASE_ADDR1 + END_ADDR1 + ENABLED1 + ATTR_IDX2 + BASE_ADDR2 + END_ADDR2 + ENABLED2 + + CODE + HIGH + + - RC_PROC_SETUP_BARS_PCIE_BAR_ATTR_ERR - Invalid definition for PCIe BAR address range (from platform attributes). - UNIT - RANGE + RC_PROC_SETUP_BARS_CHIP_MEMORY_RANGE_ERR + Invalid definition for merged chip memory address range. + TARGET + RANGE_ID BASE_ADDR - SIZE + END_ADDR + ENABLED + + CODE + HIGH + + RC_PROC_SETUP_BARS_NODE_ADD_INTERNAL_ERR - Internal Error. Error encountered adding node to SMP structure. + Internal Error. Error encountered adding node to SMP map structure. + TARGET + NODE_ID + + CODE + HIGH + + RC_PROC_SETUP_BARS_NODE_FIND_INTERNAL_ERR Internal Error. Error encountered attempting to find node in SMP structure. + TARGET + NODE_ID + + CODE + HIGH + + RC_PROC_SETUP_BARS_DUPLICATE_FABRIC_ID_ERR - Multiple chips found with identifcal fabric node/chip ID attribute values. + Multiple chips found with identical fabric node/chip ID attribute values. + TARGET1 + TARGET2 NODE_ID CHIP_ID + + CODE + HIGH + + - RC_PROC_SETUP_BARS_NODE_NON_MIRRORED_RANGE_OVERLAP_ERR - Existing node non-mirrored range overlaps chip non-mirrored range. - NODE_ID - - - RC_PROC_SETUP_BARS_NODE_MIRRORED_RANGE_OVERLAP_ERR - Existing node mirrored range overlaps chip mirrored range. - NODE_ID + RC_PROC_SETUP_BARS_SYSTEM_RANGE_OVERLAP_ERR + Overlapping memory/MMIO address ranges detected. + TARGET1 + RANGE_ID1 + BASE_ADDR1 + END_ADDR1 + ENABLED1 + TARGET2 + RANGE_ID2 + BASE_ADDR2 + END_ADDR2 + ENABLED2 + + CODE + HIGH + + RC_PROC_SETUP_BARS_INVALID_BAR_REG_DEF Internal error. Invalid proc_setup_bars_bar_reg_def structure content. + TARGET + SCOM_ADDR + BASE_ADDR + ENABLED + SIZE + + CODE + HIGH + + RC_PROC_SETUP_BARS_SIZE_XLATE_ERR Internal error. Unsupported size translation for proc_setup_bars_bar_reg_def structure. + TARGET + SCOM_ADDR + BASE_ADDR + ENABLED SIZE + + CODE + HIGH + + diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml index df96dc9f7..01983166b 100644 --- a/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml +++ b/src/usr/hwpf/hwp/edi_ei_initialization/proc_fab_iovalid/proc_fab_smp_errors.xml @@ -5,7 +5,7 @@ - + @@ -20,24 +20,39 @@ - + RC_PROC_FAB_SMP_PCIE_NOT_F_LINK_ATTR_ERR Invalid definition for PCIe/DSMP mux attribute value. + TARGET ATTR_DATA + + CODE + HIGH + RC_PROC_FAB_SMP_FABRIC_NODE_ID_ATTR_ERR Invalid definition for fabric node ID attribute value. + TARGET ATTR_DATA + + CODE + HIGH + RC_PROC_FAB_SMP_FABRIC_CHIP_ID_ATTR_ERR Invalid definition for fabric chip ID attribute value. + TARGET ATTR_DATA + + CODE + HIGH + RC_PROC_FAB_SMP_EPSILON_TABLE_TYPE_ATTR_ERR -- cgit v1.2.1