From 54e360ff4e6b6adcb35f58cdeeeb83e50fdb9c3d Mon Sep 17 00:00:00 2001 From: Thi Tran Date: Wed, 11 Dec 2013 08:04:12 -0600 Subject: INITPROC: Hostboot - SW235037 VPD attribute use updates Change-Id: I9f47190127c6880abce78f101b18533479376e71 CQ:SW235037 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7669 Tested-by: Jenkins Server Reviewed-by: Thi N. Tran Reviewed-by: A. Patrick Williams III --- .../hwp/dram_training/mss_draminit/mss_draminit.C | 43 ++++++------- .../mss_draminit_training/mss_draminit_training.C | 5 +- .../mss_lrdimm_funcs/mss_lrdimm_funcs.C | 71 +++++++++++----------- .../hwp/dram_training/mss_termination_control.C | 35 +++++------ 4 files changed, 79 insertions(+), 75 deletions(-) (limited to 'src/usr/hwpf/hwp/dram_training') diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit/mss_draminit.C b/src/usr/hwpf/hwp/dram_training/mss_draminit/mss_draminit.C index 4dd219b8d..3d3ae22d1 100755 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit/mss_draminit.C +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit/mss_draminit.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_draminit.C,v 1.58 2013/10/15 14:16:33 jdsloat Exp $ +// $Id: mss_draminit.C,v 1.59 2013/11/11 20:50:06 jdsloat Exp $ //------------------------------------------------------------------------------ // Don't forget to create CVS comments when you check in your changes! //------------------------------------------------------------------------------ @@ -28,6 +28,7 @@ //------------------------------------------------------------------------------ // Version:| Author: | Date: | Comment: //---------|----------|---------|----------------------------------------------- +// 1.59 | jdsloat | 11/11/13| Changed EFF attributes to VPD named attributes // 1.58 | jdsloat | 10/15/13| Added rc checks in ddr4 shadow regs check per review request // 1.57 | jdsloat | 10/09/13| Added mrs_load_ddr4 with defines for ddr4 usage, added shadow regs, removed complicated flow // 1.56 | bellows | 09/16/13| Hostboot compile fix @@ -293,7 +294,7 @@ ReturnCode mss_draminit_cloned(Target& i_target) rc = FAPI_ATTR_GET(ATTR_IS_SIMULATION, NULL, is_sim); if(rc) return rc; uint8_t address_mirror_map[2][2]; //address_mirror_map[port][dimm] - rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_ADDRESS_MIRRORING, &i_target, address_mirror_map); + rc = FAPI_ATTR_GET(ATTR_VPD_DRAM_ADDRESS_MIRRORING, &i_target, address_mirror_map); if(rc) return rc; @@ -1387,11 +1388,11 @@ ReturnCode mss_mrs_load( if(rc) return rc; uint8_t dram_2n_mode = 0; - rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_2N_MODE_ENABLED, &i_target, dram_2n_mode); + rc = FAPI_ATTR_GET(ATTR_VPD_DRAM_2N_MODE_ENABLED, &i_target, dram_2n_mode); if(rc) return rc; uint8_t address_mirror_map[2][2]; //address_mirror_map[port][dimm] - rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_ADDRESS_MIRRORING, &i_target, address_mirror_map); + rc = FAPI_ATTR_GET(ATTR_VPD_DRAM_ADDRESS_MIRRORING, &i_target, address_mirror_map); if(rc) return rc; @@ -1517,10 +1518,10 @@ ReturnCode mss_mrs_load( rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_DLL_ENABLE, &i_target, dll_enable); if(rc) return rc; uint8_t out_drv_imp_cntl[2][2]; - rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_RON, &i_target, out_drv_imp_cntl); + rc = FAPI_ATTR_GET(ATTR_VPD_DRAM_RON, &i_target, out_drv_imp_cntl); if(rc) return rc; uint8_t dram_rtt_nom[2][2][4]; - rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_RTT_NOM, &i_target, dram_rtt_nom); + rc = FAPI_ATTR_GET(ATTR_VPD_DRAM_RTT_NOM, &i_target, dram_rtt_nom); if(rc) return rc; uint8_t dram_al; rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_AL, &i_target, dram_al); @@ -1598,7 +1599,7 @@ ReturnCode mss_mrs_load( rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_SRT, &i_target, sr_temp); if(rc) return rc; uint8_t dram_rtt_wr[2][2][4]; - rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_RTT_WR, &i_target, dram_rtt_wr); + rc = FAPI_ATTR_GET(ATTR_VPD_DRAM_RTT_WR, &i_target, dram_rtt_wr); if(rc) return rc; if (pt_arr_sr == ENUM_ATTR_EFF_DRAM_PASR_FULL) @@ -1750,42 +1751,42 @@ ReturnCode mss_mrs_load( { dram_rtt_nom[i_port_number][dimm_number][rank_number] = 0x00; } - else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE) + else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VPD_DRAM_RTT_NOM_DISABLE) { dram_rtt_nom[i_port_number][dimm_number][rank_number] = 0x00; } - else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM20) + else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM20) { dram_rtt_nom[i_port_number][dimm_number][rank_number] = 0x20; } - else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM30) + else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM30) { dram_rtt_nom[i_port_number][dimm_number][rank_number] = 0xA0; } - else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM40) + else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM40) { dram_rtt_nom[i_port_number][dimm_number][rank_number] = 0xC0; } - else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM60) + else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM60) { dram_rtt_nom[i_port_number][dimm_number][rank_number] = 0x80; } - else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM120) + else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM120) { dram_rtt_nom[i_port_number][dimm_number][rank_number] = 0x40; } else { - FAPI_ERR( "mss_mrs_load: Error determining ATTR_EFF_DRAM_RTT_NOM value: %d from attribute", dram_rtt_nom[i_port_number][dimm_number][rank_number]); + FAPI_ERR( "mss_mrs_load: Error determining ATTR_VPD_DRAM_RTT_NOM value: %d from attribute", dram_rtt_nom[i_port_number][dimm_number][rank_number]); FAPI_SET_HWP_ERROR(rc, RC_MSS_IMP_INPUT_ERROR); return rc; } - if (out_drv_imp_cntl[i_port_number][dimm_number] == ENUM_ATTR_EFF_DRAM_RON_OHM40) + if (out_drv_imp_cntl[i_port_number][dimm_number] == ENUM_ATTR_VPD_DRAM_RON_OHM40) { out_drv_imp_cntl[i_port_number][dimm_number] = 0x00; } - else if (out_drv_imp_cntl[i_port_number][dimm_number] == ENUM_ATTR_EFF_DRAM_RON_OHM34) + else if (out_drv_imp_cntl[i_port_number][dimm_number] == ENUM_ATTR_VPD_DRAM_RON_OHM34) { out_drv_imp_cntl[i_port_number][dimm_number] = 0x80; } @@ -1811,21 +1812,21 @@ ReturnCode mss_mrs_load( { dram_rtt_wr[i_port_number][dimm_number][rank_number] = dram_rtt_wr[i_port_number][dimm_number][0]; } - else if (dram_rtt_wr[i_port_number][dimm_number][rank_number] == ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE) + else if (dram_rtt_wr[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VPD_DRAM_RTT_WR_DISABLE) { dram_rtt_wr[i_port_number][dimm_number][rank_number] = 0x00; } - else if (dram_rtt_wr[i_port_number][dimm_number][rank_number] == ENUM_ATTR_EFF_DRAM_RTT_WR_OHM60) + else if (dram_rtt_wr[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VPD_DRAM_RTT_WR_OHM60) { dram_rtt_wr[i_port_number][dimm_number][rank_number] = 0x80; } - else if (dram_rtt_wr[i_port_number][dimm_number][rank_number] == ENUM_ATTR_EFF_DRAM_RTT_WR_OHM120) + else if (dram_rtt_wr[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VPD_DRAM_RTT_WR_OHM120) { dram_rtt_wr[i_port_number][dimm_number][rank_number] = 0x40; } else { - FAPI_ERR( "mss_mrs_load: Error determining ATTR_EFF_DRAM_RTT_WR value: %d from attribute", dram_rtt_wr[i_port_number][dimm_number][rank_number]); + FAPI_ERR( "mss_mrs_load: Error determining ATTR_VPD_DRAM_RTT_WR value: %d from attribute", dram_rtt_wr[i_port_number][dimm_number][rank_number]); FAPI_SET_HWP_ERROR(rc, RC_MSS_IMP_INPUT_ERROR); return rc; } @@ -1910,7 +1911,7 @@ ReturnCode mss_mrs_load( } - if (dram_2n_mode == ENUM_ATTR_EFF_DRAM_2N_MODE_ENABLED_TRUE) + if (dram_2n_mode == ENUM_ATTR_VPD_DRAM_2N_MODE_ENABLED_TRUE) { // Send out to the CCS array a "setup" cycle diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C index 1b2980f3b..ac4f671a3 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_training/mss_draminit_training.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_draminit_training.C,v 1.69 2013/11/06 16:22:45 jdsloat Exp $ +// $Id: mss_draminit_training.C,v 1.70 2013/11/11 20:51:15 jdsloat Exp $ //------------------------------------------------------------------------------ // Don't forget to create CVS comments when you check in your changes! //------------------------------------------------------------------------------ @@ -28,6 +28,7 @@ //------------------------------------------------------------------------------ // Version:| Author: | Date: | Comment: //---------|----------|---------|------------------------------------------------ +// 1.70 | jdsloat | 11/11/13| Changed EFF attributes to VPD named attributes // 1.69 | jdsloat |06-OCT-13| Removed Control Switch Attribute // 1.68 | bellows |16-SEP-13| Hostboot compile update // 1.67 | kcook |13-SEP-13| Updated define FAPI_LRDIMM token. @@ -2590,7 +2591,7 @@ ReturnCode mss_rtt_nom_rtt_wr_swap( if(rc) return rc; uint8_t address_mirror_map[2][2]; //address_mirror_map[port][dimm] - rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_ADDRESS_MIRRORING, &i_target, address_mirror_map); + rc = FAPI_ATTR_GET(ATTR_VPD_DRAM_ADDRESS_MIRRORING, &i_target, address_mirror_map); if(rc) return rc; diff --git a/src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/mss_lrdimm_funcs.C b/src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/mss_lrdimm_funcs.C index 57bdab249..db118d734 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/mss_lrdimm_funcs.C +++ b/src/usr/hwpf/hwp/dram_training/mss_lrdimm_funcs/mss_lrdimm_funcs.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_lrdimm_funcs.C,v 1.4 2013/09/16 13:56:38 bellows Exp $ +// $Id: mss_lrdimm_funcs.C,v 1.5 2013/12/03 22:51:13 kcook Exp $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2013 // *! All Rights Reserved -- Property of IBM @@ -40,6 +40,7 @@ //------------------------------------------------------------------------------ // Version:| Author: | Date: | Comment: //---------|----------|---------|----------------------------------------------- +// 1.5 | 12/03/13 | kcook | Updated VPD attributes. // 1.4 | 09/16/13 | bellows | Hostboot compile update // 1.3 | 09/16/13 | bellows | Added ID tag. // 1.2 | 09/13/13 | kcook | Updated define FAPI_LRDIMM token. @@ -585,11 +586,11 @@ fapi::ReturnCode mss_lrdimm_mrs_load( Target& i_target , uint32_t i_port_number, if(rc) return rc; rc = FAPI_ATTR_GET(ATTR_EFF_DIMM_RCD_CNTL_WORD_0_15, &i_target, rcd_array); if(rc) return rc; - rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_ADDRESS_MIRRORING, &i_target, address_mirror_map); + rc = FAPI_ATTR_GET(ATTR_VPD_DRAM_ADDRESS_MIRRORING, &i_target, address_mirror_map); if(rc) return rc; rc = FAPI_ATTR_GET(ATTR_IS_SIMULATION, NULL, is_sim); if(rc) return rc; - rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_2N_MODE_ENABLED, &i_target, dram_2n_mode); + rc = FAPI_ATTR_GET(ATTR_VPD_DRAM_2N_MODE_ENABLED, &i_target, dram_2n_mode); if(rc) return rc; //MRS1 @@ -597,10 +598,10 @@ fapi::ReturnCode mss_lrdimm_mrs_load( Target& i_target , uint32_t i_port_number, rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_DLL_ENABLE, &i_target, dll_enable); if(rc) return rc; uint8_t out_drv_imp_cntl[2][2]; - rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_RON, &i_target, out_drv_imp_cntl); + rc = FAPI_ATTR_GET(ATTR_VPD_DRAM_RON, &i_target, out_drv_imp_cntl); if(rc) return rc; uint8_t dram_rtt_nom[2][2][4]; - rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_RTT_NOM, &i_target, dram_rtt_nom); + rc = FAPI_ATTR_GET(ATTR_VPD_DRAM_RTT_NOM, &i_target, dram_rtt_nom); if(rc) return rc; uint8_t dram_al; rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_AL, &i_target, dram_al); @@ -799,36 +800,36 @@ fapi::ReturnCode mss_lrdimm_mrs_load( Target& i_target , uint32_t i_port_number, rc_num = rc_num | csn_8.setBit(0,8); rc_num = rc_num | address_16.clearBit(0, 16); - if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE) + if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VPD_DRAM_RTT_NOM_DISABLE) { dram_rtt_nom[i_port_number][dimm_number][rank_number] = 0x00; } - else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM20) + else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM20) { dram_rtt_nom[i_port_number][dimm_number][rank_number] = 0x20; } - else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM30) + else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM30) { dram_rtt_nom[i_port_number][dimm_number][rank_number] = 0xA0; } - else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM40) + else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM40) { dram_rtt_nom[i_port_number][dimm_number][rank_number] = 0xC0; } - else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM60) + else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM60) { dram_rtt_nom[i_port_number][dimm_number][rank_number] = 0x80; } - else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM120) + else if (dram_rtt_nom[i_port_number][dimm_number][rank_number] == ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM120) { dram_rtt_nom[i_port_number][dimm_number][rank_number] = 0x40; } - if (out_drv_imp_cntl[i_port_number][dimm_number] == ENUM_ATTR_EFF_DRAM_RON_OHM40) + if (out_drv_imp_cntl[i_port_number][dimm_number] == ENUM_ATTR_VPD_DRAM_RON_OHM40) { out_drv_imp_cntl[i_port_number][dimm_number] = 0x00; } - else if (out_drv_imp_cntl[i_port_number][dimm_number] == ENUM_ATTR_EFF_DRAM_RON_OHM34) + else if (out_drv_imp_cntl[i_port_number][dimm_number] == ENUM_ATTR_VPD_DRAM_RON_OHM34) { out_drv_imp_cntl[i_port_number][dimm_number] = 0x80; } @@ -885,7 +886,7 @@ fapi::ReturnCode mss_lrdimm_mrs_load( Target& i_target , uint32_t i_port_number, } - if (dram_2n_mode == ENUM_ATTR_EFF_DRAM_2N_MODE_ENABLED_TRUE) + if (dram_2n_mode == ENUM_ATTR_VPD_DRAM_2N_MODE_ENABLED_TRUE) { // Send out to the CCS array @@ -1584,10 +1585,10 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) // Fetch impacted attributes uint64_t l_attr_eff_dimm_rcd_cntl_word_0_15[PORT_SIZE][DIMM_SIZE]; rc = FAPI_ATTR_GET(ATTR_EFF_DIMM_RCD_CNTL_WORD_0_15, &i_target_mba, l_attr_eff_dimm_rcd_cntl_word_0_15); if(rc) return rc; - rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_RON, &i_target_mba, attr_eff_dram_ron); if(rc) return rc; - rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_RTT_NOM, &i_target_mba, attr_eff_dram_rtt_nom); if(rc) return rc; - rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_RTT_WR, &i_target_mba, attr_eff_dram_rtt_wr); if(rc) return rc; - rc = FAPI_ATTR_GET(ATTR_EFF_ODT_WR, &i_target_mba, attr_eff_odt_wr); if(rc) return rc; + rc = FAPI_ATTR_GET(ATTR_VPD_DRAM_RON, &i_target_mba, attr_eff_dram_ron); if(rc) return rc; + rc = FAPI_ATTR_GET(ATTR_VPD_DRAM_RTT_NOM, &i_target_mba, attr_eff_dram_rtt_nom); if(rc) return rc; + rc = FAPI_ATTR_GET(ATTR_VPD_DRAM_RTT_WR, &i_target_mba, attr_eff_dram_rtt_wr); if(rc) return rc; + rc = FAPI_ATTR_GET(ATTR_VPD_ODT_WR, &i_target_mba, attr_eff_odt_wr); if(rc) return rc; // Fetch impacted attributes rc = FAPI_ATTR_GET(ATTR_EFF_NUM_DROPS_PER_PORT, &i_target_mba, l_num_drops_per_port); if(rc) return rc; @@ -1734,9 +1735,9 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) l_dram_rtt_wr[l_port][l_dimm] = (l_lrdimm_mr12_u8array[l_port][l_dimm] & 0xC0) >> 6; // Pulled from SPD LR MR1,2 DRAM RTT_WR [7:6] if ( l_dram_ron[l_port][l_dimm] == 0 ) { - l_dram_ron[l_port][l_dimm] = fapi::ENUM_ATTR_EFF_DRAM_RON_OHM40; + l_dram_ron[l_port][l_dimm] = fapi::ENUM_ATTR_VPD_DRAM_RON_OHM40; } else if ( l_dram_ron[l_port][l_dimm] == 1 ) { - l_dram_ron[l_port][l_dimm] = fapi::ENUM_ATTR_EFF_DRAM_RON_OHM34; + l_dram_ron[l_port][l_dimm] = fapi::ENUM_ATTR_VPD_DRAM_RON_OHM34; } else { FAPI_ERR("Invalid SPD LR MR1,2 DRAM drv imp on %s!", i_target_mba.toEcmdString()); FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; @@ -1746,17 +1747,17 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) FAPI_INF("Set LRDIMM DRAM_RON to SPD LR MR1,2 DRAM drv imp"); switch (l_dram_rtt_nom[l_port][l_dimm]) { - case 0 : l_dram_rtt_nom[l_port][l_dimm] = fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE; + case 0 : l_dram_rtt_nom[l_port][l_dimm] = fapi::ENUM_ATTR_VPD_DRAM_RTT_NOM_DISABLE; break; - case 1 : l_dram_rtt_nom[l_port][l_dimm] = fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM60; + case 1 : l_dram_rtt_nom[l_port][l_dimm] = fapi::ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM60; break; - case 2 : l_dram_rtt_nom[l_port][l_dimm] = fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM120; + case 2 : l_dram_rtt_nom[l_port][l_dimm] = fapi::ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM120; break; - case 3 : l_dram_rtt_nom[l_port][l_dimm] = fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM40; + case 3 : l_dram_rtt_nom[l_port][l_dimm] = fapi::ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM40; break; - case 4 : l_dram_rtt_nom[l_port][l_dimm] = fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM20; + case 4 : l_dram_rtt_nom[l_port][l_dimm] = fapi::ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM20; break; - case 5 : l_dram_rtt_nom[l_port][l_dimm] = fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_OHM30; + case 5 : l_dram_rtt_nom[l_port][l_dimm] = fapi::ENUM_ATTR_VPD_DRAM_RTT_NOM_OHM30; break; default: FAPI_ERR("Invalid SPD LR MR1,2 DRAM RTT_NOM on %s!", i_target_mba.toEcmdString()); FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; @@ -1764,11 +1765,11 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) } switch (l_dram_rtt_wr[l_port][l_dimm]) { - case 0 : l_dram_rtt_wr[l_port][l_dimm] = fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE; + case 0 : l_dram_rtt_wr[l_port][l_dimm] = fapi::ENUM_ATTR_VPD_DRAM_RTT_WR_DISABLE; break; - case 1 : l_dram_rtt_wr[l_port][l_dimm] = fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_OHM60; + case 1 : l_dram_rtt_wr[l_port][l_dimm] = fapi::ENUM_ATTR_VPD_DRAM_RTT_WR_OHM60; break; - case 2 : l_dram_rtt_wr[l_port][l_dimm] = fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_OHM120; + case 2 : l_dram_rtt_wr[l_port][l_dimm] = fapi::ENUM_ATTR_VPD_DRAM_RTT_WR_OHM120; break; default: FAPI_ERR("Invalid SPD LR MR1,2 DRAM RTT_WR on %s!", i_target_mba.toEcmdString()); FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; @@ -1777,8 +1778,8 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) uint8_t l_rank; for ( l_rank = 0; l_rank < RANK_SIZE; l_rank++ ) { // clear RTT_NOM & RTT_WR - attr_eff_dram_rtt_nom[l_port][l_dimm][l_rank] = fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE; - attr_eff_dram_rtt_wr[l_port][l_dimm][l_rank] = fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE; + attr_eff_dram_rtt_nom[l_port][l_dimm][l_rank] = fapi::ENUM_ATTR_VPD_DRAM_RTT_NOM_DISABLE; + attr_eff_dram_rtt_wr[l_port][l_dimm][l_rank] = fapi::ENUM_ATTR_VPD_DRAM_RTT_WR_DISABLE; } if ( l_num_ranks_per_dimm_u8array[l_port][l_dimm] > 0 ) { // Set RTT_NOM Rank 0 for multi rank LRDIMM @@ -1812,10 +1813,10 @@ fapi::ReturnCode mss_lrdimm_term_atts(const Target& i_target_mba) } // end port loop // Set adjusted attributes - rc = FAPI_ATTR_SET(ATTR_EFF_DRAM_RON, &i_target_mba, attr_eff_dram_ron); if(rc) return rc; - rc = FAPI_ATTR_SET(ATTR_EFF_DRAM_RTT_NOM, &i_target_mba, attr_eff_dram_rtt_nom); if(rc) return rc; - rc = FAPI_ATTR_SET(ATTR_EFF_DRAM_RTT_WR, &i_target_mba, attr_eff_dram_rtt_wr); if(rc) return rc; - rc = FAPI_ATTR_SET(ATTR_EFF_ODT_WR, &i_target_mba, attr_eff_odt_wr); if(rc) return rc; + rc = FAPI_ATTR_SET(ATTR_VPD_DRAM_RON, &i_target_mba, attr_eff_dram_ron); if(rc) return rc; + rc = FAPI_ATTR_SET(ATTR_VPD_DRAM_RTT_NOM, &i_target_mba, attr_eff_dram_rtt_nom); if(rc) return rc; + rc = FAPI_ATTR_SET(ATTR_VPD_DRAM_RTT_WR, &i_target_mba, attr_eff_dram_rtt_wr); if(rc) return rc; + rc = FAPI_ATTR_SET(ATTR_VPD_ODT_WR, &i_target_mba, attr_eff_odt_wr); if(rc) return rc; rc = FAPI_ATTR_SET(ATTR_EFF_DIMM_RCD_CNTL_WORD_0_15, &i_target_mba, l_attr_eff_dimm_rcd_cntl_word_0_15); if(rc) return rc; diff --git a/src/usr/hwpf/hwp/dram_training/mss_termination_control.C b/src/usr/hwpf/hwp/dram_training/mss_termination_control.C index b2f6ce6cf..d9b179250 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_termination_control.C +++ b/src/usr/hwpf/hwp/dram_training/mss_termination_control.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_termination_control.C,v 1.22 2013/09/24 22:14:02 mwuu Exp $ +// $Id: mss_termination_control.C,v 1.23 2013/12/02 18:55:39 bellows Exp $ /* File is created by SARAVANAN SETHURAMAN on Thur 29 Sept 2011. */ //------------------------------------------------------------------------------ @@ -43,6 +43,7 @@ //------------------------------------------------------------------------------ // Version:| Author: | Date: | Comment: //---------|----------|---------|----------------------------------------------- +// 1.23 | bellows |02-Dec-13| VPD attribute update // 1.22 | mwuu |20-Sep-13| Updated ADR DDR3 slew calibration table for 1 setting, // 1066 20ohms, 4V/ns, changed from 11 to 10. // 1.21 | sasethur |16-Apr-13| Added DDR4 settings for rd_vref @@ -1466,63 +1467,63 @@ fapi::ReturnCode mss_slew_cal(const fapi::Target &i_target_mba) // slew_imp_val[SLEW_TYPE_DATA][IMP][j]); } // Get desired ADR control slew rate & impedance from attribute - rc = FAPI_ATTR_GET(ATTR_EFF_CEN_SLEW_RATE_CNTL, &i_target_mba, + rc = FAPI_ATTR_GET(ATTR_VPD_CEN_SLEW_RATE_CNTL, &i_target_mba, slew_imp_val[SLEW_TYPE_ADR_CNTL][SLEW]); if (rc) { - FAPI_ERR("Failed to get attribute: ATTR_EFF_CEN_SLEW_RATE_CNTL"); + FAPI_ERR("Failed to get attribute: ATTR_VPD_CEN_SLEW_RATE_CNTL"); return rc; } - rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_CNTL, &i_target_mba, + rc = FAPI_ATTR_GET(ATTR_VPD_CEN_DRV_IMP_CNTL, &i_target_mba, slew_imp_val[SLEW_TYPE_ADR_CNTL][IMP]); if (rc) { - FAPI_ERR("Failed to get attribute: ATTR_EFF_CEN_DRV_IMP_CNTL"); + FAPI_ERR("Failed to get attribute: ATTR_VPD_CEN_DRV_IMP_CNTL"); return rc; } // Get desired ADR command slew rate & impedance from attribute - rc = FAPI_ATTR_GET(ATTR_EFF_CEN_SLEW_RATE_ADDR, &i_target_mba, + rc = FAPI_ATTR_GET(ATTR_VPD_CEN_SLEW_RATE_ADDR, &i_target_mba, slew_imp_val[SLEW_TYPE_ADR_ADDR][SLEW]); if (rc) { - FAPI_ERR("Failed to get attribute: ATTR_EFF_CEN_SLEW_RATE_ADDR"); + FAPI_ERR("Failed to get attribute: ATTR_VPD_CEN_SLEW_RATE_ADDR"); return rc; } - rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_ADDR, &i_target_mba, + rc = FAPI_ATTR_GET(ATTR_VPD_CEN_DRV_IMP_ADDR, &i_target_mba, slew_imp_val[SLEW_TYPE_ADR_ADDR][IMP]); if (rc) { - FAPI_ERR("Failed to get attribute: ATTR_EFF_CEN_DRV_IMP_ADDR"); + FAPI_ERR("Failed to get attribute: ATTR_VPD_CEN_DRV_IMP_ADDR"); return rc; } // Get desired ADR clock slew rate & impedance from attribute - rc = FAPI_ATTR_GET(ATTR_EFF_CEN_SLEW_RATE_CLK, &i_target_mba, + rc = FAPI_ATTR_GET(ATTR_VPD_CEN_SLEW_RATE_CLK, &i_target_mba, slew_imp_val[SLEW_TYPE_ADR_CLK][SLEW]); if (rc) { - FAPI_ERR("Failed to get attribute: ATTR_EFF_CEN_SLEW_RATE_CLK"); + FAPI_ERR("Failed to get attribute: ATTR_VPD_CEN_SLEW_RATE_CLK"); return rc; } - rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_CLK, &i_target_mba, + rc = FAPI_ATTR_GET(ATTR_VPD_CEN_DRV_IMP_CLK, &i_target_mba, slew_imp_val[SLEW_TYPE_ADR_CLK][IMP]); if (rc) { - FAPI_ERR("Failed to get attribute: ATTR_EFF_CEN_DRV_IMP_CLK"); + FAPI_ERR("Failed to get attribute: ATTR_VPD_CEN_DRV_IMP_CLK"); return rc; } // Get desired ADR Spare clock slew rate & impedance from attribute - rc = FAPI_ATTR_GET(ATTR_EFF_CEN_SLEW_RATE_SPCKE, &i_target_mba, + rc = FAPI_ATTR_GET(ATTR_VPD_CEN_SLEW_RATE_SPCKE, &i_target_mba, slew_imp_val[SLEW_TYPE_ADR_SPCKE][SLEW]); if (rc) { - FAPI_ERR("Failed to get attribute: ATTR_EFF_CEN_SLEW_RATE_SPCKE"); + FAPI_ERR("Failed to get attribute: ATTR_VPD_CEN_SLEW_RATE_SPCKE"); return rc; } - rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_SPCKE, &i_target_mba, + rc = FAPI_ATTR_GET(ATTR_VPD_CEN_DRV_IMP_SPCKE, &i_target_mba, slew_imp_val[SLEW_TYPE_ADR_SPCKE][IMP]); if (rc) { - FAPI_ERR("Failed to get attribute: ATTR_EFF_CEN_DRV_IMP_SPCKE"); + FAPI_ERR("Failed to get attribute: ATTR_VPD_CEN_DRV_IMP_SPCKE"); return rc; } -- cgit v1.2.1