From 3bba9a3ff18b6991bba4247898f4c26fa944a676 Mon Sep 17 00:00:00 2001 From: Patrick Williams Date: Wed, 16 May 2012 12:51:22 -0500 Subject: Support for core_activate via IPI. RTC: 37009 Change-Id: I56669805c86d9659a20ad7c26e5e9860c7a248c7 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1087 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III --- src/usr/hwpf/hwp/core_activate/core_activate.C | 89 ++++++++++++++++++-------- 1 file changed, 63 insertions(+), 26 deletions(-) (limited to 'src/usr/hwpf/hwp/core_activate/core_activate.C') diff --git a/src/usr/hwpf/hwp/core_activate/core_activate.C b/src/usr/hwpf/hwp/core_activate/core_activate.C index c79e0a6d4..e4ecf4ba1 100644 --- a/src/usr/hwpf/hwp/core_activate/core_activate.C +++ b/src/usr/hwpf/hwp/core_activate/core_activate.C @@ -47,12 +47,16 @@ // targeting support #include +#include // fapi support #include #include +#include #include "core_activate.H" +#include +#include // Uncomment these files as they become available: // #include "host_activate_master/host_activate_master.H" @@ -64,7 +68,7 @@ namespace CORE_ACTIVATE using namespace TARGETING; using namespace fapi; - +using namespace ISTEP; // @@ -131,38 +135,71 @@ void call_host_activate_slave_cores( void *io_pArgs ) TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_host_activate_slave_cores entry" ); -#if 0 // @@@@@ CUSTOM BLOCK: @@@@@ - // figure out what targets we need - // customize any other inputs - // set up loops to go through all targets (if parallel, spin off a task) +#if 0 // @TODO: Enable when FSP supports attr sync and core state in HDAT + // Story 41245 - // dump physical path to targets - EntityPath l_path; - l_path = l_@targetN_target->getAttr(); - l_path.dump(); + uint64_t l_masterCoreID = task_getcpuid() & ~7; - // cast OUR type of target to a FAPI type of target. - const fapi::Target l_fapi_@targetN_target( - TARGET_TYPE_MEMBUF_CHIP, - reinterpret_cast - (const_cast(l_@targetN_target)) ); + TargetHandleList l_cores; + getAllChiplets(l_cores, TYPE_CORE); - // call the HWP with each fapi::Target - FAPI_INVOKE_HWP( l_errl, host_activate_slave_cores, _args_...); - if ( l_errl ) + for(TargetHandleList::const_iterator l_core = l_cores.begin(); + l_core != l_cores.end(); + ++l_core) { - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "ERROR : .........." ); - errlCommit( l_errl, HWPF_COMP_ID ); - } - else - { - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "SUCCESS : .........." ); + ConstTargetHandle_t l_processor = getParentChip(*l_core); + + CHIP_UNIT_ATTR l_coreId = + (*l_core)->getAttr(); + FABRIC_NODE_ID_ATTR l_logicalNodeId = + l_processor->getAttr(); + FABRIC_CHIP_ID_ATTR l_chipId = + l_processor->getAttr(); + + uint64_t pir = l_coreId << 3; + pir |= l_chipId << 7; + pir |= l_logicalNodeId << 10; + + if (pir != l_masterCoreID) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "call_host_activate_slave_cores: Waking %x", pir); + + int rc = cpu_start_core(pir); + + // We purposefully only create one error log here. The only + // failure from the kernel is a bad PIR, which means we have + // a pervasive attribute problem of some sort. Just log the + // first failing PIR. + if ((0 != rc) && (NULL == l_errl)) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "call_host_activate_slave_cores: Error from kernel" + " %d on core %x", + rc, pir); + /*@ + * @errortype + * @reasoncode ISTEP_BAD_RC + * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE + * @moduleid ISTEP_ACTIVATE_SLAVE_CORES + * @userdata1 PIR of failing core. + * @userdata2 rc of cpu_start_core(). + * + * @devdesc Kernel returned error when trying to activate core. + */ + l_errl = + new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, + ISTEP_ACTIVATE_SLAVE_CORES, + ISTEP_BAD_RC, + pir, + rc ); + } + } } - // @@@@@ END CUSTOM BLOCK: @@@@@ + #endif + // @@@@@ END CUSTOM BLOCK: @@@@@ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_host_activate_slave_cores exit" ); -- cgit v1.2.1