From 1bec07dc7fbaeef84385e18a775ac93d712fcb9d Mon Sep 17 00:00:00 2001 From: Thi Tran Date: Thu, 21 Nov 2013 15:27:26 -0600 Subject: INITPROC: Hostboot - SW234598 erepair and powerdown lanes fixes Change-Id: Iad37afac1fa372b9e804d437b86fc80ff8a9eeee CMVC-Coreq:907445 CQ:SW234598 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7381 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III --- src/usr/hwpf/hwp/bus_training/io_fir_isolation.C | 135 +++++++++--------- .../hwpf/hwp/bus_training/io_power_down_lanes.C | 25 ++-- src/usr/hwpf/hwp/bus_training/io_restore_erepair.C | 151 +++++---------------- 3 files changed, 115 insertions(+), 196 deletions(-) (limited to 'src/usr/hwpf/hwp/bus_training') diff --git a/src/usr/hwpf/hwp/bus_training/io_fir_isolation.C b/src/usr/hwpf/hwp/bus_training/io_fir_isolation.C index 1853b84be..5c19acaf2 100644 --- a/src/usr/hwpf/hwp/bus_training/io_fir_isolation.C +++ b/src/usr/hwpf/hwp/bus_training/io_fir_isolation.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: io_fir_isolation.C,v 1.9 2013/04/19 10:28:27 jaswamin Exp $ +// $Id: io_fir_isolation.C,v 1.11 2013/11/13 10:50:44 jaswamin Exp $ // *!*************************************************************************** // *! (C) Copyright International Business Machines Corp. 2012 , 2013 // *! All Rights Reserved -- Property of IBM @@ -52,8 +52,8 @@ #include #include "io_fir_isolation.H" -//#include "gcr_funcs.H" -//#include "io_clear_firs.H" +#include "gcr_funcs.H" + extern "C" { @@ -76,19 +76,20 @@ ReturnCode io_fir_too_many_bus_err_isolation(const fapi::Target &i_target, ReturnCode o_rc; ecmdDataBufferBase error_data(16); - uint32_t bitPos=0x0080; + //uint32_t bitPos=0x0080; o_rc=GCR_read(i_target , i_chip_interface, rx_fir_training_pg, i_current_group,0, error_data); if(o_rc) return o_rc; if(error_data.isBitSet(8,1)){ - error_data.setAnd(bitPos,0,16); + //error_data.setAnd(bitPos,0,16); ecmdDataBufferBase & BUS_ERROR_REG = error_data; //bit1 of the register represnts the spare deployed bit. const fapi::Target & CHIP_TARGET= i_target; FAPI_SET_HWP_ERROR(o_rc,IO_FIR_TOO_MANY_BUS_ERROR_RC); + fapiLogError(o_rc,FAPI_ERRL_SEV_UNRECOVERABLE); } - return(o_rc); + return(FAPI_RC_SUCCESS); } //! Function : io_fir_recal_error_isolation @@ -107,18 +108,19 @@ ReturnCode io_fir_recal_error_isolation(const fapi::Target &i_target, ReturnCode o_rc; ecmdDataBufferBase error_data(16); - uint32_t bitPos=0x1200; + //uint32_t bitPos=0x1200; o_rc=GCR_read(i_target , i_chip_interface, rx_fir_training_pg, i_current_group,0, error_data); if(o_rc) return o_rc; if(error_data.isBitSet(3,1) || error_data.isBitSet(6,1)){ //can be caused by dynamic repair or recal error (bits 3 and 6 respectively) - error_data.setAnd(bitPos,0,16); + //error_data.setAnd(bitPos,0,16); ecmdDataBufferBase & RECAL_ERROR_REG = error_data ; //bit1 of the register represnts the spare deployed bit. const fapi::Target & CHIP_TARGET= i_target; FAPI_SET_HWP_ERROR(o_rc,IO_FIR_RECALIBRATION_ERROR_RC); + fapiLogError(o_rc,FAPI_ERRL_SEV_RECOVERED); } - return(o_rc); + return(FAPI_RC_SUCCESS); // bilicon: This needs to be changed to "return(o_rc)" } //! Function : io_fir_max_spares_exceeded_isolation @@ -137,18 +139,19 @@ ReturnCode io_fir_max_spares_exceeded_isolation(const fapi::Target &i_target, ReturnCode o_rc; ecmdDataBufferBase error_data(16); - uint32_t bitPos=0x2680; + //uint32_t bitPos=0x2680; o_rc=GCR_read(i_target , i_chip_interface, rx_fir_training_pg, i_current_group,0, error_data); if(o_rc) return o_rc; if(error_data.isBitSet(2,1) || error_data.isBitSet(5,1)|| error_data.isBitSet(8,1)){ // can be caused by a static (pre training - bit 2) or dynamic (post training - bit 5) or recal(bit 8) - error_data.setAnd(bitPos,0,16); + //error_data.setAnd(bitPos,0,16); ecmdDataBufferBase & SPARE_ERROR_REG = error_data; //bit2 /bit 5 /bit 8of the register represents the max spare exceeded bit.To determine what caused the max spares exceeded error const fapi::Target & CHIP_TARGET= i_target; FAPI_SET_HWP_ERROR(o_rc,IO_FIR_MAX_SPARES_EXCEEDED_FIR_RC); + fapiLogError(o_rc,FAPI_ERRL_SEV_UNRECOVERABLE); } - return(o_rc); + return(FAPI_RC_SUCCESS); // bilicon: This needs to be changed to "return(o_rc)" } //! Function : io_fir_spare_deployed_isolation @@ -167,18 +170,19 @@ ReturnCode io_fir_spare_deployed_isolation(const fapi::Target &i_target, ReturnCode o_rc; ecmdDataBufferBase error_data(16); - uint32_t bitPos=0x6900; + //uint32_t bitPos=0x6900; o_rc=GCR_read(i_target , i_chip_interface, rx_fir_training_pg, i_current_group,0, error_data); if(o_rc) return o_rc; if(error_data.isBitSet(1,1) || error_data.isBitSet(4,1) || error_data.isBitSet(7,1)){ // can be caused by a spare deployment prior to training , post training or during recal - error_data.setAnd(bitPos,0,16); + //error_data.setAnd(bitPos,0,16); ecmdDataBufferBase & SPARE_ERROR_REG = error_data; //bit1 /bit4 / bit 7 of the register represnts the spare deployed bit. To determine which type of error caused the spare to be deployed const fapi::Target & CHIP_TARGET= i_target; FAPI_SET_HWP_ERROR(o_rc,IO_FIR_SPARES_DEPLOYED_FIR_RC); + fapiLogError(o_rc,FAPI_ERRL_SEV_RECOVERED); } - return(o_rc); + return(FAPI_RC_SUCCESS);// bilicon: This needs to be changed to "return(o_rc)" } //! Function : io_fir_tx_parity_isolation @@ -221,8 +225,7 @@ ReturnCode io_fir_tx_parity_isolation(const fapi::Target &i_target, else{ group=i_current_group; } - if(o_rc) - fapiLogError(o_rc); + o_rc=GCR_read(i_target , i_chip_interface, tx_fir_pl, group,loop_val, error_data); if(o_rc){ FAPI_ERR("io_fir_isolation: Error reading rx fir per lane register\n"); @@ -232,33 +235,32 @@ ReturnCode io_fir_tx_parity_isolation(const fapi::Target &i_target, if(error_data.isBitSet(0,1)){ // find the current lane and group to send information - if(o_rc) - fapiLogError(o_rc); + uint32_t & LANE_ID = loop_val; ecmdDataBufferBase & TX_ERROR_REG = error_data; const fapi::Target & CHIP_TARGET= i_target; FAPI_DBG("io_fir_rx_parity_isolation:A per lane register or state machine error has occured. Lane is %d\n",loop_val); FAPI_SET_HWP_ERROR(o_rc,IO_FIR_LANE_TX_PARITY_ERROR_RC); + fapiLogError(o_rc,FAPI_ERRL_SEV_RECOVERED); } } - if(o_rc) - fapiLogError(o_rc); + o_rc=GCR_read(i_target ,i_chip_interface, tx_fir_pg, i_current_group,0, error_data); if(o_rc) return o_rc; for(loop_val=0;loop_val<16;loop_val++){ if(error_data.isBitSet(loop_val,1)){ - if(o_rc) - fapiLogError(o_rc); + ecmdDataBufferBase & TX_ERROR_REG = error_data; const fapi::Target & CHIP_TARGET= i_target; FAPI_SET_HWP_ERROR(o_rc,IO_FIR_GROUP_TX_PARITY_ERROR_RC); + fapiLogError(o_rc,FAPI_ERRL_SEV_RECOVERED); } } - return(o_rc); + return(FAPI_RC_SUCCESS); } @@ -304,8 +306,7 @@ ReturnCode io_fir_rx_parity_isolation(const fapi::Target &i_target, else{ group=i_current_group; } - if(o_rc) - fapiLogError(o_rc); + o_rc=GCR_read(i_target , i_chip_interface, rx_fir_pl, group,loop_val, error_data); if(o_rc){ @@ -315,68 +316,64 @@ ReturnCode io_fir_rx_parity_isolation(const fapi::Target &i_target, //bit 0 for rx_fir_pl in case of X and bit 0 and 1 for A and DMI if(error_data.isBitSet(0,1) || error_data.isBitSet(1,1)){ - if(o_rc) - fapiLogError(o_rc); + // find the current lane and group to send information uint32_t & LANE_ID = loop_val; ecmdDataBufferBase & RX_ERROR_REG = error_data; const fapi::Target & CHIP_TARGET= i_target; FAPI_DBG("io_fir_rx_parity_isolation:A per lane register or state machine error has occured. Lane is %d\n",loop_val); FAPI_SET_HWP_ERROR(o_rc,IO_FIR_LANE_RX_PARITY_ERROR_RC); + fapiLogError(o_rc,FAPI_ERRL_SEV_RECOVERED); } } //for fir1_reg and fir2_reg it is group wise hence do not need lane information - if(o_rc) - fapiLogError(o_rc); + o_rc=GCR_read(i_target ,i_chip_interface, rx_fir1_pg, i_current_group,0, error_data); if(o_rc) return o_rc; for(loop_val=0;loop_val<16;loop_val++){ if(error_data.isBitSet(loop_val,1)){ - if(o_rc) - fapiLogError(o_rc); ecmdDataBufferBase & RX_ERROR_REG = error_data; const fapi::Target & CHIP_TARGET= i_target; FAPI_DBG("io_fir_isolation: %s\n",fir1_reg[loop_val]); FAPI_SET_HWP_ERROR(o_rc,IO_FIR_GROUP_RX_PARITY_ERROR_RC); + fapiLogError(o_rc,FAPI_ERRL_SEV_RECOVERED); + } } - if(o_rc) - fapiLogError(o_rc); + o_rc=GCR_read(i_target , i_chip_interface, rx_fir2_pg, i_current_group,0, error_data); if(o_rc) return o_rc; for(loop_val=0;loop_val<16;loop_val++){ if(error_data.isBitSet(loop_val,1)){ - if(o_rc) - fapiLogError(o_rc); ecmdDataBufferBase & RX_ERROR_REG = error_data; const fapi::Target & CHIP_TARGET= i_target; FAPI_DBG("io_fir_isolation: %s\n",fir2_reg[loop_val]); FAPI_SET_HWP_ERROR(o_rc,IO_FIR_GROUP_RX_PARITY_ERROR_RC); + fapiLogError(o_rc,FAPI_ERRL_SEV_RECOVERED); + } } - if(o_rc) - fapiLogError(o_rc); + o_rc=GCR_read(i_target,i_chip_interface,rx_fir_pb,i_current_group,0,error_data); if(o_rc) return o_rc; for(loop_val=0;loop_val<16;loop_val++){ if(error_data.isBitSet(loop_val,1)){ - if(o_rc) - fapiLogError(o_rc); ecmdDataBufferBase & RX_ERROR_REG = error_data; const fapi::Target & CHIP_TARGET= i_target; FAPI_SET_HWP_ERROR(o_rc,IO_FIR_BUS_RX_PARITY_ERROR_RC); + fapiLogError(o_rc,FAPI_ERRL_SEV_RECOVERED); } } - return(o_rc); + return(FAPI_RC_SUCCESS); } //! Function : io_error_isolation @@ -394,35 +391,34 @@ ReturnCode io_error_isolation(const fapi::Target &i_target, ecmdDataBufferBase &i_fir_data){ ReturnCode o_rc; - ecmdDataBufferBase error_data(16),id_data(16); + //ecmdDataBufferBase error_data(16),id_data(16); //need to determine what error it represents. //if it is a rx_parity error if(i_fir_data.isBitSet(RX_PARITY,1)){ - if(o_rc) - fapiLogError(o_rc); o_rc=io_fir_rx_parity_isolation(i_target,i_chip_interface,i_current_group); + if(o_rc) + return(o_rc); } //check for tx_parity error if(i_fir_data.isBitSet(TX_PARITY,1)){ - if(o_rc) - fapiLogError(o_rc); o_rc=io_fir_tx_parity_isolation(i_target,i_chip_interface,i_current_group); - + if(o_rc) + return(o_rc); } //GCR hang error if(i_fir_data.isBitSet(GCR_HANG_ERROR,1)){ //check whether the gcr hang error bit is set - if(o_rc) - fapiLogError(o_rc); + const fapi::Target & CHIP_TARGET= i_target; FAPI_SET_HWP_ERROR(o_rc,IO_FIR_GCR_HANG_ERROR_RC); + fapiLogError(o_rc,FAPI_ERRL_SEV_UNRECOVERABLE); //since the logging of error needs to happen here for this error. } @@ -433,11 +429,10 @@ ReturnCode io_error_isolation(const fapi::Target &i_target, i_fir_data.isBitSet(BUS2_SPARE_DEPLOYED,1) || i_fir_data.isBitSet(BUS3_SPARE_DEPLOYED,1) || i_fir_data.isBitSet(BUS4_SPARE_DEPLOYED,1) ){ - - if(o_rc) - fapiLogError(o_rc); - - o_rc=io_fir_spare_deployed_isolation(i_target,i_chip_interface,i_current_group); + + o_rc=io_fir_spare_deployed_isolation(i_target,i_chip_interface,i_current_group); + if(o_rc) + return(o_rc); } @@ -448,12 +443,10 @@ ReturnCode io_error_isolation(const fapi::Target &i_target, i_fir_data.isBitSet(BUS2_MAX_SPARES_EXCEEDED,1) || i_fir_data.isBitSet(BUS3_MAX_SPARES_EXCEEDED,1) || i_fir_data.isBitSet(BUS4_MAX_SPARES_EXCEEDED,1)){ - - if(o_rc) - fapiLogError(o_rc); - - o_rc=io_fir_max_spares_exceeded_isolation(i_target,i_chip_interface,i_current_group); - + + o_rc=io_fir_max_spares_exceeded_isolation(i_target,i_chip_interface,i_current_group); + if(o_rc) + return(o_rc); } @@ -463,11 +456,11 @@ ReturnCode io_error_isolation(const fapi::Target &i_target, i_fir_data.isBitSet(BUS2_RECALIBRATION_ERROR,1) || i_fir_data.isBitSet(BUS3_RECALIBRATION_ERROR,1) || i_fir_data.isBitSet(BUS4_RECALIBRATION_ERROR,1)){ + - if(o_rc) - fapiLogError(o_rc); - - o_rc=io_fir_recal_error_isolation(i_target,i_chip_interface,i_current_group); + o_rc=io_fir_recal_error_isolation(i_target,i_chip_interface,i_current_group); + if(o_rc) + return(o_rc); } @@ -477,15 +470,14 @@ ReturnCode io_error_isolation(const fapi::Target &i_target, i_fir_data.isBitSet(BUS2_TOO_MANY_BUS_ERRORS,1) || i_fir_data.isBitSet(BUS3_TOO_MANY_BUS_ERRORS,1) || i_fir_data.isBitSet(BUS4_TOO_MANY_BUS_ERRORS,1)){ - - if(o_rc) - fapiLogError(o_rc); - - o_rc=io_fir_too_many_bus_err_isolation(i_target,i_chip_interface,i_current_group); + + o_rc=io_fir_too_many_bus_err_isolation(i_target,i_chip_interface,i_current_group); + if(o_rc) + return(o_rc); } - return(o_rc); + return(FAPI_RC_SUCCESS); // Currently this does not cause any harm as you are returning all the errors in the middle of the function, but it is good to change this to "return(o_r)". } ReturnCode io_fir_isolation(const fapi::Target &i_target){ @@ -551,7 +543,8 @@ ReturnCode io_fir_isolation(const fapi::Target &i_target){ FAPI_ERR("Invalid io_clear_firs HWP invocation . Target doesnt belong to DMI/X/A instances"); FAPI_SET_HWP_ERROR(o_rc, IO_CLEAR_FIRS_INVALID_INVOCATION_RC); } - return(o_rc); //the last error needs to be logged in the wrapper code if there is one. + + return(o_rc); } diff --git a/src/usr/hwpf/hwp/bus_training/io_power_down_lanes.C b/src/usr/hwpf/hwp/bus_training/io_power_down_lanes.C index 0887ac866..3705e7b18 100644 --- a/src/usr/hwpf/hwp/bus_training/io_power_down_lanes.C +++ b/src/usr/hwpf/hwp/bus_training/io_power_down_lanes.C @@ -20,13 +20,13 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: io_power_down_lanes.C,v 1.7 2013/04/30 17:48:50 mjjones Exp $ +// $Id: io_power_down_lanes.C,v 1.10 2013/11/20 00:57:38 varkeykv Exp $ // *!*************************************************************************** // *! (C) Copyright International Business Machines Corp. 1997, 1998 // *! All Rights Reserved -- Property of IBM // *! *** IBM Confidential *** // *!*************************************************************************** -// *! FILENAME : io_read_erepair.C +// *! FILENAME : io_power_down_lanes.C // *! TITLE : // *! DESCRIPTION : Power down bad lanes // *! CONTEXT : @@ -39,7 +39,6 @@ //------------------------------------------------------------------------------ // Version:|Author: | Date: | Comment: // --------|--------|--------|-------------------------------------------------- -// 1.7 |mjjones |04/30/13| Removed unused variables // 1.0 |varkeykv||Initial check in //------------------------------------------------------------------------------ @@ -73,6 +72,7 @@ ReturnCode io_power_down_lanes(const Target& target,const std::vector & io_interface_t interface=CP_IOMC0_P0; // Since G uint32_t rc_ecmd=0; uint8_t clock_group=0; + uint8_t start_group=0; rc_ecmd=mask.flushTo1(); if(rc_ecmd) @@ -90,15 +90,19 @@ ReturnCode io_power_down_lanes(const Target& target,const std::vector & // Check which type of bus this is and do setup needed if(target.getType() == fapi::TARGET_TYPE_ABUS_ENDPOINT) { + start_group=0; interface=CP_FABRIC_A0; // base scom for A bus , assume translation to A1 by PLAT } else if(target.getType() == fapi::TARGET_TYPE_XBUS_ENDPOINT ) { + start_group=0; interface=CP_FABRIC_X0; // base scom for X bus } else if(target.getType() == fapi::TARGET_TYPE_MCS_CHIPLET){ + start_group=3; interface=CP_IOMC0_P0; // base scom for MC bus } else if(target.getType() == fapi::TARGET_TYPE_MEMBUF_CHIP){ + start_group=0; interface=CEN_DMI; // base scom Centaur chip } else{ @@ -118,26 +122,27 @@ ReturnCode io_power_down_lanes(const Target& target,const std::vector & return(rc); } - rc = GCR_read( target, interface,tx_mode_pg, clock_group, 0, mode_reg); + rc = GCR_read( target, interface,tx_mode_pg, start_group, 0, mode_reg); if(rc){return rc;} if(mode_reg.isBitSet(5)){ - FAPI_DBG("TX MSB-LSB SWAP MODE ON on this target \n",tx_end_lane_id); + FAPI_DBG("TX MSB-LSB SWAP MODE ON on this target %d \n",tx_end_lane_id); msbswap=true; } //TX Lanes power down for(uint8_t i=0;i(xbus_lanes_per_group-1)){ lane=lane-xbus_lanes_per_group; clock_group++; } } else{ + clock_group=start_group; // MSBLSB SWAP condition can be there in MC or A if(msbswap){ // We can read out tx_end_lane_id now for swap correction @@ -154,23 +159,25 @@ ReturnCode io_power_down_lanes(const Target& target,const std::vector & lane=end_lane-tx_lanes[i]; // GFW VPD does not know about MSBSWAP , this adjusts for swapping } } - //Power down this lane + //Power down this lane rc = GCR_write( target, interface, tx_mode_pl, clock_group, lane, data,mask ); if(rc){return rc;} - } // Process RX lane powerdown for(uint8_t i=0;i(xbus_lanes_per_group-1)){ lane=lane-xbus_lanes_per_group; clock_group++; } } + else{ + clock_group=start_group; + } //Power down this lane rc = GCR_write( target, interface, rx_mode_pl, clock_group, lane, data,mask ); if(rc){return rc;} diff --git a/src/usr/hwpf/hwp/bus_training/io_restore_erepair.C b/src/usr/hwpf/hwp/bus_training/io_restore_erepair.C index 42d327273..683214eb5 100644 --- a/src/usr/hwpf/hwp/bus_training/io_restore_erepair.C +++ b/src/usr/hwpf/hwp/bus_training/io_restore_erepair.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: io_restore_erepair.C,v 1.15 2013/08/06 14:15:48 varkeykv Exp $ +// $Id: io_restore_erepair.C,v 1.16 2013/11/14 08:50:21 varkeykv Exp $ // *!*************************************************************************** // *! (C) Copyright International Business Machines Corp. 1997, 1998 // *! All Rights Reserved -- Property of IBM @@ -45,14 +45,15 @@ #include #include "io_restore_erepair.H" #include "gcr_funcs.H" +#include "io_power_down_lanes.H" #include extern "C" { using namespace fapi; - - + + //! Read repair values from VPD into the HW /* This function will perform erepair for one IO type target -- eithe MCS or XBUS or ABUS @@ -65,14 +66,11 @@ ReturnCode io_restore_erepair(const Target& target,std::vector &tx_lane { ReturnCode rc; ecmdDataBufferBase data_one(16); - ecmdDataBufferBase data_two(16); - ecmdDataBufferBase data_one1(16); - ecmdDataBufferBase data_two2(16); + ecmdDataBufferBase data_two(16); ecmdDataBufferBase mode_reg(16); ecmdDataBufferBase mask(16); - bool msbswap=false; - uint8_t lane=0; - uint8_t end_lane=0; + uint8_t lane=0; + bool lane_valid=false; io_interface_t interface=CP_IOMC0_P0; // Since G uint32_t rc_ecmd=0; @@ -132,86 +130,6 @@ ReturnCode io_restore_erepair(const Target& target,std::vector &tx_lane FAPI_INF("Restoring erepair data \n"); for(uint8_t clock_group=start_group;clock_group<=end_group;++clock_group){ - //Collect the TX bad lanes into a single buffer - rc_ecmd|=data_one.flushTo0(); - rc_ecmd|=data_two.flushTo0(); - - // Read in values for RMW - rc = GCR_read( target,interface,tx_lane_disabled_vec_0_15_pg, clock_group, 0, data_one); - if(rc){return rc;} - rc = GCR_read( target,interface,tx_lane_disabled_vec_16_31_pg, clock_group, 0, data_two); - if(rc){return rc;} - - - - if(rc_ecmd) - { - rc.setEcmdError(rc_ecmd); - return(rc); - } - rc = GCR_read( target, interface,tx_mode_pg, clock_group, 0, mode_reg); - if(rc){return rc;} - - if(mode_reg.isBitSet(5)){ - FAPI_DBG("TX MSB-LSB SWAP MODE ON on this target \n"); - msbswap=true; - } - if(msbswap){ - // We can read out tx_end_lane_id now for swap correction - rc = GCR_read( target, interface,tx_id3_pg, clock_group, 0, mode_reg); - if(rc){return rc;} - rc_ecmd=mode_reg.extract(&end_lane,9,7); - if(rc_ecmd) - { - rc.setEcmdError(rc_ecmd); - return(rc); - } - end_lane=end_lane>>1;// move left aligned extract by 1 - FAPI_DBG("END lane id is %d\n",end_lane); - } - - for(uint8_t i=0;i19 && tx_lanes[i]<40)){ - lane=tx_lanes[i]-20; - } - else if(clock_group==2 && (tx_lanes[i]>39 && tx_lanes[i]<60)){ - lane=tx_lanes[i]-40; - } - else if(clock_group==3 && (tx_lanes[i]>59 && tx_lanes[i]<80) ){ - lane=tx_lanes[i]-60; - } - } - else{ - lane=tx_lanes[i]; - } - } - if (lane < 16) { - data_one.setBit(lane); - } - else { - data_two.setBit(lane-16); - } - } - //Now write the bad lanes on TX side on this target - FAPI_DBG("#2 Corrected TX lane is %d\n",lane); - - rc = GCR_write( target, interface, tx_lane_disabled_vec_0_15_pg, clock_group, 0, data_one,mask ); - if(rc){return rc;} - rc = GCR_write( target, interface, tx_lane_disabled_vec_16_31_pg, clock_group, 0, data_two,mask); - if(rc){return rc;} - - rc_ecmd|=data_one.flushTo0(); rc_ecmd|=data_two.flushTo0(); @@ -223,15 +141,10 @@ ReturnCode io_restore_erepair(const Target& target,std::vector &tx_lane // Read in original data - rc = GCR_read( target,interface,rx_lane_disabled_vec_0_15_pg, clock_group, 0, data_one); - if(rc){return rc;} - rc = GCR_read( target,interface,rx_lane_disabled_vec_16_31_pg, clock_group, 0, data_two); - if(rc){return rc;} - // Read in values for RMW - rc = GCR_read( target,interface,rx_lane_bad_vec_0_15_pg, clock_group, 0, data_one1); + rc = GCR_read( target,interface,rx_lane_bad_vec_0_15_pg, clock_group, 0, data_one); if(rc){return rc;} - rc = GCR_read( target,interface,rx_lane_bad_vec_16_31_pg, clock_group, 0, data_two2); + rc = GCR_read( target,interface,rx_lane_bad_vec_16_31_pg, clock_group, 0, data_two); if(rc){return rc;} // RX lane records @@ -241,45 +154,51 @@ ReturnCode io_restore_erepair(const Target& target,std::vector &tx_lane if(interface==CP_FABRIC_X0){ if(clock_group==0 && rx_lanes[i]<20){ lane=rx_lanes[i]; + lane_valid=true; } else if(clock_group==1 && (rx_lanes[i]>19 && rx_lanes[i]<40)){ lane=rx_lanes[i]-20; + lane_valid=true; } else if(clock_group==2 && (rx_lanes[i]>39 && rx_lanes[i]<60)){ lane=rx_lanes[i]-40; + lane_valid=true; } else if(clock_group==3 && (rx_lanes[i]>59 && rx_lanes[i]<80) ){ lane=rx_lanes[i]-60; + lane_valid=true; + } + else{ + lane_valid=false; } } else{ lane=rx_lanes[i]; + lane_valid=true; } - if (lane < 16) { - data_one.setBit(lane); - data_one1.setBit(lane); + if (lane < 16 && lane_valid) { + data_one.setBit(lane); } - else { - data_two.setBit(lane-16); - data_two2.setBit(lane-16); + else if(lane>=16 && lane_valid) { + data_two.setBit(lane-16); } } FAPI_DBG("#2 Corrected RX lane is %d\n",lane); - //Now write the bad lanes in one shot on the slave side RX - rc = GCR_write( target, interface, rx_lane_disabled_vec_0_15_pg, clock_group, 0, data_one,mask ); - if(rc){return rc;} - rc = GCR_write( target, interface, rx_lane_disabled_vec_16_31_pg, clock_group, 0, data_two,mask); - if(rc){return rc;} - //Now write the bad lanes in one shot on the slave side RX - rc = GCR_write( target, interface, rx_lane_bad_vec_0_15_pg, clock_group, 0, data_one1,mask ); - if(rc){return rc;} - rc = GCR_write( target, interface, rx_lane_bad_vec_16_31_pg, clock_group, 0, data_two2,mask); - if(rc){return rc;} - - - } + //Now write the bad lanes in one shot on the slave side RX + if(!data_one.isBitClear(0,16)){ + rc = GCR_write( target, interface, rx_lane_bad_vec_0_15_pg, clock_group, 0, data_one,mask ); + if(rc){return rc;} + } + if(!data_two.isBitClear(0,16)){ + //Now write the bad lanes in one shot on the slave side RX + rc = GCR_write( target, interface, rx_lane_bad_vec_16_31_pg, clock_group, 0, data_two,mask); + if(rc){return rc;} + } + } + FAPI_EXEC_HWP(rc, io_power_down_lanes,target,tx_lanes,rx_lanes); return rc; -} +} + } //end extern C -- cgit v1.2.1