From 24677286a33ea478fd5c2db959e894dd3a5f0e85 Mon Sep 17 00:00:00 2001 From: Patrick Williams Date: Wed, 10 Apr 2013 22:46:44 -0500 Subject: HWP hacks for unused variables. Change-Id: Iaa5d80be87e3f5753750325479ecbf3c946f719a Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4041 Reviewed-by: MIKE J. JONES Tested-by: Jenkins Server Reviewed-by: Brian H. Horton Reviewed-by: Zane Shelley Reviewed-by: A. Patrick Williams III --- .../p8_set_pore_bar/p8_pfet_init.C | 38 ++-- .../p8_set_pore_bar/p8_poreslw_init.C | 44 ++-- .../p8_slw_build/p8_image_help.C | 246 ++++++++++----------- .../p8_slw_build/p8_pore_table_gen_api.C | 78 +++---- 4 files changed, 203 insertions(+), 203 deletions(-) (limited to 'src/usr/hwpf/hwp/build_winkle_images') diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init.C b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init.C index a3eeb412d..20ef82d5b 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init.C @@ -30,7 +30,7 @@ // *! OWNER NAME: Greg Still Email: stillgs@us.ibm.com // *! /// \file p8_pfet_init.C -/// \brief Configure and initialize the EX PFET controllers based on +/// \brief Configure and initialize the EX PFET controllers based on /// attribute information and removes the override function. /// /// High-level procedure flow: @@ -39,9 +39,9 @@ /// Check for valid parameters /// if PM_CONFIG { /// Nop (all the work is done in PM_INIT as this procedure is not run -/// for the PM Reset path (eg, only done at IPL) +/// for the PM Reset path (eg, only done at IPL) /// else if PM_INIT { -/// Get the delay setting held in platform attributes +/// Get the delay setting held in platform attributes /// Convert these to hardware values /// for each EX chiplet { /// Store the Core VDD delay and VRET/VOFF values @@ -149,7 +149,7 @@ p8_pfet_init(const Target& i_target, uint32_t mode) /// ------------------------------- /// Unsupported Mode - else + else { FAPI_ERR("Unknown mode passed to p8_pfet_init. Mode %x ....", mode); @@ -173,10 +173,10 @@ pfet_init(const Target& i_target) std::vector l_exChiplets; uint8_t l_functional = 0; uint8_t l_ex_number = 0; - bool error_flag = false; - + bool __attribute__((unused)) error_flag = false; // HACK + uint64_t address; - + uint8_t core_vret_voff_value; uint8_t eco_vret_voff_value; @@ -214,7 +214,7 @@ pfet_init(const Target& i_target) /// ATTR_PM_PFET_POWERUP_ECO_DELAY0 /// ATTR_PM_PFET_POWERUP_ECO_DELAY1 /// ATTR_PM_PFET_POWERDOWN_CORE_DELAY0 - /// ATTR_PM_PFET_POWERDOWN_CORE_DELAY1 + /// ATTR_PM_PFET_POWERDOWN_CORE_DELAY1 /// ATTR_PM_PFET_POWERDOWN_ECO_DELAY0 /// ATTR_PM_PFET_POWERDOWN_ECO_DELAY1 /// Output feature attributes @@ -235,11 +235,11 @@ pfet_init(const Target& i_target) { FAPI_INF("Executing pfet_config..."); - + // Harcoded defaults that don't come via attribute // Vret (not supported) = "off" (stage 0 = 0xB) for bits 0:3 // Voff = "off" (stage 01 = 0xB) for bits 4:7 - // \todo The scan0 values are zeros which indicate that the + // \todo The scan0 values are zeros which indicate that the // power won't go off. Double check the setting below!!! core_vret_voff_value = 0xBB; eco_vret_voff_value = 0xBB; @@ -269,7 +269,7 @@ pfet_init(const Target& i_target) // FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PFET_GET_ATTR); break; } - + /// ---------------------------------------------------------- l_rc = FAPI_ATTR_GET( ATTR_PM_PFET_POWERUP_CORE_DELAY0, &i_target, @@ -422,9 +422,9 @@ pfet_init(const Target& i_target) attr_pm_pfet_powerdown_eco_delay1_value = convert_delay_to_value( attr_pm_pfet_powerdown_eco_delay1 , attr_proc_refclk_frequency); - + // Choosing always delay0 - attr_pm_pfet_powerup_core_sequence_delay_select = 0; + attr_pm_pfet_powerup_core_sequence_delay_select = 0; attr_pm_pfet_powerdown_core_sequence_delay_select = 0; attr_pm_pfet_powerup_eco_sequence_delay_select = 0; attr_pm_pfet_powerdown_eco_sequence_delay_select = 0; @@ -449,8 +449,8 @@ pfet_init(const Target& i_target) // Loop through all the functional chiplets // ****************************************************************** - l_rc = fapiGetChildChiplets(i_target, - TARGET_TYPE_EX_CHIPLET, + l_rc = fapiGetChildChiplets(i_target, + TARGET_TYPE_EX_CHIPLET, l_exChiplets, TARGET_STATE_PRESENT); if (l_rc) @@ -575,7 +575,7 @@ pfet_init(const Target& i_target) // ------------------------------------------------------------- FAPI_DBG("\tSetting ECO Voff Settings"); e_rc |= data.setBitLength(64); - e_rc |= data.insertFromRight(eco_vret_voff_value, 0, 8); + e_rc |= data.insertFromRight(eco_vret_voff_value, 0, 8); if (e_rc) { FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); @@ -650,12 +650,12 @@ pfet_set_delay( const fapi::Target& i_target, // convert_delay_to_value // Helper function to convert time values (binary in ns)to hardware delays //------------------------------------------------------------------------------ -uint8_t -convert_delay_to_value (uint32_t i_delay, +uint8_t +convert_delay_to_value (uint32_t i_delay, uint32_t i_attr_proc_nest_frequency) { uint8_t pfet_delay_value; - float dly; + float dly; // attr_proc_nest_frequency [MHz] // delay [ns] // pfet_delay_value = 15 - log2( i_delay * i_attr_proc_nest_frequency/1000); diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C index 806c7d475..7f0cb94e6 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C @@ -190,7 +190,7 @@ poreslw_init(const Target& i_target) FAPI_ERR("Scom error writing PMC_MODE"); break; } - + FAPI_DBG("Activate the PMC Idle seequencer by making sure the Halt bit is clear"); // Setup up each of the EX chiplets @@ -330,8 +330,8 @@ poreslw_ex_setup(const Target& i_target) uint8_t l_functional = 0; uint8_t l_ex_number = 0; uint64_t address; - bool core_flag = false; - bool error_flag = false; + bool __attribute__((unused)) core_flag = false; // HACK + bool __attribute__((unused)) error_flag = false; // HACK //@thi - fixed compiler error - Greg will fix this in next version //uint32_t fsierror = 0; @@ -349,7 +349,7 @@ poreslw_ex_setup(const Target& i_target) const uint32_t PM_SLEEP_POWER_OFF_SEL_BIT = 2; const uint32_t PM_WINKLE_POWER_DOWN_EN_BIT = 3; const uint32_t PM_WINKLE_POWER_UP_EN_BIT = 4; - const uint32_t PM_WINKLE_POWER_OFF_SEL_BIT = 5; + const uint32_t PM_WINKLE_POWER_OFF_SEL_BIT = 5; //@thi - fixed compiler error - Greg will fix this in next version //const uint32_t IDLE_STATE_OVERRIDE_EN = 6; @@ -517,7 +517,7 @@ poreslw_ex_setup(const Target& i_target) // If sleep entry = 1 (hardware), sleep power down enable = 1 // else sleep entry = 0 (assisted), sleep power down enable = 0 if (pm_sleep_entry) - { + { e_rc |= set_data.setBit(PM_SLEEP_POWER_DOWN_EN_BIT); } else @@ -552,7 +552,7 @@ poreslw_ex_setup(const Target& i_target) // else winkle entry = 0 (assisted), winkle power down enable = 0 if (pm_winkle_entry) { - e_rc |= set_data.setBit(PM_WINKLE_POWER_DOWN_EN_BIT); + e_rc |= set_data.setBit(PM_WINKLE_POWER_DOWN_EN_BIT); } else { @@ -563,7 +563,7 @@ poreslw_ex_setup(const Target& i_target) // else winkle exit = 0 (assisted), winkle power up enable = 0 if (pm_winkle_exit) { - e_rc |= set_data.setBit(PM_WINKLE_POWER_UP_EN_BIT); + e_rc |= set_data.setBit(PM_WINKLE_POWER_UP_EN_BIT); } else { @@ -637,16 +637,16 @@ poreslw_ex_setup(const Target& i_target) // -------------------------------------- // Check if SBE code has already cleared the OHA override. // As chiplets may be enabled but offline (eg in Winkle) - // treat SCOM errors as off-line (eg skip it). If online - // and set, clear the override. - + // treat SCOM errors as off-line (eg skip it). If online + // and set, clear the override. + /* GSS: removed as Cronus always puts a message out of (PCB_OFFLINE) even though this code is meant to handle it. As this messge can cause confusion in the lab, the check is being removed. - bool oha_accessible = true; + bool oha_accessible = true; l_rc = fapiGetScom(l_exChiplets[j], EX_OHA_MODE_REG_RWx1002000D, data); if(!l_rc.ok()) - { + { l_rc = fapiGetCfamRegister( i_target, CFAM_FSI_STATUS_0x00001007, data ); if(!l_rc.ok()) { @@ -655,14 +655,14 @@ poreslw_ex_setup(const Target& i_target) } FAPI_INF( "CFAM_FSI_STATUS_0x00001007: 0x%X", data.getWord(0)); e_rc |= data.extractToRight( &fsierror, 17, 3 ); - if ( e_rc ) - { - l_rc.setEcmdError(e_rc); + if ( e_rc ) + { + l_rc.setEcmdError(e_rc); break; } - if (fsierror == PIB_OFFLINE_ERROR) + if (fsierror == PIB_OFFLINE_ERROR) { - FAPI_INF( "Chiplet offline error detected. Skipping OHA Override clearing"); + FAPI_INF( "Chiplet offline error detected. Skipping OHA Override clearing"); oha_accessible = false; } else @@ -695,8 +695,8 @@ poreslw_ex_setup(const Target& i_target) } } End of check removal - */ - + */ + // -------------------------------------- // Check that PM function is enabled (eg not disabled). // If not, remove the disable @@ -708,10 +708,10 @@ poreslw_ex_setup(const Target& i_target) FAPI_ERR("Scom error reading PMGP0"); break; } - + if (data.isBitSet(PM_DISABLE)) { - + // Activate the PCBS-PM macro by clearing the PM_DISABLE bit FAPI_INF("\tActivate the PCBS-PM for EX %x", l_ex_number); @@ -742,7 +742,7 @@ poreslw_ex_setup(const Target& i_target) FAPI_ERR("Scom error clearing EX_OCC_SPWKUP"); break; } - + if (data.isBitSet(0)) { FAPI_INF("\tClear OCC Special Wake-up for EX %x", l_ex_number); diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C index e24b52f1d..8ad158544 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C @@ -54,8 +54,8 @@ extern "C" { // i_alter - altered (desired) ring state // o_delta - ring delta state, caller allocates buffer // i_ringLen - length of ring in bits -int calc_ring_delta_state( const uint32_t *i_init, - const uint32_t *i_alter, +int calc_ring_delta_state( const uint32_t *i_init, + const uint32_t *i_alter, uint32_t *o_delta, const uint32_t i_ringLen ) { @@ -102,7 +102,7 @@ int calc_ring_delta_state( const uint32_t *i_init, alter = alter & mask; remainingBits = 0; } - + // Do the XORing. o_delta[i] = init ^ alter; } @@ -130,7 +130,7 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s uint32_t rc=0; uint32_t i=0; uint32_t scanSelectAddr=0; - uint32_t scanRing_baseAddr=0, scanRing_baseAddr_long=0; + uint32_t scanRing_baseAddr=0, __attribute__((unused)) scanRing_baseAddr_long=0; // HACK uint32_t scanRing_poreAddr=0; uint32_t scanRingCheckWord=0; uint32_t bitShift=0; @@ -143,28 +143,28 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s PoreInlineContext ctx; maxWfInlineLenInWords = *o_wfInlineLenInWords; - + pore_inline_context_create(&ctx, *o_wfInline, maxWfInlineLenInWords * 4, 0, 0); - + // // Set Default scanselq addr and scanring addr vars // // 0x00030007: port 3 - clock cotrol endpt, x07- scanselq (regin & types) - scanSelectAddr = P8_PORE_CLOCK_CONTROLLER_REG; - + scanSelectAddr = P8_PORE_CLOCK_CONTROLLER_REG; + // Addr of clock control SCOM register(s) for short and long rotates. // // Short: 0x00038000: port 3, addr bit 16 must be set to 1 and bit 19 to 0. - scanRing_baseAddr = P8_PORE_SHIFT_REG; + scanRing_baseAddr = P8_PORE_SHIFT_REG; scanRing_poreAddr = scanRing_baseAddr; // Long (poll): 0x00039000: port 3, addr bit 16 must be set to 1 and bit 19 to 1. scanRing_baseAddr_long = P8_PORE_SHIFT_REG | 0x00001000; - + // Header check word for checking ring write was successful scanRingCheckWord = P8_SCAN_CHECK_WORD; - - // This fix is a direct copy of the setp1_mcreadand macro in ./ipl/sbe/p8_slw.H + + // This fix is a direct copy of the setp1_mcreadand macro in ./ipl/sbe/p8_slw.H uint64_t CLEAR_MC_TYPE_MASK=0x47; PoreInlineLocation src1=0, src2=0, tgt1=0, tgt2=0; pore_MR( &ctx, D1, P0); @@ -194,7 +194,7 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s MY_ERR("***inline_branch_fixup error (2) rc = %d", ctx.error); return ctx.error; } - + // We can assume that atomic lock is already in effect prior to WF calls. // It can probably also be assumed that functional clocks are stopped, but // let's do it and check for it anyway. @@ -237,7 +237,7 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s MY_ERR("***STI(1) rc = %d", ctx.error); return ctx.error; } - + // Check how many 32-bit shift ops are needed and if we need final shift of remaining bit. count = i_ringBitLen/32; remainder = i_ringBitLen%32; @@ -250,13 +250,13 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s // CMO: I changed the following to not skip the first 32-bit. //remainingBits = i_ringBitLen-32; //Yong impl. remainingBits = i_ringBitLen; //Mike impl. - + MY_DBG("count=%i rem=%i remBits=%i",count,remainder,remainingBits); - // Read and compare init and flush values 32 bits at a time. Store delta in + // Read and compare init and flush values 32 bits at a time. Store delta in // o_delta buffer. for (i=0; i 0) { @@ -280,12 +280,12 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s #ifdef IMGBUILD_PPD_WF_POLLING_PROT uint32_t nwait1=0; PoreInlineLocation srcp1=0,tgtp1=0; - + pore_imm64b = uint64_t(rotateLen)<<32; // pore_LI(&ctx, D0, pore_imm64b); // pore_STD(&ctx, D0, scanRing_baseAddr_long, P0); pore_STI(&ctx, scanRing_baseAddr_long, P0, pore_imm64b); - + nwait1 = rotateLen / 20 + 1; // 20x over sampling. PORE_LOCATION(&ctx, tgtp1); pore_WAITS(&ctx, nwait1); @@ -305,7 +305,7 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s if (ctx.error > 0) { MY_ERR("***LD D0 rc = %d", ctx.error); return ctx.error; - } + } #endif } // End of if (rotateLen>0) @@ -336,7 +336,7 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s pore_LI(&ctx, D0, pore_imm64b ); // Cleanup shift register snapshot and put in D1. pore_AND(&ctx, D1, D0, D1); - // Put ring data in D0. + // Put ring data in D0. // Note, any dirty content was removed earlier. pore_imm64b = ((uint64_t)myRev32(i_deltaRing[i])) << 32; pore_LI(&ctx, D0, pore_imm64b ); @@ -346,7 +346,7 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s } else { pore_LD(&ctx, D1, scanRing_baseAddr, P1); - // Bring ring data in as an immediate. + // Bring ring data in as an immediate. // Note, any dirty content was removed earlier. pore_imm64b = ((uint64_t)myRev32(i_deltaRing[i])) << 32; pore_XORI(&ctx, D0, D1, pore_imm64b); @@ -387,12 +387,12 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s rotateLen = rotateLen + 32; else rotateLen = rotateLen + remainingBits; - + #ifdef IMGBUILD_PPD_WF_POLLING_PROT uint32_t nwait2=0; PoreInlineLocation srcp2=0,tgtp2=0; - - // Max rotate length is 2^20-1, i.e., data BITS(12-31)=>0x000FFFFF + + // Max rotate length is 2^20-1, i.e., data BITS(12-31)=>0x000FFFFF if (rotateLen>=SCAN_MAX_ROTATE_LONG) { MY_INF("Scanning should never be here since max possible ring length is\n"); MY_INF("480,000 bits but MAX_LONG_ROTATE=0x%0x and rotateLen=0x%0x\n", @@ -438,19 +438,19 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s remainingBits = 0; } // End of for loop - + // If the scan ring has not been rotated to the original position // shift the ring by remaining shift bit length. if (rotateLen>0) { #ifdef IMGBUILD_PPD_WF_POLLING_PROT uint32_t nwait3=0; PoreInlineLocation srcp3=0,tgtp3=0; - + pore_imm64b = uint64_t(rotateLen)<<32; // pore_LI(&ctx, D0, pore_imm64b); // pore_STD(&ctx, D0, scanRing_baseAddr_long, P0); pore_STI(&ctx, scanRing_baseAddr_long, P0, pore_imm64b); - + nwait3 = rotateLen / 20 + 1; // 20x over sampling. PORE_LOCATION(&ctx, tgtp3); pore_WAITS(&ctx, nwait3); @@ -494,8 +494,8 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s pore_MR( &ctx, D1, P0); pore_ANDI( &ctx, D1, D1, CLEAR_MC_TYPE_MASK); pore_ORI( &ctx, D1, D1, BIT(60)); - pore_MR( &ctx, P1, D1); - if (ctx.error > 0) { + pore_MR( &ctx, P1, D1); + if (ctx.error > 0) { MY_ERR("***setp1_mcreadand rc = %d", ctx.error); return ctx.error; } @@ -596,7 +596,7 @@ int get_ring_layout_from_image( const void *i_imageIn, uint32_t sizeInitf; SbeXipSection hostSection; void *initfHostAddress0; - + SBE_XIP_ERROR_STRINGS(errorStrings); // Always first get the .initf stats from the TOC: @@ -614,7 +614,7 @@ int get_ring_layout_from_image( const void *i_imageIn, MY_INF("INFO : No ring data exists for the section ID = SBE_XIP_SECTION_RINGS (ID=%i).",SBE_XIP_SECTION_RINGS); return DSLWB_RING_SEARCH_NO_MATCH; // Implies exhaust search as well. } - initfHostAddress0 = (void*)((uintptr_t)i_imageIn + hostSection.iv_offset); + initfHostAddress0 = (void*)((uintptr_t)i_imageIn + hostSection.iv_offset); sizeInitf = hostSection.iv_size; // On first call, get the base offset to the .initf section. @@ -625,16 +625,16 @@ int get_ring_layout_from_image( const void *i_imageIn, else nextRingLayout = (DeltaRingLayout*)*nextRing; - MY_DBG("initfHostAddress0 = 0x%016llx",(uint64_t)initfHostAddress0); + MY_DBG("initfHostAddress0 = 0x%016llx",(uint64_t)initfHostAddress0); MY_DBG("sizeInitf = %i", sizeInitf); MY_DBG("nextRingLayout = 0x%016llx",(uint64_t)nextRingLayout); - + // Populate the output RS4 ring BE layout structure as well as local structure in host LE format where needed. // Note! Entire memory content is in BE format. So we do LE conversions where needed. // bRingFound = 0; bRingEOS = 0; - + // SEARCH loop: Parse ring blocks successively until we find a ring that matches: // ddLevel == i_ddLevel // sysPhase == i_sysPhase @@ -647,7 +647,7 @@ int get_ring_layout_from_image( const void *i_imageIn, MY_DBG("Next override = %i",thisRingLayout->override); MY_DBG("Next reserved1 = %i",thisRingLayout->reserved1); MY_DBG("Next reserved2 = %i",thisRingLayout->reserved2); - + if (myRev32(thisRingLayout->ddLevel)==i_ddLevel) { // Is there a non-specific DD level, like for sys phase? if ((thisRingLayout->sysPhase==0 && i_sysPhase==0) || (thisRingLayout->sysPhase==1 && i_sysPhase==1) || @@ -663,7 +663,7 @@ int get_ring_layout_from_image( const void *i_imageIn, *nextRing = NULL; MY_DBG("\tRing search exhausted!"); } - + } // End of SEARCH. if (bRingFound) { @@ -671,7 +671,7 @@ int get_ring_layout_from_image( const void *i_imageIn, rcLoc = DSLWB_RING_SEARCH_EXHAUST_MATCH; else rcLoc = DSLWB_RING_SEARCH_MATCH; - } + } else { *nextRing = NULL; if (bRingEOS) @@ -691,29 +691,29 @@ int get_ring_layout_from_image( const void *i_imageIn, o_rs4RingLayout->override = thisRingLayout->override; o_rs4RingLayout->reserved1 = thisRingLayout->reserved1; o_rs4RingLayout->reserved2 = thisRingLayout->reserved2; - o_rs4RingLayout->metaData = (char*)(&thisRingLayout->reserved2 + + o_rs4RingLayout->metaData = (char*)(&thisRingLayout->reserved2 + sizeof(thisRingLayout->reserved2)); - o_rs4RingLayout->rs4Launch = (uint32_t*)((uintptr_t)thisRingLayout + + o_rs4RingLayout->rs4Launch = (uint32_t*)((uintptr_t)thisRingLayout + myRev64(thisRingLayout->entryOffset)); // entryOffset, rs4Launch and ASM_RS4_LAUNCH_BUF_SIZE should already be 8-byte aligned. - o_rs4RingLayout->rs4Delta = (uint32_t*)( (uintptr_t)thisRingLayout + + o_rs4RingLayout->rs4Delta = (uint32_t*)( (uintptr_t)thisRingLayout + myRev64(thisRingLayout->entryOffset) + ASM_RS4_LAUNCH_BUF_SIZE ); - // Check that the ring layout structure in the memory is 8-byte aligned. This must + // Check that the ring layout structure in the memory is 8-byte aligned. This must // be so because: - // - The entryOffset address must be on an 8-byte boundary because the start of the - // .rings section must be 8-byte aligned AND because the rs4Delta member is the + // - The entryOffset address must be on an 8-byte boundary because the start of the + // .rings section must be 8-byte aligned AND because the rs4Delta member is the // last member and which must itself be 8-byte aligned. - // - These two things together means that both the beginning and end of the delta - // ring layout must be 8-byte aligned, and thus the whole block, i.e. sizeOfThis, + // - These two things together means that both the beginning and end of the delta + // ring layout must be 8-byte aligned, and thus the whole block, i.e. sizeOfThis, // must therefore automatically be 8-byte aligned. // Also check that the RS4 delta ring is 8-byte aligned. // Also check that the RS4 launcher is 8-byte aligned. // - if (((uintptr_t)thisRingLayout-(uintptr_t)i_imageIn)%8 || - myRev32(o_rs4RingLayout->sizeOfThis)%8 || - myRev64(o_rs4RingLayout->entryOffset)%8 || + if (((uintptr_t)thisRingLayout-(uintptr_t)i_imageIn)%8 || + myRev32(o_rs4RingLayout->sizeOfThis)%8 || + myRev64(o_rs4RingLayout->entryOffset)%8 || ASM_RS4_LAUNCH_BUF_SIZE%8) { MY_ERR("Ring block or layout structure is not 8-byte aligned:"); MY_ERR(" thisRingLayout-imageIn = %i",(uintptr_t)thisRingLayout-(uintptr_t)i_imageIn); @@ -749,37 +749,37 @@ int write_wiggle_flip_to_image( void *io_imageOut, void *ringsBuffer=NULL; uint32_t ringRingsOffset=0; uint64_t ringPoreAddress=0,backPtr=0,fwdPtr=0,fwdPtrCheck; - + SBE_XIP_ERROR_STRINGS(errorStrings); - MY_DBG("wfInlineLenInWords=%i", i_wfInlineLenInWords); - + MY_DBG("wfInlineLenInWords=%i", i_wfInlineLenInWords); + // Modify the input ring layout content - // - Remove the qualifier section: ddLevel, sysPhase, override and reserved1+2. + // - Remove the qualifier section: ddLevel, sysPhase, override and reserved1+2. // This means reducing the entryOffset by the size of these qualifiers. - // - The new WF ring block and start of WF code must both be 8-byte aligned. + // - The new WF ring block and start of WF code must both be 8-byte aligned. // - RS4 entryOffset is already 8-byte aligned. // - The WF code section, i.e. wfInlineLenInWords, is already 8-byte aligned. // - i_ringLayout->entryOffset = + i_ringLayout->entryOffset = myRev64( myByteAlign(8, myRev64(i_ringLayout->entryOffset) - sizeof(i_ringLayout->ddLevel) - sizeof(i_ringLayout->sysPhase) - sizeof(i_ringLayout->override) - sizeof(i_ringLayout->reserved1) - sizeof(i_ringLayout->reserved2) ) ); - i_ringLayout->sizeOfThis = + i_ringLayout->sizeOfThis = myRev32( myRev64(i_ringLayout->entryOffset) + i_wfInlineLenInWords*4 ); - + // Not really any need for this. Just being consistent. Once we have transitioned completely to new - // headers, then ditch i_wfInline from parm list and assign wfInline to layout in main program. + // headers, then ditch i_wfInline from parm list and assign wfInline to layout in main program. i_ringLayout->wfInline = i_wfInline; - + if (myRev64(i_ringLayout->entryOffset)%8 || myRev32(i_ringLayout->sizeOfThis)%8) { MY_ERR("Ring block or WF code origin not 8-byte aligned."); return IMGBUILD_ERR_MISALIGNED_RING_LAYOUT; } - + // Calc the size of the data section we're adding and the resulting output image. // rc = sbe_xip_image_size( io_imageOut, &sizeImageIn); @@ -789,7 +789,7 @@ int write_wiggle_flip_to_image( void *io_imageOut, } sizeNewDataBlock = myRev32(i_ringLayout->sizeOfThis); // ...estimate max size of new image - sizeImageOutThisEst = sizeImageIn + sizeNewDataBlock + SBE_XIP_MAX_SECTION_ALIGNMENT; // + sizeImageOutThisEst = sizeImageIn + sizeNewDataBlock + SBE_XIP_MAX_SECTION_ALIGNMENT; // if (sizeImageOutThisEst>*i_sizeImageMaxNew) { MY_ERR("Estimated new image size (=%i) would exceed max allowed size (=%i).", @@ -797,7 +797,7 @@ int write_wiggle_flip_to_image( void *io_imageOut, *i_sizeImageMaxNew = sizeImageOutThisEst; return IMGBUILD_ERR_IMAGE_TOO_LARGE; } - + MY_DBG("Input image size\t\t= %6i\n\tNew rings data block size\t= %6i\n\tOutput image size (max)\t\t<=%6i", sizeImageIn, sizeNewDataBlock, sizeImageOutThisEst); MY_DBG("entryOffset = %i\n\tsizeOfThis = %i\n\tMeta data size = %i", @@ -841,12 +841,12 @@ int write_wiggle_flip_to_image( void *io_imageOut, } deltaLC = i_wfInlineLenInWords*4; memcpy( (uint8_t*)ringsBuffer+bufLC, i_wfInline, deltaLC); - + // Append WF ring layout to .rings section of in-memory input image. // Note! All layout members should already be 8-byte aligned. // - rc = sbe_xip_append( io_imageOut, - SBE_XIP_SECTION_RINGS, + rc = sbe_xip_append( io_imageOut, + SBE_XIP_SECTION_RINGS, (void*)ringsBuffer, sizeNewDataBlock, sizeImageOutThisEst, @@ -868,7 +868,7 @@ int write_wiggle_flip_to_image( void *io_imageOut, return IMGBUILD_ERR_XIP_MISC; } MY_DBG("Successful append of RS4 ring to .rings. Next, update forward ptr..."); - + // Update forward pointer associated with the ring/var name + any override offset. // // Convert the ring offset (wrt .rings address) to an PORE address @@ -881,12 +881,12 @@ int write_wiggle_flip_to_image( void *io_imageOut, return IMGBUILD_ERR_XIP_MISC; } // ...then update the forward pointer, i.e. the old "variable/ring name's" pointer. - // DO NOT add any 8-byte offset if override ring. The backItemPtr already has this + // DO NOT add any 8-byte offset if override ring. The backItemPtr already has this // from p8_delta_scan. // backPtr = myRev64(i_ringLayout->backItemPtr); MY_DBG("backPtr = 0x%016llx", backPtr); - rc = sbe_xip_write_uint64( io_imageOut, + rc = sbe_xip_write_uint64( io_imageOut, backPtr, fwdPtr); rc = rc+sbe_xip_read_uint64(io_imageOut, @@ -898,7 +898,7 @@ int write_wiggle_flip_to_image( void *io_imageOut, return IMGBUILD_ERR_XIP_MISC; } if (fwdPtrCheck!=ringPoreAddress || backPtr!=myRev64(i_ringLayout->backItemPtr)) { - MY_ERR("Forward or backward pointer mess. Check code."); + MY_ERR("Forward or backward pointer mess. Check code."); MY_ERR("fwdPtr =0x%016llx",fwdPtr); MY_ERR("fwdPtrCheck =0x%016llx",fwdPtrCheck); MY_ERR("layout bckPtr=0x%016llx",myRev64(i_ringLayout->backItemPtr)); @@ -916,9 +916,9 @@ int write_wiggle_flip_to_image( void *io_imageOut, if (ringsBuffer) free(ringsBuffer); return IMGBUILD_ERR_XIP_MISC; } - + if (ringsBuffer) free(ringsBuffer); - + return rc; } @@ -940,12 +940,12 @@ int append_empty_section( void *io_image, SBE_XIP_ERROR_STRINGS(errorStrings); rc = 0; - + if (*i_sizeSection==0) { MY_INF("INFO : Requested append size = 0. Nothing to do."); return rc; } - + // Check if there is enough room in the new image to add section. // sbe_xip_image_size( io_image, &sizeImageIn); @@ -960,11 +960,11 @@ int append_empty_section( void *io_image, *i_sizeImageMaxNew = sizeImageOutThisEst; return IMGBUILD_ERR_IMAGE_TOO_LARGE; } - + // Add the NULL buffer as a section append. sbe_xip_append() initializes with 0s. // - rc = sbe_xip_append( io_image, - i_sectionId, + rc = sbe_xip_append( io_image, + i_sectionId, NULL, *i_sizeSection, sizeImageOutThisEst, @@ -984,7 +984,7 @@ int append_empty_section( void *io_image, MY_ERR("xip_validate() of output image failed: %s", SBE_XIP_ERROR_STRING(errorStrings, rc)); return IMGBUILD_ERR_XIP_MISC; } - + // Return final section size. // rc = sbe_xip_get_section( io_image, i_sectionId, &xipSection); @@ -1047,7 +1047,7 @@ int initialize_slw_section( void *io_image, MY_ERR("***_RET or _NOP generated rc = %d", ctx.error); return IMGBUILD_ERR_PORE_INLINE_ASM; } - + // ... get host and pore location of Scom table in .slw section. // Note that we will assume, further down, that the NC section goes first, // then the L2 section and then the L3 section. @@ -1068,7 +1068,7 @@ int initialize_slw_section( void *io_image, hostScomTableL2 = (void*)((uintptr_t)hostScomTableNC + SLW_SCOM_TABLE_SIZE_NC); hostScomTableL3 = (void*)((uintptr_t)hostScomTableL2 + SLW_SCOM_TABLE_SIZE_L2); - + // ... get location of ----> Scom NC <---- vector from TOC. rc = sbe_xip_find( io_image, SLW_HOST_SCOM_NC_VECTOR_TOC_NAME, &xipTocItem); if (rc) { @@ -1161,8 +1161,8 @@ int create_and_initialize_fixed_image( void *io_image) // Ensure, to play it safe, that last two sections (.slw & .ffdc) are both on // 128-byte boundaries. The max [fixed] image size must itself already be // 128-byte aligned. - sizeSectionFit = (int) ( FIXED_SLW_IMAGE_SIZE - - sizeImageIn - + sizeSectionFit = (int) ( FIXED_SLW_IMAGE_SIZE - + sizeImageIn - FIXED_SLW_SECTION_SIZE - FIXED_FFDC_SECTION_SIZE ); if (sizeSectionFit<0) { @@ -1173,7 +1173,7 @@ int create_and_initialize_fixed_image( void *io_image) MY_ERR("Size of .ffdc section = %i\n",FIXED_FFDC_SECTION_SIZE); return IMGBUILD_ERR_SECTION_SIZING; } - + // Append .fit // sizeImageChk = FIXED_SLW_IMAGE_SIZE; @@ -1192,7 +1192,7 @@ int create_and_initialize_fixed_image( void *io_image) sizeSectionChk, sizeSectionReq); return IMGBUILD_ERR_SECTION_SIZING; } - + // Append .slw // sizeImageChk = FIXED_SLW_IMAGE_SIZE; @@ -1211,10 +1211,10 @@ int create_and_initialize_fixed_image( void *io_image) sizeSectionChk, sizeSectionReq); return IMGBUILD_ERR_SECTION_SIZING; } - + // Append .ffdc - // + // sizeImageChk = FIXED_SLW_IMAGE_SIZE; sizeSectionReq = FIXED_FFDC_SECTION_SIZE; sizeSectionChk = sizeSectionReq; @@ -1245,7 +1245,7 @@ int create_and_initialize_fixed_image( void *io_image) return IMGBUILD_ERR_KEYWORD_NOT_FOUND; } hostRamTable = (void*)((uintptr_t)io_image + xipSection.iv_offset); - + // ... get location of Ram vector. rc = sbe_xip_find( io_image, SLW_HOST_REG_VECTOR_TOC_NAME, &xipTocItem); if (rc) { @@ -1278,7 +1278,7 @@ int create_and_initialize_fixed_image( void *io_image) MY_ERR("***_RET or _NOP generated rc = %d", ctx.error); return IMGBUILD_ERR_PORE_INLINE_ASM; } - + // ... calc host ptr to Scom NC subsection. // Note that we will assume, further down, that the NC section goes first, // then the L2 section and then the L3 section. @@ -1299,7 +1299,7 @@ int create_and_initialize_fixed_image( void *io_image) hostScomTableL2 = (void*)((uintptr_t)hostScomTableNC + SLW_SCOM_TABLE_SIZE_NC); hostScomTableL3 = (void*)((uintptr_t)hostScomTableL2 + SLW_SCOM_TABLE_SIZE_L2); - + // ... get location of ----> Scom NC <---- vector from TOC. rc = sbe_xip_find( io_image, SLW_HOST_SCOM_NC_VECTOR_TOC_NAME, &xipTocItem); if (rc) { @@ -1379,7 +1379,7 @@ int update_runtime_scom_pointer( void *io_image) MY_ERR("\tThe keyword (=%s) was not found.",SLW_RUNTIME_SCOM_TOC_NAME); return IMGBUILD_ERR_KEYWORD_NOT_FOUND; } - + // Update host_runtime_scom with sub_slw_runtime_scom's address. // rc = sbe_xip_set_scalar( io_image, HOST_RUNTIME_SCOM_TOC_NAME, xipSlwRuntimeAddr); @@ -1447,7 +1447,7 @@ int write_vpd_ring_to_ipl_image(void *io_image, uint32_t asmInitLC=0; uint32_t asmBuffer[ASM_RS4_LAUNCH_BUF_SIZE/4]; uint64_t scanChipletAddress=0; - + SBE_XIP_ERROR_STRINGS(errorStrings); MY_INF("i_ringName=%s; \n", i_ringName); @@ -1458,7 +1458,7 @@ int write_vpd_ring_to_ipl_image(void *io_image, } sbe_xip_image_size( io_image, &sizeImageIn); - + chipletId = i_bufRs4Ring->iv_chipletId; // Create RS4 launcher and store in asmBuffer. @@ -1470,13 +1470,13 @@ int write_vpd_ring_to_ipl_image(void *io_image, MY_ERR("\tProbable cause:\n"); MY_ERR("\t\tThe key word (=proc_sbe_decompress_scan_chiplet_address) does not exist in the image. (No TOC record.)\n"); return IMGBUILD_ERR_KEYWORD_NOT_FOUND; - } + } else if (rc==SBE_XIP_BUG) { MY_ERR("\tProbable cause:\n"); MY_ERR("\t\tIllegal keyword, maybe?\n"); return IMGBUILD_ERR_XIP_MISC; - } + } else { MY_ERR("\tUnknown cause.\n"); return IMGBUILD_ERR_XIP_UNKNOWN; @@ -1521,7 +1521,7 @@ int write_vpd_ring_to_ipl_image(void *io_image, DeltaRingLayout *bufRs4RingBlock; uint64_t entryOffsetRs4RingBlock; uint32_t sizeRs4RingBlock, sizeRs4RingBlockMax; - + bufRs4RingBlock = (DeltaRingLayout*)i_bufTmp; //HB buf2. sizeRs4RingBlockMax = i_sizeBufTmp; entryOffsetRs4RingBlock = calc_ring_layout_entry_offset( 0, 0); @@ -1554,7 +1554,7 @@ int write_vpd_ring_to_ipl_image(void *io_image, memcpy( (uint8_t*)bufRs4RingBlock+bufLC, (uint8_t*)i_bufRs4Ring, (size_t)sizeRs4Ring); // Now, some post-sanity checks on alignments. - if ( entryOffsetRs4RingBlock%8 || + if ( entryOffsetRs4RingBlock%8 || sizeRs4RingBlock%8) { MY_ERR("Member(s) of RS4 ring block are not 8-byte aligned; \n"); MY_ERR(" Entry offset = %i; \n", (uint32_t)entryOffsetRs4RingBlock); @@ -1625,7 +1625,7 @@ int write_vpd_ring_to_slw_image(void *io_image, uint64_t waitsScanDelay=0; uint64_t twinHaltOpCodes; uint32_t iFill; - + MY_INF("i_ringName=%s; \n", i_ringName); if (i_bufTmp == NULL) { @@ -1634,9 +1634,9 @@ int write_vpd_ring_to_slw_image(void *io_image, } sbe_xip_image_size( io_image, &sizeImageIn); - + chipletId = i_bufRs4Ring->iv_chipletId; - + // Decompress RS4 VPD ring. // sizeRingRaw = myRev32(i_bufRs4Ring->iv_length); @@ -1698,7 +1698,7 @@ int write_vpd_ring_to_slw_image(void *io_image, return IMGBUILD_ERR_WF_CREATE; } - // Populate ring header and put ring header and Wf ring into + // Populate ring header and put ring header and Wf ring into // proper spots in pre-allocated bufWfRingBlock buffer (HB buf2). // DeltaRingLayout *bufWfRingBlock; @@ -1710,17 +1710,17 @@ int write_vpd_ring_to_slw_image(void *io_image, entryOffsetWfRingBlock = calc_ring_layout_entry_offset( 1, 0); bufWfRingBlock->entryOffset = myRev64(entryOffsetWfRingBlock); bufWfRingBlock->backItemPtr = 0; // Will be updated below, as we don't know yet. - - // Allocate either fitted or worst-case space for the ring. For example, the + + // Allocate either fitted or worst-case space for the ring. For example, the // rings, ex_repr_core/eco, need worst-case space allocation. if (i_bWcSpace==0) { // Fitted space sizing. sizeWfRingBlock = entryOffsetWfRingBlock + // Must be 8-byte aligned. wfInlineLenInWords*4; // Must be 8-byte aligned. } - else { + else { // Worst-case space sizing. - sizeWfRingBlock = ((sizeRingRaw-1)/32 + 1) * 4 * WF_WORST_CASE_SIZE_FAC + + sizeWfRingBlock = ((sizeRingRaw-1)/32 + 1) * 4 * WF_WORST_CASE_SIZE_FAC + WF_ENCAP_SIZE; sizeWfRingBlock = (uint32_t)myByteAlign(8, sizeWfRingBlock); // Fill void with "halt" instructions, 0x02000000 (LE). Note, void is whole multiple of 8x. @@ -1743,7 +1743,7 @@ int write_vpd_ring_to_slw_image(void *io_image, memcpy( (uint8_t*)bufWfRingBlock+bufLC, wfInline, (size_t)wfInlineLenInWords*4); // Now, some post-sanity checks on alignments. - if ( entryOffsetWfRingBlock%8 || + if ( entryOffsetWfRingBlock%8 || sizeWfRingBlock%8) { MY_ERR("Member(s) of WF ring block are not 8-byte aligned:"); MY_ERR(" Entry offset = %i", (uint32_t)entryOffsetWfRingBlock); @@ -1788,7 +1788,7 @@ int write_vpd_ring_to_slw_image(void *io_image, // check_and_perform_ring_datacare() // // Checks if the Mvpd ring passed has a datacare ring in the .dcrings image section. If it does, -// the Mvpd's ring bits corresponding to the care bits in the 1st half of the dc cring will be +// the Mvpd's ring bits corresponding to the care bits in the 1st half of the dc cring will be // overwritten by the data bits in the 2nd half of the dc ring. int check_and_perform_ring_datacare( void *i_imageRef, void *io_buf1, // Mvpd ring in/out. BE format. @@ -1807,14 +1807,14 @@ int check_and_perform_ring_datacare( void *i_imageRef, SbeXipItem xipTocItem; uint8_t bMatch=0; uint32_t sizeRs4Container; - - + + bitLength = myRev32(((CompressedScanData*)io_buf1)->iv_length); scanSelect = myRev32(((CompressedScanData*)io_buf1)->iv_scanSelect); ringId = ((CompressedScanData*)io_buf1)->iv_ringId; chipletId = ((CompressedScanData*)io_buf1)->iv_chipletId; flushOpt = ((CompressedScanData*)io_buf1)->iv_flushOptimization; - + MY_INF("In check_and_perform_ring_datacare()...\n"); MY_DBG("Mvpd ring characteristics:\n"); @@ -1823,14 +1823,14 @@ int check_and_perform_ring_datacare( void *i_imageRef, MY_DBG("Chiplet ID: 0x%02x\n",chipletId); MY_DBG("Flush Opt: %i\n",flushOpt); MY_DBG("Scan select: 0x%08x\n",scanSelect); - + rc = sbe_xip_find( i_imageRef, i_ringName, &xipTocItem); if (rc) { MY_ERR("_find() failed w/rc=%i\n",rc); return IMGBUILD_ERR_KEYWORD_NOT_FOUND; } MY_DBG("xipTocItem.iv_address=0x%016llx\n",xipTocItem.iv_address); - + // Now look for datacare match in .dcrings section. nextRing = NULL; rs4Datacare = NULL; @@ -1865,7 +1865,7 @@ int check_and_perform_ring_datacare( void *i_imageRef, else MY_DBG("rs4Datacare=NULL (no ring matched search criteria, or empty ring section.)\n"); } while (nextRing!=NULL && !bMatch); - + if (bMatch) { // Decompress Mvpd ring. @@ -1884,14 +1884,14 @@ int check_and_perform_ring_datacare( void *i_imageRef, rc = _rs4_decompress( (uint8_t*)io_buf1, i_sizeBuf2, // Assumption is that sizeBuf2=sizeBuf1 &ringBitLenDc, - (CompressedScanData*)( (uintptr_t)rs4Datacare + + (CompressedScanData*)( (uintptr_t)rs4Datacare + myRev64(rs4Datacare->entryOffset) + ASM_RS4_LAUNCH_BUF_SIZE) ); if (rc) { MY_ERR("_rs4_decompress(datacare...) failed: rc=%i\n",rc); return IMGBUILD_ERR_RS4_DECOMPRESS; } - + MY_DBG("bitLength=%i\n",bitLength); MY_DBG("ringBitLen=%i\n",ringBitLen); MY_DBG("ringBitLenDc=%i\n",ringBitLenDc); @@ -1900,11 +1900,11 @@ int check_and_perform_ring_datacare( void *i_imageRef, ringBitLen, ringBitLenDc); return IMGBUILD_ERR_DATACARE_RING_MESS; } - + // Overlay io_buf2 bits according to care and data bits in io_buf1 uint32_t iWord, remBits32; uint32_t dataVpd, dataDc, careDc, careDc1, careDc2; - + // Split apart the raw datacare ring into data (1st part) and care (2nd part). // Note that the order is already in BE for both Datacare and Mvpd rings. // Further note that the care part is fractured into two words that need to @@ -1932,7 +1932,7 @@ int check_and_perform_ring_datacare( void *i_imageRef, return IMGBUILD_ERR_DATACARE_RING_MESS; } } - + // Compress overlayed Mvpd ring. rc = _rs4_compress( (CompressedScanData*)io_buf1, i_sizeBuf2, @@ -1946,12 +1946,12 @@ int check_and_perform_ring_datacare( void *i_imageRef, if (rc) { MY_ERR("\t_rs4_compress() failed: rc=%i ",rc); return IMGBUILD_ERR_RS4_DECOMPRESS; - } - + } + } - + MY_INF("Leaving check_and_perform_ring_datacare()...\n"); - + return rc; } @@ -1967,8 +1967,8 @@ int check_and_perform_ring_datacare( void *i_imageRef, // - p8_delta_scan_w // - p8_delta_scan_r // - ??? -void cleanup( void *buf1, - void *buf2, +void cleanup( void *buf1, + void *buf2, void *buf3, void *buf4, void *buf5) diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api.C index abb08f456..470c76d07 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api.C @@ -61,8 +61,8 @@ */ uint32_t p8_pore_gen_cpureg( void *io_image, uint32_t i_sizeImage, - uint32_t i_regName, - uint64_t i_regData, + uint32_t i_regName, + uint64_t i_regData, uint32_t i_coreId, // [0:15] uint32_t i_threadId) { @@ -83,12 +83,12 @@ uint32_t p8_pore_gen_cpureg( void *io_image, uint32_t sprSwiz=0; #ifdef DYNAMIC_RAM_TABLE uint32_t iCore=0, sizeTableThis=0, sizeTableAll=0; - void *hostRamEntryFirstAll; // First entry of all Ram tables. - void *hostRamEntryLastAll; // Last entry of all Ram tables. + void *hostRamEntryFirstAll; // First entry of all Ram tables. + void *hostRamEntryLastAll; // Last entry of all Ram tables. uint64_t xipRamTableNext; void *hostRamTableNext; #endif - + // ------------------------------------------------------------------------- // Validate Ramming parameters. // @@ -121,7 +121,7 @@ uint32_t p8_pore_gen_cpureg( void *io_image, if (rcLoc) return IMGBUILD_ERR_RAM_INVALID_PARM; rcLoc = 0; - + // ------------------------------------------------------------------------- // Validate image and get pointer to SLW section. // @@ -146,7 +146,7 @@ uint32_t p8_pore_gen_cpureg( void *io_image, } hostSlwRamSection = (void*)((uint8_t*)io_image + xipSection.iv_offset); sbe_xip_host2pore( io_image, hostSlwRamSection, &xipSlwRamSection); - + // ------------------------------------------------------------------------- // Cross check SPR register and table defines // @@ -155,7 +155,7 @@ uint32_t p8_pore_gen_cpureg( void *io_image, return IMGBUILD_ERR_RAM_HDRS_NOT_SYNCED; } if (xipSection.iv_size!=SLW_RAM_TABLE_SIZE+SLW_SCOM_TABLE_SIZE_ALL) { - MY_ERR("SLW table size in *.H header file differs from SLW section size in image.\n"); + MY_ERR("SLW table size in *.H header file differs from SLW section size in image.\n"); MY_ERR("Check code or image version.\n"); return IMGBUILD_ERR_RAM_HDRS_NOT_SYNCED; } @@ -169,7 +169,7 @@ uint32_t p8_pore_gen_cpureg( void *io_image, MY_INF("Image validation and size checks - OK\n"); MY_INF("\tImage size = %i\n",i_sizeImage); MY_INF("\tSLW section size= %i\n",xipSection.iv_size); - + // ------------------------------------------------------------------------- // Locate RAM vector and locate RAM table associated with "This" core ID. // @@ -188,13 +188,13 @@ uint32_t p8_pore_gen_cpureg( void *io_image, hostRamTableThis = NULL; bNewTable = 1; } - + #ifdef DYNAMIC_RAM_TABLE hostRamEntryFirstAll = hostSlwRamSection; hostRamEntryLastAll = hostRamEntryFirstAll; // ------------------------------------------------------------------------- - // Walk the RAM vector and RAM tables to + // Walk the RAM vector and RAM tables to // - determine size of present tables, sizeTableAll - we'll need it when/if shifting entries forward // - check for RAM table overflow. // @@ -237,14 +237,14 @@ uint32_t p8_pore_gen_cpureg( void *io_image, } #else // ------------------------------------------------------------------------- - // We don't need to walk the "this" RAM table to check for RAM table + // We don't need to walk the "this" RAM table to check for RAM table // as this is done further down during insertion of the entry. // #endif - - + + // ------------------------------------------------------------------------- - // Walk the "This" core ID's RAM table to + // Walk the "This" core ID's RAM table to // - determine insertion point, hostRamEntryThis, of new RAM entry // if (bNewTable) { @@ -258,11 +258,11 @@ uint32_t p8_pore_gen_cpureg( void *io_image, bEntryEnd = 1; #else // Append to beginning of agreed upon static position for this coreId. - hostRamTableThis = (void*)((uint8_t*)hostSlwRamSection + + hostRamTableThis = (void*)((uint8_t*)hostSlwRamSection + (uint32_t)(SLW_RAM_TABLE_SIZE/SLW_MAX_CORES)*i_coreId ); hostRamEntryThis = hostRamTableThis; // ...update RAM vector (since it is currently NULL) - *((uint64_t*)hostRamVector + i_coreId) = myRev64( xipSlwRamSection + + *((uint64_t*)hostRamVector + i_coreId) = myRev64( xipSlwRamSection + (uint32_t)(SLW_RAM_TABLE_SIZE/SLW_MAX_CORES)*i_coreId ); bEntryEnd = 1; #endif @@ -308,8 +308,8 @@ uint32_t p8_pore_gen_cpureg( void *io_image, // (Need to do this before inserting new RAM entry at hostRamEntryThis.) // if (!bNewTable) - for ( ramEntryNext=(RamTableEntry*)hostRamEntryLastAll; - ramEntryNext>=(RamTableEntry*)hostRamEntryThis; + for ( ramEntryNext=(RamTableEntry*)hostRamEntryLastAll; + ramEntryNext>=(RamTableEntry*)hostRamEntryThis; ramEntryNext-- ) { *(ramEntryNext+1) = *ramEntryNext; if ((ramEntryNext+1)->instr!=ramEntryNext->instr) { @@ -337,7 +337,7 @@ uint32_t p8_pore_gen_cpureg( void *io_image, ( ((uint32_t)headerType) << RAM_HEADER_TYPE_START_C & RAM_HEADER_TYPE_MASK_C ) | ( i_regName << RAM_HEADER_SPRN_START_C & RAM_HEADER_SPRN_MASK_C ) | ( i_threadId << RAM_HEADER_THREAD_START_C & RAM_HEADER_THREAD_MASK_C ); - // ...do the SPR instr + // ...do the SPR instr sprSwiz = i_regName>>5 | (i_regName & 0x0000001f)<<5; if (sprSwiz!=SLW_SPR_REGS[iReg].swizzled) { MY_ERR("Inconsistent swizzle rules implemented. Check code. Dumping data.\n"); @@ -389,7 +389,7 @@ uint32_t p8_pore_gen_cpureg( void *io_image, uint32_t p8_pore_gen_scom( void *io_image, uint32_t i_sizeImage, uint32_t i_scomAddr, - uint32_t i_coreId, // [0:15] + uint32_t i_coreId, // [0:15] uint64_t i_scomData, uint32_t i_operation, // [0:5] uint32_t i_section) // [0,2,3] @@ -399,7 +399,7 @@ uint32_t p8_pore_gen_scom( void *io_image, uint32_t operation=0; uint32_t entriesCount=0, entriesMatch=0, entriesNOP=0; uint32_t sizeImageIn=0; - void *hostSlwSection; + void __attribute__((unused)) *hostSlwSection; // HACK uint64_t xipScomTableThis; void *hostScomVector, *hostScomTableThis; void *hostScomEntryNext; // running entry pointer @@ -410,7 +410,7 @@ uint32_t p8_pore_gen_scom( void *io_image, SbeXipSection xipSection; SbeXipItem xipTocItem; PoreInlineContext ctx; - + // ------------------------------------------------------------------------- // Validate Scom parameters. // @@ -433,7 +433,7 @@ uint32_t p8_pore_gen_scom( void *io_image, if (rcLoc) return IMGBUILD_ERR_SCOM_INVALID_PARM; rcLoc = 0; - + // ------------------------------------------------------------------------- // Validate image and get pointer to SLW section. // @@ -459,7 +459,7 @@ uint32_t p8_pore_gen_scom( void *io_image, hostSlwSection = (void*)((uint8_t*)io_image + xipSection.iv_offset); // ...check .slw section size if (xipSection.iv_size!=SLW_RAM_TABLE_SIZE+SLW_SCOM_TABLE_SIZE_ALL) { - MY_ERR("SLW table size in *.H header file differs from SLW section size in image.\n"); + MY_ERR("SLW table size in *.H header file differs from SLW section size in image.\n"); MY_ERR("Check code or image version.\n"); return IMGBUILD_ERR_SCOM_HDRS_NOT_SYNCD; } @@ -475,9 +475,9 @@ uint32_t p8_pore_gen_scom( void *io_image, MY_INF("Image validation and size checks - OK\n"); MY_INF("\tImage size = %i\n",i_sizeImage); MY_INF("\tSLW section size= %i\n",xipSection.iv_size); - + // ------------------------------------------------------------------------- - // Locate Scom vector according to i_section and then locate Scom table + // Locate Scom vector according to i_section and then locate Scom table // associated with "This" core ID. // switch (i_section) { @@ -528,7 +528,7 @@ uint32_t p8_pore_gen_scom( void *io_image, // doesn't include NOP entries.) // - If no NOP found, insert at first RET. // - + // First, create search strings for addr, nop and ret. // Note, the following IIS will also be used in case of // - i_operation==append @@ -552,7 +552,7 @@ uint32_t p8_pore_gen_scom( void *io_image, MY_ERR("pore_NOP generated rc = %d", ctx.error); return IMGBUILD_ERR_PORE_INLINE_ASM; } - + // Second, search for addr and nop in relevant coreId table until first RET. // Note: // - We go through ALL entries until first RET instr. We MUST find a RET instr, @@ -560,7 +560,7 @@ uint32_t p8_pore_gen_scom( void *io_image, // - Count number of entries and check for overrun, though we'll continue // searching until we find an RET. (Should be improved.) // - The STI(+SCOM_addr) opcode is in the 2nd word of the Scom entry. - // - For an append operation, if a NOP is found (before a RET obviously), the + // - For an append operation, if a NOP is found (before a RET obviously), the // SCOM is replacing that NNNN sequence. hostScomEntryNext = hostScomTableThis; while (memcmp(hostScomEntryNext, bufRET, sizeof(uint32_t))) { @@ -576,7 +576,7 @@ uint32_t p8_pore_gen_scom( void *io_image, hostScomEntryNext = (void*)((uintptr_t)hostScomEntryNext + XIPSIZE_SCOM_ENTRY); } hostScomEntryRET = hostScomEntryNext; // The last EntryNext will always be the first RET. - + switch (i_section) { case 0: if (entriesCount>=SLW_MAX_SCOMS_NC) { @@ -651,7 +651,7 @@ uint32_t p8_pore_gen_scom( void *io_image, i_operation, P8_PORE_SCOM_FIRST_OP, P8_PORE_SCOM_LAST_OP); return IMGBUILD_ERR_SCOM_INVALID_PARM; } - + // ------------------------------------------------------------------------- // Assuming pre-allocated Scom table (after pre-allocated Ram table): // - Table is pre-filled with RNNN ISS. @@ -660,7 +660,7 @@ uint32_t p8_pore_gen_scom( void *io_image, // - Remember to check for more than SLW_MAX_SCOMS_NC entries! switch (operation) { - case P8_PORE_SCOM_APPEND: // Append a Scom at first occurring NNNN or RNNN, + case P8_PORE_SCOM_APPEND: // Append a Scom at first occurring NNNN or RNNN, if (hostScomEntryNOP) { // ... replace the NNNN MY_INF("Append at NOP\n"); @@ -695,7 +695,7 @@ uint32_t p8_pore_gen_scom( void *io_image, MY_INF("Replace existing Scom w/NOPs\n"); memcpy(hostScomEntryMatch,(void*)bufIIS,XIPSIZE_SCOM_ENTRY); } - else { + else { // do nothing, and assume everything is fine, since we did no damage. } break; @@ -703,10 +703,10 @@ uint32_t p8_pore_gen_scom( void *io_image, if (hostScomEntryMatch) { // ... do an OR on the data (which is the 2nd DWord in the entry) MY_INF("Overlay existing Scom - OR case\n"); - *((uint64_t*)hostScomEntryMatch+1) = + *((uint64_t*)hostScomEntryMatch+1) = *((uint64_t*)hostScomEntryMatch+1) | myRev64(i_scomData); } - else { + else { MY_ERR("No Scom entry found to do OR operation with.\n"); return IMGBUILD_ERR_SCOM_ENTRY_NOT_FOUND; } @@ -715,10 +715,10 @@ uint32_t p8_pore_gen_scom( void *io_image, if (hostScomEntryMatch) { // ... do an AND on the data (which is the 2nd DWord in the entry) MY_INF("Overlay existing Scom - AND case\n"); - *((uint64_t*)hostScomEntryMatch+1) = + *((uint64_t*)hostScomEntryMatch+1) = *((uint64_t*)hostScomEntryMatch+1) & myRev64(i_scomData); } - else { + else { MY_ERR("No Scom entry found to do AND operation with.\n"); return IMGBUILD_ERR_SCOM_ENTRY_NOT_FOUND; } @@ -734,7 +734,7 @@ uint32_t p8_pore_gen_scom( void *io_image, default: MY_ERR("Impossible value of operation (=%i). Check code.\n",operation); return IMGBUILD_ERR_CHECK_CODE; - + } // End of switch(operation) return rc; -- cgit v1.2.1