From 7d14631253d5cd41782bc7b58751480b07b8d684 Mon Sep 17 00:00:00 2001 From: Thi Tran Date: Thu, 12 Sep 2013 10:41:02 -0500 Subject: Hostboot - Updated HWPs from defect SW222043 (Power Management Significant) Change-Id: I2054d8de283fa65fa4aa79b5dce344a726067408 CQ: SW218817 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6129 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III --- .../p8_set_pore_bar/p8_poreslw_init.C | 777 ++++++++++----------- 1 file changed, 385 insertions(+), 392 deletions(-) (limited to 'src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C') diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C index 7f0cb94e6..72dd48dab 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_poreslw_init.C,v 1.11 2013/02/19 15:37:34 stillgs Exp $ +// $Id: p8_poreslw_init.C,v 1.15 2013/08/02 19:09:56 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_poreslw_init.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -65,6 +65,7 @@ #include "p8_poreslw_init.H" #include "p8_pfet_init.H" #include "p8_pmc_deconfig_setup.H" +#include "p8_cpu_special_wakeup.H" #include "p8_pcb_scom_errors.H" @@ -92,18 +93,21 @@ fapi::ReturnCode poreslw_ex_setup(const Target& i_target); // Function definitions // ---------------------------------------------------------------------- - -/// \param[in] i_target Chip target -/// \param[in] mode Control mode for the procedure -/// (PM_CONFIG, PM_INIT, PM_RESET) - -/// \retval FAPI_RC_SUCCESS -/// \retval ERROR defined in xml - +// ---------------------------------------------------------------------- +/** + * p8_pcbs_init calls the underlying routine based on mode parameter + * + * @param[in] i_target Chip target + * @param[in] mode Control mode for the procedure + * PM_INIT, PM_CONFIG, PM_RESET + * + * @retval FAPI_RC_SUCCESS + * @retval ERROR defined in xml + */ fapi::ReturnCode p8_poreslw_init(const Target& i_target, uint32_t mode) { - fapi::ReturnCode l_rc; + fapi::ReturnCode rc; FAPI_INF("Executing p8_poreslw_init in mode %x ....", mode); @@ -113,7 +117,7 @@ p8_poreslw_init(const Target& i_target, uint32_t mode) if (mode == PM_CONFIG) { FAPI_INF("PORE-SLW configuration..."); - FAPI_INF("---> None is defined..."); + // None is defined } /// ------------------------------- @@ -121,7 +125,7 @@ p8_poreslw_init(const Target& i_target, uint32_t mode) /// the SLW using necessary Platform or Feature attributes. else if (mode == PM_INIT) { - l_rc = poreslw_init(i_target); + rc = poreslw_init(i_target); } /// ------------------------------- @@ -129,7 +133,7 @@ p8_poreslw_init(const Target& i_target, uint32_t mode) /// reinitialized else if (mode == PM_RESET) { - l_rc = poreslw_reset(i_target); + rc = poreslw_reset(i_target); } /// ------------------------------- @@ -137,20 +141,28 @@ p8_poreslw_init(const Target& i_target, uint32_t mode) else { FAPI_ERR("Unknown mode passed to p8_poreslw_init. Mode %x ....", mode); - FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_PORESLW_CODE_BAD_MODE); + FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PORESLW_CODE_BAD_MODE); } - return l_rc; + return rc; } //------------------------------------------------------------------------------ // PORE SLW Initialization Function //------------------------------------------------------------------------------ +/** + * poreslw_init Initializes the slw function on a chip + * + * @param[in] i_target Chip target + * + * @retval FAPI_RC_SUCCESS + * @retval ERROR defined in xml + */ fapi::ReturnCode poreslw_init(const Target& i_target) { - fapi::ReturnCode l_rc; + fapi::ReturnCode rc; uint32_t e_rc = 0; ecmdDataBufferBase data(64); @@ -158,10 +170,11 @@ poreslw_init(const Target& i_target) do { + // Synchronize the PMC Deconfiguration Register with the currently // enabled EX chiplets. - FAPI_EXEC_HWP(l_rc, p8_pmc_deconfig_setup, i_target); - if(l_rc) + FAPI_EXEC_HWP(rc, p8_pmc_deconfig_setup, i_target); + if(rc) { FAPI_ERR("PMC Deconfig Setup error"); break; @@ -169,8 +182,8 @@ poreslw_init(const Target& i_target) FAPI_DBG("Activate the PMC Idle seequencer by making sure the Halt bit is clear"); const uint32_t HALT_IDLE_STATE_MASTER_FSM = 14; - l_rc = fapiGetScom(i_target, PMC_MODE_REG_0x00062000, data); - if(!l_rc.ok()) + rc = fapiGetScom(i_target, PMC_MODE_REG_0x00062000, data); + if(!rc.ok()) { FAPI_ERR("Scom error reading PMC_MODE"); break; @@ -180,12 +193,12 @@ poreslw_init(const Target& i_target) if (e_rc) { FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); - l_rc.setEcmdError(e_rc); + rc.setEcmdError(e_rc); break; } - l_rc = fapiPutScom(i_target, PMC_MODE_REG_0x00062000, data); - if(!l_rc.ok()) + rc = fapiPutScom(i_target, PMC_MODE_REG_0x00062000, data); + if(!rc.ok()) { FAPI_ERR("Scom error writing PMC_MODE"); break; @@ -194,8 +207,8 @@ poreslw_init(const Target& i_target) FAPI_DBG("Activate the PMC Idle seequencer by making sure the Halt bit is clear"); // Setup up each of the EX chiplets - l_rc = poreslw_ex_setup(i_target); - if(!l_rc.ok()) + rc = poreslw_ex_setup(i_target); + if(!rc.ok()) { FAPI_ERR("Error from poreslw_ex_setup n"); break; @@ -203,16 +216,24 @@ poreslw_init(const Target& i_target) } while(0); - return l_rc; + return rc; } //------------------------------------------------------------------------------ // PORE SLW Reset Function //------------------------------------------------------------------------------ +/** + * poreslw_reset Resets the slw function on a chip + * + * @param[in] i_target Chip target + * + * @retval FAPI_RC_SUCCESS + * @retval ERROR defined in xml + */ fapi::ReturnCode poreslw_reset(const Target& i_target) { - fapi::ReturnCode l_rc; + fapi::ReturnCode rc; uint32_t e_rc = 0; ecmdDataBufferBase data(64); ecmdDataBufferBase polldata(64); @@ -230,8 +251,8 @@ poreslw_reset(const Target& i_target) // exception of Error Maskbuild_node_slw // set PORE run bit to stop - l_rc = fapiGetScom(i_target, PORE_SLW_CONTROL_0x00068001, data); - if(!l_rc.ok()) + rc = fapiGetScom(i_target, PORE_SLW_CONTROL_0x00068001, data); + if(!rc.ok()) { FAPI_ERR("Scom error reading PORE_SLW_CONTROL"); break; @@ -241,12 +262,12 @@ poreslw_reset(const Target& i_target) if (e_rc) { FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); - l_rc.setEcmdError(e_rc); + rc.setEcmdError(e_rc); break; } - l_rc = fapiPutScom(i_target, PORE_SLW_CONTROL_0x00068001, data); - if(!l_rc.ok()) + rc = fapiPutScom(i_target, PORE_SLW_CONTROL_0x00068001, data); + if(!rc.ok()) { FAPI_ERR("Scom error writing PORE_SLW_CONTROL"); break; @@ -259,14 +280,14 @@ poreslw_reset(const Target& i_target) if (e_rc) { FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); - l_rc.setEcmdError(e_rc); + rc.setEcmdError(e_rc); break; } FAPI_DBG("PORE-SLW Reset value: 0x%16llX", data.getDoubleWord(0)); - l_rc = fapiPutScom(i_target, PORE_SLW_RESET_0x00068002, data); - if(!l_rc.ok()) + rc = fapiPutScom(i_target, PORE_SLW_RESET_0x00068002, data); + if(!rc.ok()) { FAPI_ERR("Scom error writing PORE_SLW_RESET"); break; @@ -276,8 +297,8 @@ poreslw_reset(const Target& i_target) wait_state_detected = false; for (poll_count=0; poll_count l_exChiplets; - uint8_t l_functional = 0; uint8_t l_ex_number = 0; uint64_t address; - bool __attribute__((unused)) core_flag = false; // HACK - bool __attribute__((unused)) error_flag = false; // HACK - //@thi - fixed compiler error - Greg will fix this in next version - //uint32_t fsierror = 0; uint8_t pm_sleep_type; uint8_t pm_sleep_entry ; @@ -342,6 +366,20 @@ poreslw_ex_setup(const Target& i_target) uint8_t pm_winkle_entry ; uint8_t pm_winkle_exit ; + + // These enums must match the enum values in pm_hwp_attributes.xml + enum IDLE_TYPE + { + FAST = 0, + DEEP = 1 + }; + + enum IDLE_TRANSITION_MODE + { + HARDWARE = 0, + ASSISTED = 1 + }; + // Give relevant bits a name // PMGP1 bits const uint32_t PM_SLEEP_POWER_DOWN_EN_BIT = 0; @@ -351,8 +389,6 @@ poreslw_ex_setup(const Target& i_target) const uint32_t PM_WINKLE_POWER_UP_EN_BIT = 4; const uint32_t PM_WINKLE_POWER_OFF_SEL_BIT = 5; - //@thi - fixed compiler error - Greg will fix this in next version - //const uint32_t IDLE_STATE_OVERRIDE_EN = 6; const uint32_t PM_DISABLE = 0; do @@ -366,413 +402,370 @@ poreslw_ex_setup(const Target& i_target) // it is invoked prior to the chiplet loop below. FAPI_INF("\tInitialize the PFET controllers"); - FAPI_EXEC_HWP(l_rc, p8_pfet_init, i_target, PM_INIT); - if(l_rc) + FAPI_EXEC_HWP(rc, p8_pfet_init, i_target, PM_INIT); + if(rc) { FAPI_ERR("PFET Controller Setup error"); break; } + // Read the attributes + + // \todo Hardcoded values until platform control of attributes is in place. + FAPI_INF("\tWARNING: !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!"); + FAPI_INF("\tWARNING: Hardcoded idle config values set until platform support of attributes available"); + FAPI_INF("\tWARNING: !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!"); + + pm_sleep_entry = 0; // 0=assisted, 1=HW + pm_sleep_exit = 0; // 0=assisted, 1=HW + pm_sleep_type = 1; // 0=fast, 1=deep + + // Due to L3 High Availability Write Pointers that must be + // saved upon a Deep Winkle Entry, this transition must be + // assisted. + pm_winkle_entry = 0; // 0=assisted, 1=HW + pm_winkle_exit = 0; // 0=assisted, 1=HW + pm_winkle_type = 1; // 0=fast, 1=deep + + // Sleep + /* + GETATTR(ATTR_PM_SLEEP_TYPE, + "ATTR_PM_SLEEP_TYPE", + &i_target, + pm_sleep_type); + + GETATTR(ATTR_PM_SLEEP_ENTRY, + "ATTR_PM_SLEEP_ENTRY", + &i_target, + pm_sleep_entry); + + GETATTR(ATTR_PM_SLEEP_EXIT, + "ATTR_PM_SLEEP_EXIT", + &i_target, + pm_sleep_exit); + + // Winkle + GETATTR(ATTR_PM_WINKLE_TYPE, + "ATTR_PM_WINKLE_TYPE", + &i_target, + pm_winkle_type); + + GETATTR(ATTR_PM_WINKLE_ENTRY, + "ATTR_PM_WINKLE_ENTRY", + &i_target, + pm_winkle_entry); + + GETATTR(ATTR_PM_WINKLE_EXIT, + "ATTR_PM_WINKLE_EXIT", + &i_target, + pm_winkle_exit); + + */ + // Due to L3 High Availability Write Pointers that must be + // saved upon a Deep Winkle Entry, this transition must be + // assisted. + // \todo need Attribute for L3 HA enabled. GA1 = NO + if (pm_winkle_entry != ASSISTED) + { + FAPI_INF("Winkle Entry is not configured in ASSISTED mode. L3 High Availability functions" + " are not supported"); + FAPI_INF("Continuing anyway...."); + } + // -------------------------------------- // Walk the configured chiplets - l_rc = fapiGetChildChiplets ( i_target, + rc = fapiGetChildChiplets ( i_target, TARGET_TYPE_EX_CHIPLET, l_exChiplets, - TARGET_STATE_PRESENT); - if (l_rc) - { - FAPI_ERR("Error from fapiGetChildChiplets!"); - error_flag = true; - break; - } + TARGET_STATE_FUNCTIONAL); + if (rc) + { + FAPI_ERR("Error from fapiGetChildChiplets!"); + break; + } - FAPI_DBG("\tChiplet vector size => %u ", l_exChiplets.size()); + FAPI_DBG("\tChiplet vector size => %u ", l_exChiplets.size()); // Iterate through the returned chiplets - for (uint8_t j=0; j < l_exChiplets.size(); j++) - { - - // Determine if it's functional - l_rc = FAPI_ATTR_GET( ATTR_FUNCTIONAL, - &l_exChiplets[j], - l_functional); - if (l_rc) + for (uint8_t j=0; j < l_exChiplets.size(); j++) + { + + // Get the core number + rc = FAPI_ATTR_GET( ATTR_CHIP_UNIT_POS, + &l_exChiplets[j], + l_ex_number); + if(!rc.ok()) { - FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error"); + FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error"); break; } - else if ( l_functional ) + + address = EX_GP3_0x100F0012 + (l_ex_number * 0x01000000); + rc=fapiGetScom(i_target, address, data); + if(rc) { + FAPI_ERR("GetScom error"); + break; + } - // Get the core number - l_rc = FAPI_ATTR_GET( ATTR_CHIP_UNIT_POS, - &l_exChiplets[j], - l_ex_number); - if(!l_rc.ok()) + // Check if chiplet enable bit is set (configured). If so, process + if ( data.isBitSet(0) ) + { + FAPI_INF("\tSetting up Core %X ", l_ex_number); + + // ****************************************************************** + // Set PMGP1_REG + // ****************************************************************** + + FAPI_DBG("\t-----------------------------------------------------"); + FAPI_DBG("\tPMGP1_REG Configuration "); + FAPI_DBG("\t-----------------------------------------------------"); + FAPI_DBG("\t pm_sleep_entry => %d ", pm_sleep_entry ); + FAPI_DBG("\t pm_sleep_exit => %d ", pm_sleep_exit ); + FAPI_DBG("\t pm_sleep_type => %d ", pm_sleep_type ); + FAPI_DBG("\t pm_winkle_entry => %d ", pm_winkle_entry ); + FAPI_DBG("\t pm_winkle_exit => %d ", pm_winkle_exit ); + FAPI_DBG("\t pm_winkle_type => %d ", pm_winkle_type ); + FAPI_DBG("\t-----------------------------------------------------"); + + + FAPI_DBG("\t*************************************"); + FAPI_INF("\tSetup PMGP1_REG for EX %x", l_ex_number); + FAPI_DBG("\t*************************************"); + + // Initialize the set and clear vectors + e_rc |= clear_data.flushTo1(); // Set to 1s to be used for WAND + e_rc |= set_data.flushTo0(); // Set to 0s to be used for WOR + + // If sleep entry = 1 (hardware), sleep power down enable = 1 + // else sleep entry = 0 (assisted), sleep power down enable = 0 + if (pm_sleep_entry) { - FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error"); - break; + e_rc |= set_data.setBit(PM_SLEEP_POWER_DOWN_EN_BIT); + } + else + { + e_rc |= clear_data.clearBit(PM_SLEEP_POWER_DOWN_EN_BIT); } - address = EX_GP3_0x100F0012 + (l_ex_number * 0x01000000); - l_rc=fapiGetScom(i_target, address, data); - if(l_rc) + // If sleep exit = 1 (hardware), sleep power up enable = 1 + // else sleep exit = 0 (assisted), sleep power up enable = 0 + if (pm_sleep_exit) { - FAPI_ERR("GetScom error"); - break; + e_rc |= set_data.setBit(PM_SLEEP_POWER_UP_EN_BIT); + } + else + { + e_rc |= clear_data.clearBit(PM_SLEEP_POWER_UP_EN_BIT); } - // Check if chiplet enable bit is set (configured). If so, process - if ( data.isBitSet(0) ) + // If sleep type = 1 (deep), sleep power up sel = 1 + // else sleep type = 0 (fast), sleep power up sel = 0 + if (pm_sleep_type) { - FAPI_INF("\tSetting up Core %X ", l_ex_number); - - // -------------------------------------- - // Based on Attributes, set the idle handling controls - - // e_rc = FAPI_ATTR_GET(ATTR_PM_SLEEP_TYPE, &i_target, pm_sleep_type); - // if (e_rc) - // { - // FAPI_ERR("fapiGetAttribute of ATTR_PM_SLEEP_TYPE with e_rc = 0x%x", (uint32_t)e_rc); - // break; - // } - // - // e_rc = FAPI_ATTR_GET(ATTR_PM_SLEEP_ENTRY, &i_target, pm_sleep_entry); - // if (e_rc) - // FAPI_ERR("fapiGetAttribute of ATTR_PM_SLEEP_ENTRY with e_rc = 0x%x", (uint32_t)e_rc); - // break; - // } - // - // e_rc = FAPI_ATTR_GET(ATTR_PM_SLEEP_EXIT, &i_target, pm_sleep_exit); - // if (e_rc) - // { - // FAPI_ERR("fapiGetAttribute of ATTR_PM_SLEEP_EXIT with e_rc = 0x%x", (uint32_t)e_rc); - // break; - // } - // - // e_rc = FAPI_ATTR_GET(ATTR_PM_WINKLE_TYPE, &i_target, pm_winkle_type); - // if (e_rc) - // { - // FAPI_ERR("fapiGetAttribute of ATTR_PM_WINKLE_TYPE with e_rc = 0x%x", (uint32_t)e_rc); - // break; - // } - // \todo missing attributes - // e_rc = FAPI_ATTR_GET("ATTR_PM_WINKLE_ENTRY", &i_target,(unit8_t) pm_winkle_entry); - // if (e_rc) - // { - // FAPI_ERR("fapiGetAttribute of ATTR_PM_WINKLE_ENTRY with e_rc = 0x%x", (uint32_t)e_rc); - // break; - // } - // - // e_rc = FAPI_ATTR_GET("ATTR_PM_WINKLE_EXIT", &i_target,(unit8_t) pm_winkle_exit); - // if (e_rc) - // { - // FAPI_ERR("fapiGetAttribute of ATTR_PM_WINKLE_EXIT with e_rc = 0x%x", (uint32_t)e_rc); - // break; - // } - - // \todo Hardcoded values until platform control of attributes is in place. - FAPI_INF("\tWARNING: !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!"); - FAPI_INF("\tWARNING: Hardcoded idle config values set until platform support of attributes available"); - FAPI_INF("\tWARNING: !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!"); - - - pm_sleep_entry = 0; // 0=assisted, 1=HW - pm_sleep_exit = 0; // 0=assisted, 1=HW - pm_sleep_type = 1; // 0=fast, 1=deep - - // Due to L3 Hight Availability Write Pointers that must be - // saved upon a Deep Winkle Entry, this transition must be - // assisted. - pm_winkle_entry = 0; // 0=assisted, 1=HW - pm_winkle_exit = 0; // 0=assisted, 1=HW - pm_winkle_type = 1; // 0=fast, 1=deep - - - // ****************************************************************** - // Set PMGP1_REG - // ****************************************************************** - - FAPI_DBG("\t-----------------------------------------------------"); - FAPI_DBG("\tPMGP1_REG Configuration "); - FAPI_DBG("\t-----------------------------------------------------"); - FAPI_DBG("\t pm_sleep_entry => %d ", pm_sleep_entry ); - FAPI_DBG("\t pm_sleep_exit => %d ", pm_sleep_exit ); - FAPI_DBG("\t pm_sleep_type => %d ", pm_sleep_type ); - FAPI_DBG("\t pm_winkle_entry => %d ", pm_winkle_entry ); - FAPI_DBG("\t pm_winkle_exit => %d ", pm_winkle_exit ); - FAPI_DBG("\t pm_winkle_type => %d ", pm_winkle_type ); - FAPI_DBG("\t-----------------------------------------------------"); - - - FAPI_DBG("\t*************************************"); - FAPI_INF("\tSetup PMGP1_REG for EX %x", l_ex_number); - FAPI_DBG("\t*************************************"); - - // Initialize the set and clear vectors - e_rc |= clear_data.flushTo1(); // Set to 1s to be used for WAND - e_rc |= set_data.flushTo0(); // Set to 0s to be used for WOR - - // If sleep entry = 1 (hardware), sleep power down enable = 1 - // else sleep entry = 0 (assisted), sleep power down enable = 0 - if (pm_sleep_entry) - { - e_rc |= set_data.setBit(PM_SLEEP_POWER_DOWN_EN_BIT); - } - else - { - e_rc |= clear_data.clearBit(PM_SLEEP_POWER_DOWN_EN_BIT); - } + e_rc |= set_data.setBit(PM_SLEEP_POWER_OFF_SEL_BIT); - // If sleep exit = 1 (hardware), sleep power up enable = 1 - // else sleep exit = 0 (assisted), sleep power up enable = 0 - if (pm_sleep_exit) - { - e_rc |= set_data.setBit(PM_SLEEP_POWER_UP_EN_BIT); - } - else - { - e_rc |= clear_data.clearBit(PM_SLEEP_POWER_UP_EN_BIT); - } + } + else + { + e_rc |= clear_data.clearBit(PM_SLEEP_POWER_OFF_SEL_BIT); + } - // If sleep type = 1 (deep), sleep power up sel = 1 - // else sleep type = 0 (fast), sleep power up sel = 0 - if (pm_sleep_type) - { - e_rc |= set_data.setBit(PM_SLEEP_POWER_OFF_SEL_BIT); + // If winkle entry = 1 (hardware), winkle power down enable = 1 + // else winkle entry = 0 (assisted), winkle power down enable = 0 + if (pm_winkle_entry) + { + e_rc |= set_data.setBit(PM_WINKLE_POWER_DOWN_EN_BIT); + } + else + { + e_rc |= clear_data.clearBit(PM_WINKLE_POWER_DOWN_EN_BIT); + } - } - else - { - e_rc |= clear_data.clearBit(PM_SLEEP_POWER_OFF_SEL_BIT); - } + // If winkle exit = 1 (hardware), winkle power up enable = 1 + // else winkle exit = 0 (assisted), winkle power up enable = 0 + if (pm_winkle_exit) + { + e_rc |= set_data.setBit(PM_WINKLE_POWER_UP_EN_BIT); + } + else + { + e_rc |= clear_data.clearBit(PM_WINKLE_POWER_UP_EN_BIT); + } - // If winkle entry = 1 (hardware), winkle power down enable = 1 - // else winkle entry = 0 (assisted), winkle power down enable = 0 - if (pm_winkle_entry) - { - e_rc |= set_data.setBit(PM_WINKLE_POWER_DOWN_EN_BIT); - } - else - { - e_rc |= clear_data.clearBit(PM_WINKLE_POWER_DOWN_EN_BIT); - } + // If winkle type = 1 (deep), winkle power up sel = 1 + // else winkle type = 0 (fast), winkle power up sel = 0 + if (pm_winkle_type) + { + e_rc |= set_data.setBit(PM_WINKLE_POWER_OFF_SEL_BIT); - // If winkle exit = 1 (hardware), winkle power up enable = 1 - // else winkle exit = 0 (assisted), winkle power up enable = 0 - if (pm_winkle_exit) - { - e_rc |= set_data.setBit(PM_WINKLE_POWER_UP_EN_BIT); - } - else - { - e_rc |= clear_data.clearBit(PM_WINKLE_POWER_UP_EN_BIT); - } + } + else + { + e_rc |= clear_data.clearBit(PM_WINKLE_POWER_OFF_SEL_BIT); + } - // If winkle type = 1 (deep), winkle power up sel = 1 - // else winkle type = 0 (fast), winkle power up sel = 0 - if (pm_winkle_type) - { - e_rc |= set_data.setBit(PM_WINKLE_POWER_OFF_SEL_BIT); + // Check for any errors from set/clear ops into the buffers + if (e_rc) + { + FAPI_ERR("eCmdDataBuffer operation failed. rc = 0x%x", (uint32_t)e_rc); + rc.setEcmdError(e_rc); + break; + } - } - else - { - e_rc |= clear_data.clearBit(PM_WINKLE_POWER_OFF_SEL_BIT); - } + // The set and clear vectors are built. Write them to + // the respective addresses. + FAPI_DBG("\tEX_PMGP1_WOR 0x%16llx" , set_data.getDoubleWord(0)); + address = EX_PMGP1_REG_0_WORx100F0105 + (l_ex_number * 0x01000000); + rc=fapiPutScom(i_target, address, set_data); + if (rc) + { + FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. rc = 0x%x", (uint32_t)rc); + break; + } - // Check for any errors from set/clear ops into the buffers - if (e_rc) - { - FAPI_ERR("eCmdDataBuffer operation failed. rc = 0x%x", (uint32_t)e_rc); - l_rc.setEcmdError(e_rc); - break; - } + FAPI_DBG("\tEX_PMGP1_WAND 0x%16llx" , clear_data.getDoubleWord(0)); + address = EX_PMGP1_REG_0_WANDx100F0104 + (l_ex_number * 0x01000000); + rc=fapiPutScom(i_target, address, clear_data); + if (rc) + { + FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. rc = 0x%x", (uint32_t)rc); + break; + } - // The set and clear vectors are built. Write them to - // the respective addresses. - FAPI_DBG("\tEX_PMGP1_WOR 0x%16llx" , set_data.getDoubleWord(0)); - address = EX_PMGP1_REG_0_WORx100F0105 + (l_ex_number * 0x01000000); - l_rc=fapiPutScom(i_target, address, set_data); - if (l_rc) - { - FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. l_rc = 0x%x", (uint32_t)l_rc); - break; - } + FAPI_INF("\tDisable the PCBS Heartbeat EX %x", l_ex_number); + address = EX_SLAVE_CONFIG_0x100F001E + (l_ex_number * 0x01000000); + rc = fapiGetScom(i_target, address, data); + if(!rc.ok()) + { + FAPI_ERR("Scom error reading PCBS Slave Config"); + break; + } - FAPI_DBG("\tEX_PMGP1_WAND 0x%16llx" , clear_data.getDoubleWord(0)); - address = EX_PMGP1_REG_0_WANDx100F0104 + (l_ex_number * 0x01000000); - l_rc=fapiPutScom(i_target, address, clear_data); - if (l_rc) - { - FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. l_rc = 0x%x", (uint32_t)l_rc); - break; - } + e_rc |= data.setBit(4); + if (e_rc) + { + FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); + rc.setEcmdError(e_rc); + break; + } - FAPI_INF("\tDisable the PCBS Heartbeat EX %x", l_ex_number); - address = EX_SLAVE_CONFIG_0x100F001E + (l_ex_number * 0x01000000); - l_rc = fapiGetScom(i_target, address, data); - if(!l_rc.ok()) - { - FAPI_ERR("Scom error reading PCBS Slave Config"); - break; - } + rc=fapiPutScom(i_target, address, data); + if(!rc.ok()) + { + FAPI_ERR("Scom error writing PCBS Slave Config"); + break; + } + + // -------------------------------------- + FAPI_INF("\tSet PMGP0(46) to deal with HW259509 - winkle Pstate stepping hang"); + // This is a spare bit in Murano and Venice DD1s but + // is necessary to set in Murano and Venice DD2 to deal + // the hang condition that is fixed. As bit 46 is spare + // in the previous levels, setting it on all levels is not + // harmful. + address = EX_PMGP0_OR_0x100F0102 + (l_ex_number * 0x01000000); + e_rc |= data.flushTo0(); + e_rc |= data.setBit(46); + if (e_rc) + { + FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); + rc.setEcmdError(e_rc); + break; + } - e_rc |= data.setBit(4); + rc=fapiPutScom(i_target, address, data); + if(!rc.ok()) + { + FAPI_ERR("Scom error setting PMGP0"); + break; + } + + // -------------------------------------- + // Check that PM function is enabled (eg not disabled). + // If not, remove the disable + + address = EX_PMGP0_0x100F0100 + (l_ex_number * 0x01000000); + rc=fapiGetScom(i_target, address, data); + if(!rc.ok()) + { + FAPI_ERR("Scom error reading PMGP0"); + break; + } + + if (data.isBitSet(PM_DISABLE)) + { + + // Activate the PCBS-PM macro by clearing the PM_DISABLE bit + FAPI_INF("\tActivate the PCBS-PM for EX %x", l_ex_number); + + e_rc |= data.flushTo1(); + e_rc |= data.clearBit(PM_DISABLE); if (e_rc) { FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); - l_rc.setEcmdError(e_rc); + rc.setEcmdError(e_rc); break; } - l_rc=fapiPutScom(i_target, address, data); - if(!l_rc.ok()) + address = EX_PMGP0_AND_0x100F0101 + (l_ex_number * 0x01000000); + rc=fapiPutScom(i_target, address, data); + if(!rc.ok()) { - FAPI_ERR("Scom error writing PCBS Slave Config"); + FAPI_ERR("Scom error writing EX_PMGP0_OR"); break; } + } - // -------------------------------------- - // Check if SBE code has already cleared the OHA override. - // As chiplets may be enabled but offline (eg in Winkle) - // treat SCOM errors as off-line (eg skip it). If online - // and set, clear the override. - - /* GSS: removed as Cronus always puts a message out of (PCB_OFFLINE) - even though this code is meant to handle it. As this messge - can cause confusion in the lab, the check is being removed. - bool oha_accessible = true; - l_rc = fapiGetScom(l_exChiplets[j], EX_OHA_MODE_REG_RWx1002000D, data); - if(!l_rc.ok()) - { - l_rc = fapiGetCfamRegister( i_target, CFAM_FSI_STATUS_0x00001007, data ); - if(!l_rc.ok()) - { - FAPI_ERR("Error reading CFAM FSI Status Register"); - break; - } - FAPI_INF( "CFAM_FSI_STATUS_0x00001007: 0x%X", data.getWord(0)); - e_rc |= data.extractToRight( &fsierror, 17, 3 ); - if ( e_rc ) - { - l_rc.setEcmdError(e_rc); - break; - } - if (fsierror == PIB_OFFLINE_ERROR) - { - FAPI_INF( "Chiplet offline error detected. Skipping OHA Override clearing"); - oha_accessible = false; - } - else - { - FAPI_ERR("Scom reading OHA_MODE"); - break; - } - } - // Process if OHA accessible. - if (oha_accessible) - { - if (data.isBitSet(IDLE_STATE_OVERRIDE_EN)) - { - - FAPI_INF("\tClear the OHA Idle State Override for EX %x", l_ex_number); - e_rc |= data.clearBit(IDLE_STATE_OVERRIDE_EN); - if (e_rc) - { - FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); - l_rc.setEcmdError(e_rc); - break; - } - - l_rc = fapiPutScom(l_exChiplets[j], EX_OHA_MODE_REG_RWx1002000D, data); - if(!l_rc.ok()) - { - FAPI_ERR("Scom error writing OHA_MODE"); - break; - } - } - } - End of check removal - */ - - // -------------------------------------- - // Check that PM function is enabled (eg not disabled). - // If not, remove the disable + // -------------------------------------- + // Clear OCC Special Wake-up bit - only 1 bit in the register + address = EX_PMSpcWkupOCC_REG_0x100F010C + (l_ex_number * 0x01000000); + rc=fapiGetScom(i_target, address, data); + if(!rc.ok()) + { + FAPI_ERR("Scom error clearing EX_OCC_SPWKUP"); + break; + } - address = EX_PMGP0_0x100F0100 + (l_ex_number * 0x01000000); - l_rc=fapiGetScom(i_target, address, data); - if(!l_rc.ok()) + if (data.isBitSet(0)) + { + FAPI_INF("\tClear OCC Special Wake-up for EX %x", l_ex_number); + e_rc |= data.flushTo0(); + if (e_rc) { - FAPI_ERR("Scom error reading PMGP0"); + FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); + rc.setEcmdError(e_rc); break; } - if (data.isBitSet(PM_DISABLE)) - { - - // Activate the PCBS-PM macro by clearing the PM_DISABLE bit - FAPI_INF("\tActivate the PCBS-PM for EX %x", l_ex_number); - - e_rc |= data.flushTo1(); - e_rc |= data.clearBit(PM_DISABLE); - if (e_rc) - { - FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); - l_rc.setEcmdError(e_rc); - break; - } - - address = EX_PMGP0_AND_0x100F0101 + (l_ex_number * 0x01000000); - l_rc=fapiPutScom(i_target, address, data); - if(!l_rc.ok()) - { - FAPI_ERR("Scom error writing EX_PMGP0_OR"); - break; - } - } - - // -------------------------------------- - // Clear OCC Special Wake-up bit - only 1 bit in the register - address = EX_PMSpcWkupOCC_REG_0x100F010C + (l_ex_number * 0x01000000); - l_rc=fapiGetScom(i_target, address, data); - if(!l_rc.ok()) + rc=fapiPutScom(i_target, address, data); + if(!rc.ok()) { FAPI_ERR("Scom error clearing EX_OCC_SPWKUP"); break; } + } - if (data.isBitSet(0)) - { - FAPI_INF("\tClear OCC Special Wake-up for EX %x", l_ex_number); - e_rc |= data.flushTo0(); - if (e_rc) - { - FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc); - l_rc.setEcmdError(e_rc); - break; - } - - l_rc=fapiPutScom(i_target, address, data); - if(!l_rc.ok()) - { - FAPI_ERR("Scom error clearing EX_OCC_SPWKUP"); - break; - } - } - core_flag = true; - } // Chiplet Enabled - else // Not Functional so skip it + // -------------------------------------- + // Initialize the special wake-up tracking attributes + FAPI_INF("\tInitialize the special wake-up tracking attributes"); + + FAPI_EXEC_HWP(rc, p8_cpu_special_wakeup, + l_exChiplets[j], + SPCWKUP_INIT, + SPW_ALL); + if(rc) { - // Do nothing + FAPI_ERR("Special wake-up initialization error"); + break; } - } - } // chiplet loop + } // Chiplet Enabled + } // chiplet loop } while(0); - return l_rc; + return rc; } } //end extern -- cgit v1.2.1