From dc2d9ab7cb6db9c685517c9fa78fe932960731b0 Mon Sep 17 00:00:00 2001 From: Prem Shanker Jha Date: Fri, 30 Aug 2013 03:35:35 -0500 Subject: PRDF:Added support for FIR after conclusion of review - part3 Support added for FIR - PBFFIR - PBAMFIR - PBENFIR - IOPCIFIR_x RTC: 23127 Change-Id: Ia0868eba524397f3cae445de649db96f643ecbb6 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5989 Tested-by: Jenkins Server Reviewed-by: Christopher T. Phan Reviewed-by: BENJAMIN J. WEISENBECK Reviewed-by: Sachin Gupta Reviewed-by: A. Patrick Williams III Reviewed-by: Zane Shelley Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6225 --- .../prdf/common/plat/pegasus/Proc_acts_ABUS.rule | 7 + .../prdf/common/plat/pegasus/Proc_acts_PB.rule | 5 +- .../prdf/common/plat/pegasus/Proc_acts_PCIE.rule | 233 ++++++++++++--------- .../prdf/common/plat/pegasus/Proc_acts_TP.rule | 32 +-- .../prdf/common/plat/pegasus/Proc_acts_XBUS.rule | 120 +++++++++-- .../prdf/common/plat/pegasus/Proc_regs_PCIE.rule | 28 +-- src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C | 3 + 7 files changed, 278 insertions(+), 150 deletions(-) (limited to 'src/usr/diag') diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_ABUS.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_ABUS.rule index f60a3f18e..eaa33e52e 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_ABUS.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_ABUS.rule @@ -134,6 +134,12 @@ group gAbusLFir filter singlebit ################################################################################ # based on p8dd1_mss_FFDC_37_ reviewd.xls ################################################################################ + +#FIXME RTC 23127 We need to revisit the Firmware action +#FabricBus_CE_With_Repair. Description is same as P7 but +#it appears it may need change.This appilies to PBES FIR. +#calloutAbus0InterfaceTh5 may need modification. + rule PbesFir { CHECK_STOP: @@ -482,6 +488,7 @@ group gIoaFir filter singlebit # Actions specific to ABUS chiplet ################################################################################ + /** Callout the ABUS 0 interface */ actionclass calloutAbus0Interface { diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PB.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PB.rule index 6161abca7..4defae80c 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PB.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PB.rule @@ -1888,8 +1888,9 @@ group gPbaFir filter singlebit /** PBAFIR[3] * PBAFIR_PB_SUE_FW */ - #FIXME RTC 23127 Action "Foreign LinkIPP" not clear - (PbaFir, bit(3)) ? TBDDefaultCallout; + # FIXME RTC 23127 Foreign Link shall be removed. It shall be changed to + # Chip + Level2 in spread sheet. + (PbaFir, bit(3)) ? calloutProcLevel2MedThr1; /** PBAFIR[4] * PBAFIR_PB_UE_FW diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PCIE.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PCIE.rule index d8b0284f4..cdc14077e 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PCIE.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PCIE.rule @@ -51,7 +51,7 @@ group gPcieChipletFir filter singlebit (PcieChipletFir, bit(8)) ? analyze(gPbfFir); /** PCIE_CHIPLET_FIR[9|10] - * Attention from IOPPCIFIR (0-1) + * Attention from IOPCIFIR (0-1) */ (PcieChipletFir, bit(9|10)) ? analyze(gIopPciFir); }; @@ -135,6 +135,8 @@ group gPcieLFir filter singlebit ################################################################################ # PCIE Chiplet PBFFIR ################################################################################ +# based on p8dd1_mss_FFDC_59.xls +################################################################################ rule PbfFir { @@ -142,399 +144,434 @@ rule PbfFir RECOVERABLE: PBFFIR & ~PBFFIR_MASK & ~PBFFIR_ACT0 & PBFFIR_ACT1; SPECIAL: PBFFIR & ~PBFFIR_MASK & PBFFIR_ACT0 & ~PBFFIR_ACT1; }; - +# Foreign Link and similar entries in MRU List shall be removed. Plan is to +# replace these with Chip + Level2. So bit 7,8,28,29,60,61 have action different +# from what is specified in RAS spread sheet. group gPbfFir filter singlebit { /** PBFFIR[0|1|2|3] * F0_MAILBOX_WRITTEN */ - (PbfFir, bit(0|1|2|3)) ? TBDDefaultCallout; + (PbfFir, bit(0|1|2|3)) ? defaultMaskedError; /** PBFFIR[4] * F0_RX_DETECT */ - (PbfFir, bit(4)) ? TBDDefaultCallout; + (PbfFir, bit(4)) ? defaultMaskedError; /** PBFFIR[5] * F0_LINK_TRAINING_DONE */ - (PbfFir, bit(5)) ? TBDDefaultCallout; + (PbfFir, bit(5)) ? defaultMaskedError; /** PBFFIR[6] * F0LINK_TRAINED */ - (PbfFir, bit(6)) ? TBDDefaultCallout; + (PbfFir, bit(6)) ? defaultMaskedError; /** PBFFIR[7] * F0LINK_FIR_ERR */ - (PbfFir, bit(7)) ? TBDDefaultCallout; + (PbfFir, bit(7)) ? calloutProcLevel2MedThr1; /** PBFFIR[8] * F0LINK_FMR_PSR_OBS_ERR */ - (PbfFir, bit(8)) ? TBDDefaultCallout; + (PbfFir, bit(8)) ? calloutProcLevel2MedThr1; /** PBFFIR[9] * F0LINK_FMR_COR_ERR */ - (PbfFir, bit(9)) ? TBDDefaultCallout; + (PbfFir, bit(9)) ? SelfHighThr32PerDay; /** PBFFIR[10] * F0LINK_FMR_SUE_ERR */ - (PbfFir, bit(10)) ? TBDDefaultCallout; + (PbfFir, bit(10)) ? defaultMaskedError; /** PBFFIR[11] * F0LINK_FMR_UNC_ERR */ - (PbfFir, bit(11)) ? TBDDefaultCallout; + (PbfFir, bit(11)) ? calloutProcHighThr1SUE; /** PBFFIR[12] * F0_EQ_FAILED */ - (PbfFir, bit(12)) ? TBDDefaultCallout; + (PbfFir, bit(12)) ? defaultMaskedError; /** PBFFIR[13] * F0_REPLAY_THRESHOLD */ - (PbfFir, bit(13)) ? TBDDefaultCallout; + (PbfFir, bit(13)) ? SelfHighThr1; /** PBFFIR[14] * F0_CRC_ERROR */ - (PbfFir, bit(14)) ? TBDDefaultCallout; + (PbfFir, bit(14)) ? SelfHighThr1; /** PBFFIR[15] * F0_LOST_PACKET */ - (PbfFir, bit(15)) ? TBDDefaultCallout; + (PbfFir, bit(15)) ? SelfHighThr1; /** PBFFIR[16] * F0_NAK_RECEIVED */ - (PbfFir, bit(16)) ? TBDDefaultCallout; + (PbfFir, bit(16)) ? SelfHighThr1; /** PBFFIR[17] * F0_REPLAY_TIMER_ERROR */ - (PbfFir, bit(17)) ? TBDDefaultCallout; + (PbfFir, bit(17)) ? SelfHighThr1; /** PBFFIR[18] * F0_RETRAIN_THRESHOLD */ - (PbfFir, bit(18)) ? TBDDefaultCallout; + (PbfFir, bit(18)) ? defaultMaskedError; /** PBFFIR[19] * F0_REPLAY_NUM_RETRAIN */ - (PbfFir, bit(19)) ? TBDDefaultCallout; + (PbfFir, bit(19)) ? SelfHighThr1; /** PBFFIR[20] * F0_RX_ERROR */ - (PbfFir, bit(20)) ? TBDDefaultCallout; + (PbfFir, bit(20)) ? SelfHighThr1; /** PBFFIR[21] * F0_DESKEW_ERROR */ - (PbfFir, bit(21)) ? TBDDefaultCallout; + (PbfFir, bit(21)) ? SelfHighThr1; /** PBFFIR[22] * F0_FRAMING_ERROR */ - (PbfFir, bit(22)) ? TBDDefaultCallout; + (PbfFir, bit(22)) ? SelfHighThr1; /** PBFFIR[23] * F0_OS_RECEIVED */ - (PbfFir, bit(23)) ? TBDDefaultCallout; + (PbfFir, bit(23)) ? SelfHighThr1; /** PBFFIR[24] * F0_ECC_CE_ERR */ - (PbfFir, bit(24)) ? TBDDefaultCallout; + (PbfFir, bit(24)) ? SelfHighThr32PerDay; /** PBFFIR[25] * F0_ECC_UE_ERR */ - (PbfFir, bit(25)) ? TBDDefaultCallout; + (PbfFir, bit(25)) ? SelfHighThr1; /** PBFFIR[26] * F0_RETRAIN_ERR */ - (PbfFir, bit(26)) ? TBDDefaultCallout; + (PbfFir, bit(26)) ? defaultMaskedError; /** PBFFIR[27] * F0_TRAINING_ERR */ - (PbfFir, bit(27)) ? TBDDefaultCallout; + (PbfFir, bit(27)) ? defaultMaskedError; /** PBFFIR[28] * F0_UNRECOV_ERR */ - (PbfFir, bit(28)) ? TBDDefaultCallout; + (PbfFir, bit(28)) ? calloutProcLevel2MedThr1; /** PBFFIR[29] * F0_INTERNAL_ERR */ - (PbfFir, bit(29)) ? TBDDefaultCallout; + (PbfFir, bit(29)) ? calloutProcLevel2MedThr1; + + /** PBFFIR[30|31] + * FIR_SPARE + */ + (PbfFir, bit(30|31)) ? defaultMaskedError; - /** PBFFIR[32|33|34|35] + /** PBFFIR[32:35] * F1_MAILBOX_WRITTEN */ - (PbfFir, bit(32|33|34|35)) ? TBDDefaultCallout; + (PbfFir, bit(32|33|34|35)) ? defaultMaskedError; /** PBFFIR[36] * F1_RX_DETECT */ - (PbfFir, bit(36)) ? TBDDefaultCallout; + (PbfFir, bit(36)) ? defaultMaskedError; /** PBFFIR[37] * F1_LINK_TRAINING_DONE */ - (PbfFir, bit(37)) ? TBDDefaultCallout; + (PbfFir, bit(37)) ? defaultMaskedError; /** PBFFIR[38] * F1LINK_TRAINED */ - (PbfFir, bit(38)) ? TBDDefaultCallout; + (PbfFir, bit(38)) ? defaultMaskedError; /** PBFFIR[39] * F1LINK_FIR_ERR */ - (PbfFir, bit(39)) ? TBDDefaultCallout; + (PbfFir, bit(39)) ? calloutProcLevel2MedThr1; /** PBFFIR[40] * F1LINK_FMR_PSR_OBS_ERR */ - (PbfFir, bit(40)) ? TBDDefaultCallout; + (PbfFir, bit(40)) ? calloutProcLevel2MedThr1; /** PBFFIR[41] * F1LINK_FMR_COR_ERR */ - (PbfFir, bit(41)) ? TBDDefaultCallout; + (PbfFir, bit(41)) ? SelfHighThr32PerDay; /** PBFFIR[42] * F1LINK_FMR_SUE_ERR */ - (PbfFir, bit(42)) ? TBDDefaultCallout; + (PbfFir, bit(42)) ? defaultMaskedError; /** PBFFIR[43] * F1LINK_FMR_UNC_ERR */ - (PbfFir, bit(43)) ? TBDDefaultCallout; + (PbfFir, bit(43)) ? calloutProcHighThr1SUE; /** PBFFIR[44] * F1_EQ_FAILED */ - (PbfFir, bit(44)) ? TBDDefaultCallout; + (PbfFir, bit(44)) ? defaultMaskedError; /** PBFFIR[45] * F1_REPLAY_THRESHOLD */ - (PbfFir, bit(45)) ? TBDDefaultCallout; + (PbfFir, bit(45)) ? SelfHighThr1; /** PBFFIR[46] * F1_CRC_ERROR */ - (PbfFir, bit(46)) ? TBDDefaultCallout; + (PbfFir, bit(46)) ? SelfHighThr1; /** PBFFIR[47] * F1_LOST_PACKET */ - (PbfFir, bit(47)) ? TBDDefaultCallout; + (PbfFir, bit(47)) ? SelfHighThr1; /** PBFFIR[48] * F1_NAK_RECEIVED */ - (PbfFir, bit(48)) ? TBDDefaultCallout; + (PbfFir, bit(48)) ? SelfHighThr1; /** PBFFIR[49] * F1_REPLAY_TIMER_ERROR */ - (PbfFir, bit(49)) ? TBDDefaultCallout; + (PbfFir, bit(49)) ? SelfHighThr1; /** PBFFIR[50] * F1_RETRAIN_THRESHOLD */ - (PbfFir, bit(50)) ? TBDDefaultCallout; + (PbfFir, bit(50)) ? defaultMaskedError; /** PBFFIR[51] * F1_REPLAY_NUM_RETRAIN */ - (PbfFir, bit(51)) ? TBDDefaultCallout; + (PbfFir, bit(51)) ? SelfHighThr1; /** PBFFIR[52] * F1_RX_ERROR */ - (PbfFir, bit(52)) ? TBDDefaultCallout; + (PbfFir, bit(52)) ? SelfHighThr1; /** PBFFIR[53] * F1_DESKEW_ERROR */ - (PbfFir, bit(53)) ? TBDDefaultCallout; + (PbfFir, bit(53)) ? SelfHighThr1; /** PBFFIR[54] * F1_FRAMING_ERROR */ - (PbfFir, bit(54)) ? TBDDefaultCallout; + (PbfFir, bit(54)) ? SelfHighThr1; /** PBFFIR[55] * F1_OS_RECEIVED */ - (PbfFir, bit(55)) ? TBDDefaultCallout; + (PbfFir, bit(55)) ? SelfHighThr1; /** PBFFIR[56] * F1_ECC_CE_ERR */ - (PbfFir, bit(56)) ? TBDDefaultCallout; + (PbfFir, bit(56)) ? SelfHighThr32PerDay; /** PBFFIR[57] * F1_ECC_UE_ERR */ - (PbfFir, bit(57)) ? TBDDefaultCallout; + (PbfFir, bit(57)) ? SelfHighThr1; /** PBFFIR[58] * F1_RETRAIN_ERR */ - (PbfFir, bit(58)) ? TBDDefaultCallout; + (PbfFir, bit(58)) ? defaultMaskedError; /** PBFFIR[59] * F1_TRAINING_ERR */ - (PbfFir, bit(59)) ? TBDDefaultCallout; + (PbfFir, bit(59)) ? defaultMaskedError; /** PBFFIR[60] * F1_UNRECOV_ERR */ - (PbfFir, bit(60)) ? TBDDefaultCallout; + (PbfFir, bit(60)) ? calloutProcLevel2MedThr1; /** PBFFIR[61] * F1_INTERNAL_ERR */ - (PbfFir, bit(61)) ? TBDDefaultCallout; + (PbfFir, bit(61)) ? calloutProcLevel2MedThr1; + + /** PBFFIR[62|63] + * F1_INTERNAL_ERR + */ + (PbfFir, bit(62|63)) ? defaultMaskedError; + }; ################################################################################ -# PCIE Chiplet IOPPCIFIRs +# PCIE Chiplet IOPCIFIRs ################################################################################ # TODO - All these FIRs should have the same bit definition. Idealy, we will # only want to have one copy of the bit definition. Unfortuately, the # rule code parser does not have the support for something like this. # Maybe we can add this as a later feature. +################################################################################ +# based on p8dd1_mss_FFDC_59.xls +################################################################################ rule IopPciFir_0 { CHECK_STOP: - IOPPCIFIR_0 & ~IOPPCIFIR_0_MASK & ~IOPPCIFIR_0_ACT0 & ~IOPPCIFIR_0_ACT1; + IOPCIFIR_0 & ~IOPCIFIR_0_MASK & ~IOPCIFIR_0_ACT0 & ~IOPCIFIR_0_ACT1; RECOVERABLE: - IOPPCIFIR_0 & ~IOPPCIFIR_0_MASK & ~IOPPCIFIR_0_ACT0 & IOPPCIFIR_0_ACT1; + IOPCIFIR_0 & ~IOPCIFIR_0_MASK & ~IOPCIFIR_0_ACT0 & IOPCIFIR_0_ACT1; }; rule IopPciFir_1 { CHECK_STOP: - IOPPCIFIR_1 & ~IOPPCIFIR_1_MASK & ~IOPPCIFIR_1_ACT0 & ~IOPPCIFIR_1_ACT1; + IOPCIFIR_1 & ~IOPCIFIR_1_MASK & ~IOPCIFIR_1_ACT0 & ~IOPCIFIR_1_ACT1; RECOVERABLE: - IOPPCIFIR_1 & ~IOPPCIFIR_1_MASK & ~IOPPCIFIR_1_ACT0 & IOPPCIFIR_1_ACT1; + IOPCIFIR_1 & ~IOPCIFIR_1_MASK & ~IOPCIFIR_1_ACT0 & IOPCIFIR_1_ACT1; }; group gIopPciFir filter singlebit { - /** IOPPCIFIR_0[0] + /** IOPCIFIR_0[0] * FIR_STATUS_REG_G2_PLL_CCERR_STATUS */ - (IopPciFir_0, bit(0)) ? TBDDefaultCallout; + (IopPciFir_0, bit(0)) ? calloutPHB0Thr1; - /** IOPPCIFIR_1[0] + /** IOPCIFIR_1[0] * FIR_STATUS_REG_G2_PLL_CCERR_STATUS */ - (IopPciFir_1, bit(0)) ? TBDDefaultCallout; + (IopPciFir_1, bit(0)) ? calloutPHB1Thr1; - /** IOPPCIFIR_0[1] + /** IOPCIFIR_0[1] * FIR_STATUS_REG_G3_PLL_CCERR_STATUS */ - (IopPciFir_0, bit(1)) ? TBDDefaultCallout; + (IopPciFir_0, bit(1)) ? calloutPHB0Thr1; - /** IOPPCIFIR_1[1] + /** IOPCIFIR_1[1] * FIR_STATUS_REG_G3_PLL_CCERR_STATUS */ - (IopPciFir_1, bit(1)) ? TBDDefaultCallout; + (IopPciFir_1, bit(1)) ? calloutPHB1Thr1; - /** IOPPCIFIR_0[2] + /** IOPCIFIR_0[2] * FIR_STATUS_REG_TX_A_ERR_STATUS */ - (IopPciFir_0, bit(2)) ? TBDDefaultCallout; + (IopPciFir_0, bit(2)) ? calloutPHB0Thr1; - /** IOPPCIFIR_1[2] + /** IOPCIFIR_1[2] * FIR_STATUS_REG_TX_A_ERR_STATUS */ - (IopPciFir_1, bit(2)) ? TBDDefaultCallout; + (IopPciFir_1, bit(2)) ? calloutPHB1Thr1; - /** IOPPCIFIR_0[3] + /** IOPCIFIR_0[3] * FIR_STATUS_REG_TX_B_ERR_STATUS */ - (IopPciFir_0, bit(3)) ? TBDDefaultCallout; + (IopPciFir_0, bit(3)) ? calloutPHB0Thr1; - /** IOPPCIFIR_1[3] + /** IOPCIFIR_1[3] * FIR_STATUS_REG_TX_B_ERR_STATUS */ - (IopPciFir_1, bit(3)) ? TBDDefaultCallout; + (IopPciFir_1, bit(3)) ? calloutPHB1Thr1; - /** IOPPCIFIR_0[4] + /** IOPCIFIR_0[4] * FIR_STATUS_REG_RX_A_ERR_STATUS */ - (IopPciFir_0, bit(4)) ? TBDDefaultCallout; + (IopPciFir_0, bit(4)) ? calloutPHB0Thr1; - /** IOPPCIFIR_1[4] + /** IOPCIFIR_1[4] * FIR_STATUS_REG_RX_A_ERR_STATUS */ - (IopPciFir_1, bit(4)) ? TBDDefaultCallout; + (IopPciFir_1, bit(4)) ? calloutPHB1Thr1; - /** IOPPCIFIR_0[5] + /** IOPCIFIR_0[5] * FIR_STATUS_REG_RX_B_ERR_STATUS */ - (IopPciFir_0, bit(5)) ? TBDDefaultCallout; + (IopPciFir_0, bit(5)) ? calloutPHB0Thr1; - /** IOPPCIFIR_1[5] + /** IOPCIFIR_1[5] * FIR_STATUS_REG_RX_B_ERR_STATUS */ - (IopPciFir_1, bit(5)) ? TBDDefaultCallout; + (IopPciFir_1, bit(5)) ? calloutPHB1Thr1; - /** IOPPCIFIR_0[6] + /** IOPCIFIR_0[6] * FIR_STATUS_REG_ZCAL_B_ERR_STATUS */ - (IopPciFir_0, bit(6)) ? TBDDefaultCallout; + (IopPciFir_0, bit(6)) ? calloutPHB0Thr1; - /** IOPPCIFIR_1[6] + /** IOPCIFIR_1[6] * FIR_STATUS_REG_ZCAL_B_ERR_STATUS */ - (IopPciFir_1, bit(6)) ? TBDDefaultCallout; + (IopPciFir_1, bit(6)) ? calloutPHB1Thr1; - /** IOPPCIFIR_0[7] + /** IOPCIFIR_0[7] * FIR_STATUS_REG_SCOM_FIR_PERR0_STATUS */ - (IopPciFir_0, bit(7)) ? TBDDefaultCallout; + (IopPciFir_0, bit(7)) ? calloutPHB0Thr1; - /** IOPPCIFIR_1[7] + /** IOPCIFIR_1[7] * FIR_STATUS_REG_SCOM_FIR_PERR0_STATUS */ - (IopPciFir_1, bit(7)) ? TBDDefaultCallout; + (IopPciFir_1, bit(7)) ? calloutPHB1Thr1; - /** IOPPCIFIR_0[8] + /** IOPCIFIR_0[8] * FIR_STATUS_REG_SCOM_FIR_PERR1_STATUS */ - (IopPciFir_0, bit(8)) ? TBDDefaultCallout; + (IopPciFir_0, bit(8)) ? defaultMaskedError; - /** IOPPCIFIR_1[8] + /** IOPCIFIR_1[8] * FIR_STATUS_REG_SCOM_FIR_PERR1_STATUS */ - (IopPciFir_1, bit(8)) ? TBDDefaultCallout; + (IopPciFir_1, bit(8)) ? defaultMaskedError; }; ################################################################################ # Actions specific to PCIE chiplet ################################################################################ +/**Determine relevant PCI endpoints associated with PHB0 + * and callout it on first instance. + */ +actionclass calloutPHB0Thr1 +{ + #FIXME RTC 23127 Investigation required to determine which PCI endpoint + # should be blamed. + TBDDefaultCallout; +}; + +/**Determine relevant PCI endpoints associated with PHB1 + * and callout it on first instance. + */ +actionclass calloutPHB1Thr1 +{ + #FIXME RTC 23127 Investigation required to determine which PCI endpoint + # should be blamed. + TBDDefaultCallout; +}; diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule index f222abb8e..7973a1d9e 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule @@ -638,52 +638,58 @@ group gPbamFir filter singlebit /** PBAMFIR[0] * INVALID_TRANSFER_SIZE */ - (PbamFir, bit(0)) ? TBDDefaultCallout; + (PbamFir, bit(0)) ? SelfHighThr1; /** PBAMFIR[1] * INVALID_COMMAND */ - (PbamFir, bit(1)) ? TBDDefaultCallout; + (PbamFir, bit(1)) ? SelfHighThr1; /** PBAMFIR[2] * INVALID_ADDRESS_ALIGNMENT */ - (PbamFir, bit(2)) ? TBDDefaultCallout; + (PbamFir, bit(2)) ? SelfHighThr1; /** PBAMFIR[3] * OPB_ERROR */ - (PbamFir, bit(3)) ? TBDDefaultCallout; + (PbamFir, bit(3)) ? SelfHighThr1; /** PBAMFIR[4] * OPB_TIMEOUT */ - (PbamFir, bit(4)) ? TBDDefaultCallout; + (PbamFir, bit(4)) ? SelfHighThr1; /** PBAMFIR[5] * OPB_MASTER_HANG_TIMEOUT */ - (PbamFir, bit(5)) ? TBDDefaultCallout; + (PbamFir, bit(5)) ? SelfHighThr1; /** PBAMFIR[6] * CMD_BUFFER_PAR_ERR */ - (PbamFir, bit(6)) ? TBDDefaultCallout; + (PbamFir, bit(6)) ? SelfHighThr1; /** PBAMFIR[7] * DAT_BUFFER_PAR_ERR */ - (PbamFir, bit(7)) ? TBDDefaultCallout; + (PbamFir, bit(7)) ? SelfHighThr1; - /** PBAMFIR[10] - * FIR_PARITY_ERR2 + /** PBAMFIR[8] + * RETURNQ_ERROR */ - (PbamFir, bit(10)) ? TBDDefaultCallout; + (PbamFir, bit(8)) ? defaultMaskedError; - /** PBAMFIR[11] + /** PBAMFIR[9] + * RESERVED + */ + (PbamFir, bit(9)) ? defaultMaskedError; + + /** PBAMFIR[10|11] * FIR_PARITY_ERR */ - (PbamFir, bit(11)) ? TBDDefaultCallout; + (PbamFir, bit(10|11)) ? defaultMaskedError; + }; ################################################################################ diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_XBUS.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_XBUS.rule index 204c9a6b4..5acfbb4da 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_XBUS.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_XBUS.rule @@ -163,6 +163,11 @@ group gXbusLFir filter singlebit # XBUS Chiplet PBENFIR ################################################################################ +#FIXME RTC 23127 We need to revisit the Firmware action +#FabricBus_CE_With_Repair. Description is same as P7 but +#it appears it may need change.This appilies to PBEN FIR. +#calloutXbus0InterfaceTh5pDay may need modification. + rule PbenFir { CHECK_STOP: PBENFIR & ~PBENFIR_MASK & ~PBENFIR_ACT0 & ~PBENFIR_ACT1; @@ -174,112 +179,122 @@ group gPbenFir filter singlebit /** PBENFIR[0] * X0_LINK_RCV_CE: x0 link rcv ce */ - (PbenFir, bit(0)) ? TBDDefaultCallout; + (PbenFir, bit(0)) ? calloutXbus0InterfaceTh5pDay; /** PBENFIR[1] * X0_LINK_RCV_DERR: x0 link rcv derr */ - (PbenFir, bit(1)) ? TBDDefaultCallout; + (PbenFir, bit(1)) ? defaultMaskedError; /** PBENFIR[2] * X0_LINK_RCV_UE: x0 link rcv ue */ - (PbenFir, bit(2)) ? TBDDefaultCallout; + (PbenFir, bit(2)) ? calloutXbus0InterfaceTh1; /** PBENFIR[3] * X1_LINK_RCV_CE: x1 link rcv ce */ - (PbenFir, bit(3)) ? TBDDefaultCallout; + (PbenFir, bit(3)) ? calloutXbus1InterfaceTh5pDay; /** PBENFIR[4] * X1_LINK_RCV_DERR: x1 link rcv derr */ - (PbenFir, bit(4)) ? TBDDefaultCallout; + (PbenFir, bit(4)) ? defaultMaskedError; /** PBENFIR[5] * X1_LINK_RCV_UE: x1 link rcv ue */ - (PbenFir, bit(5)) ? TBDDefaultCallout; + (PbenFir, bit(5)) ? calloutXbus1InterfaceTh1; /** PBENFIR[6] * X2_LINK_RCV_CE: x2 link rcv ce */ - (PbenFir, bit(6)) ? TBDDefaultCallout; + (PbenFir, bit(6)) ? calloutXbus2InterfaceTh5pDay; /** PBENFIR[7] * X2_LINK_RCV_DERR: x2 link rcv derr */ - (PbenFir, bit(7)) ? TBDDefaultCallout; + (PbenFir, bit(7)) ? defaultMaskedError; /** PBENFIR[8] * X2_LINK_RCV_UE: x2 link rcv ue */ - (PbenFir, bit(8)) ? TBDDefaultCallout; + (PbenFir, bit(8)) ? calloutXbus2InterfaceTh1; /** PBENFIR[9] * X3_LINK_RCV_CE: x3 link rcv ce */ - (PbenFir, bit(9)) ? TBDDefaultCallout; + (PbenFir, bit(9)) ? calloutXbus3InterfaceTh5pDay; /** PBENFIR[10] * X3_LINK_RCV_DERR: x3 link rcv derr */ - (PbenFir, bit(10)) ? TBDDefaultCallout; + (PbenFir, bit(10)) ? defaultMaskedError; /** PBENFIR[11] * X3_LINK_RCV_UE: x3 link rcv ue */ - (PbenFir, bit(11)) ? TBDDefaultCallout; + (PbenFir, bit(11)) ? calloutXbus3InterfaceTh1; /** PBENFIR[12] * X_LINK_SND_CE: x link rcv ce */ - (PbenFir, bit(12)) ? TBDDefaultCallout; + (PbenFir, bit(12)) ? SelfHighThr5PerHour; /** PBENFIR[13] * X_LINK_SND_SUE: x link rcv sue */ - (PbenFir, bit(13)) ? TBDDefaultCallout; + (PbenFir, bit(13)) ? defaultMaskedError; /** PBENFIR[14] * X_LINK_SND_UE: x link rcv ue */ - (PbenFir, bit(14)) ? TBDDefaultCallout; + (PbenFir, bit(14)) ? SelfHighThr1; /** PBENFIR[15] * X_LINK_CR_OVERFLOW: x link command/response/data buffer overflow */ - (PbenFir, bit(15)) ? TBDDefaultCallout; + (PbenFir, bit(15)) ? callout2ndLvlMed; /** PBENFIR[16] * X0_LINK_FMR_ERR: x0 link framer error */ - (PbenFir, bit(16)) ? TBDDefaultCallout; + (PbenFir, bit(16)) ? SelfHighThr1; /** PBENFIR[17] * X1_LINK_FMR_ERR: x1 link framer error */ - (PbenFir, bit(17)) ? TBDDefaultCallout; + (PbenFir, bit(17)) ? SelfHighThr1; /** PBENFIR[18] * X2_LINK_FMR_ERR: x2 link framer error */ - (PbenFir, bit(18)) ? TBDDefaultCallout; + (PbenFir, bit(18)) ? SelfHighThr1; /** PBENFIR[19] * X3_LINK_FMR_ERR: x3 link framer error */ - (PbenFir, bit(19)) ? TBDDefaultCallout; + (PbenFir, bit(19)) ? SelfHighThr1; /** PBENFIR[20] * X_LINK_PSR_ERR: x link parser error */ - (PbenFir, bit(20)) ? TBDDefaultCallout; + (PbenFir, bit(20)) ? SelfHighThr1; + + /** PBENFIR[21:30] + * Reserved + */ + (PbenFir, bit(21|22|23|24|25|26|27|28|29|30)) ? defaultMaskedError; - /** PBENFIR[36] + /** PBENFIR[31:35] + * Reserved + */ + (PbenFir, bit(31|32|33|34|35)) ? defaultMaskedError; + + /** PBENFIR[36:37] * FIR_SCOM_ERR: pben iox fir_scom_err */ - (PbenFir, bit(36)) ? TBDDefaultCallout; + (PbenFir, bit(36|37)) ? defaultMaskedError; }; ################################################################################ @@ -658,6 +673,14 @@ group gIoxFir_3 filter singlebit # Actions specific to XBUS chiplet ################################################################################ +/** Callout the XBUS 0 interface */ +actionclass calloutXbus0Interface +{ + callout(connected(TYPE_XBUS, 0), MRU_MEDA); + funccall("calloutPeerBus_xbus0"); + callout(procedure(PassiveFabric_OnNode_ENUM), MRU_LOW); +}; + /** Callout the XBUS 1 interface */ actionclass calloutXbus1Interface { @@ -666,9 +689,34 @@ actionclass calloutXbus1Interface callout(procedure(PassiveFabric_OnNode_ENUM), MRU_LOW); }; +/** Callout the XBUS 2 interface */ +actionclass calloutXbus2Interface +{ + callout(connected(TYPE_XBUS, 2), MRU_MEDA); + funccall("calloutPeerBus_xbus2"); + callout(procedure(PassiveFabric_OnNode_ENUM), MRU_LOW); +}; + +/** Callout the XBUS 3 interface */ +actionclass calloutXbus3Interface +{ + callout(connected(TYPE_XBUS, 3), MRU_MEDA); + funccall("calloutPeerBus_xbus3"); + callout(procedure(PassiveFabric_OnNode_ENUM), MRU_LOW); +}; + +/** Callout the XBUS 0 interface, threshold 1 */ +actionclass calloutXbus0InterfaceTh1 { calloutXbus0Interface; threshold1; }; + /** Callout the XBUS 1 interface, threshold 1 */ actionclass calloutXbus1InterfaceTh1 { calloutXbus1Interface; threshold1; }; +/** Callout the XBUS 2 interface, threshold 1 */ +actionclass calloutXbus2InterfaceTh1 { calloutXbus2Interface; threshold1; }; + +/** Callout the XBUS 3 interface, threshold 1 */ +actionclass calloutXbus3InterfaceTh1 { calloutXbus3Interface; threshold1; }; + /** Lane Repair: spare deployed - XBUS 1 */ actionclass spareDeployed_xbus1 { calloutXbus1Interface; funccall("spareDeployed_xbus1"); }; @@ -681,3 +729,29 @@ actionclass maxSparesExceeded_xbus1 actionclass tooManyBusErrors_xbus1 { calloutXbus1InterfaceTh1; funccall("tooManyBusErrors_xbus1"); }; +/** Callout the XBUS 0 interface, threshold 5 per day */ +actionclass calloutXbus0InterfaceTh5pDay +{ + calloutXbus0Interface; + threshold5pday; +}; + +/** Callout the XBUS 1 interface, threshold 5 per day */ +actionclass calloutXbus1InterfaceTh5pDay +{ + calloutXbus1Interface; + threshold5pday; +}; + +/** Callout the XBUS 2 interface, threshold 5 per day */ +actionclass calloutXbus2InterfaceTh5pDay +{ calloutXbus2Interface; + threshold5pday; +}; + +/** Callout the XBUS 3 interface, threshold 5 per day */ +actionclass calloutXbus3InterfaceTh5pDay +{ + calloutXbus3Interface; + threshold5pday; +}; diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule index 0a337b140..2a0eeac65 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule @@ -163,10 +163,10 @@ }; ############################################################################ - # PCIE Chiplet IOPPCIFIR_0 + # PCIE Chiplet IOPCIFIR_0 ############################################################################ - register IOPPCIFIR_0 + register IOPCIFIR_0 { name "IOP.IOP_X880.IOP_PMA0.IOP_PMA_PLL0.IOP_PMA_PLL_RLM.IOP_PMA_PLL_REG_CONTROL.FIR_STATUS_REG"; scomaddr 0x09011400; @@ -175,36 +175,36 @@ capture group default; }; - register IOPPCIFIR_0_MASK + register IOPCIFIR_0_MASK { name "IOP.IOP_X880.IOP_PMA0.IOP_PMA_PLL0.IOP_PMA_PLL_RLM.IOP_PMA_PLL_REG_CONTROL.FIR_MASK_REG"; scomaddr 0x09011403; capture group default; }; - register IOPPCIFIR_0_ACT0 + register IOPCIFIR_0_ACT0 { name "IOP.IOP_X880.IOP_PMA0.IOP_PMA_PLL0.IOP_PMA_PLL_RLM.IOP_PMA_PLL_REG_CONTROL.FIR_ACTION0_REG"; scomaddr 0x09011406; capture type secondary; capture group default; - capture req nonzero("IOPPCIFIR_0"); + capture req nonzero("IOPCIFIR_0"); }; - register IOPPCIFIR_0_ACT1 + register IOPCIFIR_0_ACT1 { name "IOP.IOP_X880.IOP_PMA0.IOP_PMA_PLL0.IOP_PMA_PLL_RLM.IOP_PMA_PLL_REG_CONTROL.FIR_ACTION1_REG"; scomaddr 0x09011407; capture type secondary; capture group default; - capture req nonzero("IOPPCIFIR_0"); + capture req nonzero("IOPCIFIR_0"); }; ############################################################################ - # PCIE Chiplet IOPPCIFIR_1 + # PCIE Chiplet IOPCIFIR_1 ############################################################################ - register IOPPCIFIR_1 + register IOPCIFIR_1 { name "IOP.IOP_X881.IOP_PMA0.IOP_PMA_PLL0.IOP_PMA_PLL_RLM.IOP_PMA_PLL_REG_CONTROL.FIR_STATUS_REG"; scomaddr 0x09011840; @@ -213,28 +213,28 @@ capture group default; }; - register IOPPCIFIR_1_MASK + register IOPCIFIR_1_MASK { name "IOP.IOP_X881.IOP_PMA0.IOP_PMA_PLL0.IOP_PMA_PLL_RLM.IOP_PMA_PLL_REG_CONTROL.FIR_MASK_REG"; scomaddr 0x09011843; capture group default; }; - register IOPPCIFIR_1_ACT0 + register IOPCIFIR_1_ACT0 { name "IOP.IOP_X881.IOP_PMA0.IOP_PMA_PLL0.IOP_PMA_PLL_RLM.IOP_PMA_PLL_REG_CONTROL.FIR_ACTION0_REG"; scomaddr 0x09011846; capture type secondary; capture group default; - capture req nonzero("IOPPCIFIR_1"); + capture req nonzero("IOPCIFIR_1"); }; - register IOPPCIFIR_1_ACT1 + register IOPCIFIR_1_ACT1 { name "IOP.IOP_X881.IOP_PMA0.IOP_PMA_PLL0.IOP_PMA_PLL_RLM.IOP_PMA_PLL_REG_CONTROL.FIR_ACTION1_REG"; scomaddr 0x09011847; capture type secondary; capture group default; - capture req nonzero("IOPPCIFIR_1"); + capture req nonzero("IOPCIFIR_1"); }; diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C b/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C index 306c08358..c6de9e5f9 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C +++ b/src/usr/diag/prdf/common/plat/pegasus/prdfP8Proc.C @@ -619,7 +619,10 @@ int32_t calloutPeerBus_##BUS##POS( ExtensibleChip * i_chip, \ { return calloutPeerBus( i_chip, i_sc, TYPE, POS ); } \ PRDF_PLUGIN_DEFINE( Proc, calloutPeerBus_##BUS##POS ); +PLUGIN_CALLOUT_PEER_BUS( xbus, TYPE_XBUS, 0 ) PLUGIN_CALLOUT_PEER_BUS( xbus, TYPE_XBUS, 1 ) +PLUGIN_CALLOUT_PEER_BUS( xbus, TYPE_XBUS, 2 ) +PLUGIN_CALLOUT_PEER_BUS( xbus, TYPE_XBUS, 3 ) PLUGIN_CALLOUT_PEER_BUS( abus, TYPE_ABUS, 0 ) PLUGIN_CALLOUT_PEER_BUS( abus, TYPE_ABUS, 1 ) -- cgit v1.2.1