From 07ca82453c9066d218055ec9403e84be5d52957a Mon Sep 17 00:00:00 2001 From: Prem Shanker Jha Date: Mon, 11 Mar 2013 01:49:35 -0500 Subject: Change in design of GetBitString - It is no longer necessary to call GetBitString function of a register only when it is read atleast once. RTC: 66086 Change-Id: Ia67903c03e4aea9cc5a128b05eecacdd9af59c89 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3501 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3856 --- .../framework/register/prdfOperatorRegister.H | 4 +-- .../common/framework/register/prdfRegisterCache.C | 40 +++++++++++++++++----- .../common/framework/register/prdfRegisterCache.H | 16 +++++++++ .../common/framework/register/prdfScomRegister.C | 32 +++++++++++++++-- .../common/framework/register/prdfScomRegister.H | 4 +-- 5 files changed, 81 insertions(+), 15 deletions(-) (limited to 'src/usr/diag') diff --git a/src/usr/diag/prdf/common/framework/register/prdfOperatorRegister.H b/src/usr/diag/prdf/common/framework/register/prdfOperatorRegister.H index fff6a1642..8f866202b 100755 --- a/src/usr/diag/prdf/common/framework/register/prdfOperatorRegister.H +++ b/src/usr/diag/prdf/common/framework/register/prdfOperatorRegister.H @@ -401,7 +401,7 @@ class NullRegister : public SCAN_COMM_REGISTER_CLASS return *this; } - virtual uint32_t Read() { return 0; } + virtual uint32_t Read() { return 0; } virtual uint32_t Write() { return 0; } const BIT_STRING_CLASS * GetBitString( @@ -558,7 +558,7 @@ class ConstantRegister : public SCAN_COMM_REGISTER_CLASS return *this; } - virtual uint32_t Read() { return SUCCESS; } + virtual uint32_t Read() { return SUCCESS; } virtual uint32_t Write() { return SUCCESS; } const BIT_STRING_CLASS * GetBitString( diff --git a/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.C b/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.C index 228f34c0c..2c168e2e8 100644 --- a/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.C +++ b/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.C @@ -48,22 +48,20 @@ BIT_STRING_CLASS & RegDataCache::read( const SCAN_COMM_REGISTER_CLASS * i_pRegister, bool & o_readStat ) { - BIT_STRING_CLASS * l_pBitString = NULL; - o_readStat = false; ScomRegisterAccess l_scomAccessKey ( *i_pRegister,i_pChip ); - CacheDump::iterator itDump = iv_cachedRead.find( l_scomAccessKey ); - if( iv_cachedRead.end() != itDump ) - { - o_readStat = true; - l_pBitString = itDump->second ; - } - else + BIT_STRING_CLASS * l_pBitString = queryCache( l_scomAccessKey ); + o_readStat = false; + if( NULL == l_pBitString ) { // Creating new entry l_pBitString = new BitStringBuffer( i_pRegister->GetBitLength( ) ); // Adding register in the cache iv_cachedRead[l_scomAccessKey] = l_pBitString; } + else + { + o_readStat = true; + } return *l_pBitString; } @@ -101,4 +99,28 @@ void RegDataCache::flush( ExtensibleChip* i_pChip, //------------------------------------------------------------------------------ +BIT_STRING_CLASS * RegDataCache::queryCache( + ExtensibleChip* i_pChip, + const SCAN_COMM_REGISTER_CLASS * i_pRegister )const +{ + ScomRegisterAccess l_scomAccessKey ( *i_pRegister,i_pChip ); + return queryCache( l_scomAccessKey ); +} + +//------------------------------------------------------------------------------ + +BIT_STRING_CLASS * RegDataCache::queryCache( + const ScomRegisterAccess & i_scomAccessKey ) const +{ + BIT_STRING_CLASS * l_pBitString = NULL; + CacheDump::const_iterator itDump = iv_cachedRead.find( i_scomAccessKey ); + if( iv_cachedRead.end() != itDump ) + { + l_pBitString = itDump->second ; + } + + return l_pBitString; +} + +//------------------------------------------------------------------------------ }// end namespace PRDF diff --git a/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.H b/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.H index b2eb2682c..411937af6 100644 --- a/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.H +++ b/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.H @@ -97,6 +97,22 @@ class RegDataCache */ void flush( ExtensibleChip* i_pChip, const SCAN_COMM_REGISTER_CLASS * i_pRegister ); + /** + * @brief Queries if a specific entry exist in cache. + * @param i_pChip The rulechip associated with the register. + * @param i_pRegister base part of register entry to be queried in cache. + * @return pointer to cache entry associated with a given register + */ + BIT_STRING_CLASS * queryCache( ExtensibleChip* i_pChip, + const SCAN_COMM_REGISTER_CLASS * i_pRegister )const; + /** + * @brief Queries if a specific entry exist in cache. + * @param i_scomAccessKey Reference to register to be queried. + * @return pointer to cache entry associated with a given register + */ + + BIT_STRING_CLASS * queryCache( + const ScomRegisterAccess & i_scomAccessKey )const; private: // data typedef std::map CacheDump; diff --git a/src/usr/diag/prdf/common/framework/register/prdfScomRegister.C b/src/usr/diag/prdf/common/framework/register/prdfScomRegister.C index 2fdddf170..c2631ebfa 100755 --- a/src/usr/diag/prdf/common/framework/register/prdfScomRegister.C +++ b/src/usr/diag/prdf/common/framework/register/prdfScomRegister.C @@ -84,13 +84,41 @@ void ScomRegister::SetBitString( const BIT_STRING_CLASS *bs ) const BIT_STRING_CLASS *ScomRegister::GetBitString( ATTENTION_TYPE i_type )const { + BIT_STRING_CLASS * l_pString = NULL; bool l_readStat = false; - return &( readCache( l_readStat ) ); + //Expectation is, caller shall first call Read( ) and then GetBitString. + //This leaves an opportunity of mistake. One may call GetBitString without + //calling Read() first. As a result, a stray entry in cache gets created + //which shall never be in sync with hardware. + + //As a solution, first cache is queried.If the given entry exist, bitString + //pointer is returned else a new entry is created. This new entry is + //synchronized with hardware and then pointer to bit string is returned to + //caller. + RegDataCache & regDump = RegDataCache::getCachedRegisters(); + l_pString = regDump.queryCache( getChip( ), this ); + + if( NULL == l_pString ) + { + ForceRead( ); + //if ForceRead fails, a dummy entry is returned that way analysis shall + //fail gracefully else we return a new entry which is in sync with + //hardware + l_pString = &( readCache( l_readStat ) ); + + } + return l_pString; } // --------------------------------------------------------------------- BIT_STRING_CLASS & ScomRegister::AccessBitString( ) { bool l_readStat = false; + //Expectation is, caller shall first call Read( ) and then AccessBitString. + //This leaves an opportunity of mistake. One may call AccessBitString + //without calling Read() first. As a result, a stray entry in cache gets + //created which shall never be in sync with hardware. Calling Read( ) before + //readCache( ) inside function eliminates this scenario. + Read( ); return ( readCache( l_readStat ) ); } @@ -113,7 +141,7 @@ uint32_t ScomRegister::Read( ) } // ---------------------------------------------------------------------------- -uint32_t ScomRegister::ForceRead() +uint32_t ScomRegister::ForceRead() const { int32_t rc = SUCCESS; bool l_readStat = false; diff --git a/src/usr/diag/prdf/common/framework/register/prdfScomRegister.H b/src/usr/diag/prdf/common/framework/register/prdfScomRegister.H index 41a611061..1717b27c8 100755 --- a/src/usr/diag/prdf/common/framework/register/prdfScomRegister.H +++ b/src/usr/diag/prdf/common/framework/register/prdfScomRegister.H @@ -102,13 +102,13 @@ public: * @brief Directly reads from hardware register * @return SUCCESS|FAIL */ - virtual uint32_t ForceRead(); + virtual uint32_t ForceRead() const ; /** * @brief Returns contents of register.If entry does not exist in cache * a fresh entry is created and hardware is read. * @return SUCCESS|FAIL */ - virtual uint32_t Read( ); + virtual uint32_t Read( ) ; /** * @brief Writes cache contents to register. * @return SUCCESS|FAIL -- cgit v1.2.1