From db08d0310a57fcc30d75a67e1692a1c1c5a812c2 Mon Sep 17 00:00:00 2001 From: Prem Shanker Jha Date: Sat, 29 Mar 2014 04:32:09 -0500 Subject: PRD: FIR action update Changed FIR action to match with FFDC ver 78 CQ:SW253772 Backport: release-fips810 Change-Id: Ia19b3521fe4bd9a9ab25843fe8d574995728f2e4 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10021 Tested-by: Jenkins Server Reviewed-by: Christopher T. Phan Reviewed-by: Sachin Gupta Reviewed-by: A. Patrick Williams III Reviewed-by: Zane Shelley Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10442 --- src/usr/diag/prdf/common/plat/pegasus/Ex.rule | 58 ++-- src/usr/diag/prdf/common/plat/pegasus/Mcs.rule | 12 +- .../prdf/common/plat/pegasus/Proc_acts_PB.rule | 172 +++++----- .../prdf/common/plat/pegasus/Proc_acts_PCIE.rule | 346 ++------------------- .../prdf/common/plat/pegasus/Proc_acts_TP.rule | 4 +- .../prdf/common/plat/pegasus/Proc_regs_PCIE.rule | 27 -- 6 files changed, 161 insertions(+), 458 deletions(-) (limited to 'src/usr/diag/prdf/common') diff --git a/src/usr/diag/prdf/common/plat/pegasus/Ex.rule b/src/usr/diag/prdf/common/plat/pegasus/Ex.rule index 1c45327b9..feaea7013 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Ex.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Ex.rule @@ -1123,9 +1123,9 @@ group gCoreFir filter singlebit (CoreFir, bit(19)) ? calloutExThr5pHr; /** COREFIR[20] - * UNUSED_3 + * HV Corruption */ - (CoreFir, bit(20)) ? defaultMaskedError; + (CoreFir, bit(20)) ? SelfHighThr1; /** COREFIR[21] * FX_LOG_CHKSTOP_ERR: logic core check stop @@ -1155,7 +1155,7 @@ group gCoreFir filter singlebit /** COREFIR[26] * RECOV_IN_MAINT_ERR: 26 = recov_in_maint */ - (CoreFir, bit(26)) ? callout2ndLvlDumpShNoGard; + (CoreFir, bit(26)) ? callout2ndLvlMedThr1NoGard; /** COREFIR[27] * DU_LOG_REC_ERR: logic recoverable error @@ -1165,7 +1165,7 @@ group gCoreFir filter singlebit /** COREFIR[28] * DU_LOG_CHKSTOP_ERR: logic core check stop */ - (CoreFir, bit(28)) ? defaultMaskedError; + (CoreFir, bit(28)) ? SelfHighThr1; /** COREFIR[29] * LSU_SRAM_PARITY_ERR: SRAM recoverable error (DCACHE parity error, etc.) @@ -1193,12 +1193,14 @@ group gCoreFir filter singlebit (CoreFir, bit(33)) ? defaultMaskedError; /** COREFIR[34] - * LS_SLB_MULTIHIT_ERR: special recovery error SLBFEE multi hit error occurred + * LS_SLB_MULTIHIT_ERR: special recovery error SLBFEE multi hit + * error occurred */ (CoreFir, bit(34)) ? defaultMaskedError; /** COREFIR[35] - * LS_DERAT_MULTIHIT_ERR: special recovery error ERAT multi hit error occurred + * LS_DERAT_MULTIHIT_ERR: special recovery error ERAT multi hit error + * occurred */ (CoreFir, bit(35)) ? defaultMaskedError; @@ -1316,7 +1318,7 @@ group gCoreFir filter singlebit /** COREFIR[60] * DBG_FIR_CHECKSTOP_ON_TRIGGER: debug Trigger Error inject */ - (CoreFir, bit(60)) ? defaultMaskedError; + (CoreFir, bit(60)) ? SelfHighThr1; /** COREFIR[61] * SP_INJ_REC_ERR: SCOM or Firmware recoverable Error Inject @@ -1331,7 +1333,7 @@ group gCoreFir filter singlebit /** COREFIR[63] * SPRD_PHYP_ERR_INJ: Phyp Xstop via SPRC / SPRD */ - (CoreFir, bit(63)) ? calloutProcLow2ndLvlMedThr1dumpSh; + (CoreFir, bit(63)) ? calloutProcLow2ndLvlMedThr1; }; ################################################################################ @@ -1652,22 +1654,22 @@ group gL3Fir filter singlebit /** L3FIR[19] * Reserved field (Access type is l3_flink_0_load_ack_dead) */ - (L3Fir, bit(19)) ? callout2ndLvlMedThr1NoGard; + (L3Fir, bit(19)) ? defaultMaskedError; /** L3FIR[20] * Reserved field (Access type is l3_flink_0_store_ack_dead) */ - (L3Fir, bit(20)) ? callout2ndLvlMedThr1NoGard; + (L3Fir, bit(20)) ? defaultMaskedError; /** L3FIR[21] * Reserved field (Access type is l3_flink_1_load_ack_dead) */ - (L3Fir, bit(21)) ? callout2ndLvlMedThr1NoGard; + (L3Fir, bit(21)) ? defaultMaskedError; /** L3FIR[22] * Reserved field (Access type is l3_flink_1_store_ack_dead) */ - (L3Fir, bit(22)) ? callout2ndLvlMedThr1NoGard; + (L3Fir, bit(22)) ? defaultMaskedError; /** L3FIR[23] * L3 Machine Hang @@ -1782,22 +1784,22 @@ group gNcuFir filter singlebit /** NCUFIR[4] * ST_FOREIGN0_ACK_DEAD: Store received ack_dead on foreign link0. */ - (NcuFir, bit(4)) ? SelfHighThr32PerDay; + (NcuFir, bit(4)) ? defaultMaskedError; /** NCUFIR[5] * ST_FOREIGN1_ACK_DEAD: Store received ack_dead on foreign link1. */ - (NcuFir, bit(5)) ? SelfHighThr32PerDay; + (NcuFir, bit(5)) ? defaultMaskedError; /** NCUFIR[6] * LD_FOREIGN0_ACK_DEAD: Load received ack_dead on foreign link0. */ - (NcuFir, bit(6)) ? SelfHighThr32PerDay; + (NcuFir, bit(6)) ? defaultMaskedError; /** NCUFIR[7] * LD_FOREIGN1_ACK_DEAD: Load received ack_dead on foreign link1. */ - (NcuFir, bit(7)) ? SelfHighThr32PerDay; + (NcuFir, bit(7)) ? defaultMaskedError; /** NCUFIR[8] * STQ_DATA_PARITY_ERR: Store data parity error from regfile detected. @@ -1832,12 +1834,12 @@ group gNcuFir filter singlebit /** NCUFIR[14] * IMA_FOREIGN0_ACK_DEAD: IMA received ack_dead on foreign link0. */ - (NcuFir, bit(14)) ? calloutExLowSecLvlThr1MedDumpSh; + (NcuFir, bit(14)) ? defaultMaskedError; /** NCUFIR[15] * IMA_FOREIGN1_ACK_DEAD: IMA received ack_dead on foreign link1. */ - (NcuFir, bit(15)) ? calloutExLowSecLvlThr1MedDumpSh; + (NcuFir, bit(15)) ? defaultMaskedError; /** NCUFIR[16] * HTM_GOT_ACK_DEAD: HTM received ack_dead on any foreign link. @@ -2007,12 +2009,13 @@ actionclass SelfAndLevel2MedThr5PerHrNoGard gard(NoGard); }; -/** callouts Proc on first instance. Calls for second level support as well, - * garding not done */ +/** callouts Proc on first instance. Calls for second level support as well */ actionclass calloutProcLow2ndLvlMedThr1 { calloutParentProcLow; - callout2ndLvlMedThr1NoGard; + callout2ndLvlMed; + threshold1; + }; /** callouts Proc on first instance. Calls for second level support as well. @@ -2049,12 +2052,11 @@ actionclass calloutExThr32pDay SelfMedThr32PerDay; }; -/** callout Ex,Sec Level on first instance ,initiate software - * and Hardware dump, garding not done */ +/** callout Ex,Sec Level on first instance ,initiate core dump, + * garding not done */ actionclass calloutExAndSecLvlThr1NoGard { calloutSelfAndLevel2MedThr1; - dumpSH; gard(NoGard); }; @@ -2063,11 +2065,3 @@ actionclass calloutExLowSecLvlThr1MedDumpSh SelfLowLevel2MedThr1; dumpSH; }; - -/** callouts Proc on first instance. Calls for second level support as well - * Initiate an SH dump, no gard */ -actionclass calloutProcLow2ndLvlMedThr1dumpSh -{ - calloutProcLow2ndLvlMedThr1; - dumpSH; -}; diff --git a/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule b/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule index 155d4f0ef..c3b10943c 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule @@ -332,7 +332,7 @@ group gMciFir attntype CHECK_STOP, RECOVERABLE, SPECIAL, UNIT_CS /** MCIFIR[27] * MCIFIRQ_MCS_COMMAND_LIST_TIMEOUT_DUE_TO_POWERBUS */ - (MciFir, bit(27)) ? calloutDmiBusAndLvl2Th1; + (MciFir, bit(27)) ? callout2ndLvlMedThr1NoGard; /** MCIFIR[28] * MCIFIRQ_MULTIPLE_RCMD_OR_CRESP_ACTIVE @@ -430,7 +430,7 @@ group gMciFir attntype CHECK_STOP, RECOVERABLE, SPECIAL, UNIT_CS /** MCIFIR[46] * MCIFIRQ_INVALID_CENTAUR_BYPASS */ - (MciFir, bit(46)) ? calloutDmiBusSelfLowConnHigh; + (MciFir, bit(46)) ? calloutDmiBusSelfLowConnMed; /** MCIFIR[47] * MCS WRITE DATAFLOW SUE @@ -545,7 +545,7 @@ actionclass analyzeSpareBitAndThr actionclass mcifirBit48 { threshold32pday; - try( funccall("dd1mcifirBit48"), calloutDmiBusSelfLowConnHigh ); + try( funccall("dd1mcifirBit48"), calloutDmiBusSelfLowConnMed ); }; /** The plugin checks if the Proc is either Murano DD2 or Venice DD1. @@ -554,14 +554,14 @@ actionclass mcifirBit48 actionclass mcifirBit49 { threshold32pday; - try( funccall("dd1mcifirBit49"), calloutDmiBusSelfLowConnHigh ); + try( funccall("dd1mcifirBit49"), calloutDmiBusSelfLowConnMed ); }; /** Callout MCS Low and Centaur High */ -actionclass calloutDmiBusSelfLowConnHigh +actionclass calloutDmiBusSelfLowConnMed { calloutSelfLow; - callout(connected(TYPE_MEMBUF), MRU_HIGH); + callout(connected(TYPE_MEMBUF), MRU_MED); calloutDmiBusSymFru; threshold1; }; diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PB.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PB.rule index dd0cb00a6..343173235 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PB.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PB.rule @@ -683,12 +683,12 @@ group gNxCxaFir filter singlebit /** NXCXAFIR[25] * POWERBUS_MISC_ERROR */ - (NxCxaFir, bit(25)) ? SelfMedThr1; + (NxCxaFir, bit(25)) ? SelfHighThr1; /** NXCXAFIR[26] * POWERBUS_INTERFACE_PE */ - (NxCxaFir, bit(26)) ? SelfMedThr1; + (NxCxaFir, bit(26)) ? SelfHighThr1; /** NXCXAFIR[27] *POWERBUS_DATA_HANG_ERROR @@ -748,17 +748,17 @@ group gNxCxaFir filter singlebit /** NXCXAFIR[38] * TLBI_SEQ_ERR */ - (NxCxaFir, bit(38)) ? SelfMedThr1; + (NxCxaFir, bit(38)) ? SelfHighThr1; /** NXCXAFIR[39] * TLBI_BAD_OP_ERR */ - (NxCxaFir, bit(39)) ? SelfMedThr1; + (NxCxaFir, bit(39)) ? SelfHighThr1; /** NXCXAFIR[40] * TLBI_SEQ_NUM_PARITY_ERR */ - (NxCxaFir, bit(40)) ? SelfMedThr1; + (NxCxaFir, bit(40)) ? SelfHighThr1; /** NXCXAFIR[41] * ST_CLASS_CMD_FOREIGN_LINK_FAIL @@ -813,7 +813,7 @@ group gMcdFir filter singlebit /** MCDFIR[2] * MCD_REG_PARITY_ERR */ - (McdFir, bit(2)) ? SelfHighThr32PerDay; + (McdFir, bit(2)) ? defaultMaskedError; /** MCDFIR[3] * MCD_SM_ERR @@ -1275,22 +1275,22 @@ group gPbCentFir filter singlebit /** PBCENTFIR[12] * PB_CENT_F0LINK_ERROR */ - (PbCentFir, bit(12)) ? calloutProcLevel2MedThr1; + (PbCentFir, bit(12)) ? defaultMaskedError; /** PBCENTFIR[13] * PB_CENT_F1LINK_ERROR */ - (PbCentFir, bit(13)) ? calloutProcLevel2MedThr1; + (PbCentFir, bit(13)) ? defaultMaskedError; /** PBCENTFIR[14] * PB_CENT_F0_OVERFLOW */ - (PbCentFir, bit(14)) ? calloutProcLevel2MedThr1; + (PbCentFir, bit(14)) ? defaultMaskedError; /** PBCENTFIR[15] * PB_CENT_F1_OVERFLOW */ - (PbCentFir, bit(15)) ? calloutProcLevel2MedThr1; + (PbCentFir, bit(15)) ? defaultMaskedError; /** PBCENTFIR[16] * FIR_SCOM_CENT_ERR @@ -1330,7 +1330,7 @@ group gPsiHbFir filter singlebit /** PSIHBFIR[2] * PB_ECC_ERR_SUE */ - (PsiHbFir, bit(2)) ? callout2ndLvlMedThr1NoGard; + (PsiHbFir, bit(2)) ? defaultMaskedError; /** PSIHBFIR[3] * INTERRUPT_FROM_ERROR @@ -2090,62 +2090,62 @@ group gPciNestFir filter singlebit /** PCINESTFIR_0[0] * BAR_PE */ - (PciNestFir_0, bit(0)) ? calloutConnPci0Th1; + (PciNestFir_0, bit(0)) ? calloutConnPci0Th1NoGard; /** PCINESTFIR_1[0] * BAR_PE */ - (PciNestFir_1, bit(0)) ? calloutConnPci1Th1; + (PciNestFir_1, bit(0)) ? calloutConnPci1Th1NoGard; /** PCINESTFIR_2[0] * BAR_PE */ - (PciNestFir_2, bit(0)) ? calloutConnPci2Th1; + (PciNestFir_2, bit(0)) ? calloutConnPci2Th1NoGard; /** PCINESTFIR_0[1] * NONBAR_PE */ - (PciNestFir_0, bit(1)) ? calloutConnPci0Th32; + (PciNestFir_0, bit(1)) ? defaultMaskedError; /** PCINESTFIR_1[1] * NONBAR_PE */ - (PciNestFir_1, bit(1)) ? calloutConnPci1Th32; + (PciNestFir_1, bit(1)) ? defaultMaskedError; /** PCINESTFIR_2[1] * NONBAR_PE */ - (PciNestFir_2, bit(1)) ? calloutConnPci2Th32; + (PciNestFir_2, bit(1)) ? defaultMaskedError; /** PCINESTFIR_0[2] * PB_TO_PEC_CE */ - (PciNestFir_0, bit(2)) ? calloutConnPci0Th32; + (PciNestFir_0, bit(2)) ? calloutConnPci0Th32NoGard; /** PCINESTFIR_1[2] * PB_TO_PEC_CE */ - (PciNestFir_1, bit(2)) ? calloutConnPci1Th32; + (PciNestFir_1, bit(2)) ? calloutConnPci1Th32NoGard; /** PCINESTFIR_2[2] * PB_TO_PEC_CE */ - (PciNestFir_2, bit(2)) ? calloutConnPci2Th32; + (PciNestFir_2, bit(2)) ? calloutConnPci1Th32NoGard; /** PCINESTFIR_0[3] * PB_TO_PEC_UE */ - (PciNestFir_0, bit(3)) ? calloutConnPci0Th1; + (PciNestFir_0, bit(3)) ? defaultMaskedError; /** PCINESTFIR_1[3] * PB_TO_PEC_UE */ - (PciNestFir_1, bit(3)) ? calloutConnPci1Th1; + (PciNestFir_1, bit(3)) ? defaultMaskedError; /** PCINESTFIR_2[3] * PB_TO_PEC_UE */ - (PciNestFir_2, bit(3)) ? calloutConnPci2Th1; + (PciNestFir_2, bit(3)) ? defaultMaskedError; /** PCINESTFIR_0[4] * PB_TO_PEC_SUE @@ -2165,32 +2165,32 @@ group gPciNestFir filter singlebit /** PCINESTFIR_0[5] * ARY_ECC_CE */ - (PciNestFir_0, bit(5)) ? calloutConnPci0Th32; + (PciNestFir_0, bit(5)) ? calloutConnPci0Th32NoGard; /** PCINESTFIR_1[5] * ARY_ECC_CE */ - (PciNestFir_1, bit(5)) ? calloutConnPci1Th32; + (PciNestFir_1, bit(5)) ? calloutConnPci1Th32NoGard; /** PCINESTFIR_2[5] * ARY_ECC_CE */ - (PciNestFir_2, bit(5)) ? calloutConnPci2Th32; + (PciNestFir_2, bit(5)) ? calloutConnPci2Th32NoGard; /** PCINESTFIR_0[6] * ARY_ECC_UE */ - (PciNestFir_0, bit(6)) ? calloutConnPci0Th1; + (PciNestFir_0, bit(6)) ? defaultMaskedError; /** PCINESTFIR_1[6] * ARY_ECC_UE */ - (PciNestFir_1, bit(6)) ? calloutConnPci1Th1; + (PciNestFir_1, bit(6)) ? defaultMaskedError; /** PCINESTFIR_2[6] * ARY_ECC_UE */ - (PciNestFir_2, bit(6)) ? calloutConnPci2Th1; + (PciNestFir_2, bit(6)) ? defaultMaskedError; /** PCINESTFIR_0[7] * ARY_ECC_SUE @@ -2210,32 +2210,32 @@ group gPciNestFir filter singlebit /** PCINESTFIR_0[8] * REGISTER_ARRAY_PE */ - (PciNestFir_0, bit(8)) ? calloutConnPci0Th1; + (PciNestFir_0, bit(8)) ? calloutConnPci0Th1NoGard; /** PCINESTFIR_1[8] * REGISTER_ARRAY_PE */ - (PciNestFir_1, bit(8)) ? calloutConnPci1Th1; + (PciNestFir_1, bit(8)) ? calloutConnPci1Th1NoGard; /** PCINESTFIR_2[8] * REGISTER_ARRAY_PE */ - (PciNestFir_2, bit(8)) ? calloutConnPci2Th1; + (PciNestFir_2, bit(8)) ? calloutConnPci2Th1NoGard; /** PCINESTFIR_0[9] * PB_INTERFACE_PE */ - (PciNestFir_0, bit(9)) ? calloutConnPci0Th1; + (PciNestFir_0, bit(9)) ? calloutConnPci0Th1NoGard; /** PCINESTFIR_1[9] * PB_INTERFACE_PE */ - (PciNestFir_1, bit(9)) ? calloutConnPci1Th1; + (PciNestFir_1, bit(9)) ? calloutConnPci1Th1NoGard; /** PCINESTFIR_2[9] * PB_INTERFACE_PE */ - (PciNestFir_2, bit(9)) ? calloutConnPci2Th1; + (PciNestFir_2, bit(9)) ? calloutConnPci2Th1NoGard; /** PCINESTFIR_0[10] * PB_DATA_HANG_ERRORS @@ -2270,47 +2270,47 @@ group gPciNestFir filter singlebit /** PCINESTFIR_0[12] * RD_ARE_ERRORS */ - (PciNestFir_0, bit(12)) ? calloutProcLevel2MedThr1; + (PciNestFir_0, bit(12)) ? defaultMaskedError; /** PCINESTFIR_1[12] * RD_ARE_ERRORS */ - (PciNestFir_1, bit(12)) ? calloutProcLevel2MedThr1; + (PciNestFir_1, bit(12)) ? defaultMaskedError; /** PCINESTFIR_2[12] * RD_ARE_ERRORS */ - (PciNestFir_2, bit(12)) ? calloutProcLevel2MedThr1; + (PciNestFir_2, bit(12)) ? defaultMaskedError; /** PCINESTFIR_0[13] * NONRD_ARE_ERRORS */ - (PciNestFir_0, bit(13)) ? calloutProcLevel2MedThr1; + (PciNestFir_0, bit(13)) ? defaultMaskedError; /** PCINESTFIR_1[13] * NONRD_ARE_ERRORS */ - (PciNestFir_1, bit(13)) ? calloutProcLevel2MedThr1; + (PciNestFir_1, bit(13)) ? defaultMaskedError; /** PCINESTFIR_2[13] * NONRD_ARE_ERRORS */ - (PciNestFir_2, bit(13)) ? calloutProcLevel2MedThr1; + (PciNestFir_2, bit(13)) ? defaultMaskedError; /** PCINESTFIR_0[14] * PCI_HANG_ERROR */ - (PciNestFir_0, bit(14)) ? calloutConnPci0Th1; + (PciNestFir_0, bit(14)) ? defaultMaskedError; /** PCINESTFIR_1[14] * PCI_HANG_ERROR */ - (PciNestFir_1, bit(14)) ? calloutConnPci1Th1; + (PciNestFir_1, bit(14)) ? defaultMaskedError; /** PCINESTFIR_2[14] * PCI_HANG_ERROR */ - (PciNestFir_2, bit(14)) ? calloutConnPci2Th1; + (PciNestFir_2, bit(14)) ? defaultMaskedError; /** PCINESTFIR_0[15] * PCI_CLOCK_ERROR @@ -2339,32 +2339,32 @@ group gPciNestFir filter singlebit /** PCINESTFIR_0[16] * AIB_FENCE */ - (PciNestFir_0, bit(16)) ? calloutConnPci0Th1; + (PciNestFir_0, bit(16)) ? defaultMaskedError; /** PCINESTFIR_1[16] * AIB_FENCE */ - (PciNestFir_1, bit(16)) ? calloutConnPci1Th1; + (PciNestFir_1, bit(16)) ? defaultMaskedError; /** PCINESTFIR_2[16] * AIB_FENCE */ - (PciNestFir_2, bit(16)) ? calloutConnPci2Th1; + (PciNestFir_2, bit(16)) ? defaultMaskedError; /** PCINESTFIR_0[17] * HW_ERRORS */ - (PciNestFir_0, bit(17)) ? calloutConnPci0Th1; + (PciNestFir_0, bit(17)) ? calloutConnPci0Th1NoGard; /** PCINESTFIR_1[17] * HW_ERRORS */ - (PciNestFir_1, bit(17)) ? calloutConnPci1Th1; + (PciNestFir_1, bit(17)) ? calloutConnPci1Th1NoGard; /** PCINESTFIR_2[17] * HW_ERRORS */ - (PciNestFir_2, bit(17)) ? calloutConnPci2Th1; + (PciNestFir_2, bit(17)) ? calloutConnPci2Th1NoGard; /** PCINESTFIR_0[18] * UNSOLICITIEDPBDATA @@ -2444,32 +2444,32 @@ group gPciNestFir filter singlebit /** PCINESTFIR_0[23] * AIB_PE */ - (PciNestFir_0, bit(23)) ? calloutConnPci0Th32; + (PciNestFir_0, bit(23)) ? defaultMaskedError; /** PCINESTFIR_1[23] * AIB_PE */ - (PciNestFir_1, bit(23)) ? calloutConnPci1Th32; + (PciNestFir_1, bit(23)) ? defaultMaskedError; /** PCINESTFIR_2[23] * AIB_PE */ - (PciNestFir_2, bit(23)) ? calloutConnPci2Th32; + (PciNestFir_2, bit(23)) ? defaultMaskedError; /** PCINESTFIR_0[24] * ASB_ERROR */ - (PciNestFir_0, bit(24)) ? calloutConnPci0Th1; + (PciNestFir_0, bit(24)) ? defaultMaskedError; /** PCINESTFIR_1[24] * ASB_ERROR */ - (PciNestFir_1, bit(24)) ? calloutConnPci1Th1; + (PciNestFir_1, bit(24)) ? defaultMaskedError; /** PCINESTFIR_2[24] * ASB_ERROR */ - (PciNestFir_2, bit(24)) ? calloutConnPci2Th1; + (PciNestFir_2, bit(24)) ? defaultMaskedError; /** PCINESTFIR_0[25] * FOREIGN_LINK_FAIL @@ -2914,23 +2914,53 @@ actionclass calloutConnPci1 { callout(connected(TYPE_PCI,1), MRU_MED); }; /** Callout the connected PCI 2 controller. */ actionclass calloutConnPci2 { callout(connected(TYPE_PCI,2), MRU_MED); }; -/** Callout the connected PCI 0 controller, threshold 1 */ -actionclass calloutConnPci0Th1 { calloutConnPci0; threshold1; }; +/** Callout the connected PCI 0 controller, threshold 1 , no garding */ +actionclass calloutConnPci0Th1NoGard +{ + calloutConnPci0; + threshold1; + gard(NoGard); +}; -/** Callout the connected PCI 1 controller, threshold 1 */ -actionclass calloutConnPci1Th1 { calloutConnPci1; threshold1; }; +/** Callout the connected PCI 1 controller, threshold 1, no garding */ +actionclass calloutConnPci1Th1NoGard +{ + calloutConnPci1; + threshold1; + gard(NoGard); +}; -/** Callout the connected PCI 2 controller, threshold 1 */ -actionclass calloutConnPci2Th1 { calloutConnPci2; threshold1; }; +/** Callout the connected PCI 2 controller, threshold 1, no garding */ +actionclass calloutConnPci2Th1NoGard +{ + calloutConnPci2; + threshold1; + gard(NoGard); +}; -/** Callout the connected PCI 0 controller, threshold 32 per day */ -actionclass calloutConnPci0Th32 { calloutConnPci0; threshold32pday; }; +/** Callout the connected PCI 0 controller, threshold 32 per day, no garding */ +actionclass calloutConnPci0Th32NoGard +{ + calloutConnPci0; + threshold32pday; + gard(NoGard); +}; -/** Callout the connected PCI 1 controller, threshold 32 per day */ -actionclass calloutConnPci1Th32 { calloutConnPci1; threshold32pday; }; +/** Callout the connected PCI 1 controller, threshold 32 per day, no garding */ +actionclass calloutConnPci1Th32NoGard +{ + calloutConnPci1; + threshold32pday; + gard(NoGard); +}; -/** Callout the connected PCI 2 controller, threshold 32 per day */ -actionclass calloutConnPci2Th32 { calloutConnPci2; threshold32pday; }; +/** Callout the connected PCI 2 controller, threshold 32 per day , no garding */ +actionclass calloutConnPci2Th32NoGard +{ + calloutConnPci2; + threshold32pday; + gard(NoGard); +}; /** Callout the DMI bus 0 */ actionclass calloutDmiBus0 @@ -3137,16 +3167,14 @@ actionclass calloutNxThr5pHr actionclass combinedResponseError { - callout2ndLvlMed; - threshold1; - funccall("combinedResponseCallout"); funccall("analyzeMpIPL"); + funccall("combinedResponseCallout"); }; actionclass forceMpIpl { - calloutProcLevel2MedThr1; funccall("analyzeMpIPL"); + callout2ndLvlMedThr1NoGard; }; /** callout both ends of PSI Link.Threshold is 32 events per day. diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PCIE.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PCIE.rule index 65c8c5b35..148c83e5c 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PCIE.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_PCIE.rule @@ -48,7 +48,8 @@ group gPcieChipletFir filter singlebit /** PCIE_CHIPLET_FIR[8] * Attention from PBFFIR */ - (PcieChipletFir, bit(8)) ? analyze(gPbfFir); + #PBFFIR has been masked. Retaining the register for FFDC purpose. + (PcieChipletFir, bit(8)) ? defaultMaskedError; /** PCIE_CHIPLET_FIR[9|10] * Attention from IOPCIFIR (0-1) @@ -66,7 +67,7 @@ group gPcieChipletSpa filter singlebit /** PCIE_CHIPLET_SPA[0] * Attention from PBFFIR */ - (PcieChipletSpa, bit(0)) ? analyze(gPbfFir); + (PcieChipletSpa, bit(0)) ? defaultMaskedError; }; ################################################################################ @@ -154,305 +155,6 @@ group gPcieLFir filter singlebit (PcieLFir, bit(40)) ? defaultMaskedError; }; -################################################################################ -# PCIE Chiplet PBFFIR -################################################################################ -# based on p8dd1_mss_FFDC_59.xls -################################################################################ - -rule PbfFir -{ - CHECK_STOP: PBFFIR & ~PBFFIR_MASK & ~PBFFIR_ACT0 & ~PBFFIR_ACT1; - RECOVERABLE: PBFFIR & ~PBFFIR_MASK & ~PBFFIR_ACT0 & PBFFIR_ACT1; - SPECIAL: PBFFIR & ~PBFFIR_MASK & PBFFIR_ACT0 & ~PBFFIR_ACT1; -}; -# Foreign Link and similar entries in MRU List shall be removed. Plan is to -# replace these with Chip + Level2. So bit 7,8,28,29,60,61 have action different -# from what is specified in RAS spread sheet. -group gPbfFir filter singlebit -{ - /** PBFFIR[0|1|2|3] - * F0_MAILBOX_WRITTEN - */ - (PbfFir, bit(0|1|2|3)) ? defaultMaskedError; - - /** PBFFIR[4] - * F0_RX_DETECT - */ - (PbfFir, bit(4)) ? defaultMaskedError; - - /** PBFFIR[5] - * F0_LINK_TRAINING_DONE - */ - (PbfFir, bit(5)) ? defaultMaskedError; - - /** PBFFIR[6] - * F0LINK_TRAINED - */ - (PbfFir, bit(6)) ? defaultMaskedError; - - /** PBFFIR[7] - * F0LINK_FIR_ERR - */ - (PbfFir, bit(7)) ? calloutProcLevel2MedThr1; - - /** PBFFIR[8] - * F0LINK_FMR_PSR_OBS_ERR - */ - (PbfFir, bit(8)) ? calloutProcLevel2MedThr1; - - /** PBFFIR[9] - * F0LINK_FMR_COR_ERR - */ - (PbfFir, bit(9)) ? SelfHighThr32PerDay; - - /** PBFFIR[10] - * F0LINK_FMR_SUE_ERR - */ - (PbfFir, bit(10)) ? defaultMaskedError; - - /** PBFFIR[11] - * F0LINK_FMR_UNC_ERR - */ - (PbfFir, bit(11)) ? calloutProcHighThr1SUE; - - /** PBFFIR[12] - * F0_EQ_FAILED - */ - (PbfFir, bit(12)) ? defaultMaskedError; - - /** PBFFIR[13] - * F0_REPLAY_THRESHOLD - */ - (PbfFir, bit(13)) ? SelfHighThr1; - - /** PBFFIR[14] - * F0_CRC_ERROR - */ - (PbfFir, bit(14)) ? SelfHighThr1; - - /** PBFFIR[15] - * F0_LOST_PACKET - */ - (PbfFir, bit(15)) ? SelfHighThr1; - - /** PBFFIR[16] - * F0_NAK_RECEIVED - */ - (PbfFir, bit(16)) ? SelfHighThr1; - - /** PBFFIR[17] - * F0_REPLAY_TIMER_ERROR - */ - (PbfFir, bit(17)) ? SelfHighThr1; - - /** PBFFIR[18] - * F0_RETRAIN_THRESHOLD - */ - (PbfFir, bit(18)) ? defaultMaskedError; - - /** PBFFIR[19] - * F0_REPLAY_NUM_RETRAIN - */ - (PbfFir, bit(19)) ? SelfHighThr1; - - /** PBFFIR[20] - * F0_RX_ERROR - */ - (PbfFir, bit(20)) ? SelfHighThr1; - - /** PBFFIR[21] - * F0_DESKEW_ERROR - */ - (PbfFir, bit(21)) ? SelfHighThr1; - - /** PBFFIR[22] - * F0_FRAMING_ERROR - */ - (PbfFir, bit(22)) ? SelfHighThr1; - - /** PBFFIR[23] - * F0_OS_RECEIVED - */ - (PbfFir, bit(23)) ? SelfHighThr1; - - /** PBFFIR[24] - * F0_ECC_CE_ERR - */ - (PbfFir, bit(24)) ? SelfHighThr32PerDay; - - /** PBFFIR[25] - * F0_ECC_UE_ERR - */ - (PbfFir, bit(25)) ? SelfHighThr1; - - /** PBFFIR[26] - * F0_RETRAIN_ERR - */ - (PbfFir, bit(26)) ? defaultMaskedError; - - /** PBFFIR[27] - * F0_TRAINING_ERR - */ - (PbfFir, bit(27)) ? defaultMaskedError; - - /** PBFFIR[28] - * F0_UNRECOV_ERR - */ - (PbfFir, bit(28)) ? calloutProcLevel2MedThr1; - - /** PBFFIR[29] - * F0_INTERNAL_ERR - */ - (PbfFir, bit(29)) ? calloutProcLevel2MedThr1; - - /** PBFFIR[30|31] - * FIR_SPARE - */ - (PbfFir, bit(30|31)) ? defaultMaskedError; - - /** PBFFIR[32:35] - * F1_MAILBOX_WRITTEN - */ - (PbfFir, bit(32|33|34|35)) ? defaultMaskedError; - - /** PBFFIR[36] - * F1_RX_DETECT - */ - (PbfFir, bit(36)) ? defaultMaskedError; - - /** PBFFIR[37] - * F1_LINK_TRAINING_DONE - */ - (PbfFir, bit(37)) ? defaultMaskedError; - - /** PBFFIR[38] - * F1LINK_TRAINED - */ - (PbfFir, bit(38)) ? defaultMaskedError; - - /** PBFFIR[39] - * F1LINK_FIR_ERR - */ - (PbfFir, bit(39)) ? calloutProcLevel2MedThr1; - - /** PBFFIR[40] - * F1LINK_FMR_PSR_OBS_ERR - */ - (PbfFir, bit(40)) ? calloutProcLevel2MedThr1; - - /** PBFFIR[41] - * F1LINK_FMR_COR_ERR - */ - (PbfFir, bit(41)) ? SelfHighThr32PerDay; - - /** PBFFIR[42] - * F1LINK_FMR_SUE_ERR - */ - (PbfFir, bit(42)) ? defaultMaskedError; - - /** PBFFIR[43] - * F1LINK_FMR_UNC_ERR - */ - (PbfFir, bit(43)) ? calloutProcHighThr1SUE; - - /** PBFFIR[44] - * F1_EQ_FAILED - */ - (PbfFir, bit(44)) ? defaultMaskedError; - - /** PBFFIR[45] - * F1_REPLAY_THRESHOLD - */ - (PbfFir, bit(45)) ? SelfHighThr1; - - /** PBFFIR[46] - * F1_CRC_ERROR - */ - (PbfFir, bit(46)) ? SelfHighThr1; - - /** PBFFIR[47] - * F1_LOST_PACKET - */ - (PbfFir, bit(47)) ? SelfHighThr1; - - /** PBFFIR[48] - * F1_NAK_RECEIVED - */ - (PbfFir, bit(48)) ? SelfHighThr1; - - /** PBFFIR[49] - * F1_REPLAY_TIMER_ERROR - */ - (PbfFir, bit(49)) ? SelfHighThr1; - - /** PBFFIR[50] - * F1_RETRAIN_THRESHOLD - */ - (PbfFir, bit(50)) ? defaultMaskedError; - - /** PBFFIR[51] - * F1_REPLAY_NUM_RETRAIN - */ - (PbfFir, bit(51)) ? SelfHighThr1; - - /** PBFFIR[52] - * F1_RX_ERROR - */ - (PbfFir, bit(52)) ? SelfHighThr1; - - /** PBFFIR[53] - * F1_DESKEW_ERROR - */ - (PbfFir, bit(53)) ? SelfHighThr1; - - /** PBFFIR[54] - * F1_FRAMING_ERROR - */ - (PbfFir, bit(54)) ? SelfHighThr1; - - /** PBFFIR[55] - * F1_OS_RECEIVED - */ - (PbfFir, bit(55)) ? SelfHighThr1; - - /** PBFFIR[56] - * F1_ECC_CE_ERR - */ - (PbfFir, bit(56)) ? SelfHighThr32PerDay; - - /** PBFFIR[57] - * F1_ECC_UE_ERR - */ - (PbfFir, bit(57)) ? SelfHighThr1; - - /** PBFFIR[58] - * F1_RETRAIN_ERR - */ - (PbfFir, bit(58)) ? defaultMaskedError; - - /** PBFFIR[59] - * F1_TRAINING_ERR - */ - (PbfFir, bit(59)) ? defaultMaskedError; - - /** PBFFIR[60] - * F1_UNRECOV_ERR - */ - (PbfFir, bit(60)) ? calloutProcLevel2MedThr1; - - /** PBFFIR[61] - * F1_INTERNAL_ERR - */ - (PbfFir, bit(61)) ? calloutProcLevel2MedThr1; - - /** PBFFIR[62|63] - * F1_INTERNAL_ERR - */ - (PbfFir, bit(62|63)) ? defaultMaskedError; - -}; - ################################################################################ # PCIE Chiplet IOPCIFIRs ################################################################################ @@ -507,42 +209,42 @@ group gIopPciFir filter singlebit /** IOPCIFIR_0[2] * FIR_STATUS_REG_TX_A_ERR_STATUS */ - (IopPciFir_0, bit(2)) ? calloutPhbClkA_0; + (IopPciFir_0, bit(2)) ? calloutPhbClkA_0_noGard; /** IOPCIFIR_1[2] * FIR_STATUS_REG_TX_A_ERR_STATUS */ - (IopPciFir_1, bit(2)) ? calloutPhbClkA_1; + (IopPciFir_1, bit(2)) ? calloutPhbClkA_1_noGard; /** IOPCIFIR_0[3] * FIR_STATUS_REG_TX_B_ERR_STATUS */ - (IopPciFir_0, bit(3)) ? calloutPhbClkB_0; + (IopPciFir_0, bit(3)) ? calloutPhbClkB_0_noGard; /** IOPCIFIR_1[3] * FIR_STATUS_REG_TX_B_ERR_STATUS */ - (IopPciFir_1, bit(3)) ? calloutPhbClkB_1; + (IopPciFir_1, bit(3)) ? calloutPhbClkB_1_noGard; /** IOPCIFIR_0[4] * FIR_STATUS_REG_RX_A_ERR_STATUS */ - (IopPciFir_0, bit(4)) ? calloutPhbClkA_0; + (IopPciFir_0, bit(4)) ? calloutPhbClkA_0_noGard; /** IOPCIFIR_1[4] * FIR_STATUS_REG_RX_A_ERR_STATUS */ - (IopPciFir_1, bit(4)) ? calloutPhbClkA_1; + (IopPciFir_1, bit(4)) ? calloutPhbClkA_1_noGard; /** IOPCIFIR_0[5] * FIR_STATUS_REG_RX_B_ERR_STATUS */ - (IopPciFir_0, bit(5)) ? calloutPhbClkB_0; + (IopPciFir_0, bit(5)) ? calloutPhbClkB_0_noGard; /** IOPCIFIR_1[5] * FIR_STATUS_REG_RX_B_ERR_STATUS */ - (IopPciFir_1, bit(5)) ? calloutPhbClkB_1; + (IopPciFir_1, bit(5)) ? calloutPhbClkB_1_noGard; /** IOPCIFIR_0[6] * FIR_STATUS_REG_ZCAL_B_ERR_STATUS @@ -579,45 +281,51 @@ group gIopPciFir filter singlebit # Actions specific to PCIE chiplet ################################################################################ -/**callout PHB associated with IOPCIFIR0 clkA */ -actionclass calloutPhbClkA_0 +/**callout PHB associated with IOPCIFIR0 clkA, no garding */ +actionclass calloutPhbClkA_0_noGard { funccall("calloutPhbClkA_0"); threshold1; + gard(NoGard); }; -/**callout PHB associated with IOPCIFIR0 clkB */ -actionclass calloutPhbClkB_0 +/**callout PHB associated with IOPCIFIR0 clkB, no garding */ +actionclass calloutPhbClkB_0_noGard { funccall("calloutPhbClkB_0"); threshold1; + gard(NoGard); }; -/**callout PHB associated with IOPCIFIR1 clkA */ -actionclass calloutPhbClkA_1 +/**callout PHB associated with IOPCIFIR1 clkA, no garding */ +actionclass calloutPhbClkA_1_noGard { funccall("calloutPhbClkA_1"); threshold1; + gard(NoGard); }; -/**callout PHB associated with IOPCIFIR1 clkB */ -actionclass calloutPhbClkB_1 +/**callout PHB associated with IOPCIFIR1 clkB, no garding */ +actionclass calloutPhbClkB_1_noGard { funccall("calloutPhbClkB_1"); threshold1; + gard(NoGard); }; -/** callout all PHB associated with IOPCIFIR0 */ +/** callout all PHB associated with IOPCIFIR0, no garding */ actionclass calloutPhbBothClks_0 { funccall("calloutPhbBothClks_0"); threshold1; + gard(NoGard); }; -/** callout all PHB associated with IOPCIFIR1 */ +/** callout all PHB associated with IOPCIFIR1, no garding */ actionclass calloutPhbBothClks_1 { funccall("calloutPhbBothClks_1"); threshold1; + gard(NoGard); }; diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule index 2b5ffff8c..6c6423d99 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_acts_TP.rule @@ -287,7 +287,7 @@ group gTpLFir filter singlebit /** TP_LFIR[24] * Local errors from OTP */ - (TpLFir, bit(24)) ? SelfMedThr32PerDay; + (TpLFir, bit(24)) ? SelfHighThr1; /** TP_LFIR[25] * local error from Ext trigger @@ -327,7 +327,7 @@ group gTpLFir filter singlebit /** TP_LFIR[35] * OTP correctable error */ - (TpLFir, bit(35)) ? SelfMedThr1; + (TpLFir, bit(35)) ? SelfHighThr1; /** TP_LFIR[36] * Deadman Timer diff --git a/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule b/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule index cdb321909..70871ef10 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule @@ -157,36 +157,9 @@ { name "ES.PBES_WRAP_TOP.PBES_TOP.MISC_IOF.SCOM.PB_IOF_FIR_REG"; scomaddr 0x09010800; - reset (&, 0x09010801); - mask (|, 0x09010805); capture group default; }; - register PBFFIR_MASK - { - name "ES.PBES_WRAP_TOP.PBES_TOP.MISC_IOF.SCOM.PB_IOF_FIR_MASK_REG"; - scomaddr 0x09010803; - capture group default; - }; - - register PBFFIR_ACT0 - { - name "ES.PBES_WRAP_TOP.PBES_TOP.MISC_IOF.SCOM.PB_IOF_FIR_ACTION0_REG"; - scomaddr 0x09010806; - capture type secondary; - capture group default; - capture req nonzero("PBFFIR"); - }; - - register PBFFIR_ACT1 - { - name "ES.PBES_WRAP_TOP.PBES_TOP.MISC_IOF.SCOM.PB_IOF_FIR_ACTION1_REG"; - scomaddr 0x09010807; - capture type secondary; - capture group default; - capture req nonzero("PBFFIR"); - }; - register PBFIR_IOF0_ERROR_REPORT { name "ES.PBES_WRAP_TOP.PBES_TOP.IOF0.IOF.PCI_WRAP.PCI_BB.PB_IOF_ERR_STATUS"; -- cgit v1.2.1