From 51aa7d2be9897a31da51518dc964f09f688a275c Mon Sep 17 00:00:00 2001 From: Dean Sanner Date: Wed, 10 Aug 2016 12:20:36 -0500 Subject: Update Xbus hwas rules and call pcie_scominit for all procs Change-Id: I10db2fecc8a4b5571f7a8f9551954c107a2ebf2a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28110 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Prachi Gupta Reviewed-by: Martin Gloff Reviewed-by: Daniel M. Crowell --- src/include/usr/hwas/common/hwasCommon.H | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'src/include/usr/hwas') diff --git a/src/include/usr/hwas/common/hwasCommon.H b/src/include/usr/hwas/common/hwasCommon.H index a99102e17..4dde4d47f 100644 --- a/src/include/usr/hwas/common/hwasCommon.H +++ b/src/include/usr/hwas/common/hwasCommon.H @@ -160,9 +160,13 @@ const uint32_t VPD_CP00_PG_N3_MCS01 = 0x0020; const uint32_t VPD_CP00_PG_XBUS_INDEX = 6; // all good - 3:VITAL, 4:PRV, 5:IOX0*+, 6:IOX1+, 7:IOX2+, // 8:PBIOX0*, 9:PBIOX1, 10:PBIOX2, 14:PLLIOX -const uint32_t VPD_CP00_PG_XBUS_GOOD = 0xE01D; -const uint32_t VPD_CP00_PG_XBUS_PG_MASK = 0x07E0; -const uint32_t VPD_CP00_PG_XBUS_IOX_PAIR[3] = {0x0480, 0x0240, 0x0120}; +// Nimbus doesn't physically have PBIOX0 and IOX0. IOX0 is +// taken care of by xbus links, need to handle PBIOX0 as part of +// the full chiplet good +const uint32_t VPD_CP00_PG_XBUS_GOOD_NIMBUS = 0xE09D; +const uint32_t VPD_CP00_PG_XBUS_GOOD_CUMULUS= 0xE01D; +const uint32_t VPD_CP00_PG_XBUS_PG_MASK = 0x0700; +const uint32_t VPD_CP00_PG_XBUS_IOX[3] = {0x0400, 0x0200, 0x0100}; const uint32_t VPD_CP00_PG_MCxx_INDEX[4] = {7, 7, 8, 8}; // by MCS // all good - 3:VITAL, 4:PRV, 5:MCA01, 6:IOM01+, 7:IOM23+, 14:PLLMEM -- cgit v1.2.3