From d277b5e5d4edbd3085cea728d0743e186f2b8059 Mon Sep 17 00:00:00 2001 From: Stephen Glancy Date: Fri, 22 Nov 2019 13:20:08 -0500 Subject: Adds explorer CAC shmoo Change-Id: I38ba8b0c7441f5c02af268024869bfd39cd9a47e Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/87831 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Reviewed-by: Mark Pizzutillo Tested-by: Hostboot CI Reviewed-by: Louis Stermole Reviewed-by: Jennifer A Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/87838 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Christian R Geddes --- .../chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H | 1 + .../ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H | 3 +++ 2 files changed, 4 insertions(+) (limited to 'src/import') diff --git a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H index 8b15c8d55..e94c8732a 100644 --- a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H +++ b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H @@ -3237,6 +3237,7 @@ static const uint64_t EXP_DDR4_PHY_DBYTE9_VREFDAC0_R5 = 0x4065500ull; static const uint64_t EXP_DDR4_PHY_DBYTE9_VREFDAC0_R6 = 0x4065900ull; static const uint64_t EXP_DDR4_PHY_DBYTE9_VREFDAC0_R7 = 0x4065D00ull; static const uint64_t EXP_DDR4_PHY_DBYTE9_VREFDAC0_R8 = 0x4066100ull; +static const uint64_t EXP_DDR4_PHY_DDR_PHY_CONTROL = 0x6000118ull; diff --git a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H index fe13d9527..87927362f 100644 --- a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H +++ b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H @@ -52,5 +52,8 @@ static const uint8_t EXPLR_RDF_MCBCM2_MCBIST_HALF_COMPARE_MASK = static const uint8_t EXPLR_RDF_MCBCM2_MCBIST_HALF_COMPARE_MASK_LEN = 40 ; static const uint8_t EXPLR_TP_MB_UNIT_TOP_TR1_TRACE_TRCTRL_CONFIG_TRA_MASTER_CLOCK_ENABLE = 22; static const uint8_t EXP_APBONLY0_MICROCONTMUXSEL_MICROCONTMUXSEL = 63 ; +static const uint8_t EXP_DDR4_PHY_DDR_PHY_CONTROL_DFI_AC_SELECT = 63 - 8; +static const uint8_t EXP_DDR4_PHY_DDR_PHY_CONTROL_DFI_CFGCMD_AC_MASK = 63 - 5; +static const uint8_t EXP_DDR4_PHY_DDR_PHY_CONTROL_DFI_CFGCMD_AC_MASK_LEN = 2; #endif -- cgit v1.2.1