From 8b1553db49b8eb755c8e16c1d276c29f664614e3 Mon Sep 17 00:00:00 2001 From: Adam Hale Date: Tue, 8 Oct 2019 11:37:04 -0400 Subject: HW508063: Fix Mirrored BAR setup for SMF and Holes,set map_mode when flipped Change-Id: I58a721d5371d5d5a10094ab46e15f9ab4083227d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/84996 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Thi N Tran Reviewed-by: Benjamin Gass Reviewed-by: Adam S Hale Reviewed-by: Jennifer A Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/85185 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Christian R Geddes --- .../p9/procedures/hwp/initfiles/p9a_mi_scom.C | 14 ++ .../p9/procedures/hwp/nest/p9_mss_setup_bars.C | 280 +++++++++++++-------- 2 files changed, 184 insertions(+), 110 deletions(-) (limited to 'src/import') diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9a_mi_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9a_mi_scom.C index 49469cf32..fafc20414 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9a_mi_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9a_mi_scom.C @@ -45,6 +45,8 @@ fapi2::ReturnCode p9a_mi_scom(const fapi2::Target& TGT0, uint64_t l_def_ENABLE_PREFETCH_DROP_PROMOTE_BASIC = literal_1; fapi2::ATTR_ENABLE_MEM_EARLY_DATA_SCOM_Type l_TGT1_ATTR_ENABLE_MEM_EARLY_DATA_SCOM; FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_ENABLE_MEM_EARLY_DATA_SCOM, TGT1, l_TGT1_ATTR_ENABLE_MEM_EARLY_DATA_SCOM)); + fapi2::ATTR_MEM_MIRROR_PLACEMENT_POLICY_Type l_TGT1_ATTR_MEM_MIRROR_PLACEMENT_POLICY; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MEM_MIRROR_PLACEMENT_POLICY, TGT1, l_TGT1_ATTR_MEM_MIRROR_PLACEMENT_POLICY)); uint64_t l_def_ENABLE_AMO_CACHING = literal_1; uint64_t l_def_ENABLE_MCU_TIMEOUTS = literal_1; fapi2::buffer l_scom_buffer; @@ -97,6 +99,18 @@ fapi2::ReturnCode p9a_mi_scom(const fapi2::Target& TGT0, l_scom_buffer.insert<25, 7, 57, uint64_t>(literal_0b0111111 ); constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_FORCE_COMMANDLIST_VALID_ON = 0x1; l_scom_buffer.insert<5, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_FORCE_COMMANDLIST_VALID_ON ); + + if ((l_TGT1_ATTR_MEM_MIRROR_PLACEMENT_POLICY == fapi2::ENUM_ATTR_MEM_MIRROR_PLACEMENT_POLICY_FLIPPED)) + { + constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_MEM_MAP_MODE_ON = 0x1; + l_scom_buffer.insert<36, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_MEM_MAP_MODE_ON ); + } + else if ((l_TGT1_ATTR_MEM_MIRROR_PLACEMENT_POLICY == fapi2::ENUM_ATTR_MEM_MIRROR_PLACEMENT_POLICY_NORMAL)) + { + constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_MEM_MAP_MODE_OFF = 0x0; + l_scom_buffer.insert<36, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_MEM_MAP_MODE_OFF ); + } + FAPI_TRY(fapi2::putScom(TGT0, 0x5010811ull, l_scom_buffer)); } { diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C b/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C index 26a6f12ab..46a87c966 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C @@ -2045,10 +2045,19 @@ fapi2::ReturnCode writeMCBarData( uint8_t l_pos; fapi2::buffer l_scomData(0); + fapi2::buffer l_scomData_mirror(0); + fapi2::buffer l_scomData_mcmode(0); fapi2::buffer l_extAddr(0); fapi2::buffer l_norAddr; uint64_t l_ext_mask; + const fapi2::Target FAPI_SYSTEM; + uint8_t mirror_policy; + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MEM_MIRROR_PLACEMENT_POLICY, FAPI_SYSTEM, mirror_policy), + "Error reading ATTR_MEM_MIRROR_PLACEMENT_POLICY, l_rc 0x%.8X", + (uint64_t)fapi2::current_err); + FAPI_TRY(p9a_get_ext_mask(l_ext_mask)); FAPI_TRY(writeMCCInterleaveGranularity(i_mcBarDataPair)); @@ -2154,30 +2163,67 @@ fapi2::ReturnCode writeMCBarData( "Error writing to P9A_MI_MCFGPM1 reg"); } - // 3. ---- Set MCFGPA reg ----- + // 3. ---- Set MCFGPA/MCFGPMA regs ----- l_scomData = 0; - - // Assert if both HOLE1 and SMF are valid, settings will overlap - FAPI_ASSERT((l_data.MCFGPA_HOLE_valid[1] && l_data.MCFGPA_SMF_valid) == 0, - fapi2::MSS_SETUP_BARS_HOLE1_SMF_CONFLICT() - .set_TARGET(l_target) - .set_HOLE1_VALID(l_data.MCFGPA_HOLE_valid[1]) - .set_SMF_VALID(l_data.MCFGPA_SMF_valid), - "Error: MCFGPA HOLE1 and SMF are both valid, settings will overlap"); + l_scomData_mirror = 0; // Hole 0 if (l_data.MCFGPA_HOLE_valid[0] == true) { - // MCFGPA HOLE0 valid (bit 0) - l_scomData.setBit(); + if(mirror_policy == + fapi2::ENUM_ATTR_MEM_MIRROR_PLACEMENT_POLICY_NORMAL) //Non-mirrored mode, but still set up mirrored equiv addressses + { + // Non-mirrored + // MCFGP0A HOLE valid (bit 0) + l_scomData.setBit(); + + // Hole lower addr + // Hole always extends to end of range + FAPI_DBG("l_data.MCFGPA_HOLE_LOWER_addr[0]: %016llx", l_data.MCFGPA_HOLE_LOWER_addr[0]); + FAPI_TRY(extBar(l_ext_mask, l_data.MCFGPA_HOLE_LOWER_addr[0], l_extAddr)); + l_scomData.insert( + (l_extAddr << 9)); //matches 17:31 extendedBarAddress shifts left 8 (17-8) = 9 + + // Mirrored Address = Non-mirrored >> 1 since bit 56 is not part of the dsaddr + // MCFGPM0A HOLE0 valid (bit 0) + l_scomData_mirror.setBit(); + + // Hole lower addr + // Hole always extends to end of range + FAPI_DBG("l_data.MCFGPA_HOLE_LOWER_addr[0]: %016llx", (l_data.MCFGPA_HOLE_LOWER_addr[0] >> 1)); + FAPI_TRY(extBar(l_ext_mask, l_data.MCFGPA_HOLE_LOWER_addr[0], l_extAddr)); + l_scomData_mirror.insert( + (l_extAddr << 8)); //matches 17:31 extendedBarAddress shifts left 8 (17- (8 + 1)) = 8 + } + else + { + // Mirrored Address + // MCFGPM0A HOLE0 valid (bit 0) + l_scomData_mirror.setBit(); + + // Hole 0 lower addr + // Hole 0 always extends to end of range + FAPI_DBG("l_data.MCFGPA_HOLE_LOWER_addr[0]: %016llx", l_data.MCFGPA_HOLE_LOWER_addr[0]); + FAPI_TRY(extBar(l_ext_mask, l_data.MCFGPA_HOLE_LOWER_addr[0], l_extAddr)); + l_scomData_mirror.insert( + (l_extAddr << 9)); //matches 17:31 extendedBarAddress shifts left 8 (17- 8) = 9 + + // Non-mirrored Address = Mirrored Address << 1 since bit 56 is part of the dsaddr + // MCFGPA HOLE0 valid (bit 0) + l_scomData.setBit(); + + // Hole 0 lower addr + // Hole 0 always extends to end of range + FAPI_DBG("l_data.MCFGPA_HOLE_LOWER_addr[0]: %016llx", (l_data.MCFGPA_HOLE_LOWER_addr[0] << 1)); + FAPI_TRY(extBar(l_ext_mask, l_data.MCFGPA_HOLE_LOWER_addr[0], l_extAddr)); + l_scomData.insert( + (l_extAddr << 10)); //matches 17:31 extendedBarAddress shifts left 8 (17- (8 - 1)) = 10 - // Hole 0 lower addr - // Hole 0 always extends to end of range - FAPI_DBG("l_data.MCFGPA_HOLE_LOWER_addr[0]: %016llx", l_data.MCFGPA_HOLE_LOWER_addr[0]); - FAPI_TRY(extBar(l_ext_mask, l_data.MCFGPA_HOLE_LOWER_addr[0], l_extAddr)); - l_scomData.insert( - (l_extAddr << 9)); //matches 17:31 extendedBarAddress shifts left 8 (17-8) = 9 + } } // SMF @@ -2185,34 +2231,108 @@ fapi2::ReturnCode writeMCBarData( { FAPI_DBG("Writing SMF bit into address extension now"); // Set up Extension Address for SMF - FAPI_TRY(fapi2::getScom(l_target.getParent(), P9A_MI_MCMODE2, l_scomData), + FAPI_TRY(fapi2::getScom(l_target.getParent(), P9A_MI_MCMODE2, l_scomData_mcmode), "Error reading to P9A_MI_MCMODE2 reg"); - l_scomData.setBit<46>(); - FAPI_TRY(fapi2::putScom(l_target.getParent(), P9A_MI_MCMODE2, l_scomData), + l_scomData_mcmode.setBit(); + FAPI_TRY(fapi2::putScom(l_target.getParent(), P9A_MI_MCMODE2, l_scomData_mcmode), "Error writing to P9A_MI_MCMODE2 reg"); - l_scomData = 0; - // MCFGPA SMF valid (bit 0) - l_scomData.setBit(); - - // MCFGPA_SMF_UPPER_ADDRESS_AT_END_OF_RANGE - l_scomData.setBit(); + if(mirror_policy == + fapi2::ENUM_ATTR_MEM_MIRROR_PLACEMENT_POLICY_NORMAL) //Non-mirrored mode, but still set up mirrored equiv addressses + { + //Non-mirrored + // MCFGPA SMF valid (bit 0) + l_scomData.setBit(); + + // MCFGPA_SMF_UPPER_ADDRESS_AT_END_OF_RANGE + l_scomData.setBit(); + + // SMF lower addr + l_norAddr = 0; + l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_LOWER_addr); + FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr)); + l_scomData.insert( + (l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9 + // SMF upper addr + l_norAddr = 0; + l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_UPPER_addr); + FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr)); + l_scomData.insert( + (l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9 + + + //Mirrored BAR = Non-mirrored BAR >> 1 since bit 56 is not a dsaddr bit + // MCFGPA SMF valid (bit 0) + l_scomData_mirror.setBit(); + + // MCFGPA_SMF_UPPER_ADDRESS_AT_END_OF_RANGE + l_scomData_mirror.setBit(); + + // SMF lower addr + l_norAddr = 0; + l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_LOWER_addr); + FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr)); + l_scomData_mirror.insert( + (l_extAddr << 8)); //matches 17:35 extendBarAddress shifts left 8 (17- (8 + 1)) = 8 + // SMF upper addr + l_norAddr = 0; + l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_UPPER_addr); + FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr)); + l_scomData_mirror.insert( + (l_extAddr << 8)); //matches 17:35 extendBarAddress shifts left 8 (17- (8 + 1)) = 8 + } + else + { + //Mirrored + // MCFGPA SMF valid (bit 0) + l_scomData_mirror.setBit(); + + // MCFGPA_SMF_UPPER_ADDRESS_AT_END_OF_RANGE + l_scomData_mirror.setBit(); + + // SMF lower addr + l_norAddr = 0; + l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_LOWER_addr); + FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr)); + l_scomData_mirror.insert( + (l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17- 8) = 9 + // SMF upper addr + l_norAddr = 0; + l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_UPPER_addr); + FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr)); + l_scomData_mirror.insert( + (l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17- 8) = 9 + + //Non-Mirrored BAR = Mirrored BAR << 1 since bit 56 is now a dsaddr bit + // MCFGPA SMF valid (bit 0) + l_scomData.setBit(); + + // MCFGPA_SMF_UPPER_ADDRESS_AT_END_OF_RANGE + l_scomData.setBit(); + + // SMF lower addr + l_norAddr = 0; + l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_LOWER_addr); + FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr)); + l_scomData.insert( + (l_extAddr << 10)); //matches 17:35 extendBarAddress shifts left 8 (17- (8 - 1)) = 10 + // SMF upper addr + l_norAddr = 0; + l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_UPPER_addr); + FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr)); + l_scomData.insert( + (l_extAddr << 10)); //matches 17:35 extendBarAddress shifts left 8 (17- (8 - 1)) = 10 - // SMF lower addr - l_norAddr = 0; - l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_LOWER_addr); - FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr)); - l_scomData.insert( - (l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9 - // SMF upper addr - l_norAddr = 0; - l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_UPPER_addr); - FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr)); - l_scomData.insert( - (l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9 + } } // Write to reg @@ -2222,6 +2342,11 @@ fapi2::ReturnCode writeMCBarData( P9A_MI_MCFGP0A, l_scomData); FAPI_TRY(fapi2::putScom(l_target.getParent(), P9A_MI_MCFGP0A, l_scomData), "Error writing to P9A_MI_MCFGP0A reg"); + + FAPI_INF("Write MCFGPM0A reg 0x%.16llX, Value 0x%.16llX", + P9A_MI_MCFGPM0A, l_scomData_mirror); + FAPI_TRY(fapi2::putScom(l_target.getParent(), P9A_MI_MCFGPM0A, l_scomData_mirror), + "Error writing to P9A_MI_MCFGPM0A reg"); } else { @@ -2229,76 +2354,12 @@ fapi2::ReturnCode writeMCBarData( P9A_MI_MCFGP1A, l_scomData); FAPI_TRY(fapi2::putScom(l_target.getParent(), P9A_MI_MCFGP1A, l_scomData), "Error writing to P9A_MI_MCFGP1A reg"); - } - // 4. ---- Set MCFGPMA reg ----- - l_scomData = 0; - - // Assert if both HOLE1 and SMF are valid, settings will overlap - FAPI_ASSERT((l_data.MCFGPMA_HOLE_valid[1] && l_data.MCFGPMA_SMF_valid) == 0, - fapi2::MSS_SETUP_BARS_HOLE1_SMF_CONFLICT() - .set_TARGET(l_target) - .set_HOLE1_VALID(l_data.MCFGPMA_HOLE_valid[1]) - .set_SMF_VALID(l_data.MCFGPMA_SMF_valid), - "Error: MCFGPMA HOLE1 and SMF are both valid, settings will overlap"); - - // Hole 0 - if (l_data.MCFGPMA_HOLE_valid[0] == true) - { - // MCFGPMA HOLE0 valid (bit 0) - l_scomData.setBit(); - - // Hole 0 lower addr - // 0b0000000001 = 4GB - FAPI_TRY(extBar(l_ext_mask, l_data.MCFGPMA_HOLE_LOWER_addr[0], l_extAddr)); - l_scomData.insert( - (l_extAddr << 9)); //matches 17:31 extendedBarAddress shifts left 8 (17-8) = 9 - } - - // SMF - if (l_data.MCFGPMA_SMF_valid == true) - { - // MCFGPMA SMF valid (bit 0) - l_scomData.setBit(); - - // MCFGPMA_SMF_UPPER_ADDRESS_AT_END_OF_RANGE - l_scomData.setBit(); - - // SMF lower addr - l_norAddr = 0; - l_norAddr.insertFromRight<17, 19>(l_data.MCFGPMA_SMF_LOWER_addr); - FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr)); - l_scomData.insert( - (l_extAddr << 9 )); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9 - // SMF upper addr - l_norAddr = 0; - l_norAddr.insertFromRight<17, 19>(l_data.MCFGPMA_SMF_UPPER_addr); - FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr)); - l_scomData.insert( - (l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9 - } - - // Write to reg - if (l_pos % 2 == 0) - { - FAPI_INF("Write P9A_MI_MCFGPM0A reg 0x%.16llX, Value 0x%.16llX", - P9A_MI_MCFGPM0A, l_scomData); - - FAPI_TRY(fapi2::putScom(l_target.getParent(), P9A_MI_MCFGPM0A, l_scomData), - "Error writing to P9A_MI_MCFGPM0A reg"); - } - else - { - FAPI_INF("Write P9A_MI_MCFGPM1A reg 0x%.16llX, Value 0x%.16llX", - P9A_MI_MCFGPM1A, l_scomData); - - FAPI_TRY(fapi2::putScom(l_target.getParent(), P9A_MI_MCFGPM1A, l_scomData), - "Error writing to P9A_MI_MCFGPM1A reg"); + FAPI_INF("Write MCFGPM1A reg 0x%.16llX, Value 0x%.16llX", + P9A_MI_MCFGPM1A, l_scomData_mirror); + FAPI_TRY(fapi2::putScom(l_target.getParent(), P9A_MI_MCFGPM1A, l_scomData_mirror), + "Error writing to P9A_MI_MCFGP1A reg"); } - } // Data pair loop fapi_try_exit: @@ -2564,7 +2625,6 @@ fapi2::ReturnCode p9_mss_setup_bars( uint64_t(fapi2::current_err)); } - // Write data to MI FAPI_TRY(writeMCBarData(l_mccBarDataPair), "writeMCBarData() returns error, l_rc 0x%.8X", -- cgit v1.2.1