From 085a2f5c9d5859eff5849252a7b47ce1334d35de Mon Sep 17 00:00:00 2001 From: Dan Crowell Date: Thu, 2 Mar 2017 10:28:10 -0600 Subject: Another dummy commit to fix a mirror problem Deleting these files: src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/control_word_ddr4.H src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.C src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.H Change-Id: Ide2bb0523d122137ab55b6b4dfd7916b6b60712b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37389 Reviewed-by: Daniel M. Crowell Tested-by: Daniel M. Crowell --- .../hwp/memory/lib/dimm/ddr4/control_word_ddr4.H | 345 --- .../hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H | 466 ---- .../chips/p9/procedures/hwp/memory/lib/mc/xlate.C | 2460 -------------------- .../chips/p9/procedures/hwp/memory/lib/mc/xlate.H | 1340 ----------- .../p9/procedures/hwp/memory/lib/spd/spd_factory.C | 849 ------- 5 files changed, 5460 deletions(-) delete mode 100644 src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/control_word_ddr4.H delete mode 100644 src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H delete mode 100644 src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.C delete mode 100644 src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.H delete mode 100644 src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C (limited to 'src/import') diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/control_word_ddr4.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/control_word_ddr4.H deleted file mode 100644 index 06d8b68c7..000000000 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/control_word_ddr4.H +++ /dev/null @@ -1,345 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/control_word_ddr4.H $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -/// -/// @file control_word_ddr4.C -/// @brief Run and manage the DDR4 control words for the RCD and data buffers -/// -// *HWP HWP Owner: Andre Marin -// *HWP HWP Backup: Brian Silver -// *HWP Team: Memory -// *HWP Level: 1 -// *HWP Consumed by: FSP:HB - - -#ifndef _MSS_CONTROL_WORD_H_ -#define _MSS_CONTROL_WORD_H_ - -#include - -#include - -#include -#include - -namespace mss -{ - -enum control_word -{ - // buffer control words - BCW_4BIT, - BCW_8BIT, - - // register control words - RCW_4BIT, - RCW_8BIT, - -}; - -/// -/// @class cw_data -/// @brief class that represents (register/buffer) control word data -/// -struct cw_data -{ - // function space # - fapi2::buffer iv_func_space; - - // Which control word# this is (rcw or bcw) - fapi2::buffer iv_number; - - // The attribute getter - fapi2::ReturnCode (*iv_attr_get)(const fapi2::Target&, uint8_t&); - - // The cw value - fapi2::buffer iv_data; - - // The delay needed after this CW word is written - uint64_t iv_delay; - - /// - /// @brief NO-OP function to avoid a function nullptr - /// @param[in] i_target a DIMM target - /// @param[out] o_output output remains unchanged - /// @return FAPI2_RC_SUCCESS iff okay - /// - static fapi2::ReturnCode no_op_func(const fapi2::Target& i_target, uint8_t& o_output) - { - return fapi2::FAPI2_RC_SUCCESS; - } - - /// - /// @brief ctor for attribute driven data - /// - cw_data( const uint64_t i_func_space, - const uint64_t i_number, - fapi2::ReturnCode (*i_func)(const fapi2::Target&, uint8_t&), - const uint64_t i_delay ): - iv_func_space(i_func_space), - iv_number(i_number), - iv_attr_get(i_func), - iv_data(0), - iv_delay(i_delay) - {} - - /// - /// @brief ctor for custom data - /// - cw_data( const uint64_t i_func_space, - const uint64_t i_number, - const uint64_t i_data, - const uint64_t i_delay): - iv_func_space(i_func_space), - iv_number(i_number), - iv_data(i_data), - iv_delay(i_delay) - { - // Setting the attribute accessor function pointer to NO-OP - // when we call the ctor that doesn't use it to avoid cases - // when iv_attr_get can be nullptr and potentially cause a seg fault - iv_attr_get = &no_op_func; - } - -}; - -/// -/// @class cwTraits -/// @brief a collection of traits associated with the control word engine -/// -template< control_word T > -class cwTraits; - -/// -/// @class cwTraits -/// @brief a collection of traits associated with the 8-bit buffer control words -/// -template< > -class cwTraits< BCW_8BIT > -{ - public: - static constexpr uint64_t DATA_LEN = 8; - static constexpr uint64_t WORD_LEN = 4; - static constexpr uint64_t SWIZZLE_START = 7; -}; - -/// -/// @class cwTraits -/// @brief a collection of traits associated with the 4-bit buffer control words -/// -template< > -class cwTraits< BCW_4BIT > -{ - public: - static constexpr uint64_t DATA_LEN = 4; - static constexpr uint64_t WORD_LEN = 4; - static constexpr uint64_t SWIZZLE_START = 7; -}; - -/// -/// @class cwTraits -/// @brief a collection of traits associated with the 8-bit register control words -/// -template< > -class cwTraits< RCW_8BIT > -{ - public: - static constexpr uint64_t DATA_LEN = 8; - static constexpr uint64_t WORD_LEN = 5; - static constexpr uint64_t SWIZZLE_START = 7; -}; - -/// -/// @class cwTraits -/// @brief a collection of traits associated with the 4-bit register control words -/// -template< > -class cwTraits< RCW_4BIT > -{ - public: - static constexpr uint64_t DATA_LEN = 4; - static constexpr uint64_t WORD_LEN = 4; - static constexpr uint64_t SWIZZLE_START = 7; -}; - -/// -/// @brief Helper function to set an RCD or data buffer command to the CCS instruction -/// @tparam T the buffer control word type (4 bit or 8 bit) -/// @tparam TT traits type defaults to cwTraits -/// @tparam OT the TargetType of the CCS instruction -/// @param[in] i_target a DIMM target -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS if and only if ok -/// -template< control_word T, typename TT = cwTraits, fapi2::TargetType OT > -static void set_cw_command( const fapi2::Target& i_target, - ccs::instruction_t& o_inst); - -/// -/// @brief Helper function to set an RCD or data buffer command to the CCS instruction -/// @param[in] i_target a DIMM target -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS if and only if ok -/// @note BCW_4BIT specialization -/// -template< > -inline void set_cw_command( const fapi2::Target& i_target, - ccs::instruction_t& o_inst) -{ - // Address bit 12 must be 1 for accesses to Data Buffer (DB) Control Words. - constexpr uint64_t DDR_ADDRESS_12 = 12; - - o_inst = ccs::rcd_command(i_target); - o_inst.arr0.setBit(); -} - -/// -/// @brief Helper function to set an RCD or data buffer command to the CCS instruction -/// @param[in] i_target a DIMM target -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS if and only if ok -/// @note BCW_8BIT specialization -/// -template< > -inline void set_cw_command ( const fapi2::Target& i_target, - ccs::instruction_t& o_inst) -{ - set_cw_command(i_target, o_inst); -} - -/// -/// @brief Helper function to set an RCD or data buffer command to the CCS instruction -/// @param[in] i_target a DIMM target -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS if and only if ok -/// @note RCW_4BIT specialization -/// -template< > -inline void set_cw_command( const fapi2::Target& i_target, - ccs::instruction_t& o_inst) -{ - o_inst = ccs::rcd_command(i_target); -} - -/// -/// @brief Helper function to set an RCD or data buffer command to the CCS instruction -/// @param[in] i_target a DIMM target -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS if and only if ok -/// @note RCW_8BIT specialization -/// -template< > -inline void set_cw_command( const fapi2::Target& i_target, - ccs::instruction_t& o_inst) -{ - set_cw_command(i_target, o_inst); -} - -/// -/// @brief Control word engine that sets the CCS instruction -/// @tparam T the buffer control word type (4 bit or 8 bit) -/// @tparam TT traits type defaults to cwTraits -/// @tparam OT the TargetType of the CCS instruction -/// @param[in] i_target a DIMM target -/// @param[in] i_data control word data to send -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS if and only if ok -/// -template< control_word T, typename TT = cwTraits, fapi2::TargetType OT > -fapi2::ReturnCode control_word_engine(const fapi2::Target& i_target, - const cw_data& i_data, - std::vector< ccs::instruction_t >& io_inst) -{ - ccs::instruction_t l_inst; - set_cw_command(i_target, l_inst); - - // For user defined data, iv_data is user defined and iv_attr_get is a NO-OP - // For attribute defined data, iv_attr_get will define datna and l_value initialization is overwritten - // I need l_value integral because the attribute accessor template deduction doesn't let me use buffers - // and since I'm passing in bcw data as const I can't pass in iv_data to the attribute accessor - // which would break const correctness - uint8_t l_value = i_data.iv_data; - FAPI_TRY( i_data.iv_attr_get(i_target, l_value) ); - - // Data to be written into the configuration registers - // 4-bit control are containned in bits DA0 thorugh DA3 - // 8-bit control are contained in bits DA0 thorugh DA7 - mss::swizzle< MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_0_13, - TT::DATA_LEN, TT::SWIZZLE_START >(fapi2::buffer(l_value), l_inst.arr0); - - // Selection of each word of control bits - // 4-bit control words are selected by bits on DA4 through DA11 - // 8-bit control words are selected by bits on DA8 through DA11 - mss::swizzle < MCBIST_CCS_INST_ARR0_00_DDR_ADDRESS_0_13 + TT::DATA_LEN, - TT::WORD_LEN, TT::SWIZZLE_START > (i_data.iv_number, l_inst.arr0); - - // For changes to the control word setting [...] the controller needs to wait tMRC[tDLLK] after - // the last control word access, before further access to the DRAM can take place. - l_inst.arr1.template insertFromRight(i_data.iv_delay); - - FAPI_INF("F%d%s%02d%s value 0x%x (%d cycles) 0x%016llx:0x%016llx %s", - uint8_t(i_data.iv_func_space), - (T == BCW_4BIT || T == BCW_8BIT ? "BC" : "RC"), - uint8_t(i_data.iv_number), - (T == BCW_4BIT || T == RCW_4BIT ? "" : "X"), - l_value, - i_data.iv_delay, - uint64_t(l_inst.arr0), uint64_t(l_inst.arr1), - mss::c_str(i_target)); - - io_inst.push_back(l_inst); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Control word engine that sets the CCS instruction -/// @tparam T the buffer control word type (4 bit or 8 bit) -/// @tparam TT traits type defaults to cwTraits -/// @tparam OT the TargetType of the CCS instruction -/// @param[in] i_target a DIMM target -/// @param[in] i_data_list a vector of control word data to send -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS if and only if ok -/// -template< control_word T, typename TT = cwTraits, fapi2::TargetType OT > -fapi2::ReturnCode control_word_engine(const fapi2::Target& i_target, - const std::vector& i_data_list, - std::vector< ccs::instruction_t >& io_inst) -{ - for (const auto& data : i_data_list) - { - FAPI_TRY( control_word_engine(i_target, data, io_inst) ); - } - -fapi_try_exit: - return fapi2::current_err; -} - -}// mss - -#endif diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H deleted file mode 100644 index 814efa968..000000000 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H +++ /dev/null @@ -1,466 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -/// -/// @file data_buffer_ddr4.H -/// @brief Code to support data_buffer_ddr4 -/// -// *HWP HWP Owner: Andre Marin -// *HWP HWP Backup: Brian Silver -// *HWP Team: Memory -// *HWP Level: 1 -// *HWP Consumed by: HB:FSP - -#ifndef _MSS_DATA_BUFFER_DDR4_H_ -#define _MSS_DATA_BUFFER_DDR4_H_ - -#include -#include -#include -#include -#include -#include -#include - -namespace mss -{ - -enum nibble : size_t -{ - LOWER = 2, - UPPER = 3, -}; - -// function space and control word definitions -enum db02_def -{ - // Function spaces - FUNC_SPACE_0 = 0, - FUNC_SPACE_1 = 1, - FUNC_SPACE_2 = 2, - FUNC_SPACE_3 = 3, - FUNC_SPACE_4 = 4, - FUNC_SPACE_5 = 5, - FUNC_SPACE_6 = 6, - FUNC_SPACE_7 = 7, - - // 4 bit BCWs - DQ_RTT_NOM_CW = 0x0, - DQ_RTT_WR_CW = 0x1, - DQ_RTT_PARK_CW = 0x2, - DQ_DRIVER_CW = 0x3, - MDQ_RTT_CW = 0x4, - MDQ_DRIVER_CW = 0x5, - CMD_SPACE_CW = 0x6, - RANK_PRESENCE_CW = 0x7, - RANK_SELECTION_CW = 0x8, - POWER_SAVING_CW = 0x9, - OPERATING_SPEED = 0xA, - VOLT_AND_SLEW_RATE_CW = 0xB, - BUFF_TRAIN_MODE_CW = 0xC, - LDQ_OPERATION_CW = 0xD, - PARITY_CW = 0xE, - ERROR_STATUS_CW = 0xF, - FUNC_SPACE_SELECT_CW = 0x7, - - // 8 bit BCWs - BUFF_CONFIG_CW = 0x1, - DRAM_VREF_CW = 0x6, - BUFF_TRAIN_CONFIG_CW = 0x4, -}; - -namespace ddr4 -{ - -// buffer training steps from DB02 DDR4 spec -// which makes them ddr4 specific -enum training : size_t -{ - NORMAL, - MREP, - DWL, - HWL, - MRD, - MWD, - HIW, -}; - -enum command : size_t -{ - RESET_DLL = 0, - ZQCL = 1, - ZQCS = 2, - CLEAR_ERR_STAT = 3, - SOFT_RESET = 4 -}; - -/// -/// @brief Sets the function space for the BCW -/// @tparam T the functon space number we want -/// @param[in] i_target a DIMM target -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS if and only if ok -/// -template< uint64_t T > -inline fapi2::ReturnCode function_space_select(const fapi2::Target< fapi2::TARGET_TYPE_DIMM >& i_target, - std::vector< ccs::instruction_t >& io_inst) -{ - // From DB02 spec - F[3:0]BC7x control word - constexpr size_t MAX_FUNC_SPACE = 7; - - if( T > MAX_FUNC_SPACE ) - { - // Function spaces are typically user selected. - // Sometimes function spaces are selected based on rank number - // or MDQ lane number which currently are also user inputs. - - // We assert out for user programming erros - FAPI_ERR("%s. Invalid function space selection: %d, max valid function space is %d", - mss::c_str(i_target), T, MAX_FUNC_SPACE); - - fapi2::Assert(false); - } - - // function space bits for the function space selector are - // don't cares (XXX). We choose 0 for simplicity. - cw_data l_data( FUNC_SPACE_0, FUNC_SPACE_SELECT_CW, T, mss::tmrd() ); - - FAPI_TRY( control_word_engine(i_target, l_data, io_inst), - "%s. Failed control_word_engine for 8-bit BCW (F%dBC%02lxX)", - mss::c_str(i_target), uint8_t(l_data.iv_func_space), uint8_t(l_data.iv_number) ); - - // I don't know what already existed in this ccs instruction vector beforehand so - // I use the back() method to access the last added ccs instruction of interest - FAPI_INF("%s. F%dBC%02lx ccs inst 0x%016llx:0x%016llx, data: %d", - mss::c_str(i_target), uint8_t(l_data.iv_func_space), uint8_t(l_data.iv_number), - uint64_t(io_inst.back().arr0), uint64_t(io_inst.back().arr1), uint8_t(l_data.iv_data) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Sets the function space for the BCW -/// @param[in] i_target a DIMM target -/// @param[in] i_func_space the functon space number we want -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS if and only if ok -/// -inline fapi2::ReturnCode function_space_select(const fapi2::Target< fapi2::TARGET_TYPE_DIMM >& i_target, - const uint64_t i_func_space, - std::vector< ccs::instruction_t >& io_inst) -{ - // From DB02 spec - F[3:0]BC7x control word - constexpr size_t MAX_FUNC_SPACE = 7; - - if( i_func_space > MAX_FUNC_SPACE ) - { - // Function spaces are typically user selected. - // Sometimes function spaces are selected based on rank number - // or MDQ lane number which currently are also user inputs. - - // We assert out for user programming erros - FAPI_ERR("%s. Invalid function space selection: %d, max valid function space is %d", - mss::c_str(i_target), i_func_space, MAX_FUNC_SPACE); - - fapi2::Assert(false); - } - - // function space bits for the function space selector are - // don't cares (XXX). We choose 0 for simplicity. - cw_data l_data( FUNC_SPACE_0, FUNC_SPACE_SELECT_CW, i_func_space, mss::tmrd() ); - - FAPI_TRY( control_word_engine(i_target, l_data, io_inst), - "%s. Failed control_word_engine for 8-bit BCW (F%dBC%02lxX)", - mss::c_str(i_target), uint8_t(l_data.iv_func_space), uint8_t(l_data.iv_number) ); - - // I don't know what already existed in this ccs instruction vector beforehand so - // I use the back() method to access the last added ccs instruction of interest - FAPI_INF("%s. F%dBC%02lx ccs inst 0x%016llx:0x%016llx, data: %d", - mss::c_str(i_target), uint8_t(l_data.iv_func_space), uint8_t(l_data.iv_number), - uint64_t(io_inst.back().arr0), uint64_t(io_inst.back().arr1), uint8_t(l_data.iv_data) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Boilerplate for setting & printing BCWs -/// @tparam T the functon space number we want -/// @param[in] i_target a DIMM target -/// @param[in] i_data control word data -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS if and only if ok -/// -template< mss::control_word T > -static fapi2::ReturnCode settings_boilerplate(const fapi2::Target< fapi2::TARGET_TYPE_DIMM >& i_target, - const cw_data& i_data, - std::vector< ccs::instruction_t >& io_inst) -{ - FAPI_TRY( function_space_select(i_target, i_data.iv_func_space, io_inst), - "%s. Failed to select function space %d", - mss::c_str(i_target), uint8_t(i_data.iv_func_space) ); - - FAPI_TRY( control_word_engine(i_target, i_data, io_inst), - "%s. Failed control_word_engine for 8-bit BCW (F%dBC%02lxX)", - mss::c_str(i_target), uint8_t(i_data.iv_func_space), uint8_t(i_data.iv_number) ); - - // I don't know what already existed in this ccs instruction vector beforehand so - // I use the back() method to access the last added ccs instruction of interest - FAPI_INF("%s. F%dBC%02lx ccs inst 0x%016llx:0x%016llx, data: %d", - mss::c_str(i_target), uint8_t(i_data.iv_func_space), uint8_t(i_data.iv_number), - uint64_t(io_inst.back().arr0), uint64_t(io_inst.back().arr1), uint8_t(i_data.iv_data) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Sets data buffer training mode control word -/// @tparam T TargetType of the CCS instruction -/// @param[in] i_target the DIMM target -/// @param[in] i_mode buffer training mode -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS iff ok -/// @note Sets buffer control word (BC0C) setting -/// -template< fapi2::TargetType T > -inline fapi2::ReturnCode set_buffer_training( const fapi2::Target& i_target, - const training i_mode, - std::vector< ccs::instruction_t >& io_inst ) -{ - // This doesn't need to be reused so it is left local to this function scope - static const std::vector< std::pair > BUFF_TRAINING = - { - { NORMAL, 0 }, - { MREP, 1 }, - { DWL, 4 }, - { HWL, 5 }, - { MRD, 6 }, - { MWD, 7 }, - { HIW, 8 }, - }; - - // If we can't find the key then the user passed in an invalid mode - // and this is a user programming error. So we assert out. - // find_value_from_key API does the error checking and fails out - // for any invalid user input. Easier to handle for sparsed arrays. - uint64_t l_encoding = 0; - fapi2::Assert(find_value_from_key(BUFF_TRAINING, i_mode, l_encoding)); - - cw_data l_data(FUNC_SPACE_0, BUFF_TRAIN_MODE_CW, l_encoding, mss::tmrc()); - FAPI_TRY( settings_boilerplate(i_target, l_data, io_inst) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Sets rank presence control word -/// @param[in] i_num_package_ranks num of package ranks for LRDIMM -/// @param[out] o_setting bc07 settings -/// @return FAPI2_RC_SUCCESS iff okay -/// -static fapi2::ReturnCode rank_presence_helper(const fapi2::Target& i_target, - const uint64_t i_num_package_ranks, - uint64_t& o_setting) -{ - switch(i_num_package_ranks) - { - case 1: - o_setting = 0b1110; - break; - - case 2: - o_setting = 0b1100; - break; - - case 3: - o_setting = 0b1000; - break; - - case 4: - o_setting = 0b0000; - break; - - default: - // While an invalid input can signify a programming error - // it is expected that this input can come from the eff_master_rank accessor. - // If it is the latter than we will want to call out an error - // to raise red flags regarding decoded SPD data that sets this attribute - FAPI_ASSERT( false, - fapi2::MSS_INVALID_NUM_PKG_RANKS() - .set_DIMM_TARGET(i_target) - .set_NUM_PKG_RANKS(i_num_package_ranks), - "%s. Received invalid package rank %d", - mss::c_str(i_target), i_num_package_ranks ); - break; - } - - // If we got here than success - return fapi2::FAPI2_RC_SUCCESS; - -fapi_try_exit: - // If we are here than we FAPI_ASSERT'ed out - return fapi2::current_err; -} - -/// -/// @brief Sets rank presence control word -/// @tparam T TargetType of the CCS instruction -/// @param[in] i_target the DIMM target -/// @param[in] i_num_package_ranks num of package ranks for LRDIMM -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS iff ok -/// @note Sets buffer control word (BC07) setting -/// -template< fapi2::TargetType T> -inline fapi2::ReturnCode set_rank_presence( const fapi2::Target& i_target, - const uint64_t i_num_package_ranks, - std::vector< ccs::instruction_t >& io_inst ) -{ - // Helper function handles error checking - uint64_t l_encoding = 0; - FAPI_TRY( rank_presence_helper( i_target, i_num_package_ranks, l_encoding), - "%s. Failed to set rank_presence BCW for %d number of package ranks", - mss::c_str(i_target), i_num_package_ranks ); - { - cw_data l_data(FUNC_SPACE_0, RANK_PRESENCE_CW, l_encoding, mss::tmrc()); - FAPI_TRY( settings_boilerplate(i_target, l_data, io_inst) ); - } - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Sets Upper/Lower nibble DRAM interface receive enable training control word -/// @tparam T the nibble of in training (upper/lower) -/// @tparam OT TargetType of the CCS instruction -/// @param[in] i_target the DIMM target -/// @param[in] i_rank DIMM0 rank [0:3] or DIMM1 rank [4:7] -/// @param[in] i_trained_timing the delay MDQS receive enable timing -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS iff ok -/// @note Sets buffer control word ( F[3:0]BC2x ) setting -/// -template< mss::nibble N, fapi2::TargetType OT> -fapi2::ReturnCode set_mrep_timing_control( const fapi2::Target& i_target, - const uint64_t i_rank, - const uint64_t i_trained_timing, - std::vector< ccs::instruction_t >& io_inst ) -{ - constexpr size_t MAX_DELAY = 63; - - // These fail assertions are programming input erros - if( i_rank >= MAX_MRANK_PER_PORT ) - { - FAPI_ERR("Invalid ranks received (%d) from max allowed (%d)]", i_rank, MAX_MRANK_PER_PORT - 1); - fapi2::Assert(false); - } - - if( i_trained_timing > MAX_DELAY ) - { - FAPI_ERR("Invalid trained delay received (%d tCK) from max allowed (%d tck)", i_trained_timing, MAX_DELAY); - fapi2::Assert(false); - } - - // Function space is determined by rank index for control word since it has a [0:3] range - cw_data l_data( mss::index(i_rank), N, i_trained_timing, mss::tmrc() ); - FAPI_TRY( settings_boilerplate(i_target, l_data, io_inst) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Sets command space control word -/// @tparam T TargetType of the CCS instruction -/// @param[in] i_target the DIMM target -/// @param[in] i_command command name -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS iff ok -/// @note Sets buffer control word (BC06) setting -/// -template< fapi2::TargetType T> -inline fapi2::ReturnCode set_command_space( const fapi2::Target& i_target, - const command i_command, - std::vector< ccs::instruction_t >& io_inst ) -{ - constexpr uint64_t MAX_VALID_CMD = 4; - - // User input programming error asserts program termination - if( i_command > MAX_VALID_CMD ) - { - FAPI_ERR( "%s. Invalid command received: %d, largest valid command is %d", - mss::c_str(i_target), i_command, MAX_VALID_CMD ); - fapi2::Assert(false); - } - - // From the DDR4DB02 Spec: BC06 - Command Space Control Word - // After issuing a data buffer command via writes to BC06 waiting for tMRC(16 tCK) - // is required before the next DRAM command or BCW write can be issued. - cw_data l_data(FUNC_SPACE_0, CMD_SPACE_CW, i_command, mss::tmrc()); - FAPI_TRY( settings_boilerplate(i_target, l_data, io_inst) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Sets per buffer addressibility (PBA) mode -/// @tparam T TargetType of the CCS instruction -/// @param[in] i_target the DIMM target -/// @param[in] i_state mss::ON or mss::OFF -/// @param[in,out] io_inst a vector of CCS instructions we should add to -/// @return FAPI2_RC_SUCCESS iff ok -/// @note Sets DA0 setting for buffer control word (F0BC1x) -/// -template< fapi2::TargetType T> -inline fapi2::ReturnCode set_pba_mode( const fapi2::Target& i_target, - const mss::states i_state, - std::vector< ccs::instruction_t >& io_inst ) -{ - constexpr uint64_t MAX_VALID = 1; - - // User input programming error asserts program termination - if( i_state > MAX_VALID ) - { - FAPI_ERR( "%s. Invalid setting received: %d, largest valid PBA setting is %d", - mss::c_str(i_target), i_state, MAX_VALID ); - fapi2::Assert(false); - } - - cw_data l_data(FUNC_SPACE_0, BUFF_CONFIG_CW, i_state, mss::tmrc()); - FAPI_TRY( settings_boilerplate(i_target, l_data, io_inst) ); - -fapi_try_exit: - return fapi2::current_err; -} - -}// namespace ddr4 -} // namespace mss - -#endif diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.C b/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.C deleted file mode 100644 index db7da4d23..000000000 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.C +++ /dev/null @@ -1,2460 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -/// -/// @file xlate.C -/// @brief Subroutines to manipulate the memory controller translation registers -/// -// *HWP HWP Owner: Brian Silver -// *HWP HWP Backup: Andre Marin -// *HWP Team: Memory -// *HWP Level: 2 -// *HWP Consumed by: FSP:HB - -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include - -using fapi2::TARGET_TYPE_MCA; -using fapi2::TARGET_TYPE_DIMM; - -namespace mss -{ -namespace mc -{ - -/// A little vector of translators. We have one of these for each DIMM we support -static const std::vector xlate_map = -{ - // 1R 4Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_4G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_8GB), - xlate_dimm_1R1T4Gbx4 - }, - - // 1R 8Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_8GB), - xlate_dimm_1R1T8Gbx8 - }, - - // 1R 8Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_16GB), - xlate_dimm_1R1T8Gbx4 - }, - - // 1R 16Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_16GB), - xlate_dimm_1R1T16Gbx8 - }, - - // 1R 16Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM18, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_32GB), - xlate_dimm_1R1T16Gbx4 - }, - - // 2R 4Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_4G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_16GB), - xlate_dimm_2R2T4Gbx4 - }, - - // 2R 8Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_16GB), - xlate_dimm_2R2T8Gbx8 - }, - - // 2R 8Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_32GB), - xlate_dimm_2R2T8Gbx4 - }, - - // 2R 16Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_32GB), - xlate_dimm_2R2T16Gbx8 - }, - - // 2R 16Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM18, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_64GB), - xlate_dimm_2R2T16Gbx4 - }, - - // 4R 4Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_4G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_32GB), - xlate_dimm_4R4T4Gbx4 - }, - - // 4R 8Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_32GB), - xlate_dimm_4R4T8Gbx8 - }, - - // 4R 8Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_64GB), - xlate_dimm_4R4T8Gbx4 - }, - - // 4R 16Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_64GB), - xlate_dimm_4R4T16Gbx8 - }, - - // 4R 16Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM18, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_128GB), - xlate_dimm_4R4T16Gbx4 - }, - - - - // - // 3DS RDIMM - // - - // 1R 2H 3DS 4Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_4G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_16GB), - xlate_dimm_1R2T4Gbx4 - }, - - // 1R 2H 3DS 8Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_16GB), - xlate_dimm_1R2T8Gbx8 - }, - - // 1R 2H 3DS 8Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_32GB), - xlate_dimm_1R2T8Gbx4 - }, - - // 1R 2H 3DS 16Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_32GB), - xlate_dimm_1R2T16Gbx8 - }, - - // 1R 2H 3DS 16Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM18, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_64GB), - xlate_dimm_1R2T16Gbx4 - }, - - // 1R 4H 3DS 4Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_4G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_32GB), - xlate_dimm_1R4T4Gbx4 - }, - - // 1R 4H 3DS 8Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_32GB), - xlate_dimm_1R4T8Gbx8 - }, - - // 1R 4H 3DS 8Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_64GB), - xlate_dimm_1R4T8Gbx4 - }, - - // 1R 4H 3DS 16Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_64GB), - xlate_dimm_1R4T16Gbx8 - }, - - // 1R 4H 3DS 16Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM18, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_128GB), - xlate_dimm_1R4T16Gbx4 - }, - - // 1R 8H 3DS 4Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_8R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_4G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_64GB), - xlate_dimm_1R8T4Gbx4 - }, - - // 1R 8H 3DS 8Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_8R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_64GB), - xlate_dimm_1R8T8Gbx8 - }, - - // 1R 8H 3DS 8Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_8R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_128GB), - xlate_dimm_1R8T8Gbx4 - }, - - // 1R 8H 3DS 16Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_8R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_128GB), - xlate_dimm_1R8T16Gbx8 - }, - - // 1R 8H 3DS 16Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_1R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_8R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM18, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_256GB), - xlate_dimm_1R8T16Gbx4 - }, - - - // 2R 2H 3DS 4Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_4G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_32GB), - xlate_dimm_2R4T4Gbx4 - }, - - // 2R 2H 3DS 8Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_32GB), - xlate_dimm_2R4T8Gbx8 - }, - - // 2R 2H 3DS 8Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_64GB), - xlate_dimm_2R4T8Gbx4 - }, - - // 2R 2H 3DS 16Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_64GB), - xlate_dimm_2R4T16Gbx8 - }, - - // 2R 2H 3DS 16Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM18, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_128GB), - xlate_dimm_2R4T16Gbx4 - }, - - - // 2R 4H 3DS 4Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_8R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_4G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_64GB), - xlate_dimm_2R8T4Gbx4 - }, - - // 2R 4H 3DS 8Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_8R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_64GB), - xlate_dimm_2R8T8Gbx8 - }, - - // 2R 4H 3DS 8Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_8R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_128GB), - xlate_dimm_2R8T8Gbx4 - }, - - // 2R 4H 3DS 16Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_8R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_128GB), - xlate_dimm_2R8T16Gbx8 - }, - - // 2R 4H 3DS 16Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_8R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM18, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_256GB), - xlate_dimm_2R8T16Gbx4 - }, - - - // 2R 8H 3DS 4Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_16R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_4G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_128GB), - xlate_dimm_2R16T4Gbx4 - }, - - // 2R 8H 3DS 8Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_16R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM16, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_128GB), - xlate_dimm_2R16T8Gbx8 - }, - - // 2R 8H 3DS 8Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_16R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_256GB), - xlate_dimm_2R16T8Gbx4 - }, - - // 2R 8H 3DS 16Gbx8 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_16R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_256GB), - xlate_dimm_2R16T16Gbx8 - }, - - // 2R 8H 3DS 16Gbx4 DDR4 RDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_16R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM18, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_512GB), - xlate_dimm_2R16T16Gbx4 - }, - - - - // - // LRDIMM - // - - // 2R 8Gbx4 32GB DDR4 LRDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_32GB), - xlate_dimm_2R2T8Gbx4 - }, - - // 4R 8Gbx4 64GB DDR4 LRDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_64GB), - xlate_dimm_4R4T8Gbx4 - }, - - // - // 3DS LRDIMM - // - - // 2R 2H 3DS 8Gbx4 64GB DDR4 LRDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_4G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_64GB), - xlate_dimm_2R4T8Gbx4 - }, - - // 2R 4H 3DS 8Gbx4 64GB DDR4 LRDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_8R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_8G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM17, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_128GB), - xlate_dimm_2R8T8Gbx4 - }, - - // 2R 2H 3DS 16Gbx4 128GB DDR4 LRDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_4R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM18, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_128GB), - xlate_dimm_2R4T16Gbx4 - }, - - // 2R 4H 3DS 16Gbx4 256GB DDR4 LRDIMM - { - dimm::kind(fapi2::ENUM_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_2R, - fapi2::ENUM_ATTR_EFF_NUM_RANKS_PER_DIMM_8R, - fapi2::ENUM_ATTR_EFF_DRAM_DENSITY_16G, - fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4, - fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM, - fapi2::ENUM_ATTR_EFF_DRAM_ROW_BITS_NUM18, - fapi2::ENUM_ATTR_EFF_DIMM_SIZE_256GB), - xlate_dimm_2R8T16Gbx4 - }, - -}; - -/// -/// @brief Helper to determine if a given DIMM is the only 1R DIMM on a port -/// @param[in] i_target the DIMM in question -/// @note 1R DIMM are special. We need to handle 2 1R DIMM on a port as a special case - kind of make them look like -/// a single 2R DIMM. So we have to do a little dance here to get our partners configuration. -/// @return true iff all slots are have 1R DIMM installed -/// -static bool all_slots_1R_helper(const fapi2::Target& i_target) -{ - const auto& l_mca = mss::find_target(i_target); - const auto& l_dimms = mss::find_targets(l_mca); - - const std::vector l_dimm_kinds = dimm::kind::vector(l_dimms); - bool l_all_slots_1R = false; - - // If we only have 1 DIMM, we don't have two slots with 1R DIMM. If we need to check, iterate - // over the DIMM kinds and make sure all the DIMM have one master and one total ranks (not 3DS). - if (l_dimms.size() > 1) - { - l_all_slots_1R = true; - - for (const auto& k : l_dimm_kinds) - { - l_all_slots_1R &= (k.iv_master_ranks == 1) && (k.iv_total_ranks == 1); - } - - FAPI_INF("We have a 1R DIMM %s and more than one DIMM installed; all 1R? %s", - mss::c_str(i_target), (l_all_slots_1R == true ? "yes" : "no") ); - } - - return l_all_slots_1R; -} - -/// -/// @brief Helper to lay down the col and bank mappings. -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note This is for 16 bank DIMM, 32 bank DIMM will be different -/// -static void column_and_16bank_helper(fapi2::buffer& io_xlate1, fapi2::buffer& io_xlate2) -{ - // These are compile time freebies, so there's no need to bother putting them in a pre-defined - // constant and or-ing them in. Keeps things much more clear when the performance team wants to muck - // around with the settings. Mappings taken directly from the Nimbus Workbook. The magic numbers - // aren't; they're settings as defined in the scomdef - - constexpr uint64_t COL4_MAP(PORT_ADDRESS_27); - constexpr uint64_t COL5_MAP(PORT_ADDRESS_26); - constexpr uint64_t COL6_MAP(PORT_ADDRESS_25); - constexpr uint64_t COL7_MAP(PORT_ADDRESS_24); - constexpr uint64_t COL8_MAP(PORT_ADDRESS_23); - constexpr uint64_t COL9_MAP(PORT_ADDRESS_7); - constexpr uint64_t BANK0_MAP(PORT_ADDRESS_28); - constexpr uint64_t BANK1_MAP(PORT_ADDRESS_30); - constexpr uint64_t BG0_MAP(PORT_ADDRESS_31); - constexpr uint64_t BG1_MAP(PORT_ADDRESS_32); - - io_xlate1.insertFromRight(COL4_MAP); - - io_xlate1.insertFromRight(COL5_MAP); - - io_xlate1.insertFromRight(COL6_MAP); - - io_xlate1.insertFromRight(COL7_MAP); - - io_xlate2.insertFromRight(COL8_MAP); - - io_xlate2.insertFromRight(COL9_MAP); - - io_xlate2.insertFromRight(BANK0_MAP); - - io_xlate2.insertFromRight(BANK1_MAP); - - io_xlate2.insertFromRight(BG0_MAP); - - io_xlate2.insertFromRight(BG1_MAP); - - FAPI_DBG("Set bits for column and 16 banks. MCP0XLT1: 0x%016lx, MCP0XLT2: 0x%016lx", - uint64_t(io_xlate1), uint64_t(io_xlate2) ); - -} - -/// -/// @brief D Bit helper - sets the d-bit -/// The D bit is the bit in the address which tells the controller to move to the -/// other DIMM on the slot. D is short for DIMM bit. -/// @param[in] i_target, the DIMM target (for tracing only) -/// @param[in] i_largest, true if we're the largest DIMM on the port -/// @param[in] i_offset, which side of the register to setup -/// @param[in] i_map the place to map the D bit in the register -/// @param[in,out] io_xlate the translation register -/// @return FAPI2_RC_SUCCESS iff okay -/// -static fapi2::ReturnCode d_bit_helper( const fapi2::Target& i_target, - const bool i_largest, - const uint64_t i_offset, - const uint64_t i_map, - fapi2::buffer& io_xlate0) -{ - // Setup the D-bit. If we're the largest DIMM, it is our mapping which matters. - // Notice that we don't care if the D-value bit has been set; this mapping needs to be setup regardless - // (SJ Powell says so) - if (i_largest) - { - FAPI_INF("setting d-bit mapping (am largest) 0x%x at start: %d, len: %d for %s", - i_map, MCS_PORT02_MCP0XLT0_D_BIT_MAP + i_offset, MCS_PORT02_MCP0XLT0_D_BIT_MAP_LEN, mss::c_str(i_target)); - - FAPI_TRY( io_xlate0.insertFromRight(i_map, MCS_PORT02_MCP0XLT0_D_BIT_MAP + i_offset, - MCS_PORT02_MCP0XLT0_D_BIT_MAP_LEN) ); - } - - FAPI_DBG("d-bit %s set. MCP0XLT0: 0x%016lx", (i_largest == true ? "was" : "was NOT"), uint64_t(io_xlate0)); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R2T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t M1_MAP(PORT_ADDRESS_29); - constexpr uint64_t R15_MAP(PORT_ADDRESS_6); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_5); - - // Set the proper bit if there is a DIMM in this slot. If there wasn't, we wouldn't see - // this DIMM in the vector, so this is always safe. - FAPI_TRY(set_xlate_dimm_slot(i_offset, io_xlate0) ); - - // Check our master ranks, and enable the proper bits. - // Note this seems a little backward. M0 is the left most bit, M1 the right most. - // So, M1 changes for ranks 0,1 and M0 changes for ranks 3,4 - // 2 rank DIMM, so master bit 1 (least significant) bit needs to be mapped. - FAPI_TRY( set_xlate_mrank(M1_MAP, i_offset, io_xlate0) ); - - // Tell the MC which of the row bits are valid, and map the DIMM selector - // We're a 16 row DIMM, so ROW15 is valid. - FAPI_TRY( set_xlate_row(R15_MAP, i_offset, io_xlate0) ); - - // Drop down the column assignments - column_and_16bank_helper(io_xlate1, io_xlate2); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R2T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R16_MAP(PORT_ADDRESS_5); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_4); - - // We're basically a 2R 4Gbx4 with an extra row. So lets setup like we're one of those, - // add row 16 and shift the D bit as needed. - xlate_dimm_2R2T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2); - - // Tell the MC which of the row bits are valid, and map the DIMM selector - // We're a 17 row DIMM, so ROW16 is valid. - FAPI_TRY( set_xlate_row(R16_MAP, i_offset, io_xlate0) ); - - // Column assignments happened when we called xlate_dimm_2R2T4Gbx4 - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R2T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R17_MAP(PORT_ADDRESS_4); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_3); - - // We're basically a 2R 8Gbx4 with an extra row. So lets setup like we're one of those, - // add row 16 and shift the D bit as needed. - FAPI_TRY( xlate_dimm_2R2T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // Tell the MC which of the row bits are valid, and map the DIMM selector - // We're a 18 row DIMM, so ROW17 is valid. - FAPI_TRY( set_xlate_row(R17_MAP, i_offset, io_xlate0) ); - - // Column assignments happened when we called xlate_dimm_2R2T8Gbx4 - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 2H 3DS 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R4T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t M1_MAP(PORT_ADDRESS_6); - - // We're just like a 1R 4H 4Gbx4 so lets start there and modify for the slave ranks. - FAPI_TRY( xlate_dimm_1R4T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - FAPI_TRY( clear_xlate_srank(i_offset, io_xlate0, io_xlate1) ); - FAPI_TRY( set_xlate_mrank(M1_MAP, i_offset, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 2H 3DS 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R4T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R16_MAP(PORT_ADDRESS_4); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_3); - - // We're just like a 2R 2H 4Gbx4 so lets start there and modify for the slave ranks. - FAPI_TRY( xlate_dimm_2R4T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // We're a 17 row DIMM, so ROW16 is valid. - FAPI_TRY( set_xlate_row(R16_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 2H 3DS 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R4T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R17_MAP(PORT_ADDRESS_3); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_2); - - // We're just like a 2R 2H 8Gbx4 so lets start there and modify for the slave ranks. - FAPI_TRY( xlate_dimm_2R4T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // We're a 18 row DIMM, so ROW17 is valid. - FAPI_TRY( set_xlate_row(R17_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 4H 3DS 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R8T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t M1_MAP(PORT_ADDRESS_5); - - // We're just like a 1R 8H 4Gbx4 so lets start there and modify for the slave ranks. - FAPI_TRY( xlate_dimm_1R8T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - FAPI_TRY( clear_xlate_srank(i_offset, io_xlate0, io_xlate1) ); - FAPI_TRY( set_xlate_mrank(M1_MAP, i_offset, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 4H 3DS 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R8T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R16_MAP(PORT_ADDRESS_3); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_2); - - // We're just like a 2R 4H 3DS 4Gbx4 so lets start there and modify - FAPI_TRY( xlate_dimm_2R8T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // We're a 17 row DIMM, so ROW16 is valid. - FAPI_TRY( set_xlate_row(R16_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 4H 3DS 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R8T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R17_MAP(PORT_ADDRESS_2); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_1); - - // We're just like a 2R 2H 3DS 8Gbx4 so lets start there and modify - FAPI_TRY( xlate_dimm_2R4T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // We're a 18 row DIMM, so ROW17 is valid. - FAPI_TRY( set_xlate_row(R17_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 8H 3DS 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R16T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t M1_MAP(PORT_ADDRESS_4); - constexpr uint64_t R15_MAP(PORT_ADDRESS_3); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_2); - - // We're just like a 1R 8H 4Gbx4 so lets start there - FAPI_TRY( xlate_dimm_1R8T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // We need to setup our M1 bit - FAPI_TRY( set_xlate_mrank(M1_MAP, i_offset, io_xlate0) ); - - // We're a 16 row DIMM, so ROW15 is valid. - FAPI_TRY( set_xlate_row(R15_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 8H 3DS 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R16T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R16_MAP(PORT_ADDRESS_2); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_1); - - // We're just like a 2R 8H 3DS 4Gbx4 DDR4 RDIMM - FAPI_TRY( xlate_dimm_2R16T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // We're a 17 row DIMM, so ROW16 is valid. - FAPI_TRY( set_xlate_row(R16_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 8H 3DS 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R16T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R17_MAP(PORT_ADDRESS_1); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_0); - - // We're just like a 2R 8H 3DS 8Gbx4 DDR4 RDIMM - FAPI_TRY( xlate_dimm_2R16T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // We're a 18 row DIMM, so ROW17 is valid. - FAPI_TRY( set_xlate_row(R17_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R1T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - const bool l_all_slots_1R = all_slots_1R_helper(i_kind.iv_target); - - // Set the proper bit if there is a DIMM in this slot. If there wasn't, we wouldn't see - // this DIMM in the vector, so this is always safe. - FAPI_TRY(set_xlate_dimm_slot(i_offset, io_xlate0) ); - - // If we have all the slots filled in with 1R SDP DIMM, we build a very differnt mapping. - if (l_all_slots_1R) - { - constexpr uint64_t R15_MAP(PORT_ADDRESS_6); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_29); - - // Tell the MC which of the row bits are valid, and map the DIMM selector - // We're a 16 row DIMM, so ROW15 is valid. - FAPI_TRY( set_xlate_row(R15_MAP, i_offset, io_xlate0) ); - - // Drop down the column assignments. - column_and_16bank_helper(io_xlate1, io_xlate2); - - // Setup the D-bit. Since both DIMM are identical, we just need to setup the map - FAPI_INF("setting d-bit mapping (all 1R DIMM) for %s", mss::c_str(i_kind.iv_target)); - io_xlate0.insertFromRight(DBIT_MAP); - - return fapi2::FAPI2_RC_SUCCESS; - } - - // So if we're here we have only 1 1R DIMM installed. This translation is different. - - // Tell the MC which of the row bits are valid, and map the DIMM selector - { - constexpr uint64_t COL4_MAP(PORT_ADDRESS_28); - constexpr uint64_t COL5_MAP(PORT_ADDRESS_27); - constexpr uint64_t COL6_MAP(PORT_ADDRESS_26); - constexpr uint64_t COL7_MAP(PORT_ADDRESS_25); - constexpr uint64_t COL8_MAP(PORT_ADDRESS_24); - constexpr uint64_t COL9_MAP(PORT_ADDRESS_23); - constexpr uint64_t BANK0_MAP(PORT_ADDRESS_29); - constexpr uint64_t BANK1_MAP(PORT_ADDRESS_30); - constexpr uint64_t BG0_MAP(PORT_ADDRESS_31); - constexpr uint64_t BG1_MAP(PORT_ADDRESS_32); - constexpr uint64_t R15_MAP(PORT_ADDRESS_7); - - // We're a 16 row DIMM, so ROW15 is valid. - FAPI_TRY( set_xlate_row(R15_MAP, i_offset, io_xlate0) ); - - // We don't just drop down the col and bank assignments, they're different. - io_xlate1.insertFromRight(COL4_MAP); - - io_xlate1.insertFromRight(COL5_MAP); - - io_xlate1.insertFromRight(COL6_MAP); - - io_xlate1.insertFromRight(COL7_MAP); - - io_xlate2.insertFromRight(COL8_MAP); - - io_xlate2.insertFromRight(COL9_MAP); - - io_xlate2.insertFromRight(BANK0_MAP); - - io_xlate2.insertFromRight(BANK1_MAP); - - io_xlate2.insertFromRight(BG0_MAP); - - io_xlate2.insertFromRight(BG1_MAP); - } - // There's nothing to do for the D-bit. We're either not the largest DIMM, in which case the largest DIMM - // will fix up our D-bit mapping, or we're the only DIMM in the port. If we're the only DIMM in the port, - // there is no D-bit mapping for a 1 slot 1R DIMM. - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R1T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R16_MAP_ALL_1R(PORT_ADDRESS_5); - constexpr uint64_t R16_MAP_NOT_ALL_1R(PORT_ADDRESS_6); - const auto R16_MAP = all_slots_1R_helper(i_kind.iv_target) ? R16_MAP_ALL_1R : R16_MAP_NOT_ALL_1R; - - // We're more or less a 1R 4Gbx4 with an extra row. So lets setup like that and add our row in. - FAPI_TRY( xlate_dimm_1R1T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // If we have all the slots filled in with 1R SDP DIMM, we build a differnt mapping. - // We're a 17 row DIMM, so ROW16 is valid. - FAPI_TRY( set_xlate_row(R16_MAP, i_offset, io_xlate0) ); - - // There's nothing to do for the D-bit. We're either not the largest DIMM, in which case the largest DIMM - // will fix up our D-bit mapping, or we're the only DIMM in the port. If we're the only DIMM in the port, - // there is no D-bit mapping for a 1 slot 1R DIMM. - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R1T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R17_MAP_ALL_1R(PORT_ADDRESS_4); - constexpr uint64_t R17_MAP_NOT_ALL_1R(PORT_ADDRESS_5); - const auto R17_MAP = all_slots_1R_helper(i_kind.iv_target) ? R17_MAP_ALL_1R : R17_MAP_NOT_ALL_1R; - - // We're more or less a 1R 8Gbx4 with an extra row. So lets setup like that and add our row in. - FAPI_TRY( xlate_dimm_1R1T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // If we have all the slots filled in with 1R SDP DIMM, we build a different mapping. - // We're a 18 row DIMM, so ROW17 is valid. - FAPI_TRY( set_xlate_row(R17_MAP, i_offset, io_xlate0) ); - - // There's nothing to do for the D-bit. We're either not the largest DIMM, in which case the largest DIMM - // will fix up our D-bit mapping, or we're the only DIMM in the port. If we're the only DIMM in the port, - // there is no D-bit mapping for a 1 slot 1R DIMM. - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 2H 3DS 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R2T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t S2_MAP(PORT_ADDRESS_29); - - // We're just like a 2R 4Gbx4 so lets start there and modify for the slave ranks. - FAPI_TRY( xlate_dimm_2R2T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - FAPI_TRY( clear_xlate_mrank(i_offset, io_xlate0) ); - FAPI_TRY( set_xlate_srank(S2_MAP, i_offset, io_xlate0, io_xlate1) ); - -fapi_try_exit: - return fapi2::current_err; -} - - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 2H 3DS 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R2T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R16_MAP(PORT_ADDRESS_5); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_4); - - // We're just like a 1R 2H 4Gbx4 so lets start there - FAPI_TRY( xlate_dimm_1R2T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // We're a 17 row DIMM, so ROW16 is valid. - FAPI_TRY( set_xlate_row(R16_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 2H 3DS 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R2T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R17_MAP(PORT_ADDRESS_4); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_3); - - // We're just like a 1R 2H 8Gbx4 so lets start there - FAPI_TRY( xlate_dimm_1R2T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // We're a 18 row DIMM, so ROW17 is valid. - FAPI_TRY( set_xlate_row(R17_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 4H 3DS 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R4T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t S1_MAP(PORT_ADDRESS_6); - constexpr uint64_t R15_MAP(PORT_ADDRESS_5); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_4); - - // We're just like a 1R 2H 4Gbx4 so lets start there and modify for the slave ranks. - FAPI_TRY( xlate_dimm_1R2T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // What was row 15 is now a slave rank, and we have to add in row 15 and the d-bit - FAPI_TRY( set_xlate_srank(S1_MAP, i_offset, io_xlate0, io_xlate1) ); - - // We're a 16 row DIMM, so ROW15 is valid. - FAPI_TRY( set_xlate_row(R15_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 4H 3DS 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R4T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R16_MAP(PORT_ADDRESS_4); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_3); - - // We're just like a 1R 4H 4Gbx4 so lets start there and modify - FAPI_TRY( xlate_dimm_1R4T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // We're a 17 row DIMM, so ROW16 is valid. - FAPI_TRY( set_xlate_row(R16_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 4H 3DS 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R4T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R17_MAP(PORT_ADDRESS_3); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_2); - - // We're just like a 1R 4H 8Gbx4 so lets start there and modify - FAPI_TRY( xlate_dimm_1R4T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // We're a 18 row DIMM, so ROW17 is valid. - FAPI_TRY( set_xlate_row(R17_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 8H 3DS 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R8T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t S0_MAP(PORT_ADDRESS_5); - constexpr uint64_t R15_MAP(PORT_ADDRESS_4); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_3); - - // We're just like a 1R 4H 4Gbx4 so lets start there and modify for the slave ranks. - FAPI_TRY( xlate_dimm_1R4T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - FAPI_TRY( set_xlate_srank(S0_MAP, i_offset, io_xlate0, io_xlate1) ); - - // We're a 16 row DIMM, so ROW15 is valid. - FAPI_TRY( set_xlate_row(R15_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 8H 3DS 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R8T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R16_MAP(PORT_ADDRESS_3); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_2); - - // We're just like a 1R 8H 4Gbx4 so lets start there and modify for the slave ranks. - FAPI_TRY( xlate_dimm_1R8T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // We're a 17 row DIMM, so ROW16 is valid. - FAPI_TRY( set_xlate_row(R16_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 8H 3DS 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R8T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R17_MAP(PORT_ADDRESS_2); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_1); - - // We're just like a 1R 8H 8Gbx4 so lets start there and modify for the slave ranks. - FAPI_TRY( xlate_dimm_1R8T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // We're a 18 row DIMM, so ROW17 is valid. - FAPI_TRY( set_xlate_row(R17_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 4R 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_4R4T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R15_MAP(PORT_ADDRESS_5); - constexpr uint64_t M0_MAP(PORT_ADDRESS_6); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_4); - - // We're just like a 2R 4Gbx4 except we have a valid M0 and a different DIMM bit. - FAPI_TRY( xlate_dimm_2R2T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // Our R15 is still valid, but slide it over to make room for the M0 bit - FAPI_TRY( set_xlate_row(R15_MAP, i_offset, io_xlate0) ); - FAPI_TRY( set_xlate_mrank(M0_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 4R 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_4R4T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R16_MAP(PORT_ADDRESS_4); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_3); - - // We're just like a 4R 4Gbx4 except we have an extra row - FAPI_TRY( xlate_dimm_4R4T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // We're a 17 row DIMM, so ROW16 is valid. - FAPI_TRY( set_xlate_row(R16_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 4R 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_4R4T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - constexpr uint64_t R17_MAP(PORT_ADDRESS_3); - constexpr uint64_t DBIT_MAP(PORT_ADDRESS_2); - - // We're just like a 4R 8Gbx4 except we have an extra row - FAPI_TRY( xlate_dimm_4R4T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - - // We're a 18 row DIMM, so ROW17 is valid. - FAPI_TRY( set_xlate_row(R17_MAP, i_offset, io_xlate0) ); - - FAPI_TRY( d_bit_helper(i_kind.iv_target, i_largest, i_offset, DBIT_MAP, io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Helper to setup the translation map - useful for testing -/// @param[in,out] io_dimm_kinds std::vector of DIMM kind's representing the DIMM (Not const as we sort the vector) -/// @param[out] fapi2::buffer io_xlate00 - xlt register 0's value -/// @param[out] fapi2::buffer io_xlate1 - xlt register 1's value -/// @param[out] fapi2::buffer io_xlate2 - xlt register 2's value -/// @return FAPI2_RC_SUCCESS iff ok -/// -fapi2::ReturnCode setup_xlate_map_helper( std::vector& io_dimm_kinds, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - if (io_dimm_kinds.size() < 1) - { - FAPI_ERR("seeing an empty vector in the setup_xlate_map_helper"); - fapi2::Assert(false); - } - - // Considering the DIMM, record who gets the D bit. We make sure the *smallest* DIMM has the highest address - // range by setting it's D bit to 1. This eliminates, or reduces, holes in the memory map. - // However, we need to set that DIMM's D bit in the location of the largest DIMM's D-bit map (I know that's - // hard to grok - set the D bit in the smallest DIMM but in the location mapped for the largest.) So we - // keep track of the largest DIMM so when we set it up, we make sure to set the D-bit in the other. - std::sort(io_dimm_kinds.begin(), io_dimm_kinds.end(), [](const dimm::kind & a, const dimm::kind & b) -> bool - { - return a.iv_size > b.iv_size; - }); - - FAPI_INF("DIMM with the largest size on this port is %s %dMR (%d total ranks) %dGbx%d (%dGB)", - mss::c_str(io_dimm_kinds[0].iv_target), - io_dimm_kinds[0].iv_master_ranks, - io_dimm_kinds[0].iv_total_ranks, - io_dimm_kinds[0].iv_dram_density, - io_dimm_kinds[0].iv_dram_width, - io_dimm_kinds[0].iv_size); - - const auto l_d_bit_target = io_dimm_kinds[0].iv_target; - - // Get the functional DIMM on this port. - for (const auto& k : io_dimm_kinds) - { - // Our slot (0, 1) is the same as our general index. - const uint64_t l_slot = mss::index(k.iv_target); - - // Our slot offset tells us which 16 bit section in the xlt register to use for this DIMM - // We'll either use the left most bits (slot 0) or move 16 bits to the right for slot 1. - const uint64_t l_slot_offset = l_slot * 16; - - FAPI_INF("address translation for DIMM %s %dMR (%d total ranks) %dGbx%d (%dGB) in slot %d", - mss::c_str(k.iv_target), - k.iv_master_ranks, - k.iv_total_ranks, - k.iv_dram_density, - k.iv_dram_width, - k.iv_size, - l_slot); - - // Set the proper bit if there is a DIMM in this slot. If there wasn't, we wouldn't see - // this DIMM in the vector, so this is always safe. - FAPI_TRY(set_xlate_dimm_slot(l_slot_offset, io_xlate0) ); - - // Find the proper set function based on this DIMM kind. - const auto l_setup = std::find_if( xlate_map.begin(), xlate_map.end(), [k](const xlate_setup & x) -> bool - { - return x.iv_kind == k; - } ); - - // If we didn't find it, raise a stink. - FAPI_ASSERT( l_setup != xlate_map.end(), - fapi2::MSS_NO_XLATE_FOR_DIMM(). - set_DIMM_IN_ERROR(k.iv_target). - set_MASTER_RANKS(k.iv_master_ranks). - set_TOTAL_RANKS(k.iv_total_ranks). - set_DRAM_DENSITY(k.iv_dram_density). - set_DRAM_WIDTH(k.iv_dram_width). - set_DRAM_GENERATION(k.iv_dram_generation). - set_DIMM_TYPE(k.iv_dimm_type). - set_ROWS(k.iv_rows). - set_SIZE(k.iv_size), - "no address translation funtion for DIMM %s %dMR (%d total ranks) %dGbx%d (%dGB) %d rows in slot %d", - mss::c_str(k.iv_target), - k.iv_master_ranks, - k.iv_total_ranks, - k.iv_dram_density, - k.iv_dram_width, - k.iv_size, - k.iv_rows, - l_slot ); - - // If we did find it ... - // If we're the smallest DIMM in the port and we have more than one DIMM, we set our D-bit. - if( (l_d_bit_target != k.iv_target) && (io_dimm_kinds.size() > 1) ) - { - FAPI_INF("noting d-bit of 1 for %s", mss::c_str(k.iv_target)); - FAPI_TRY( io_xlate0.setBit(MCS_PORT13_MCP0XLT0_SLOT0_D_VALUE + l_slot_offset) ); - - FAPI_DBG("Set d-bit. MCP0XLT0: 0x%016lx, MCP0XLT1: 0x%016lx, MCP0XLT2: 0x%016lx", - uint64_t(io_xlate0), uint64_t(io_xlate1), uint64_t(io_xlate2) ); - } - - // Call the translation function to fill in the blanks. - // The conditional argument tells the setup function whether this setup should set the D bit, as we're - // the largest DIMM on the port. - FAPI_TRY( l_setup->iv_func(k, l_slot_offset, (k.iv_target == l_d_bit_target), io_xlate0, io_xlate1, io_xlate2) ); - } - - FAPI_INF("cramming 0x%016lx in for MCP0XLT0", io_xlate0); - FAPI_INF("cramming 0x%016lx in for MCP0XLT1", io_xlate1); - FAPI_INF("cramming 0x%016lx in for MCP0XLT2", io_xlate2); - -fapi_try_exit: - return fapi2::current_err; -} - - -/// -/// @brief Perform initializations of the MC translation - MCA specialization -/// @param[in] i_target, the target which has the MCA to map -/// @return FAPI2_RC_SUCCESS iff ok -/// -template<> -fapi2::ReturnCode setup_xlate_map(const fapi2::Target& i_target) -{ - fapi2::buffer l_xlate0; - fapi2::buffer l_xlate1; - fapi2::buffer l_xlate2; - - const auto l_dimms = mss::find_targets(i_target); - - // We need to keep around specifications of both DIMM as we set the D bit based on the sizes of the DIMM - std::vector l_dimm_kinds = dimm::kind::vector(l_dimms); - - FAPI_INF("Setting up xlate registers for MCA%d (%d)", mss::pos(i_target), mss::index(i_target)); - - FAPI_TRY( setup_xlate_map_helper(l_dimm_kinds, l_xlate0, l_xlate1, l_xlate2) ); - - FAPI_TRY( mss::putScom(i_target, MCA_MBA_MCP0XLT0, l_xlate0) ); - FAPI_TRY( mss::putScom(i_target, MCA_MBA_MCP0XLT1, l_xlate1) ); - FAPI_TRY( mss::putScom(i_target, MCA_MBA_MCP0XLT2, l_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R1T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 1R 4Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_1R1T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R1T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 1R 8Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_1R1T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 2H 3DS 8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R2T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 1R 2H 3DS 4Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_1R2T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 2H 3DS 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R2T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 1R 2H 3DS 8Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_1R2T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 4H 3DS 8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R4T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 1R 4H 3DS 4Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_1R4T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 4H 3DS 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R4T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 1R 4H 3DS 8Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_1R4T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 8H 3DS 8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R8T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 1R 8H 3DS 4Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_1R8T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 8H 3DS 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R8T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 1R 8H 3DS 8Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_1R8T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R2T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 2R 4Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_2R2T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R2T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 2R 8Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_2R2T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 2H 8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R4T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 2R 2H 4Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_2R4T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 2H 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R4T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 2R 2H 8Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_2R4T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 4H 8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R8T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 2R 4H 4Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_2R8T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 4H 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R8T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 2R 4H 8Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_2R8T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 8H 8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R16T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 2R 8H 4Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_2R16T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 8H 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R16T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 2R 8H 8Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_2R16T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 4R 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_4R4T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 4R 4Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_4R4T4Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 4R 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_4R4T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ) -{ - // We're just like a 4R 8Gbx4 according to port address translation tables - FAPI_TRY( xlate_dimm_4R4T8Gbx4(i_kind, i_offset, i_largest, io_xlate0, io_xlate1, io_xlate2) ); - -fapi_try_exit: - return fapi2::current_err; -} - -} // namespace mc -} // namespace mss diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.H b/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.H deleted file mode 100644 index b1011d5c8..000000000 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.H +++ /dev/null @@ -1,1340 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.H $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -/// -/// @file xmalte.H -/// @brief Definitions for translation registers -/// -// *HWP HWP Owner: Brian Silver -// *HWP HWP Backup: Andre Marin -// *HWP Team: Memory -// *HWP Level: 2 -// *HWP Consumed by: HB:FSP - -#ifndef _MSS_XLT_H_ -#define _MSS_XLT_H_ - -#include - -#include -#include - -#include -#include -#include -#include - -namespace mss -{ - -namespace mc -{ - -enum xlate_bit_maps -{ - PORT_ADDRESS_0 = 0b00000, ///< bitmap for PORT ADDRESS 0 - PORT_ADDRESS_1 = 0b00001, ///< bitmap for PORT ADDRESS 1 - PORT_ADDRESS_2 = 0b00010, ///< bitmap for PORT ADDRESS 2 - PORT_ADDRESS_3 = 0b00011, ///< bitmap for PORT ADDRESS 3 - PORT_ADDRESS_4 = 0b00100, ///< bitmap for PORT ADDRESS 4 - PORT_ADDRESS_5 = 0b00101, ///< bitmap for PORT ADDRESS 5 - PORT_ADDRESS_6 = 0b00110, ///< bitmap for PORT ADDRESS 6 - PORT_ADDRESS_7 = 0b00111, ///< bitmap for PORT ADDRESS 7 - - PORT_ADDRESS_22 = 0b01000, ///< bitmap for PORT ADDRESS 22 - PORT_ADDRESS_23 = 0b01001, ///< bitmap for PORT ADDRESS 23 - PORT_ADDRESS_24 = 0b01010, ///< bitmap for PORT ADDRESS 24 - PORT_ADDRESS_25 = 0b01011, ///< bitmap for PORT ADDRESS 25 - PORT_ADDRESS_26 = 0b01100, ///< bitmap for PORT ADDRESS 26 - PORT_ADDRESS_27 = 0b01101, ///< bitmap for PORT ADDRESS 27 - PORT_ADDRESS_28 = 0b01110, ///< bitmap for PORT ADDRESS 28 - PORT_ADDRESS_29 = 0b01111, ///< bitmap for PORT ADDRESS 29 - PORT_ADDRESS_30 = 0b10000, ///< bitmap for PORT ADDRESS 30 - PORT_ADDRESS_31 = 0b10001, ///< bitmap for PORT ADDRESS 31 - PORT_ADDRESS_32 = 0b10010, ///< bitmap for PORT ADDRESS 32 -}; - -enum rows -{ - ROW15, ///< represents xlate R15 - ROW16, ///< represents xlate R16 - ROW17, ///< represents xlate R17 -}; - -enum xlate_ranks -{ - // Master ranks - M0, ///< xlate Master rank 0 - M1, ///< xlate Master rank 1 - - // Slave ranks - S0, ///< xlate Slave rank 0 - S1, ///< xlate Slave rank 1 - S2, ///< xlate Slave rank 2 -}; - -/// -/// @class rowTraits -/// @brief a collection of traits associated with the row xlate registers -/// @tparam T rows enumeration to represent xlate row bits -/// -template< rows T > -class rowTraits; - -/// -/// @class rowTraits -/// @brief a collection of traits associated with the row xlate registers -/// -template< > -class rowTraits -{ - public: - static constexpr uint64_t ROW = 15; - static constexpr uint64_t MAX_MAP_VALUE = PORT_ADDRESS_7; - - enum - { - SLOT0_ROW_VALID = MCS_PORT02_MCP0XLT0_SLOT0_ROW15_VALID, - ROW_BIT_MAP = MCS_PORT02_MCP0XLT0_R15_BIT_MAP, - ROW_BIT_MAP_LEN = MCS_PORT02_MCP0XLT0_R15_BIT_MAP_LEN, - }; -}; - -/// -/// @class rowTraits -/// @brief a collection of traits associated with the row xlate registers -/// -template< > -class rowTraits -{ - public: - static constexpr uint64_t ROW = 16; - static constexpr uint64_t MAX_MAP_VALUE = PORT_ADDRESS_7; - - enum - { - SLOT0_ROW_VALID = MCS_PORT02_MCP0XLT0_SLOT0_ROW16_VALID, - ROW_BIT_MAP = MCS_PORT02_MCP0XLT0_R16_BIT_MAP, - ROW_BIT_MAP_LEN = MCS_PORT02_MCP0XLT0_R16_BIT_MAP_LEN, - }; -}; - -/// -/// @class rowTraits -/// @brief a collection of traits associated with the row xlate registers -/// -template< > -class rowTraits -{ - public: - static constexpr uint64_t ROW = 17; - static constexpr uint64_t MAX_MAP_VALUE = PORT_ADDRESS_7; - - enum - { - SLOT0_ROW_VALID = MCS_PORT02_MCP0XLT0_SLOT0_ROW17_VALID, - ROW_BIT_MAP = MCS_PORT02_MCP0XLT0_R17_BIT_MAP, - ROW_BIT_MAP_LEN = MCS_PORT02_MCP0XLT0_R17_BIT_MAP_LEN, - }; -}; - -/// -/// @brief Sets row bits on the xlate register -/// @tparam T row enumerations to represent xlate master row bits -/// @tparam TT traits type defaults to rowTraits -/// @param[in] i_map value to set master rank bit map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @return FAPI2_RC_SUCCESS iff okay -/// -template< rows T, typename TT = rowTraits > -inline fapi2::ReturnCode set_xlate_row(const uint64_t i_map, - const uint64_t i_offset, - fapi2::buffer& io_xlate0) -{ - if( i_map > TT::MAX_MAP_VALUE) - { - FAPI_ERR("Received a map value (%d) greater than the max value allowed by MCP0XLT0_R%d_BIT_MAP (%d)", - i_map, TT::ROW, TT::MAX_MAP_VALUE); - - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - FAPI_TRY( io_xlate0.setBit( TT::SLOT0_ROW_VALID + i_offset ) ); - io_xlate0.insertFromRight(i_map); - - FAPI_DBG( "Set MCP0XLT0_SLOT%d_ROW%d_VALID at bit %d. " - "Set bits for MCP0XLT0_R%d_BIT_MAP with 0x%lx (start: %d, len: %d). " - "MCP0XLT0: 0x%016lx.", - (i_offset == 0 ? 0 : 1), TT::ROW, TT::SLOT0_ROW_VALID + i_offset, TT::ROW, - i_map, TT::ROW_BIT_MAP, TT::ROW_BIT_MAP_LEN, - uint64_t(io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @class mrankTraits -/// @brief a collection of traits associated with the master rank xlate registers -/// @tparam T rank enumerations to represent xlate master rank bits -/// -template < xlate_ranks T > -class mrankTraits; - -/// -/// @class mrankTraits -/// @brief a collection of traits associated with the master rank xlate registers -/// -template< > -class mrankTraits -{ - public: - static constexpr uint64_t RANK = 0; - static constexpr uint64_t CLEAR_MAP = PORT_ADDRESS_0; - static constexpr uint64_t MAX_MAP_VALUE = PORT_ADDRESS_7; - enum - { - SLOT0_VALID = MCS_PORT13_MCP0XLT0_SLOT0_M0_VALID, - BIT_MAP = MCS_PORT02_MCP0XLT0_M0_BIT_MAP, - BIT_MAP_LEN = MCS_PORT02_MCP0XLT0_M0_BIT_MAP_LEN, - }; -}; - -/// -/// @class mrankTraits -/// @brief a collection of traits associated with the master rank xlate registers -/// -template< > -class mrankTraits -{ - public: - static constexpr uint64_t RANK = 1; - static constexpr uint64_t CLEAR_MAP = PORT_ADDRESS_0; - static constexpr uint64_t MAX_MAP_VALUE = PORT_ADDRESS_32; - - enum - { - SLOT0_VALID = MCS_PORT13_MCP0XLT0_SLOT0_M1_VALID, - BIT_MAP = MCS_PORT02_MCP0XLT0_M1_BIT_MAP, - BIT_MAP_LEN = MCS_PORT02_MCP0XLT0_M1_BIT_MAP_LEN, - }; -}; - -/// -/// @brief Sets master rank bits on the xlate register -/// @tparam T rank enumerations to represent xlate master rank bits -/// @tparam TT traits type defaults to mrankTraits -/// @param[in] i_map value to set master rank bit map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @return FAPI2_RC_SUCCESS iff okay -/// -template< xlate_ranks T, typename TT = mrankTraits > -inline fapi2::ReturnCode set_xlate_mrank(const uint64_t i_map, - const uint64_t i_offset, - fapi2::buffer& io_xlate0) -{ - if( i_map > TT::MAX_MAP_VALUE) - { - FAPI_ERR("Received a map value (%d) greater than the max value allowed by MCP0XLT0_M%d_BIT_MAP (%d)", - i_map, TT::RANK, TT::MAX_MAP_VALUE); - - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - FAPI_TRY( io_xlate0.setBit(TT::SLOT0_VALID + i_offset) ); - io_xlate0.insertFromRight(i_map); - - FAPI_DBG("Set MCP0XLT0_SLOT%d_M%d_VALID at bit %d. Set MCP0XLT0_M%d_BIT_MAP with 0x%lx (start: %d, len: %d). " - "MCP0XLT0: 0x%016lx.", - (i_offset == 0 ? 0 : 1), TT::RANK, TT::SLOT0_VALID + i_offset, - TT::RANK, uint64_t(i_map), TT::BIT_MAP, TT::BIT_MAP_LEN, - uint64_t(io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Clears master rank bits on the xlate register -/// @tparam T rank enumerations to represent xlate master rank bits -/// @tparam TT traits type defaults to mrankTraits -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @return FAPI2_RC_SUCCESS iff okay -/// -template< xlate_ranks T, typename TT = mrankTraits > -inline fapi2::ReturnCode clear_xlate_mrank(const uint64_t i_offset, - fapi2::buffer& io_xlate0) -{ - FAPI_TRY( io_xlate0.clearBit(TT::SLOT0_VALID + i_offset) ); - io_xlate0.insertFromRight(TT::CLEAR_MAP); - - FAPI_DBG("Set MCP0XLT0_SLOT%d_M%d_VALID at bit %d. Set MCP0XLT0_M%d_BIT_MAP with 0x%lx (start: %d, len: %d). " - "MCP0XLT0: 0x%016lx.", - (i_offset == 0 ? 0 : 1), TT::RANK, TT::SLOT0_VALID + i_offset, - TT::RANK, TT::CLEAR_MAP, TT::BIT_MAP, TT::BIT_MAP_LEN, - uint64_t(io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @class srankTraits -/// @brief a collection of traits associated with the slave rank xlate registers -/// @tparam T rank enumerations to represent xlate slave rank bits -/// -template < xlate_ranks T > -class srankTraits; - -/// -/// @class srankTraits -/// @brief a collection of traits associated with the slave rank xlate registers -/// for slave rank 0 -/// -template< > -class srankTraits -{ - public: - static constexpr uint64_t RANK = 0; - static constexpr uint64_t CLEAR_MAP = PORT_ADDRESS_0; - static constexpr uint64_t MAX_MAP_VALUE = PORT_ADDRESS_32; - - enum - { - SLOT0_VALID = MCS_PORT13_MCP0XLT0_SLOT0_S0_VALID, - BIT_MAP = MCS_PORT02_MCP0XLT1_S0_BIT_MAP, - BIT_MAP_LEN = MCS_PORT02_MCP0XLT1_S0_BIT_MAP_LEN, - }; -}; - -/// -/// @class srankTraits -/// @brief a collection of traits associated with the slave rank xlate registers -/// for slave rank 1 -/// -template< > -class srankTraits -{ - public: - static constexpr uint64_t RANK = 1; - static constexpr uint64_t CLEAR_MAP = PORT_ADDRESS_0; - static constexpr uint64_t MAX_MAP_VALUE = PORT_ADDRESS_32; - - enum - { - SLOT0_VALID = MCS_PORT13_MCP0XLT0_SLOT0_S1_VALID, - BIT_MAP = MCS_PORT02_MCP0XLT1_S1_BIT_MAP, - BIT_MAP_LEN = MCS_PORT02_MCP0XLT1_S1_BIT_MAP_LEN, - }; -}; - -/// -/// @class srankTraits -/// @brief a collection of traits associated with the slave rank xlate registers -/// for slave rank 2 -/// -template< > -class srankTraits -{ - public: - static constexpr uint64_t RANK = 2; - static constexpr uint64_t CLEAR_MAP = PORT_ADDRESS_0; - static constexpr uint64_t MAX_MAP_VALUE = PORT_ADDRESS_32; - - enum - { - SLOT0_VALID = MCS_PORT13_MCP0XLT0_SLOT0_S2_VALID, - BIT_MAP = MCS_PORT02_MCP0XLT1_S2_BIT_MAP, - BIT_MAP_LEN = MCS_PORT02_MCP0XLT1_S2_BIT_MAP_LEN, - }; -}; - -/// -/// @brief Sets slave rank bits on the xlate register -/// @tparam T rank enumerations to represent xlate slave rank bits -/// @tparam TT traits type defaults to srankTraits -/// @param[in] i_map value to set slave rank bit map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @return FAPI2_RC_SUCCESS iff okay -/// -template< xlate_ranks T, typename TT = srankTraits > -inline fapi2::ReturnCode set_xlate_srank(const uint64_t i_map, - const uint64_t i_offset, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1) -{ - if( i_map > TT::MAX_MAP_VALUE) - { - FAPI_ERR("Received a map value (%d) greater than the max value allowed by MCP0XLT0_S%d_BIT_MAP (%d)", - i_map, TT::RANK, TT::MAX_MAP_VALUE); - - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - FAPI_TRY( io_xlate0.setBit(TT::SLOT0_VALID + i_offset) ); - io_xlate1.insertFromRight(i_map); - - FAPI_DBG("Set MCP0XLT0_SLOT%d_S%d_VALID at bit %d. Set MCP0XLT0_S%d_BIT_MAP with 0x%lx (start: %d, len: %d). " - "MCP0XLT0: 0x%016lx, MCP0XLT1: 0x%016lx.", - (i_offset == 0 ? 0 : 1), TT::RANK, TT::SLOT0_VALID + i_offset, - TT::RANK, uint64_t(i_map), TT::BIT_MAP, TT::BIT_MAP_LEN, - uint64_t(io_xlate0), uint64_t(io_xlate1) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Clears slave rank bits on the xlate register -/// @tparam T rank enumerations to represent xlate slave rank bits -/// @tparam TT traits type defaults to srankTraits -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @return FAPI2_RC_SUCCESS iff okay -/// -template< xlate_ranks T, typename TT = srankTraits > -inline fapi2::ReturnCode clear_xlate_srank(const uint64_t i_offset, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1) -{ - FAPI_TRY( io_xlate0.clearBit(TT::SLOT0_VALID + i_offset) ); - io_xlate1.insertFromRight(TT::CLEAR_MAP); - - FAPI_DBG("Set MCP0XLT0_SLOT%d_S%d_VALID at bit %d. Set MCP0XLT0_S%d_BIT_MAP with 0x%lx (start: %d, len: %d). " - "MCP0XLT0: 0x%016lx, MCP0XLT1: 0x%016lx.", - (i_offset == 0 ? 0 : 1), TT::RANK, TT::SLOT0_VALID + i_offset, - TT::RANK, TT::CLEAR_MAP, TT::BIT_MAP, TT::BIT_MAP_LEN, - uint64_t(io_xlate0), uint64_t(io_xlate1) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Set DIMM slot bits -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @return FAPI2_RC_SUCCESS iff okay -/// -inline fapi2::ReturnCode set_xlate_dimm_slot(const uint64_t i_offset, - fapi2::buffer& io_xlate0) -{ - FAPI_TRY( io_xlate0.setBit(MCS_PORT02_MCP0XLT0_SLOT0_VALID + i_offset) ); - - FAPI_DBG("Set MCP0XLT0_SLOT%d_VALID at bit %d. MCP0XLT0: 0x%016lx.", - (i_offset == 0 ? 0 : 1), MCS_PORT02_MCP0XLT0_SLOT0_VALID + i_offset, uint64_t(io_xlate0) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief A small class to represent the setup of a translation register based on DIMM characteristics -/// -struct xlate_setup -{ - /// - /// @brief Constructor to make a translation register setup structure. - /// @param[in] i_kind a DIMM kind structure representing the ... err... kind of DIMM - /// @param[in] i_func a function pointer to a function which does the configuring - /// - xlate_setup( const dimm::kind i_kind, - fapi2::ReturnCode (*i_func)( const dimm::kind&, const uint64_t, const bool, - fapi2::buffer&, fapi2::buffer&, fapi2::buffer& ) ): - iv_kind(i_kind), - iv_func(i_func) - { - } - - // Keep around the kind of DIMM this nugget represents - dimm::kind iv_kind; - - // The function to call to setup the translation registers to setup for our DIMM kind. - fapi2::ReturnCode (*iv_func)( const dimm::kind&, const uint64_t, const bool, - fapi2::buffer&, fapi2::buffer&, fapi2::buffer& ); -}; - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R2T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R2T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R2T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 2H 3DS 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R4T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 2H 3DS 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R4T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 2H 3DS 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R4T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 4H 3DS 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R8T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 4H 3DS 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R8T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 4H 3DS 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R8T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 8H 3DS 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R16T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 8H 3DS 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R16T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 8H 3DS 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R16T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R1T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R1T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R1T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 2H 3DS 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R2T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 2H 3DS 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R2T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 2H 3DS 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R2T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 4H 3DS 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R4T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 4H 3DS 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R4T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 4H 3DS 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R4T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 8H 3DS 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R8T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 8H 3DS 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R8T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 8H 3DS 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R8T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 4R 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_4R4T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 4R 8Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_4R4T8Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 4R 16Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_4R4T16Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Helper to setup the translation map - useful for testing -/// @param[in] i_dimm_kinds std::vector of DIMM kind's representing the DIMM (Not const as we sort the vector) -/// @param[out] fapi2::buffer o_xlate0 - xlt register 0's value -/// @param[out] fapi2::buffer o_xlate1 - xlt register 1's value -/// @param[out] fapi2::buffer o_xlate2 - xlt register 2's value -/// @return FAPI2_RC_SUCCESS iff ok -/// -fapi2::ReturnCode setup_xlate_map_helper( std::vector& i_dimm_kinds, - fapi2::buffer& o_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R1T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 2 total ranks 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R2T4Gbx4( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R1T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R1T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 2H 3DS 8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R2T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 2H 3DS 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R2T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 4H 3DS 8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R4T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 4H 3DS 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R4T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 8H 3DS 8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R8T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 1R 8H 3DS 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_1R8T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R2T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R2T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 2H 8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R4T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 2H 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R4T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 4H 8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R8T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 4H 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R8T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 8H 8Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R16T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 2R 8H 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_2R16T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 4R 4Gbx4 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_4R4T8Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); - -/// -/// @brief Perform initializations of the MC translation -/// @param[in] i_kind the DIMM to map -/// @param[in] i_offset the offset; whether the DIMM is in slot 0 or slot 1 -/// @param[in] i_largest whether or not we're the largest DIMM on the port. -/// @param[in,out] io_xlate0 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate1 a buffer representing the xlate register to modify -/// @param[in,out] io_xlate2 a buffer representing the xlate register to modify -/// @note Called for 4R 16Gbx8 DDR4 RDIMM -/// @return FAPI2_RC_SUCCESS iff okay -/// -fapi2::ReturnCode xlate_dimm_4R4T16Gbx8( const dimm::kind& i_kind, - const uint64_t i_offset, - const bool i_largest, - fapi2::buffer& io_xlate0, - fapi2::buffer& io_xlate1, - fapi2::buffer& io_xlate2 ); -} // ns mc -} // ns mss - -#endif diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C deleted file mode 100644 index 2437c4305..000000000 --- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C +++ /dev/null @@ -1,849 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ -/// -/// @file spd_factory.C -/// @brief SPD factory and functions -/// -// *HWP HWP Owner: Andre Marin -// *HWP HWP Backup: Brian Silver -// *HWP Team: Memory -// *HWP Level: 2 -// *HWP Consumed by: HB:FSP - -// std lib -#include -#include - -// fapi2 -#include -#include - -// mss lib -#include -#include -#include -#include -#include -#include -#include -#include -#include - -using fapi2::TARGET_TYPE_MCA; -using fapi2::TARGET_TYPE_MCS; -using fapi2::TARGET_TYPE_DIMM; -using fapi2::FAPI2_RC_SUCCESS; - -namespace mss -{ -namespace spd -{ - -/// -/// @brief Decodes SPD Revision encoding level -/// @param[in] i_target dimm target -/// @param[in] i_spd_data SPD data -/// @param[out] o_value encoding revision num -/// @return FAPI2_RC_SUCCESS if okay -/// @note Decodes SPD Byte 1 (3~0). -/// @note Item JC-45-2220.01x -/// @note Page 14-15 -/// @note DDR4 SPD Document Release 3 -/// -fapi2::ReturnCode rev_encoding_level(const fapi2::Target& i_target, - const std::vector& i_spd_data, - uint8_t& o_value) -{ - // Buffer used for bit manipulation - constexpr size_t BYTE_INDEX = 1; - uint8_t l_raw_byte = i_spd_data[BYTE_INDEX]; - - // Trace in the front assists w/ debug - FAPI_INF("%s. SPD data at Byte %d: 0x%llX.", - mss::c_str(i_target), - BYTE_INDEX, - l_raw_byte); - - // Extracting desired bits - uint8_t l_field_bits = 0; - fapi2::buffer l_buffer(l_raw_byte); - l_buffer.extractToRight(l_field_bits); - - FAPI_INF("%s. Field Bits value: %d", mss::c_str(i_target), l_field_bits); - - // Check that value is valid - constexpr size_t UNDEFINED = 0xF; // per JEDEC spec this value is undefined - FAPI_TRY( mss::check::spd::fail_for_invalid_value(i_target, - (l_field_bits != UNDEFINED), - BYTE_INDEX, - l_raw_byte, - "Failed check on SPD rev encoding level") ); - - // Update output only after check passes - o_value = l_field_bits; - - // Print decoded info - FAPI_INF("%s. Rev - Encoding Level : %d", - mss::c_str(i_target), - o_value); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Decodes SPD Revision additions level -/// @param[in] i_target dimm target -/// @param[in] i_spd_data SPD data -/// @param[out] o_value additions revision num -/// @return FAPI2_RC_SUCCESS if okay -/// @note Decodes SPD Byte 1 (bits 7~4). -/// @note Item JC-45-2220.01x -/// @note Page 14-15 -/// @note DDR4 SPD Document Release 3 -/// -fapi2::ReturnCode rev_additions_level(const fapi2::Target& i_target, - const std::vector& i_spd_data, - uint8_t& o_value) -{ - // Buffer used for bit manipulation - constexpr size_t BYTE_INDEX = 1; - uint8_t l_raw_byte = i_spd_data[BYTE_INDEX]; - - // Trace in the front assists w/ debug - FAPI_INF("%s. SPD data at Byte %d: 0x%llX.", - mss::c_str(i_target), - BYTE_INDEX, - l_raw_byte); - - // Extracting desired bits - fapi2::buffer l_buffer(l_raw_byte); - uint8_t l_field_bits = 0; - l_buffer.extractToRight(l_field_bits); - - FAPI_INF("%s. Field Bits value: %d", mss::c_str(i_target), l_field_bits); - - // Check that value is valid - constexpr size_t UNDEFINED = 0xF; // per JEDEC spec this value is undefined - - FAPI_TRY( mss::check::spd::fail_for_invalid_value(i_target, - (l_field_bits != UNDEFINED), - BYTE_INDEX, - l_raw_byte, - "Failed check on SPD rev encoding level") ); - - // Update output only after check passes - o_value = l_field_bits; - - // Print decoded info - FAPI_INF("%s. Rev - Additions Level : %d", - mss::c_str(i_target), - o_value); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Decodes base module type (DIMM type) from SPD -/// @param[in] i_target dimm target -/// @param[in] i_spd_data SPD data -/// @param[out] o_value base module type -/// @return FAPI2_RC_SUCCESS if okay -/// @note Decodes SPD Byte 3 (bits 3~0) -/// @note Item JC-45-2220.01x -/// @note Page 17 -/// @note DDR4 SPD Document Release 3 -/// -fapi2::ReturnCode base_module_type(const fapi2::Target& i_target, - const std::vector& i_spd_data, - uint8_t& o_value) -{ - // ========================================================= - // Byte 3 maps - // Item JC-45-2220.01x - // Page 17 - // DDR4 SPD Document Release 3 - // Byte 3 (0x003): Key Byte / Module Type - // ========================================================= - static const std::vector > BASE_MODULE_TYPE_MAP = - { - //{key byte, dimm type} - {1, fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM}, - {2, fapi2::ENUM_ATTR_EFF_DIMM_TYPE_UDIMM}, - {4, fapi2::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM} - // All others reserved or not supported - }; - - // Buffer used for bit manipulation - constexpr size_t BYTE_INDEX = 3; - uint8_t l_raw_byte = i_spd_data[BYTE_INDEX]; - - // Trace in the front assists w/ debug - FAPI_INF("%s SPD data at Byte %d: 0x%llX", - c_str(i_target), - BYTE_INDEX, - l_raw_byte); - - // Extracting desired bits - fapi2::buffer l_spd_buffer(l_raw_byte); - uint8_t l_field_bits = 0; - l_spd_buffer.extractToRight(l_field_bits); - - FAPI_INF("%s. Field Bits value: %d", mss::c_str(i_target), l_field_bits); - - // Check that value is valid - bool l_is_val_found = find_value_from_key(BASE_MODULE_TYPE_MAP, l_field_bits, o_value); - - FAPI_TRY( mss::check::spd::fail_for_invalid_value(i_target, - l_is_val_found, - BYTE_INDEX, - l_field_bits, - "Failed check on Base Module Type") ); - - FAPI_INF("%s. Base Module Type: %d", - mss::c_str(i_target), - o_value); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Decodes DRAM Device Type -/// @param[in] i_target dimm target -/// @param[in] i_spd_data SPD data -/// @param[out] o_value dram device type enumeration -/// @return FAPI2_RC_SUCCESS if okay -/// @note Decodes SPD Byte 2 -/// @note Item JC-45-2220.01x -/// @note Page 16 -/// @note DDR4 SPD Document Release 3 -/// -fapi2::ReturnCode dram_device_type(const fapi2::Target& i_target, - const std::vector& i_spd_data, - uint8_t& o_value) -{ - // ========================================================= - // Byte 2 maps - // Item JC-45-2220.01x - // Page 16 - // DDR4 SPD Document Release 3 - // Byte 2 (0x002): Key Byte / DRAM Device Type - // ========================================================= - static const std::vector > DRAM_GEN_MAP = - { - //{key value, dram gen} - {0x0B, fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR3}, - {0x0C, fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4} - // Other key bytes reserved or not supported - }; - - constexpr size_t BYTE_INDEX = 2; - uint8_t l_raw_byte = i_spd_data[BYTE_INDEX]; - - // Trace in the front assists w/ debug - FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(i_target), - BYTE_INDEX, - l_raw_byte); - - // Find map value - bool l_is_val_found = mss::find_value_from_key(DRAM_GEN_MAP, l_raw_byte, o_value); - - FAPI_TRY( mss::check::spd:: fail_for_invalid_value(i_target, - l_is_val_found, - BYTE_INDEX, - l_raw_byte, - "Failed check on SPD dram device type") ); - - // Print decoded info - FAPI_INF("%s Device type : %d", - mss::c_str(i_target), - o_value); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Decodes reference raw card -/// @param[in] i_target dimm target -/// @param[in] i_spd_data SPD data -/// @param[out] o_output encoding from SPD -/// @return FAPI2_RC_SUCCESS if okay -/// @note SPD Byte 130 (Bits 7~0) -/// @note Item JEDEC Standard No. 21-C -/// @note DDR4 SPD Document Release 2 -/// @Note Page 4.1.2.12 - 49 -/// -fapi2::ReturnCode reference_raw_card(const fapi2::Target& i_target, - const std::vector& i_spd_data, - uint8_t& o_output) -{ - // Extracting desired bits - constexpr size_t BYTE_INDEX = 130; - - // Trace in the front assists w/ debug - FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(i_target), - BYTE_INDEX, - i_spd_data[BYTE_INDEX]); - - // Byte taken directly, all bits are an encoding value so no fail check - o_output = i_spd_data[BYTE_INDEX]; - - FAPI_INF("%s. Reference raw card: %d", - mss::c_str(i_target), - o_output); - - return fapi2::FAPI2_RC_SUCCESS; -} - -/// -/// @brief Helper function to set dimm type attribute -/// @param[in] i_target dimm target -/// @param[in] i_spd_data SPD data -/// @param[out] o_dimm_type dimm type encoding needed by factory -/// @return FAPI2_RC_SUCCESS if okay -/// -static fapi2::ReturnCode dimm_type_setter(const fapi2::Target& i_target, - const std::vector& i_spd_data, - uint8_t& o_dimm_type) -{ - const auto l_port_num = index( find_target(i_target) ); - const auto l_dimm_num = index(i_target); - const auto l_mcs = mss::find_target(i_target); - - // Get dimm type & set attribute (needed by c_str) - uint8_t l_dimm_types_mcs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - - FAPI_TRY( base_module_type(i_target, i_spd_data, o_dimm_type), - "%s. Failed to find base module type", mss::c_str(i_target) ); - FAPI_TRY( eff_dimm_type(l_mcs, &l_dimm_types_mcs[0][0]), - "%s. Failed to invoke DIMM type accessor", mss::c_str(i_target)); - - l_dimm_types_mcs[l_port_num][l_dimm_num] = o_dimm_type; - FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_TYPE, l_mcs, l_dimm_types_mcs), - "%s. Failed to set ATTR_EFF_DIMM_TYPE", mss::c_str(i_target)); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Helper function to set dram gen attribute -/// @param[in] i_target dimm target -/// @param[in] i_spd_data SPD data -/// @return FAPI2_RC_SUCCESS if okay -/// -static fapi2::ReturnCode dram_gen_setter(const fapi2::Target& i_target, - const std::vector& i_spd_data) -{ - const auto l_port_num = index( find_target(i_target) ); - const auto l_dimm_num = index(i_target); - const auto l_mcs = mss::find_target(i_target); - - // Get dram generation & set attribute (needed by c_str) - uint8_t l_dram_gen = 0; - uint8_t l_dram_gen_mcs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - - FAPI_TRY( eff_dram_gen(l_mcs, &l_dram_gen_mcs[0][0]), - "%s. Failed to inboke DRAM gen accesssor", mss::c_str(i_target) ); - FAPI_TRY( dram_device_type(i_target, i_spd_data, l_dram_gen), - "%s. Failed to find base module type", mss::c_str(i_target) ); - - l_dram_gen_mcs[l_port_num][l_dimm_num] = l_dram_gen; - - FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_GEN, l_mcs, l_dram_gen_mcs), - "%s. Failed to set ATTR_EFF_DRAM_GEN", mss::c_str(i_target) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Determines & sets effective config for number of master ranks per dimm -/// @param[in] i_target FAPI2 target -/// @param[in] the SPD cache -/// @return fapi2::FAPI2_RC_SUCCESS if okay -/// @note This is done after the SPD cache is configured so that it can reflect the results of the -/// factory and we don't need to worry about SPD versions. This is expressly different than the dram and dimm setters -/// -static fapi2::ReturnCode master_ranks_per_dimm_setter(const fapi2::Target& i_target, - const std::shared_ptr& i_pDecoder) -{ - const auto l_mcs = find_target(i_target); - const auto l_mca = find_target(i_target); - - uint8_t l_decoder_val = 0; - fapi2::buffer l_ranks_configed; - uint8_t l_attrs_master_ranks_per_dimm[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - uint8_t l_attrs_dimm_ranks_configed[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - - // Get & update MCS attribute - FAPI_TRY( i_pDecoder->num_package_ranks_per_dimm(l_decoder_val), - "%s. Failed num_package_ranks_per_dimm()", mss::c_str(i_target) ); - FAPI_TRY(eff_num_master_ranks_per_dimm(l_mcs, &l_attrs_master_ranks_per_dimm[0][0]), - "%s. Failed eff_num_master_ranks_per_dimm()", mss::c_str(i_target) ); - FAPI_TRY(eff_dimm_ranks_configed(l_mcs, &l_attrs_dimm_ranks_configed[0][0]), - "%s. Failed eff_dimm_ranks_configed()", mss::c_str(i_target) ); - - l_attrs_master_ranks_per_dimm[index(l_mca)][index(i_target)] = l_decoder_val; - - // Set configed ranks. Set the bit representing the master rank configured (0 being left most.) So, - // a 4R DIMM would be 0b11110000 (0xF0). This is used by PRD. - FAPI_TRY( l_ranks_configed.setBit(0, l_decoder_val), - "%s. Failed to setBit", mss::c_str(i_target) ); - - l_attrs_dimm_ranks_configed[index(l_mca)][index(i_target)] = l_ranks_configed; - - FAPI_INF( "%s Num Master Ranks %d, DIMM Ranks Configed 0x%x", - mss::c_str(i_target), - l_attrs_master_ranks_per_dimm[index(l_mca)][index(i_target)], - l_attrs_dimm_ranks_configed[index(l_mca)][index(i_target)] ); - - FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM, l_mcs, l_attrs_master_ranks_per_dimm), - "%s. Failed to set ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM", mss::c_str(i_target) ); - - FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_RANKS_CONFIGED, l_mcs, l_attrs_dimm_ranks_configed), - "%s. Failed to set ATTR_EFF_DIMM_RANKS_CONFIGED", mss::c_str(i_target) ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Helper function to return LRDIMM decoder -/// @param[in] i_target dimm target -/// @param[in] i_encoding_rev encoding revision -/// @param[in] i_additions_rev additions revision -/// @param[in] i_raw_card raw card reference revision -/// @param[in] i_spd_data SPD data -/// @param[out] o_fact_obj shared pointer to the factory object -/// @return FAPI2_RC_SUCCESS if okay -/// @note Factory dependent on SPD revision & dimm type -/// -static fapi2::ReturnCode rdimm_rev_helper(const fapi2::Target& i_target, - const uint8_t i_encoding_rev, - const uint8_t i_additions_rev, - const rcw_settings i_raw_card, - const std::vector& i_spd_data, - std::shared_ptr& o_fact_obj) -{ - // This needs to be updated for added revisions - constexpr uint64_t HIGHEST_ENCODING_LEVEL = 1; - constexpr uint64_t HIGHEST_ADDITIONS_LEVEL = 1; - - fapi2::current_err = fapi2::FAPI2_RC_SUCCESS; - std::shared_ptr l_module_decoder; - - // SPD Revision format #.# - // 1st # = encoding level - // 2nd # = additions level - switch(i_encoding_rev) - { - // Skipping case 0 since we shouldn't be using pre-production revisions - case 1: - switch(i_additions_rev) - { - // Rev 1.0 - case 0: - // Life starts out at base revision level - FAPI_INF( "%s. Creating decoder for RDIMM SPD revision 1.0", mss::c_str(i_target) ); - l_module_decoder = std::make_shared(i_target, i_spd_data); - o_fact_obj = std::make_shared( i_target, i_spd_data, l_module_decoder, i_raw_card ); - break; - - case 1: - // Rev 1.1 - // Changes to both the general section & rdimm section occured - FAPI_INF( "%s. Creating decoder for RDIMM SPD revision 1.1", mss::c_str(i_target) ); - l_module_decoder = std::make_shared(i_target, i_spd_data); - o_fact_obj = std::make_shared( i_target, i_spd_data, l_module_decoder, i_raw_card ); - break; - - default: - // For additions level retrieved from SPD higher than highest decoded revision level, - // we default to be highest decoded additions level because they are backward compatable. - // This will need to be updated for every new additions level that is decoded. - FAPI_INF( "%s. Unable to create decoder for retrieved SPD RDIMM revision %d.%d", - mss::c_str(i_target), i_encoding_rev, i_additions_rev ); - - FAPI_INF("%s. Falling back to highest supported, backward-comptable decoder, " - "for SPD RDIMM revision %d.%d", - mss::c_str(i_target), HIGHEST_ENCODING_LEVEL, HIGHEST_ADDITIONS_LEVEL ); - - l_module_decoder = std::make_shared(i_target, i_spd_data); - o_fact_obj = std::make_shared( i_target, i_spd_data, l_module_decoder, i_raw_card ); - break; - - }//end additions - - break; - - default: - // For encodings level retrieved from SPD higher than highest decoded revision level, - // we error out because encoding level changes are NOT backward comptable. - // Current this means Rev 2.0+ is no supported - FAPI_TRY( mss::check::spd::invalid_factory_sel(i_target, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM, - i_encoding_rev, - i_additions_rev, - "Encoding Level unsupported!"), - "%s. Invalid encoding level received: %d", - mss::c_str(i_target), i_encoding_rev); - - break; - }// end encodings - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Helper function to return LRDIMM decoder -/// @param[in] i_target dimm target -/// @param[in] i_encoding_rev encoding revision -/// @param[in] i_additions_rev additions revision -/// @param[in] i_raw_card raw card reference revision -/// @param[in] i_spd_data SPD data -/// @param[out] o_fact_obj shared pointer to the factory object -/// @return FAPI2_RC_SUCCESS if okay -/// @note Factory dependent on SPD revision & dimm type -/// -static fapi2::ReturnCode lrdimm_rev_helper(const fapi2::Target& i_target, - const uint8_t i_encoding_rev, - const uint8_t i_additions_rev, - const rcw_settings i_raw_card, - const std::vector& i_spd_data, - std::shared_ptr& o_fact_obj) -{ - fapi2::current_err = fapi2::FAPI2_RC_SUCCESS; - std::shared_ptr l_module_decoder; - - // This needs to be updated for added revisions - constexpr uint64_t HIGHEST_ENCODING_LEVEL = 2; - constexpr uint64_t HIGHEST_ADDITIONS_LEVEL = 1; - - // SPD Revision format #.# - // 1st # = encoding level - // 2nd # = additions level - switch(i_encoding_rev) - { - // Skipping case 0 since we shouldn't be using pre-production revisions - case 1: - switch(i_additions_rev) - { - // Rev 1.0 - case 0: - // Life starts out at base revision level - FAPI_INF( "%s. Creating decoder for LRDIMM SPD revision 1.0", mss::c_str(i_target) ); - l_module_decoder = std::make_shared(i_target, i_spd_data); - o_fact_obj = std::make_shared( i_target, i_spd_data, l_module_decoder, i_raw_card ); - break; - - case 1: - // Rev 1.1 - // Changes to both the general section & lrdimm section occured - FAPI_INF( "%s. Creating decoder for LRDIMM SPD revision 1.1", mss::c_str(i_target) ); - l_module_decoder = std::make_shared(i_target, i_spd_data); - o_fact_obj = std::make_shared( i_target, i_spd_data, l_module_decoder, i_raw_card ); - break; - - case 2: - // Rev 1.2 - // Changes lrdimm section occured - // General section remained the same - FAPI_INF( "%s. Creating decoder for LRDIMM SPD revision 1.2", mss::c_str(i_target) ); - l_module_decoder = std::make_shared(i_target, i_spd_data); - o_fact_obj = std::make_shared( i_target, i_spd_data, l_module_decoder, i_raw_card ); - break; - - default: - // For additions level retrieved from SPD higher than highest decoded revision level, - // we default to be highest decoded additions level because they are backward compatable. - // This will need to be updated for every new additions level that is decoded. - FAPI_INF( "%s. Unable to create decoder for retrieved SPD LRDIMM revision %d.%d", - mss::c_str(i_target), i_encoding_rev, i_additions_rev ); - - FAPI_INF("%s. Falling back to highest supported, backward-comptable decoder, " - "for SPD LRDIMM revision %d.%d", - mss::c_str(i_target), HIGHEST_ENCODING_LEVEL, HIGHEST_ADDITIONS_LEVEL ); - - l_module_decoder = std::make_shared(i_target, i_spd_data); - o_fact_obj = std::make_shared( i_target, i_spd_data, l_module_decoder, i_raw_card ); - break; - - }//end additions - - break; - - default: - // For encodings level retrieved from SPD higher than highest decoded revision level, - // we error out because encoding level changes are NOT backward comptable. - // Currently this means Rev 2.0+ is not supported - FAPI_TRY( mss::check::spd::invalid_factory_sel(i_target, - fapi2::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM, - i_encoding_rev, - i_additions_rev, - "Encoding Level unsupported!"), - "%s. Invalid encoding level received: %d", - mss::c_str(i_target), i_encoding_rev); - break; - }// end encodings - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Retrieve current raw card settings -/// based on dimm type and raw card reference rev -/// @param[in] i_target dimm target -/// @param[in] i_spd_data SPD data -/// @param[out] o_raw_card raw card settings -/// @return FAPI2_RC_SUCCESS if okay -/// -fapi2::ReturnCode raw_card_factory(const fapi2::Target& i_target, - const std::vector& i_spd_data, - rcw_settings& o_raw_card) -{ - uint8_t l_dimm_type = 0; - uint8_t l_ref_raw_card_rev = 0; - - // Lets find out what raw card we are and grab the right - // raw card settings - FAPI_TRY( mss::eff_dimm_type(i_target, l_dimm_type) ); - FAPI_TRY( reference_raw_card(i_target, i_spd_data, l_ref_raw_card_rev) ); - - FAPI_INF( "Retrieved dimm_type: %d, raw card reference: 0x%lx from SPD", - l_dimm_type, l_ref_raw_card_rev); - - switch(l_dimm_type) - { - case fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM: - if( !find_value_from_key( mss::rdimm::RAW_CARDS, l_ref_raw_card_rev, o_raw_card) ) - { - FAPI_ERR( "Invalid reference raw card recieved for RDIMM: %d", l_ref_raw_card_rev ); - return fapi2::FAPI2_RC_FALSE; - } - - break; - - case fapi2::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM: - if( !find_value_from_key( mss::lrdimm::RAW_CARDS, l_ref_raw_card_rev, o_raw_card) ) - { - FAPI_ERR( "Invalid reference raw card recieved for LRDIMM: %d", l_ref_raw_card_rev ); - return fapi2::FAPI2_RC_FALSE; - } - - break; - - default: - FAPI_ERR( "Recieved invalid dimm type: %d", l_dimm_type); - return fapi2::FAPI2_RC_FALSE; - break; - } - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Object factory to select correct decoder -/// @param[in] i_target dimm target -/// @param[in] i_spd_data SPD data -/// @param[out] o_fact_obj shared pointer to the factory object -/// @return FAPI2_RC_SUCCESS if okay -/// @note Factory dependent on SPD revision & dimm type -/// -fapi2::ReturnCode factory(const fapi2::Target& i_target, - const std::vector& i_spd_data, - std::shared_ptr& o_fact_obj) -{ - if( i_spd_data.empty() ) - { - // This won't work with no data - FAPI_ERR( "%s. SPD vector of data is empty! Factory requires valid SPD data.", mss::c_str(i_target) ); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - uint8_t l_dimm_type = 0; - uint8_t l_encoding_rev = 0; - uint8_t l_additions_rev = 0; - rcw_settings l_raw_card; - - // Attribute setting needed by mss::c_str() which is used in - // the SPD decoder for debugging help - FAPI_TRY( dimm_type_setter(i_target, i_spd_data, l_dimm_type), - "%s. Failed to set DIMM type", mss::c_str(i_target) ); - FAPI_TRY( dram_gen_setter(i_target, i_spd_data), - "%s. Failed to set DRAM generation", mss::c_str(i_target) ); - FAPI_TRY( raw_card_factory(i_target, i_spd_data, l_raw_card), - "%s. Failed raw_card_factory()", mss::c_str(i_target) ); - - // Get revision levels to figure out what SPD version we are - FAPI_TRY( rev_encoding_level(i_target, i_spd_data, l_encoding_rev), - "%s. Failed to decode encoding level", mss::c_str(i_target) ); - FAPI_TRY( rev_additions_level(i_target, i_spd_data, l_additions_rev), - "%s. Failed to decode additons level", mss::c_str(i_target) ); - - // Get decoder object needed for current dimm type and spd rev - switch(l_dimm_type) - { - // Each dimm type rev is independent - case fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM: - FAPI_TRY( rdimm_rev_helper(i_target, - l_encoding_rev, - l_additions_rev, - l_raw_card, - i_spd_data, - o_fact_obj), - "%s. Failed to decode SPD revision for RDIMM, " - "encoding rev: %d, additions rev: %d", - mss::c_str(i_target), l_encoding_rev, l_additions_rev ); - break; - - // Each dimm type rev is independent - case fapi2::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM: - FAPI_TRY( lrdimm_rev_helper(i_target, - l_encoding_rev, - l_additions_rev, - l_raw_card, - i_spd_data, - o_fact_obj), - "%s. Failed to decode SPD revision for LRDIMM, " - "encoding rev: %d, additions rev: %d", - mss::c_str(i_target), l_encoding_rev, l_additions_rev); - break; - - default: - FAPI_TRY( mss::check::spd::invalid_factory_sel(i_target, - l_dimm_type, - l_encoding_rev, - l_additions_rev, - "DIMM Type unsupported!") ); - break; - - } // end dimm type - - FAPI_INF( "%s: Decoder created for DIMM type: %d, SPD revision %d.%d", - mss::c_str(i_target), - l_dimm_type, - l_encoding_rev, - l_additions_rev ); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Creates factory object & SPD data caches -/// @param[in] i_target controller target -/// @param[out] o_factory_caches vector of factory objects -/// @param[in] i_pDecoder custom decoder to populate cache (ignored for this specialization) -/// @return FAPI2_RC_SUCCESS if okay -/// @note This specialization is suited for creating a cache with platform -/// SPD data. -/// -template<> -fapi2::ReturnCode populate_decoder_caches( const fapi2::Target& i_target, - std::vector< std::shared_ptr >& o_factory_caches, - const std::shared_ptr& i_pDecoder) -{ - // Input decoder for this version of populating cache would get overriden - // so I don't bother with it in this specialization - std::shared_ptr l_pDecoder; - - for( const auto& l_dimm : find_targets(i_target) ) - { - size_t l_size = 0; - FAPI_TRY( fapi2::getSPD(l_dimm, nullptr, l_size), - "%s. Failed to retrieve SPD blob size", mss::c_str(i_target) ); - - { - // "Container" for SPD data - std::vector l_spd(l_size); - - // Retrive SPD data - FAPI_TRY( fapi2::getSPD(l_dimm, l_spd.data(), l_size), - "%s. Failed to retrieve SPD data", mss::c_str(i_target) ); - - // Retrieve factory object instance & populate spd data for that instance - FAPI_TRY( factory(l_dimm, l_spd, l_pDecoder), - "%s. Failed SPD factory, could not instantiate decoder object", mss::c_str(i_target) ); - - // Populate spd caches - o_factory_caches.push_back( l_pDecoder ); - } - - // Populate some of the DIMM attributes early. This allows the following code to make - // decisions based on DIMM information. Expressly done after the factory has decided on the SPD version - FAPI_TRY( master_ranks_per_dimm_setter(l_dimm, l_pDecoder), - "%s. Failed master_ranks_per_dimm_setter()", mss::c_str(i_target) ); - - }// end dimm - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Creates factory object & SPD data caches -/// @param[in] i_target the dimm target -/// @param[out] o_factory_caches vector of factory objects -/// @param[in] i_pDecoder custom decoder to populate cache (nullptr default) -/// @return FAPI2_RC_SUCCESS if okay -/// @note This specialization is suited for creating a cache with custom -/// SPD data (e.g. testing custom SPD). -/// -template<> -fapi2::ReturnCode populate_decoder_caches( const fapi2::Target& i_target, - std::vector< std::shared_ptr >& o_factory_caches, - const std::shared_ptr& i_pDecoder) -{ - if(i_pDecoder == nullptr) - { - // This won't work w/a null parameter - FAPI_ERR("%s. Received decoder is NULL!", mss::c_str(i_target) ); - return fapi2::FAPI2_RC_INVALID_PARAMETER; - } - - // Custom decoder provided (usually done for testing) - // Populate custom spd caches maps one dimm at a time - o_factory_caches.push_back( i_pDecoder ); - - // Populate some of the DIMM attributes early. This allows the following code to make - // decisions based on DIMM information. Expressly done after the factory has decided on the SPD version - FAPI_TRY( master_ranks_per_dimm_setter(i_target, i_pDecoder), - "%s. Failed master_ranks_per_dimm_setter()", mss::c_str(i_target) ); - -fapi_try_exit: - return fapi2::current_err; -} - -}// spd -}// mss -- cgit v1.2.1