From 8709c1f2823e69ae8315967d5bc2f34646e90354 Mon Sep 17 00:00:00 2001
From: Prem Shanker Jha <premjha2@in.ibm.com>
Date: Thu, 18 May 2017 05:28:05 -0500
Subject: PM: Level3 Special Wakeup Hardware Procedure

    -  Separate RC for Core, EQ and Ex Special Wakeup timeout.
    -  Preventing special wakeup recurssion in FFDC collection path.
    -  Update of documentation and error xml.
    -  Added support of mode in p9_collect_ppe_state HWP.

Change-Id: If4885cde4bf3501052e0b4b036a4a27e5561f1dc
RTC: 172628
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40693
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42268
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
---
 .../hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

(limited to 'src/import/hwpf/fapi2/xml')

diff --git a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
index 1b37198ba..423016c74 100644
--- a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
+++ b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
@@ -311,6 +311,7 @@
         <id>ATTR_IO_O_MFG_MIN_EYE_WIDTH</id>
         <default>0x00</default>
     </attribute>
+
     <attribute>
         <id>ATTR_START_CBS_FIFO_RESET_SKIP</id>
         <default>0x00</default>
@@ -319,15 +320,32 @@
         <id>ATTR_SYSTEM_CORECACHE_SKEWADJ_DISABLE</id>
         <default>0x0</default>
     </attribute>
+
     <attribute>
         <id>ATTR_SYSTEM_CORECACHE_DCADJ_DISABLE</id>
         <default>0x0</default>
     </attribute>
+
     <attribute>
         <id>ATTR_MC_PLL_BUCKET</id>
         <default>0x05</default>
     </attribute>
 
+    <attribute>
+        <id>ATTR_EQ_INSIDE_SPECIAL_WAKEUP</id>
+        <default>0x00</default>
+    </attribute>
+
+    <attribute>
+        <id>ATTR_CORE_INSIDE_SPECIAL_WAKEUP</id>
+        <default>0x00</default>
+    </attribute>
+
+    <attribute>
+        <id>ATTR_EX_INSIDE_SPECIAL_WAKEUP</id>
+        <default>0x00</default>
+    </attribute>
+
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      End of temporary definitions
      ================================================================= -->
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