From c9b82b3883b174d1cf181e9f0b9c9f261ccfa132 Mon Sep 17 00:00:00 2001 From: Alvin Wang Date: Tue, 29 Jan 2019 02:13:09 -0600 Subject: Adds exp_draminit_mc Change-Id: Ib4a31d2893c5524e3b2ce9128a2c4900bd82b2c0 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68597 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: HWSV CI Reviewed-by: Louis Stermole Tested-by: Hostboot CI Reviewed-by: STEPHEN GLANCY Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68920 Reviewed-by: Daniel M. Crowell Tested-by: Daniel M. Crowell --- .../xml/attribute_info/generic_memory_mrw_attributes.xml | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) (limited to 'src/import/generic/procedures') diff --git a/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml b/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml index ba699ad18..faf8a75fb 100644 --- a/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml +++ b/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml @@ -22,7 +22,7 @@ - + ATTR_MEM_MRW_IS_PLANAR TARGET_TYPE_OCMB_CHIP @@ -38,4 +38,18 @@ mem_mrw_is_planar + + ATTR_MSS_MRW_POWER_CONTROL_REQUESTED + TARGET_TYPE_SYSTEM + + Memory power control settings programmed during IPL + Used by OCC when exiting idle power-save mode + + uint8 + OFF = 0x00, POWER_DOWN = 0x01, PD_AND_STR = 0x02, PD_AND_STR_CLK_STOP = 0x03 + + OFF + + mrw_power_control_requested + -- cgit v1.2.1