From bd7d0b7b5d90275064bdb3ca6a5cd1e36f37bcf7 Mon Sep 17 00:00:00 2001 From: Andre Marin Date: Wed, 12 Dec 2018 14:51:15 -0600 Subject: Add SPD DDIMM DDR4 module except for PMIC fields Change-Id: Ib5268d2bc425733d30fbca98eaeb8d4a62a918a2 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69838 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Dev-Ready: STEPHEN GLANCY Reviewed-by: Louis Stermole Reviewed-by: ANDRE A. MARIN Tested-by: HWSV CI Tested-by: Hostboot CI Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70746 Reviewed-by: Daniel M. Crowell Tested-by: Daniel M. Crowell --- .../memory/lib/spd/ddimm/ddr4/ddimm_decoder_ddr4.H | 1279 ++++++++++++++++++++ 1 file changed, 1279 insertions(+) (limited to 'src/import/generic/memory/lib/spd/ddimm/ddr4/ddimm_decoder_ddr4.H') diff --git a/src/import/generic/memory/lib/spd/ddimm/ddr4/ddimm_decoder_ddr4.H b/src/import/generic/memory/lib/spd/ddimm/ddr4/ddimm_decoder_ddr4.H index 87f0bb92f..5e736cc76 100644 --- a/src/import/generic/memory/lib/spd/ddimm/ddr4/ddimm_decoder_ddr4.H +++ b/src/import/generic/memory/lib/spd/ddimm/ddr4/ddimm_decoder_ddr4.H @@ -22,3 +22,1282 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ +/// +/// @file ddimm_decoder_ddr4.H +/// @brief RDIMM module SPD decoder declarations +/// +// *HWP HWP Owner: Andre Marin +// *HWP HWP Backup: Stephen Glancy +// *HWP Team: Memory +// *HWP Level: 3 +// *HWP Consumed by: HB:FSP + +#ifndef _MSS_DDIMM_DECODER_DDR4_H_ +#define _MSS_DDIMM_DECODER_DDR4_H_ + +#include +#include +#include +#include +#include +#include +#include + +namespace mss +{ +namespace spd +{ + +/// +/// @class decoder +/// @tparam R SPD revision - partial specialization +/// @brief DDIMM module SPD DRAM decoder +/// +template < rev R > +class decoder : public dimm_module_decoder +{ + private: + + using fields_t = fields; + fapi2::Target iv_target; + std::vector iv_data; + + public: + + // deleted default ctor + decoder() = delete; + + /// + /// @brief ctor + /// @param[in] i_target dimm target + /// @param[in] i_spd_data vector DIMM SPD data + /// + decoder(const fapi2::Target& i_target, + const std::vector& i_spd_data): + dimm_module_decoder(i_target, i_spd_data), + iv_target(i_target), + iv_data(i_spd_data) + { + static_assert( R <= rev::DDIMM_MAX, " R > rev::DDIMM_MAX"); + } + + /// + /// @brief default dtor + /// + virtual ~decoder() = default; + + /// + /// @brief Gets decoder target + /// @return fapi2::Target + /// + virtual fapi2::Target get_dimm_target() const + { + return iv_target; + } + + /// + /// @brief Gets decoder SPD data + /// @return std::vector + /// + virtual std::vector get_data() const + { + return iv_data; + } + + /// + /// @brief Sets decoder SPD data + /// @param[in] i_spd_data SPD data in a vector reference + /// + virtual void set_data(const std::vector& i_spd_data) + { + iv_data = i_spd_data; + } + + /// + /// @brief Decodes SPD Revision for bytes 192->447 -> SPD_REVISION + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode ddimm_spd_revision(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Module Height -> MODULE_BASE_HEIGHT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode module_base_height(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Module Height -> MODULE_HEIGHT_MAX + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode max_module_nominal_height(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Module Maximum Thickness -> MAX_THICKNESS_BACK + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode back_module_max_thickness(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Module Maximum Thickness -> MAX_THICKNESS_FRONT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode front_module_max_thickness(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Reference Raw Card used -> DESIGN_REV + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode reference_raw_card(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + // Checks that we don't hit the reserved field for the RC design + { + static constexpr uint8_t RC_DESIGN_START = 3; + static constexpr uint8_t RC_DESIGN_LEN = 5; + static constexpr uint8_t RESERVED = 0x1f; + fapi2::buffer l_buff(o_output); + uint8_t l_rc_design = 0; + l_buff.extractToRight(l_rc_design); + + // Lets make an additional check that we aren't being set to a reserved field + FAPI_ASSERT( l_rc_design != RESERVED, + fapi2::MSS_INVALID_SPD_RESERVED_BITS() + .set_FUNCTION_CODE(DDIMM_RAWCARD_DECODE) + .set_TARGET(iv_target), + "Reserved bits seen on %s", + spd::c_str(iv_target) ); + } + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes DIMM attributes -> NUM_ROWS + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode num_rows_of_drams(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes DIMM attributes -> NUM_BUFFERS + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode num_buffers_used(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Thermal Heat Spreader Solution -> HEAT_SPREADER_SOL + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode heat_spreader_solution(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Thermal Heat Spreader Solution -> HEAT_SPREADER_CHAR + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode heat_spreader_thermal_char(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes DMB Manfacture ID code 2nd byte + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 198: CONTINUATION_CODE + /// Byte 199: LAST_NON_ZERO + /// + virtual fapi2::ReturnCode dmb_manufacturer_id_code(uint16_t& o_output) const override + { + uint8_t l_byte0 = 0; + uint8_t l_byte1 = 0; + + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, l_byte0)) ); + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, l_byte1)) ); + + { + fapi2::buffer l_buffer; + right_aligned_insert(l_buffer, l_byte1, l_byte0); + o_output = l_buffer; + FAPI_INF("%s. Register Manufacturer ID Code: 0x%04x", + spd::c_str(iv_target), + o_output); + } + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes DMB Revision Number -> DMB_REV + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode dmb_rev_num(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes DIMM Module Oranization -> RANK_MIX + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode rank_mix(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes DIMM Module Oranization -> PACKAGE_RANK + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode package_ranks_per_channel(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes DIMM Module Oranization -> DATA_WIDTH + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode dram_component_width_per_channel(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Memory Channel Bus Width -> NUM_DIMM_CHANNELS + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode num_channels_per_dimm(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Memory Channel Bus Width -> BUS_WIDTH_EXT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode bus_width_extension(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Memory Channel Bus Width -> DEVICE_WIDTH + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode memory_width_per_channel(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Module Thermal Sensors -> MOD_THERMAL_SENSOR + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode module_thermal_sensors(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Host Interface Protocols -> PROTOCOL_SUPPORT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode host_protocol_support(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Host Interface Speed Supported -> SPEED_SUPPORTED_LSB + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode host_speed_supported(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Address Mirroring -> ADDRESS_MIRROR + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode address_mirroring(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Byte enables MSB + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 208: BYTE_ENABLES_LSB + /// Byte 209: BYTE_ENABLES_MSB + /// + virtual fapi2::ReturnCode byte_enables(uint16_t& o_output) const override + { + uint8_t l_byte0 = 0; + uint8_t l_byte1 = 0; + + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, l_byte0)) ); + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, l_byte1)) ); + + { + fapi2::buffer l_buffer; + right_aligned_insert(l_buffer, l_byte1, l_byte0); + o_output = l_buffer; + FAPI_INF("%s. Register Manufacturer ID Code: 0x%04x", + spd::c_str(iv_target), + o_output); + } + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Nibble enables LSB1 + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 210: NIBBLE_ENABLES_LSB0 + /// Byte 211: NIBBLE_ENABLES_MSB0 + /// Byte 212: NIBBLE_ENABLES_LSB1 + /// + virtual fapi2::ReturnCode nibble_enables(uint32_t& o_output) const override + { + uint8_t l_byte0 = 0; + uint8_t l_byte1 = 0; + uint8_t l_byte2 = 0; + uint8_t l_byte3 = 0; + + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, l_byte0)) ); + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, l_byte1)) ); + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, l_byte2)) ); + + { + fapi2::buffer l_buffer; + right_aligned_insert(l_buffer, l_byte3, l_byte2, l_byte1, l_byte0); + o_output = l_buffer; + FAPI_INF("%s. Register Manufacturer ID Code: 0x%04x", + spd::c_str(iv_target), + o_output); + } + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Four Rank Mode - DDP Compatibility - TSV 8 High Support - MRAM Support -> DDIMM_COMPAT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode compatabilty_modes(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Number of P-States -> NUM_P_STATES + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode num_p_states(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Spare Device Mapping LSB1 + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 216: SPARE_DEVICE_LSB0 + /// Byte 217: SPARE_DEVICE_MSB0 + /// Byte 218: SPARE_DEVICE_LSB1 + /// + virtual fapi2::ReturnCode spare_device_mapping(uint32_t& o_output) const override + { + uint8_t l_byte0 = 0; + uint8_t l_byte1 = 0; + uint8_t l_byte2 = 0; + uint8_t l_byte3 = 0; + + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, l_byte0)) ); + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, l_byte1)) ); + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, l_byte2)) ); + + { + fapi2::buffer l_buffer; + right_aligned_insert(l_buffer, l_byte3, l_byte2, l_byte1, l_byte0); + o_output = l_buffer; + FAPI_INF("%s. Register Manufacturer ID Code: 0x%04x", + spd::c_str(iv_target), + o_output); + } + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Host Interface Speed to DDR Interface Speed Ratio -> HI_DDR_SPEED_RATIO + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode host_to_ddr_speed_ratio(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Voltage VIN_MTG Edge connector -> VIN_MGMT_NOMINAL + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_mgmt_nominal(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Voltage VIN_MTG Edge connector -> VIN_MGMT_OPERABLE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_mgmt_operable(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Voltage VIN_MTG Edge connector -> VIN_MGMT_ENDURANT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_mgmt_endurant(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Voltage VIN_BULK Edge Connecto -> VIN_BULK_NOMINAL + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_bulk_nominal(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Voltage VIN_BULK Edge Connecto -> VIN_BULK_OPERABLE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_bulk_operable(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes Voltage VIN_BULK Edge Connecto -> VIN_BULK_ENDURANT + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vin_bulk_endurant(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes VDD_Core PMIC0 -> VDD_CORE_PMIC0 + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vdd_core_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 Manfacture ID code 2nd byte + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 227: PMIC0_CONT_CODE + /// Byte 228: PMIC0_LAST_NON_ZERO + /// + virtual fapi2::ReturnCode mfg_id_pmic0(uint16_t& o_output) const override + { + uint8_t l_byte0 = 0; + uint8_t l_byte1 = 0; + + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, l_byte0)) ); + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, l_byte1)) ); + + { + fapi2::buffer l_buffer; + right_aligned_insert(l_buffer, l_byte1, l_byte0); + o_output = l_buffer; + FAPI_INF("%s. Register Manufacturer ID Code: 0x%04x", + spd::c_str(iv_target), + o_output); + } + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 Revision Number -> PMIC0_REV + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode revision_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes VDD_Core PMIC1 -> VDD_CORE_PMIC1 + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode vdd_core_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 Manfacture ID code 2nd byte + /// @param[out] o_output encoding from SPD - multiple fields used + /// @return FAPI2_RC_SUCCESS if okay + /// @note Uses the following bytes and fields to build up the combined data: + /// Byte 231: PMIC1_CONT_CODE + /// Byte 232: PMIC1_LAST_NON_ZERO + /// + virtual fapi2::ReturnCode mfg_id_pmic1(uint16_t& o_output) const override + { + uint8_t l_byte0 = 0; + uint8_t l_byte1 = 0; + + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, l_byte0)) ); + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, l_byte1)) ); + + { + fapi2::buffer l_buffer; + right_aligned_insert(l_buffer, l_byte1, l_byte0); + o_output = l_buffer; + FAPI_INF("%s. Register Manufacturer ID Code: 0x%04x", + spd::c_str(iv_target), + o_output); + } + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 Revision Number -> PMIC1_REV + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode revision_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWA Voltage Setting -> PMIC0_SWA_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swa_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWA Voltage Setting -> PMIC0_SWA_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swa_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWA Voltage Offset -> PMIC0_SWA_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swa_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWA Voltage Offset -> PMIC0_SWA_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swa_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWA Delay Sequence Order -> PMIC0_SWA_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swa_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWB Voltage Setting -> PMIC0_SWB_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swb_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWB Voltage Setting -> PMIC0_SWB_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swb_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWB Voltage Offset -> PMIC0_SWB_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swb_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWB Voltage Offset -> PMIC0_SWB_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swb_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWB Delay Sequence Order -> PMIC0_SWB_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swb_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWC Voltage Setting -> PMIC0_SWC_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swc_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWC Voltage Setting -> PMIC0_SWC_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swc_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWC Voltage Offset -> PMIC0_SWC_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swc_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWC Voltage Offset -> PMIC0_SWC_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swc_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWC Delay Sequence Order -> PMIC0_SWC_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swc_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWD Voltage Setting -> PMIC0_SWD_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swd_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWD Voltage Setting -> PMIC0_SWD_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swd_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWD Voltage Offset -> PMIC0_SWD_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swd_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWD Voltage Offset -> PMIC0_SWD_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swd_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 SWD Delay Sequence Order -> PMIC0_SWD_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swd_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC0 Phase Combination -> PMIC0_PHASE_COMBIN + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode phase_combination_pmic0(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWA Voltage Setting -> PMIC1_SWA_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swa_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWA Voltage Setting -> PMIC1_SWA_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swa_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWA Voltage Offset -> PMIC1_SWA_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swa_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWA Voltage Offset -> PMIC1_SWA_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swa_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWA Delay Sequence Order -> PMIC1_SWA_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swa_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWB Voltage Setting -> PMIC1_SWB_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swb_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWB Voltage Setting -> PMIC1_SWB_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swb_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWB Voltage Offset -> PMIC1_SWB_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swb_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWB Voltage Offset -> PMIC1_SWB_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swb_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWB Delay Sequence Order -> PMIC1_SWB_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swb_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWC Voltage Setting -> PMIC1_SWC_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swc_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWC Voltage Setting -> PMIC1_SWC_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swc_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWC Voltage Offset -> PMIC1_SWC_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swc_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWC Voltage Offset -> PMIC1_SWC_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swc_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWC Delay Sequence Order -> PMIC1_SWC_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swc_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWD Voltage Setting -> PMIC1_SWD_VOLT_SET + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_swd_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWD Voltage Setting -> PMIC1_SWD_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_setpoint_range_swd_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWD Voltage Offset -> PMIC1_SWD_VOLT_OFF + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_swd_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWD Voltage Offset -> PMIC1_SWD_OFF_RANGE + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_offset_range_swd_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 SWD Delay Sequence Order -> PMIC1_SWD_ORDER + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode volt_order_swd_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + + /// + /// @brief Decodes PMIC1 Phase Combination -> PMIC1_PHASE_COMBIN + /// @param[out] o_output encoding from SPD + /// @return FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode phase_combination_pmic1(uint8_t& o_output) const override + { + FAPI_TRY( (mss::spd::reader(iv_target, iv_data, o_output)) ); + + fapi_try_exit: + return fapi2::current_err; + } + +};// decoder + +}// spd +}// mss + +#endif //_MSS_DDIMM_DECODER_DDR4_H_ -- cgit v1.2.1