From 9d56704c471a0389d471930cd3747554380b6b0c Mon Sep 17 00:00:00 2001 From: Joe McGill Date: Wed, 19 Oct 2016 11:54:47 -0500 Subject: p9_psi_init -- parametrize link speed (half/full) Wrapper tested on zzfp033 Appears to correctly trigger half speed mode from FSP tool feedback $ cat /sys/devices/psi_link0/clock FSP-2, PSI(0) CLK overwrite: 1 Speed: 166 MHz Change-Id: I45997c30e71457ceedfcba70550f0e6d98584a1e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31497 Dev-Ready: Joseph J. McGill Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: Kevin F. Reick Reviewed-by: Joseph J. McGill Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31570 Reviewed-by: Hostboot Team Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell --- .../xml/attribute_info/chip_ec_attributes.xml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'src/import/chips') diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index eab671ea3..c8e5f14ca 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -234,4 +234,22 @@ + + ATTR_CHIP_EC_FEATURE_PSI_HALF_SPEED + TARGET_TYPE_PROC_CHIP + + Nimbus DD1 only: enable half speed PSI link operation due to relaxed + chip timing closure + + + + ENUM_ATTR_NAME_NIMBUS + + 0x20 + LESS_THAN + + + + + -- cgit v1.2.1