From 8a6b5a50b388558237b79ec39ef23fb5f34c4899 Mon Sep 17 00:00:00 2001 From: Stephen Glancy Date: Thu, 23 May 2019 13:08:29 -0400 Subject: Adds EFD decode updates for 07MAY19 spec updates Change-Id: Ia1727ad2987b8e82c1a21fffe3fadcb24c48e457 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77813 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Reviewed-by: Mark Pizzutillo Tested-by: Hostboot CI Reviewed-by: Louis Stermole Tested-by: HWSV CI Reviewed-by: Jennifer A Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78020 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Daniel M. Crowell --- .../lib/eff_config/explorer_efd_processing.C | 212 +++++++++++++++++++++ .../lib/eff_config/explorer_efd_processing.H | 96 ++++++++++ .../procedures/hwp/memory/lib/exp_draminit_utils.H | 2 +- .../p9a/procedures/hwp/memory/p9a_mss_eff_config.C | 3 + 4 files changed, 312 insertions(+), 1 deletion(-) (limited to 'src/import/chips') diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_efd_processing.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_efd_processing.C index 3ef743dbf..de0bbfc57 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_efd_processing.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_efd_processing.C @@ -22,3 +22,215 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + +/// +/// @file explorer_efd_processing.C +/// @brief Processing for EFD for eff config +/// + +// *HWP HWP Owner: Andre Marin +// *HWP FW Owner: Stephen Glancy +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: HB:CI + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +namespace mss +{ +namespace exp +{ +namespace efd +{ + +/// +/// @brief Processes the CAC delay A side +/// @param[in] i_target the target on which to operate +/// @param[in] i_efd_data the EFD data to process +/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully +/// +fapi2::ReturnCode cac_delay_a(const fapi2::Target& i_target, + const std::shared_ptr& i_efd_data) +{ + // Get the data + uint8_t l_addr_delay_a[DRAMINIT_NUM_ADDR_DELAYS] = {}; + const auto& l_port = mss::find_target(i_target); + + FAPI_TRY(mss::attr::get_exp_atxdly_a(l_port, l_addr_delay_a)); + + // Update the values + FAPI_TRY(i_efd_data->cac_delay_a_side_group_0(l_addr_delay_a[0])); + FAPI_TRY(i_efd_data->cac_delay_a_side_group_1(l_addr_delay_a[1])); + FAPI_TRY(i_efd_data->cac_delay_a_side_group_2(l_addr_delay_a[2])); + FAPI_TRY(i_efd_data->cac_delay_a_side_group_3(l_addr_delay_a[3])); + FAPI_TRY(i_efd_data->cac_delay_a_side_group_4(l_addr_delay_a[4])); + FAPI_TRY(i_efd_data->cac_delay_a_side_group_5(l_addr_delay_a[5])); + FAPI_TRY(i_efd_data->cac_delay_a_side_group_6(l_addr_delay_a[6])); + FAPI_TRY(i_efd_data->cac_delay_a_side_group_7(l_addr_delay_a[7])); + + // Set the attribute + FAPI_TRY(mss::attr::set_exp_atxdly_a(l_port, l_addr_delay_a)); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Processes the CAC delay B side +/// @param[in] i_target the target on which to operate +/// @param[in] i_efd_data the EFD data to process +/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully +/// +fapi2::ReturnCode cac_delay_b(const fapi2::Target& i_target, + const std::shared_ptr& i_efd_data) +{ + // Get the data + uint8_t l_addr_delay_b[DRAMINIT_NUM_ADDR_DELAYS] = {}; + const auto& l_port = mss::find_target(i_target); + + FAPI_TRY(mss::attr::get_exp_atxdly_b(l_port, l_addr_delay_b)); + + // Update the values + FAPI_TRY(i_efd_data->cac_delay_b_side_group_0(l_addr_delay_b[0])); + FAPI_TRY(i_efd_data->cac_delay_b_side_group_1(l_addr_delay_b[1])); + FAPI_TRY(i_efd_data->cac_delay_b_side_group_2(l_addr_delay_b[2])); + FAPI_TRY(i_efd_data->cac_delay_b_side_group_3(l_addr_delay_b[3])); + FAPI_TRY(i_efd_data->cac_delay_b_side_group_4(l_addr_delay_b[4])); + FAPI_TRY(i_efd_data->cac_delay_b_side_group_5(l_addr_delay_b[5])); + FAPI_TRY(i_efd_data->cac_delay_b_side_group_6(l_addr_delay_b[6])); + FAPI_TRY(i_efd_data->cac_delay_b_side_group_7(l_addr_delay_b[7])); + + // Set the attribute + FAPI_TRY(mss::attr::set_exp_atxdly_b(l_port, l_addr_delay_b)); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Processes the Host RD VREF DQ +/// @param[in] i_target the target on which to operate +/// @param[in] i_efd_data the EFD data to process +/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully +/// +fapi2::ReturnCode host_rd_vref_dq(const fapi2::Target& i_target, + const std::shared_ptr& i_efd_data) +{ + // Get the data + uint8_t l_vref = 0; + const auto& l_port = mss::find_target(i_target); + + FAPI_TRY(mss::attr::get_exp_init_vref_dq(l_port, l_vref)); + + // Update the values + FAPI_TRY(i_efd_data->phy_vref_percent(l_vref)); + + // Set the attribute + FAPI_TRY(mss::attr::set_exp_init_vref_dq(l_port, l_vref)); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Processes the CS command latency +/// @param[in] i_target the target on which to operate +/// @param[in] i_efd_data the EFD data to process +/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully +/// +fapi2::ReturnCode cs_cmd_latency(const fapi2::Target& i_target, + const std::shared_ptr& i_efd_data) +{ + // Get the data + uint8_t l_cmd_latency = 0; + FAPI_TRY(mss::attr::get_cs_cmd_latency(i_target, l_cmd_latency)); + + // Update the values + FAPI_TRY(i_efd_data->bist_ca_latency_mode(l_cmd_latency)); + + // Set the attribute + FAPI_TRY(mss::attr::set_cs_cmd_latency(i_target, l_cmd_latency)); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Processes the CA parity latency +/// @param[in] i_target the target on which to operate +/// @param[in] i_efd_data the EFD data to process +/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully +/// +fapi2::ReturnCode ca_parity_latency(const fapi2::Target& i_target, + const std::shared_ptr& i_efd_data) +{ + // Get the data + uint8_t l_ca_parity_latency = 0; + FAPI_TRY(mss::attr::get_ca_parity_latency(i_target, l_ca_parity_latency)); + + // Update the values + FAPI_TRY(i_efd_data->bist_ca_pl_mode(l_ca_parity_latency)); + + // Set the attribute + FAPI_TRY(mss::attr::set_ca_parity_latency(i_target, l_ca_parity_latency)); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Processes the DFIMRL_DDRCLK +/// @param[in] i_target the target on which to operate +/// @param[in] i_efd_data the EFD data to process +/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully +/// +fapi2::ReturnCode dfimrl_ddrclk(const fapi2::Target& i_target, + const std::shared_ptr& i_efd_data) +{ + // Get the data + uint8_t l_dfimrl_ddrclk = 0; + const auto& l_port = mss::find_target(i_target); + + FAPI_TRY(mss::attr::get_exp_dfimrl_clk(l_port, l_dfimrl_ddrclk)); + + // Update the values + FAPI_TRY(i_efd_data->dfimrl_ddrclk(l_dfimrl_ddrclk)); + + // Set the attribute + FAPI_TRY(mss::attr::get_exp_dfimrl_clk(l_port, l_dfimrl_ddrclk)); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Process the EFD data and set attributes +/// @param[in] i_target DIMM target on which to operate +/// @param[in] i_efd_data the EFD data to process +/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully +/// +fapi2::ReturnCode process(const fapi2::Target& i_target, + const std::shared_ptr& i_efd_data) +{ + FAPI_TRY(host_rd_vref_dq(i_target, i_efd_data)); + FAPI_TRY(cs_cmd_latency(i_target, i_efd_data)); + FAPI_TRY(ca_parity_latency(i_target, i_efd_data)); + FAPI_TRY(dfimrl_ddrclk(i_target, i_efd_data)); + FAPI_TRY(cac_delay_a(i_target, i_efd_data)); + FAPI_TRY(cac_delay_b(i_target, i_efd_data)); + +fapi_try_exit: + return fapi2::current_err; +} + +} // ns efd +} // ns exp +} // ns mss diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_efd_processing.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_efd_processing.H index 7189811d4..e7c13efaa 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_efd_processing.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_efd_processing.H @@ -22,3 +22,99 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + +/// +/// @file explorer_efd_processing.H +/// @brief Processing for EFD for eff config +/// + +// *HWP HWP Owner: Andre Marin +// *HWP FW Owner: Stephen Glancy +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: HB:CI + +#ifndef _MSS_EXPLORER_EFD_PROCESSING_H_ +#define _MSS_EXPLORER_EFD_PROCESSING_H_ + +#include +#include +#include +#include +#include +#include +#include + +namespace mss +{ +namespace exp +{ +namespace efd +{ + +/// +/// @brief Processes the CAC delay A side +/// @param[in] i_target the target on which to operate +/// @param[in] i_efd_data the EFD data to process +/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully +/// +fapi2::ReturnCode cac_delay_a(const fapi2::Target& i_target, + const std::shared_ptr& i_efd_data); + +/// +/// @brief Processes the CAC delay A side +/// @param[in] i_target the target on which to operate +/// @param[in] i_efd_data the EFD data to process +/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully +/// +fapi2::ReturnCode cac_delay_b(const fapi2::Target& i_target, + const std::shared_ptr& i_efd_data); + +/// +/// @brief Processes the Host RD VREF DQ +/// @param[in] i_target the target on which to operate +/// @param[in] i_efd_data the EFD data to process +/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully +/// +fapi2::ReturnCode host_rd_vref_dq(const fapi2::Target& i_target, + const std::shared_ptr& i_efd_data); + +/// +/// @brief Processes the CS command latency +/// @param[in] i_target the target on which to operate +/// @param[in] i_efd_data the EFD data to process +/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully +/// +fapi2::ReturnCode cs_cmd_latency(const fapi2::Target& i_target, + const std::shared_ptr& i_efd_data); + +/// +/// @brief Processes the CA parity latency +/// @param[in] i_target the target on which to operate +/// @param[in] i_efd_data the EFD data to process +/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully +/// +fapi2::ReturnCode ca_parity_latency(const fapi2::Target& i_target, + const std::shared_ptr& i_efd_data); + +/// +/// @brief Processes the DFIMRL_DDRCLK +/// @param[in] i_target the target on which to operate +/// @param[in] i_efd_data the EFD data to process +/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully +/// +fapi2::ReturnCode dfimrl_ddrclk(const fapi2::Target& i_target, + const std::shared_ptr& i_efd_data); + +/// +/// @brief Process the EFD data and set attributes +/// @param[in] i_target DIMM target on which to operate +/// @param[in] i_efd_data the EFD data to process +/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully +/// +fapi2::ReturnCode process(const fapi2::Target& i_target, + const std::shared_ptr& i_efd_data); +} // ns efd +} // ns exp +} // ns mss +#endif diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_draminit_utils.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_draminit_utils.H index ab24f989c..4309c7fe4 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_draminit_utils.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_draminit_utils.H @@ -235,7 +235,7 @@ class phy_params /// /// @brief fetch the attributes and initialize it to the params /// @param[in] i_target the fapi2 target - /// @param[in,out] o_rc the fapi2 output + /// @param[out] o_rc the fapi2 output /// phy_params(const fapi2::Target& i_target, fapi2::ReturnCode& o_rc): diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C index a3358f3ce..0e3224827 100644 --- a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C +++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C @@ -43,6 +43,7 @@ #include #include #include +#include #include #include #include @@ -93,6 +94,8 @@ fapi2::ReturnCode p9a_mss_eff_config( const fapi2::Target::set(l_efd_data) ); + + FAPI_TRY( mss::exp::efd::process(dimm, l_efd_data)); } { -- cgit v1.2.1