From 7085e6bb6afc0c22ac6b0bb5f2e67b59d1d0f993 Mon Sep 17 00:00:00 2001 From: Andre Marin Date: Wed, 30 Aug 2017 10:42:08 -0500 Subject: Add Write CRC attributes to xml and eff_dimm Added ATTR_EFF_PACKAGE_RANK_MAP, ATTR_EFF_NIBBLE_MAP, and ATTR_MSS_EFF_WR_CRC attributes. Change-Id: Ib665e22ce755282afb012ca0df9c670770fa1dd6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45386 Tested-by: FSP CI Jenkins Reviewed-by: Louis Stermole Tested-by: Jenkins Server Reviewed-by: STEPHEN GLANCY Tested-by: HWSV CI Tested-by: Hostboot CI Reviewed-by: Matt K. Light Reviewed-by: Christian R. Geddes Dev-Ready: ANDRE A. MARIN Reviewed-by: Daniel M. Crowell Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45406 Tested-by: Jenkins OP Build CI Tested-by: Daniel M. Crowell --- .../p9/procedures/hwp/memory/lib/dimm/eff_dimm.C | 90 +++++ .../p9/procedures/hwp/memory/lib/dimm/eff_dimm.H | 18 + .../chips/p9/procedures/hwp/memory/lib/mc/port.C | 2 +- .../hwp/memory/lib/mss_attribute_accessors.H | 256 ++++++++++++++ .../procedures/hwp/memory/lib/shared/mss_const.H | 6 +- .../p9/procedures/hwp/memory/p9_mss_eff_config.C | 385 ++++++++++++++------- .../xml/attribute_info/memory_mcs_attributes.xml | 15 + .../xml/attribute_info/memory_spd_attributes.xml | 31 ++ .../error_info/p9_memory_mss_general_errors.xml | 13 + 9 files changed, 688 insertions(+), 128 deletions(-) (limited to 'src/import/chips') diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C index 1e5706714..097ffc26c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C @@ -3373,6 +3373,96 @@ fapi_try_exit: return fapi2::current_err; } +/// +/// @brief Determines & sets effective config for nibble +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_dimm::nibble_map() +{ + uint8_t l_attr[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_DQ_NIBBLES] = {}; + + std::vector l_nibble_bitmap; + FAPI_TRY( iv_pDecoder->nibble_map(l_nibble_bitmap) ); + + // Sanity check we retrieved a vector w/the right size + FAPI_ASSERT( l_nibble_bitmap.size() == MAX_DQ_NIBBLES, + fapi2::MSS_UNEXPECTED_VALUE_SEEN(). + set_TARGET(iv_dimm). + set_EXPECTED(MAX_DQ_NIBBLES). + set_ACTUAL(l_nibble_bitmap.size()). + set_FUNCTION(NIBBLE_MAP_FUNC), + "Expected vector size %d, actual size %d for %s", + MAX_DQ_NIBBLES, l_nibble_bitmap.size(), mss::c_str(iv_dimm) ); + + // Get & update MCS attribute + FAPI_TRY( eff_nibble_map(iv_mcs, &l_attr[0][0][0]) ); + + memcpy(&(l_attr[iv_port_index][iv_dimm_index][0]), l_nibble_bitmap.data(), MAX_DQ_NIBBLES); + + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_NIBBLE_MAP, iv_mcs, l_attr), + "Failed setting attribute ATTR_EFF_NIBBLE_MAP for %s", mss::c_str(iv_mcs)); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Determines & sets effective config for the package rank map +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_dimm::package_rank_map() +{ + uint8_t l_attr[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_DQ_NIBBLES] = {}; + + std::vector l_package_rank_map; + FAPI_TRY( iv_pDecoder->package_rank_map(l_package_rank_map) ); + + // Sanity check we retrieved a vector w/the right size + FAPI_ASSERT( l_package_rank_map.size() == MAX_DQ_NIBBLES, + fapi2::MSS_UNEXPECTED_VALUE_SEEN(). + set_TARGET(iv_dimm). + set_EXPECTED(MAX_DQ_NIBBLES). + set_ACTUAL(l_package_rank_map.size()). + set_FUNCTION(PACKAGE_RANK_MAP_FUNC), + "Expected vector size %d, actual size %d for %s", + MAX_DQ_NIBBLES, l_package_rank_map.size(), mss::c_str(iv_dimm) ); + + // Get & update MCS attribute + FAPI_TRY( eff_package_rank_map(iv_mcs, &l_attr[0][0][0]) ); + + memcpy(&(l_attr[iv_port_index][iv_dimm_index][0]), l_package_rank_map.data(), MAX_DQ_NIBBLES); + + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_PACKAGE_RANK_MAP, iv_mcs, l_attr), + "Failed setting attribute ATTR_EFF_PACKAGE_RANK_MAP for %s", mss::c_str(iv_mcs)); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Determines & sets effective config for the wr_crc +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// @warning eff_package_rank_map must be set before calling this method +/// +fapi2::ReturnCode eff_dimm::wr_crc() +{ + uint8_t l_attr[PORTS_PER_MCS] = {}; + + // Get & update MCS attribute + FAPI_TRY( eff_wr_crc(iv_mcs, &l_attr[0]) ); + + // By default write CRC will be disabled. For us to actually enable it in a product, + // we'd have to be taking more bit flips on the write data interface than scrub can keep up with, + // plus we'd have to take the performance hit of enabling it... so pretty high bar to enable it. + l_attr[iv_port_index] = fapi2::ENUM_ATTR_MSS_EFF_WR_CRC_DISABLE; + + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_MSS_EFF_WR_CRC, iv_mcs, l_attr), + "Failed setting attribute ATTR_MSS_EFF_WR_CRC for %s", mss::c_str(iv_mcs)); + +fapi_try_exit: + return fapi2::current_err; +} + /// /// @brief Determines & sets effective config for tRRD_S /// @return fapi2::FAPI2_RC_SUCCESS if okay diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H index d4f058100..b0de045ed 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H @@ -691,6 +691,24 @@ class eff_dimm /// fapi2::ReturnCode dram_twtr_s(); + /// + /// @brief Determines & sets effective config for the nibble map + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + fapi2::ReturnCode nibble_map(); + + /// + /// @brief Determines & sets effective config for the package rank map + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + fapi2::ReturnCode package_rank_map(); + + /// + /// @brief Determines & sets effective config for the wr_crc + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + fapi2::ReturnCode wr_crc(); + /// /// @brief Determines & sets effective config for tRRD_S (tRRD_S_slr) /// @return fapi2::FAPI2_RC_SUCCESS if okay diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C index 3a4c5b998..413271041 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C @@ -418,7 +418,7 @@ fapi2::ReturnCode restore_repairs_helper l_machine; // loop through bytes - for (uint64_t l_byte = 0; l_byte < (MAX_DQ_NIBBLES_X4 / NIBBLES_PER_BYTE); ++l_byte) + for (uint64_t l_byte = 0; l_byte < (MAX_DQ_NIBBLES / NIBBLES_PER_BYTE); ++l_byte) { for (size_t l_nibble = 0; l_nibble < NIBBLES_PER_BYTE; ++l_nibble) { diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H index e589963df..8c0b79105 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H @@ -17401,6 +17401,82 @@ fapi_try_exit: return fapi2::current_err; } +/// +/// @brief ATTR_MSS_EFF_WR_CRC getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Controls ENABLE/DISABLE of Write +/// CRC +/// +inline fapi2::ReturnCode eff_wr_crc(const fapi2::Target& i_target, uint8_t& o_value) +{ + uint8_t l_value[2]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_WR_CRC, i_target.getParent(), l_value) ); + o_value = l_value[mss::index(i_target)]; + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_EFF_WR_CRC: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_MSS_EFF_WR_CRC getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Controls ENABLE/DISABLE of Write +/// CRC +/// +inline fapi2::ReturnCode eff_wr_crc(const fapi2::Target& i_target, uint8_t& o_value) +{ + uint8_t l_value[2]; + auto l_mca = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_WR_CRC, l_mca.getParent(), l_value) ); + o_value = l_value[mss::index(l_mca)]; + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_EFF_WR_CRC: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_MSS_EFF_WR_CRC getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Controls ENABLE/DISABLE of Write +/// CRC +/// +inline fapi2::ReturnCode eff_wr_crc(const fapi2::Target& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_WR_CRC, i_target, l_value) ); + memcpy(o_array, &l_value, 2); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_EFF_WR_CRC: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + /// /// @brief ATTR_MSS_PHY_SEQ_REFRESH getter /// @param[in] const ref to the fapi2::Target @@ -20277,6 +20353,186 @@ fapi_try_exit: return fapi2::current_err; } +/// +/// @brief ATTR_EFF_PACKAGE_RANK_MAP getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (A) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Package Rank Map Decodes SPD Byte 60 - 77 (Bits 7~6) creator: +/// mss_eff_cnfg +/// +inline fapi2::ReturnCode eff_package_rank_map(const fapi2::Target& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][18]; + auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PACKAGE_RANK_MAP, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 18); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_PACKAGE_RANK_MAP: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_PACKAGE_RANK_MAP getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (B) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Package Rank Map Decodes SPD Byte 60 - 77 (Bits 7~6) creator: +/// mss_eff_cnfg +/// +inline fapi2::ReturnCode eff_package_rank_map(const fapi2::Target& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][18]; + auto l_mcs = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PACKAGE_RANK_MAP, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 36); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_PACKAGE_RANK_MAP: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_PACKAGE_RANK_MAP getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (C) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Package Rank Map Decodes SPD Byte 60 - 77 (Bits 7~6) creator: +/// mss_eff_cnfg +/// +inline fapi2::ReturnCode eff_package_rank_map(const fapi2::Target& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][18]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PACKAGE_RANK_MAP, i_target, l_value) ); + memcpy(o_array, &l_value, 72); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_PACKAGE_RANK_MAP: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_NIBBLE_MAP getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (A) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Nibble Map Decodes SPD Byte 60 - 77 (Bits 5~0) creator: +/// mss_eff_cnfg +/// +inline fapi2::ReturnCode eff_nibble_map(const fapi2::Target& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][18]; + auto l_mca = i_target.getParent(); + auto l_mcs = l_mca.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NIBBLE_MAP, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 18); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_NIBBLE_MAP: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_NIBBLE_MAP getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (B) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Nibble Map Decodes SPD Byte 60 - 77 (Bits 5~0) creator: +/// mss_eff_cnfg +/// +inline fapi2::ReturnCode eff_nibble_map(const fapi2::Target& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][18]; + auto l_mcs = i_target.getParent(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NIBBLE_MAP, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 36); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_NIBBLE_MAP: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_NIBBLE_MAP getter +/// @param[in] const ref to the fapi2::Target +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (C) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Nibble Map Decodes SPD Byte 60 - 77 (Bits 5~0) creator: +/// mss_eff_cnfg +/// +inline fapi2::ReturnCode eff_nibble_map(const fapi2::Target& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][18]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NIBBLE_MAP, i_target, l_value) ); + memcpy(o_array, &l_value, 72); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_NIBBLE_MAP: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + /// /// @brief ATTR_MSS_MRW_SAFEMODE_MEM_THROTTLED_N_COMMANDS_PER_PORT getter diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H index 454892813..ba099f268 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H @@ -65,7 +65,7 @@ enum sizes MAX_NUM_IMP = 4, ///< number of impedances valid per slew type MAX_NUM_CAL_SLEW_RATES = 4, ///< 3V/ns, 4V/ns, 5V/ns, 6V/n MAX_DQ_BITS = 72, /// TODO RTC:157753 This is Nimbus specific. Should be attribute/trait of processor. - MAX_DQ_NIBBLES_X4 = MAX_DQ_BITS / BITS_PER_NIBBLE, ///< For x4's there are 18 DQ nibbles for DQ 72 bits + MAX_DQ_NIBBLES = MAX_DQ_BITS / BITS_PER_NIBBLE, ///< For ISDIMMs are 18 DQ nibbles for DQ 72 bits MAX_DRAMS_X8 = MAX_DQ_BITS / BITS_PER_NIBBLE, ///< For x8's there are 9 DRAM for 72 bits MAX_DRAMS_X4 = MAX_DQ_BITS / BITS_PER_BYTE, ///< For x4's there are 18 DRAM for 72 bits @@ -134,6 +134,10 @@ enum times /// enum ffdc_function_codes { + // Used in eff_dimm.C + NIBBLE_MAP_FUNC = 20, + PACKAGE_RANK_MAP_FUNC = 21, + // Used in fw_mark_store.H for MSS_INVALID_RANK_PASSED FWMS_READ = 30, FWMS_WRITE = 31, diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C index 6982eecaf..b6068bcc7 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C @@ -69,13 +69,17 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target fapi2::ReturnCode l_rc; std::vector< std::shared_ptr > l_factory_caches; + // Caches - FAPI_TRY( mss::spd::populate_decoder_caches(i_target, l_factory_caches), "Error from p9_mss_eff_config"); + FAPI_TRY( mss::spd::populate_decoder_caches(i_target, l_factory_caches), + "Failed populate_decoder_caches for %s", mss::c_str(i_target)); // Need to check dead load before we get the VPD. // MR and MT VPD depends on DIMM ranks and freaks out if it receives 0 ranks from DIMM 0 and 1 or more ranks for DIMM 1 - FAPI_TRY( mss::plug_rule::check_dead_load (i_target), "Error from p9_mss_eff_config" ); - FAPI_TRY( mss::plug_rule::empty_slot_zero (i_target), "Error from p9_mss_eff_config" ); + FAPI_TRY( mss::plug_rule::check_dead_load(i_target), + "Failed check_dead_load for %s", mss::c_str(i_target) ); + FAPI_TRY( mss::plug_rule::empty_slot_zero(i_target), + "Failed empty_slot_zero for %s", mss::c_str(i_target)); // We need to decode the VPD. We don't do this in the ctor as we need // the rank information and for that we need the SPD caches (which we get when we populate the cache.) @@ -91,138 +95,267 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target for( const auto& l_cache : l_factory_caches ) { + const auto l_dimm = l_cache->iv_target; + std::shared_ptr l_eff_dimm; + FAPI_TRY( mss::eff_dimm::eff_dimm_factory( l_cache, l_eff_dimm), + "Failed eff_dimm_factory for %s", mss::c_str(l_dimm)); + + FAPI_INF("Running eff_config on %s", mss::c_str(l_dimm) ); - FAPI_TRY( mss::eff_dimm::eff_dimm_factory( l_cache, l_eff_dimm), "Error from p9_mss_eff_config"); - FAPI_INF("%s Running eff_config", mss::c_str(l_cache->iv_target) ); - - FAPI_TRY( l_eff_dimm->rcd_mfg_id(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->register_type(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->register_rev(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_mfg_id(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_width(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_density(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->ranks_per_dimm(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->prim_die_count(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->primary_stack_type(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_size(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_trefi(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_trfc(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_trfc_dlr(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->rcd_mirror_mode(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_bank_bits(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_row_bits(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_dqs_time(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_tccd_l(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc00(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc01(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc02(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc03(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc04(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc05(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc06_07(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc08(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc09(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc0a(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc0b(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc0c(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc0d(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc0e(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc0f(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc1x(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc2x(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc3x(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc4x(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc5x(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc6x(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc7x(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc8x(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rc9x(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rcax(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_rcbx(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_twr(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->read_burst_type(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_tm(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_cwl(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_lpasr(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dll_enable(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dll_reset(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->write_level_enable(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->output_buffer(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->vref_dq_train_value(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->vref_dq_train_range(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->vref_dq_train_enable(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->ca_parity_latency(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->ca_parity_error_status(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->ca_parity(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->crc_error_clear(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->odt_input_buffer(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->post_package_repair(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->read_preamble_train(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->read_preamble(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->write_preamble(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->self_refresh_abort(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->cs_to_cmd_addr_latency(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->internal_vref_monitor(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->max_powerdown_mode(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->mpr_read_format(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->temp_readout(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->crc_wr_latency(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->per_dram_addressability(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->geardown_mode(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->mpr_page(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->mpr_mode(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->write_crc(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->zqcal_interval(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->memcal_interval(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_trp(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_trcd(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_trc(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_twtr_l(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_twtr_s(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_trrd_s(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_trrd_l(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_trrd_dlr(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_tfaw(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_tfaw_dlr(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_tras(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_trtp(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->read_dbi(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->write_dbi(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->additive_latency(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->data_mask(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_bc00(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_bc01(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_bc02(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_bc03(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_bc04(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_bc05(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_bc07(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_bc08(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_bc09(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_bc0a(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_bc0b(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_bc0c(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_bc0d(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_bc0e(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dimm_bc0f(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_rtt_nom (), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_rtt_wr (), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->dram_rtt_park(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->phy_seq_refresh(), "Error from p9_mss_eff_config"); + FAPI_TRY( l_eff_dimm->rcd_mfg_id(), + "Failed rcd_mfg_id for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->register_type(), + "Failed register_type for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->register_rev(), + "Failed register_rev for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_mfg_id(), + "Failed dram_mfg_id for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_width(), + "Failed dram_width for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_density(), + "Failed dram_density for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->ranks_per_dimm(), + "Failed ranks_per_dimm for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->prim_die_count(), + "Failed prim_die_count for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->primary_stack_type(), + "Failed primary_stack_type for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_size(), + "Failed dimm_size for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_trefi(), + "Failed dram_trefi for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_trfc(), + "Failed dram_trfc for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_trfc_dlr(), + "Failed dram_trfc_dlr for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->rcd_mirror_mode(), + "Failed rcd_mirror_mode for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_bank_bits(), + "Failed dram_bank_bits for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_row_bits(), + "Failed dram_row_bits for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_dqs_time(), + "Failed dram_dqs_time for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_tccd_l(), + "Failed dram_tccd_l for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc00(), + "Failed dimm_rc00 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc01(), + "Failed dimm_rc01 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc02(), + "Failed dimm_rc02 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc03(), + "Failed dimm_rc03 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc04(), + "Failed dimm_rc04 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc05(), + "Failed dimm_rc05 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc06_07(), + "Failed dimm_rc06_07 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc08(), + "Failed dimm_rc08 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc09(), + "Failed dimm_rc09 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc0a(), + "Failed dimm_rc0a for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc0b(), + "Failed dimm_rc0b for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc0c(), + "Failed dimm_rc0c for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc0d(), + "Failed dimm_rc0d for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc0e(), + "Failed dimm_rc0e for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc0f(), + "Failed dimm_rc0f for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc1x(), + "Failed dimm_rc1x for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc2x(), + "Failed dimm_rc2x for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc3x(), + "Failed dimm_rc3x for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc4x(), + "Failed dimm_rc4x for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc5x(), + "Failed dimm_rc5x for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc6x(), + "Failed dimm_rc6x for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc7x(), + "Failed dimm_rc7x for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc8x(), + "Failed dimm_rc8x for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rc9x(), + "Failed dimm_rc9x for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rcax(), + "Failed dimm_rcax for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_rcbx(), + "Failed dimm_rcbx for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_twr(), + "Failed dram_twr for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->read_burst_type(), + "Failed read_burst_type for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_tm(), + "Failed dram_tm for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_cwl(), + "Failed dram_cwl for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_lpasr(), + "Failed dram_lpasr for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dll_enable(), + "Failed dll_enable for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dll_reset(), + "Failed dll_reset for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->write_level_enable(), + "Failed write_level_enable for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->output_buffer(), + "Failed output_buffer for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->vref_dq_train_value(), + "Failed vref_dq_train_value for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->vref_dq_train_range(), + "Failed vref_dq_train_range for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->vref_dq_train_enable(), + "Failed vref_dq_train_enable for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->ca_parity_latency(), + "Failed ca_parity_latency for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->ca_parity_error_status(), + "Failed ca_parity_error_status for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->ca_parity(), + "Failed ca_parity for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->crc_error_clear(), + "Failed crc_error_clear for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->odt_input_buffer(), + "Failed odt_input_buffer for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->post_package_repair(), + "Failed post_package_repair for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->read_preamble_train(), + "Failed read_preamble_train for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->read_preamble(), + "Failed read_preamble for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->write_preamble(), + "Failed write_preamble for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->self_refresh_abort(), + "Failed self_refresh_abort for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->cs_to_cmd_addr_latency(), + "Failed cs_to_cmd_addr_latency for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->internal_vref_monitor(), + "Failed internal_vref_monitor for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->max_powerdown_mode(), + "Failed max_powerdown_mode for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->mpr_read_format(), + "Failed mpr_read_format for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->temp_readout(), + "Failed temp_readout for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->crc_wr_latency(), + "Failed crc_wr_latency for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->per_dram_addressability(), + "Failed per_dram_addressability for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->geardown_mode(), + "Failed geardown_mode for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->mpr_page(), + "Failed mpr_page for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->mpr_mode(), + "Failed mpr_mode for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->write_crc(), + "Failed write_crc for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->zqcal_interval(), + "Failed zqcal_interval for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->memcal_interval(), + "Failed memcal_interval for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_trp(), + "Failed dram_trp for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_trcd(), + "Failed dram_trcd for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_trc(), + "Failed dram_trc for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_twtr_l(), + "Failed dram_twtr_l for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_twtr_s(), + "Failed dram_twtr_s for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_trrd_s(), + "Failed dram_trrd_s for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_trrd_l(), + "Failed dram_trrd_l for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_trrd_dlr(), + "Failed dram_trrd_dlr for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_tfaw(), + "Failed dram_tfaw for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_tfaw_dlr(), + "Failed dram_tfaw_dlr for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_tras(), + "Failed dram_tras for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_trtp(), + "Failed dram_trtp for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->read_dbi(), + "Failed read_dbi for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->write_dbi(), + "Failed write_dbi for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->additive_latency(), + "Failed additive_latency for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->data_mask(), + "Failed data_mask for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_bc00(), + "Failed dimm_bc00 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_bc01(), + "Failed dimm_bc01 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_bc02(), + "Failed dimm_bc02 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_bc03(), + "Failed dimm_bc03 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_bc04(), + "Failed dimm_bc04 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_bc05(), + "Failed dimm_bc05 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_bc07(), + "Failed dimm_bc07 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_bc08(), + "Failed dimm_bc08 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_bc09(), + "Failed dimm_bc09 for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_bc0a(), + "Failed dimm_bc0a for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_bc0b(), + "Failed dimm_bc0b for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_bc0c(), + "Failed dimm_bc0c for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_bc0d(), + "Failed dimm_bc0d for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_bc0e(), + "Failed dimm_bc0e for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dimm_bc0f(), + "Failed dimm_bc0f for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_rtt_nom (), + "Failed dram_rtt_nom for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_rtt_wr (), + "Failed dram_rtt_wr for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->dram_rtt_park(), + "Failed dram_rtt_park for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->phy_seq_refresh(), + "Failed phy_seq_refresh for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->package_rank_map(), + "Failed package_rank_map for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->nibble_map(), + "Failed nibble_map for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->wr_crc(), + "Failed wr_crc for %s", mss::c_str(l_dimm) ); // Sets up the calibration steps - FAPI_TRY( l_eff_dimm->cal_step_enable(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->rdvref_enable_bit(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->training_adv_pattern(), "Error from p9_mss_eff_config"); - FAPI_TRY( l_eff_dimm->training_adv_backup_pattern(), "Error from p9_mss_eff_config"); + FAPI_TRY( l_eff_dimm->cal_step_enable(), + "Failed cal_step_enable for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->rdvref_enable_bit(), + "Failed rdvref_enable_bit for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->training_adv_pattern(), + "Failed training_adv_pattern for %s", mss::c_str(l_dimm) ); + FAPI_TRY( l_eff_dimm->training_adv_backup_pattern(), + "Failed training_adv_backup_pattern for %s", mss::c_str(l_dimm) ); //Let's do some checking - FAPI_TRY( mss::check::temp_refresh_mode(), "Error from p9_mss_eff_config"); + FAPI_TRY( mss::check::temp_refresh_mode(), + "Failed temp_refresh_mode for %s", mss::c_str(l_dimm) ); }// dimm // Check plug rules. We check the MCS, and this will iterate down to children as needed. - FAPI_TRY( mss::plug_rule::enforce_plug_rules(i_target), "Error from p9_mss_eff_config"); + FAPI_TRY( mss::plug_rule::enforce_plug_rules(i_target), + "Failed enforce_plug_rules for %s", mss::c_str(i_target) ); fapi_try_exit: return fapi2::current_err; diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml index ff44acb98..1aed05106 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml @@ -3250,6 +3250,21 @@ rtt_nom_override_disable + + ATTR_MSS_EFF_WR_CRC + TARGET_TYPE_MCS + + Controls ENABLE/DISABLE of Write CRC + + + uint8 + + DISABLE = 0, ENABLE = 1 + bool + 2 + eff_wr_crc + + ATTR_MSS_PHY_SEQ_REFRESH TARGET_TYPE_MCS diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml index cad97abf9..10bbf9e59 100755 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml @@ -658,4 +658,35 @@ 2 2 eff_register_rev + + + ATTR_EFF_PACKAGE_RANK_MAP + TARGET_TYPE_MCS + + Package Rank Map + Decodes SPD Byte 60 - 77 (Bits 7~6) + creator: mss_eff_cnfg + + + uint8 + + 2 2 18 + eff_package_rank_map + + + + ATTR_EFF_NIBBLE_MAP + TARGET_TYPE_MCS + + Nibble Map + Decodes SPD Byte 60 - 77 (Bits 5~0) + creator: mss_eff_cnfg + + + uint8 + + 2 2 18 + eff_nibble_map + + diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_general_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_general_errors.xml index fe302cb4d..9c94d8bd1 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_general_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_general_errors.xml @@ -86,4 +86,17 @@ + + RC_MSS_UNEXPECTED_VALUE_SEEN + Invalid value seen versus the expected value wanted + TARGET + EXPECTED + ACTUAL + FUNCTION + + CODE + LOW + + + -- cgit v1.2.1