From 476ca53e499d8ebf00027376650dc0f76f49ee55 Mon Sep 17 00:00:00 2001 From: Shakeeb Date: Mon, 24 Oct 2016 06:11:34 -0500 Subject: L1 - trace array on SBE Also adapt existing p9_proc_tracearray to share trace array defs with the new procedure. RTC:128332 Change-Id: I319ae7f33ad56eccb5821db74e52aa2d79af415d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31703 Tested-by: Jenkins Server Reviewed-by: Joachim Fenkes Reviewed-by: Sachin Gupta Reviewed-by: PARVATHI RACHAKONDA Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40872 Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell --- .../p9/procedures/hwp/cache/p9_l2err_extract.C | 13 +- .../p9/procedures/hwp/perv/p9_proc_gettracearray.C | 12 +- .../p9/procedures/hwp/perv/p9_proc_gettracearray.H | 133 +--------------- .../p9/procedures/hwp/perv/p9_sbe_tracearray.C | 68 ++++++++ .../p9/procedures/hwp/perv/p9_sbe_tracearray.H | 151 ++++++++++++++++++ .../p9/procedures/hwp/perv/p9_sbe_tracearray.mk | 27 ++++ .../p9/procedures/hwp/perv/p9_tracearray_defs.H | 171 +++++++++++++++++++++ 7 files changed, 432 insertions(+), 143 deletions(-) create mode 100644 src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C create mode 100644 src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H create mode 100644 src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.mk create mode 100644 src/import/chips/p9/procedures/hwp/perv/p9_tracearray_defs.H (limited to 'src/import/chips') diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_l2err_extract.C b/src/import/chips/p9/procedures/hwp/cache/p9_l2err_extract.C index 4d3d32bd6..65c36ac6c 100644 --- a/src/import/chips/p9/procedures/hwp/cache/p9_l2err_extract.C +++ b/src/import/chips/p9/procedures/hwp/cache/p9_l2err_extract.C @@ -81,11 +81,11 @@ extern "C" //the index into the trace entry that is N cycles before the fail uint32_t indexes[L2ERR_MAX_CYCLES_BACK]; - fapi2::variable_buffer trace_array[PROC_GETTRACEARRAY_NUM_ENTRIES]; + fapi2::variable_buffer trace_array[P9_TRACEARRAY_NUM_ROWS]; uint8_t syndrome = 0; uint8_t dw = 0; uint32_t ta_length = i_ta_data.getBitLength(); - uint32_t exp_ta_length = PROC_GETTRACEARRAY_NUM_ENTRIES * PROC_GETTRACEARRAY_BITS_PER_ENTRY; + uint32_t exp_ta_length = P9_TRACEARRAY_NUM_ROWS * P9_TRACEARRAY_BITS_PER_ROW; //bool back_of_2to1 = false; bool back_of_2to1_nextcycle = false; @@ -130,10 +130,10 @@ extern "C" ta_length, exp_ta_length); //build the indexable array and print out contents at the same time for debug - for(uint8_t i = 0; i < PROC_GETTRACEARRAY_NUM_ENTRIES; i++) + for(uint8_t i = 0; i < P9_TRACEARRAY_NUM_ROWS; i++) { - trace_array[i].resize(PROC_GETTRACEARRAY_BITS_PER_ENTRY); - rc_ecmd |= i_ta_data.extract(trace_array[i], PROC_GETTRACEARRAY_BITS_PER_ENTRY * i, PROC_GETTRACEARRAY_BITS_PER_ENTRY); + trace_array[i].resize(P9_TRACEARRAY_BITS_PER_ROW); + rc_ecmd |= i_ta_data.extract(trace_array[i], P9_TRACEARRAY_BITS_PER_ROW * i, P9_TRACEARRAY_BITS_PER_ROW); FAPI_DBG("%2X: 0x%016llX%016llX", i, trace_array[i].get( 0 ), trace_array[i].get( 1 )); } @@ -197,7 +197,7 @@ extern "C" //look for CE/UE error_found = false; - trace_index = PROC_GETTRACEARRAY_NUM_ENTRIES; //the last entry in the array is the newest + trace_index = P9_TRACEARRAY_NUM_ROWS; //the last entry in the array is the newest FAPI_DBG("trace_index = %X", trace_index); while( !error_found && (trace_index > 0) ) @@ -531,4 +531,3 @@ extern "C" } // p9_l2err_extract } // extern "C" - diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_proc_gettracearray.C b/src/import/chips/p9/procedures/hwp/perv/p9_proc_gettracearray.C index 079290090..df37d6dd9 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_proc_gettracearray.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_proc_gettracearray.C @@ -97,11 +97,11 @@ const uint32_t TRACE_MUX_POSITIONS = 1 << TRCTRL_MUX0_SEL_LEN; struct ta_def { /* One entry per mux setting; value of 0 means N/A */ - proc_gettracearray_bus_id bus_ids[TRACE_MUX_POSITIONS]; + p9_tracearray_bus_id bus_ids[TRACE_MUX_POSITIONS]; uint32_t debug_scom_base, trace_scom_base, ex_odd_scom_offset; }; -proc_gettracearray_bus_id NO_TB = (proc_gettracearray_bus_id)0; +p9_tracearray_bus_id NO_TB = (p9_tracearray_bus_id)0; static const ta_def ta_defs[] = { @@ -170,7 +170,7 @@ class TraceArrayFinder const ta_def* pdef; uint32_t mux_sel; - TraceArrayFinder(proc_gettracearray_bus_id i_trace_bus) : pdef(NULL), mux_sel(0) + TraceArrayFinder(p9_tracearray_bus_id i_trace_bus) : pdef(NULL), mux_sel(0) { for (unsigned int i = 0; i < ARRAY_SIZE(ta_defs); i++) { @@ -280,10 +280,10 @@ extern "C" fapi2::ReturnCode p9_proc_gettracearray( if (i_args.collect_dump) { fapi2::buffer buf; - o_ta_data.resize(PROC_GETTRACEARRAY_NUM_ENTRIES * PROC_GETTRACEARRAY_BITS_PER_ENTRY).flush<0>(); + o_ta_data.resize(P9_TRACEARRAY_NUM_ROWS * P9_TRACEARRAY_BITS_PER_ROW).flush<0>(); /* Start with the low data register because that's where the "trace running" bit is. */ - for (int i = 0; i < PROC_GETTRACEARRAY_NUM_ENTRIES; i++) + for (int i = 0; i < P9_TRACEARRAY_NUM_ROWS; i++) { FAPI_TRY(fapi2::getScom(target, TRACE_SCOM_BASE + tra_scom_offset + TRACE_LO_DATA_OFS, buf), "Failed to read trace array low data register, iteration %d", i); @@ -300,7 +300,7 @@ extern "C" fapi2::ReturnCode p9_proc_gettracearray( } /* Then dump the high data */ - for (int i = 0; i < PROC_GETTRACEARRAY_NUM_ENTRIES; i++) + for (int i = 0; i < P9_TRACEARRAY_NUM_ROWS; i++) { FAPI_TRY(fapi2::getScom(target, TRACE_SCOM_BASE + tra_scom_offset + TRACE_HI_DATA_OFS, buf), "Failed to read trace array high data register, iteration %d", i); diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_proc_gettracearray.H b/src/import/chips/p9/procedures/hwp/perv/p9_proc_gettracearray.H index 9ce6883b4..a47139231 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_proc_gettracearray.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_proc_gettracearray.H @@ -55,134 +55,7 @@ //------------------------------------------------------------------------------ #include - -//------------------------------------------------------------------------------ -// Constant definitions -//------------------------------------------------------------------------------ - -// maximum trace array entries supported by P9 chip design -const uint8_t PROC_GETTRACEARRAY_NUM_ENTRIES = 128; -// bits to store per trace array entry -const uint8_t PROC_GETTRACEARRAY_BITS_PER_ENTRY = 128; - - -//------------------------------------------------------------------------------ -// Structure definitions -//------------------------------------------------------------------------------ - -/** - * @brief Identifiers for supported trace arrays. - * - * There is an identifier for each available trace bus. Many arrays are shared - * between multiple trace buses; in that case, several identifiers point to the - * same trace array. - */ -enum proc_gettracearray_bus_id -{ - /* Pervasive chiplet - TARGET_TYPE_PROC_CHIP */ - PROC_TB_PIB = 1, - PROC_TB_OCC, - PROC_TB_TOD, - PROC_TB_SBE, - PROC_TB_PIB_ALT, /* alternate sink for PIB trace */ - - /* Nest chiplets - TARGET_TYPE_PROC_CHIP */ - PROC_TB_PB0, - PROC_TB_PB1, - PROC_TB_PB2, - PROC_TB_PB3, - PROC_TB_PB4, - PROC_TB_PB5, - PROC_TB_PB6, - PROC_TB_PB7, - PROC_TB_PB8, - PROC_TB_PB9, - PROC_TB_PB10, - PROC_TB_PB11, - PROC_TB_PB12, - PROC_TB_PB13, - PROC_TB_MCS0, - PROC_TB_MCS1, - PROC_TB_MCS2, - PROC_TB_MCS3, - PROC_TB_MCD0, - PROC_TB_MCD1, - PROC_TB_VAS, - PROC_TB_PBIO0, - PROC_TB_PBIO1, - PROC_TB_PBIOE0, - PROC_TB_PBIOE1, - PROC_TB_CXA0, - PROC_TB_CXA1, - PROC_TB_NX, - PROC_TB_IOPSI, - PROC_TB_PCIS0, - PROC_TB_PCIS1, - PROC_TB_PCIS2, - PROC_TB_NPU0, - PROC_TB_NPU1, - PROC_TB_NMMU0, - PROC_TB_NMMU1, - PROC_TB_INT, - PROC_TB_BRIDGE, - - /* XBUS chiplet - TARGET_TYPE_PROC_CHIP */ - PROC_TB_IOX0, - PROC_TB_IOX1, - PROC_TB_IOX2, - PROC_TB_PBIOX0, - PROC_TB_PBIOX1, - PROC_TB_PBIOX2, - - /* PCI chiplets - TARGET_TYPE_PROC_CHIP */ - PROC_TB_PCI0X, - PROC_TB_PCI00, - PROC_TB_PCI1X, - PROC_TB_PCI11, - PROC_TB_PCI12, - PROC_TB_PCI2X, - PROC_TB_PCI23, - PROC_TB_PCI24, - PROC_TB_PCI25, - - _PROC_TB_LAST_PROC_TARGET = PROC_TB_PCI25, - - /* OBus chiplets - TARGET_TYPE_OBUS */ - PROC_TB_PBIOOA, - PROC_TB_IOO, - - _PROC_TB_LAST_OBUS_TARGET = PROC_TB_IOO, - - /* MemCtrl chiplets - TARGET_TYPE_MCS */ - PROC_TB_MCA0, - PROC_TB_MCA1, - PROC_TB_IOMC0, - PROC_TB_IOMC1, - PROC_TB_IOMC2, - PROC_TB_IOMC3, - - _PROC_TB_LAST_MC_TARGET = PROC_TB_IOMC3, - - /* Cache chiplets - TARGET_TYPE_EX */ - PROC_TB_L30, - PROC_TB_L31, - PROC_TB_NCU0, - PROC_TB_NCU1, - PROC_TB_CME, - PROC_TB_EQPB, // note: only for odd EX instances - PROC_TB_IVRM, - PROC_TB_SKEWADJ, // note: only for even EX instances - PROC_TB_L20, - PROC_TB_L21, - PROC_TB_SKIT10, - PROC_TB_SKIT11, - - _PROC_TB_LAST_EX_TARGET = PROC_TB_SKIT11, - - /* Core chiplets - TARGET_TYPE_CORE */ - PROC_TB_CORE0, - PROC_TB_CORE1, -}; +#include "p9_tracearray_defs.H" static const fapi2::TargetType PROC_GETTRACEARRAY_TARGET_TYPES = fapi2::TARGET_TYPE_PROC_CHIP | @@ -194,7 +67,7 @@ static const fapi2::TargetType PROC_GETTRACEARRAY_TARGET_TYPES = // structure to represent HWP arguments struct proc_gettracearray_args { - proc_gettracearray_bus_id trace_bus; ///< The trace bus whose associated trace array should be dumped + p9_tracearray_bus_id trace_bus; ///< The trace bus whose associated trace array should be dumped bool stop_pre_dump; ///< Stop the trace array before starting the dump bool ignore_mux_setting; ///< Do not fail if the primary trace mux is set to a different bus bool collect_dump; ///< Do dump the trace array; useful if you just want to start/stop @@ -216,7 +89,7 @@ extern "C" * @param ta_id The trace array / trace bus ID requested. * @return The type of target to hand to proc_gettracearray to clearly identify the array instance. */ - static inline fapi2::TargetType proc_gettracearray_target_type(proc_gettracearray_bus_id i_trace_bus) + static inline fapi2::TargetType proc_gettracearray_target_type(p9_tracearray_bus_id i_trace_bus) { if (i_trace_bus <= _PROC_TB_LAST_PROC_TARGET) { diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C new file mode 100644 index 000000000..41e355d5f --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C @@ -0,0 +1,68 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// @file p9_sbe_tracearray.C +/// +/// @brief Collect contents of specified trace array via SCOM. +/// +/// Collects contents of specified trace array via SCOM. Optionally +/// manages chiplet domain trace engine state (start/stop/reset) around +/// trace array data collection. Trace array data can be collected only +/// when its controlling chiplet trace engine is stopped. +/// +/// Request number of Trace array entries will be packed into data buffer from +/// oldest->youngest entry. +/// +/// Calling code is expected to pass the proper target type based on the +/// desired trace resource; a convenience function is provided to find out +/// the expected target type for a given trace resource. +//------------------------------------------------------------------------------ +// *HWP HW Owner : Joachim Fenkes +// *HWP HW Backup Owner : Joe McGill +// *HWP FW Owner : Shakeeb Pasha +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ +//----------------------------------------------------------------------------------- +// Includes +//----------------------------------------------------------------------------------- +#include + +//----------------------------------------------------------------------------------- +// Function definitions +//----------------------------------------------------------------------------------- +fapi2::ReturnCode p9_sbe_tracearray( + const fapi2::Target& i_target, + const proc_gettracearray_args& i_args, + uint64_t* o_ta_data, + const uint32_t i_num_rows +) +{ + FAPI_INF("Start"); + FAPI_INF("End"); + return fapi2::current_err; +} + + diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H new file mode 100644 index 000000000..7016af5d5 --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H @@ -0,0 +1,151 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sbe_tracearray.H +/// +/// @brief Collect contents of specified trace array via SCOM. +/// +/// Collects contents of specified trace array via SCOM. Optionally +/// manages chiplet domain trace engine state (start/stop/reset) around +/// trace array data collection. Trace array data can be collected only +/// when its controlling chiplet trace engine is stopped. +/// +/// Request number of Trace array entries will be packed into data buffer from +/// oldest->youngest entry. +/// +/// Calling code is expected to pass the proper target type based on the +/// desired trace resource; a convenience function is provided to find out +/// the expected target type for a given trace resource. +//------------------------------------------------------------------------------ +// *HWP HW Owner : Joachim Fenkes +// *HWP HW Backup Owner : Joe McGill +// *HWP FW Owner : Shakeeb Pasha +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : SBE +//------------------------------------------------------------------------------ + +#ifndef _P9_SBE_TRACEARRAY_H +#define _P9_SBE_TRACEARRAY_H +//------------------------------------------------------------------------------ +// Includes +//------------------------------------------------------------------------------ + +#include +#include "p9_tracearray_defs.H" + +// structure to represent HWP arguments +struct proc_gettracearray_args +{ + p9_tracearray_bus_id trace_bus; ///< The trace bus whose associated trace array should be dumped + bool stop_pre_dump; ///< Stop the trace array before starting the dump + bool ignore_mux_setting; ///< Do not fail if the primary trace mux is set to a different bus + bool collect_dump; ///< Do dump the trace array; useful if you just want to start/stop + bool reset_post_dump; ///< Reset the debug logic after dumping + bool restart_post_dump; ///< Start the trace array after dumping +}; + +static const fapi2::TargetType P9_SBE_TRACEARRAY_TARGET_TYPES = + fapi2::TARGET_TYPE_PROC_CHIP | + fapi2::TARGET_TYPE_EX | + fapi2::TARGET_TYPE_CORE; + +//function pointer typedef definition for HWP call support +typedef fapi2::ReturnCode (*p9_sbe_tracearray_FP_t) ( + const fapi2::Target& i_target, + const proc_gettracearray_args& i_args, + uint8_t* o_ta_data, + const uint32_t i_num_rows +); + +extern "C" { + /** + * @brief Return the target type needed to access a given trace array + * + * @param ta_id The trace array / trace bus ID requested. + * + * @return The type of target to hand to p9_sbe_tracearray to clearly + * identify the array instance. + */ + static inline fapi2::TargetType proc_gettracearray_target_type(p9_tracearray_bus_id i_trace_bus) + { + /* On SBE there is no support for MCBIST and OBUS fapi targets. + * But since the usage related to these targets in p9_sbe_tracearray + * is only for SCOMs with fully qualified adresses, PROC + * target is used for MCBIST and OBUS as well */ + if (i_trace_bus <= _PROC_TB_LAST_MC_TARGET) + { + return fapi2::TARGET_TYPE_PROC_CHIP; + } + else if (i_trace_bus <= _PROC_TB_LAST_EX_TARGET) + { + return fapi2::TARGET_TYPE_EX; + } + else + { + return fapi2::TARGET_TYPE_CORE; + } + } + + + + /* TODO via RTC:164528 - Look at optimization to improve performance + * @brief Retrieve trace array data, based on the number of + * rows requested, from selected trace array via SCOM. + * Optionally performing trace stop (prior to dump) and/or + * trace restart, reset (after dump). + * If dump is requested along with other control flags, pre-dump control + * would take effect before reading row 0 and post-dump control would + * take effect after reading last row. + * + * @param i_target Chip or chiplet target. The necessary target type can be + * queried through proc_gettracearray_target_type(). + * @param i_args Argument structure with additional parameters + * @param o_ta_data Trace array data. Will contain requested number of trace + * rows from the array concatenated, + * starting with the oldest trace entry after the previous + * dump call and ending with the newest + * @param i_num_rows Number of rows of the tracearray to read. + * By default P9_TRACEARRAY_NUM_ROWS are read + * + * @return FAPI2_RC_SUCCESS + * if trace array dump sequence completes successfully, + * RC_PROC_GETTRACEARRAY_INVALID_BUS + * if an invalid trace bus ID has been requested + * RC_PROC_GETTRACEARRAY_CORE_NOT_DUMPABLE + * if a core trace array has been requested but the chip's core + * is not dumpable via SCOM -> use fastarray instead + * RC_PROC_GETTRACEARRAY_TRACE_MUX_INCORRECT + * if the primary trace mux is not set up to trace the requested bus, + * else FAPI getscom/putscom return code for failing operation + */ + fapi2::ReturnCode p9_sbe_tracearray( + const fapi2::Target& i_target, + const proc_gettracearray_args& i_args, + uint64_t* o_ta_data, + const uint32_t i_num_rows = P9_TRACEARRAY_NUM_ROWS + ); +} // extern "C" +#endif //_P9_SBE_TRACEARRAY_H diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.mk b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.mk new file mode 100644 index 000000000..65412ca70 --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.mk @@ -0,0 +1,27 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.mk $ +# +# OpenPOWER HostBoot Project +# +# Contributors Listed Below - COPYRIGHT 2016,2017 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +PROCEDURE=p9_sbe_tracearray +$(call BUILD_PROCEDURE) + diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_tracearray_defs.H b/src/import/chips/p9/procedures/hwp/perv/p9_tracearray_defs.H new file mode 100644 index 000000000..c773dafa8 --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/perv/p9_tracearray_defs.H @@ -0,0 +1,171 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_tracearray_defs.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_tracearray_defs.H +/// +/// @brief Constants to be used for p9 trayarray usage across platforms. +/// +//------------------------------------------------------------------------------ +// *HWP HW Owner : Joachim Fenkes +// *HWP HW Backup Owner : Joe McGill +// *HWP FW Owner : Shakeeb Pasha +// *HWP Team : Perv +// *HWP Level : 1 +// *HWP Consumed by : FSP, SBE +//------------------------------------------------------------------------------ + +#ifndef _P9_TRACEARRAY_DEFS_H +#define _P9_TRACEARRAY_DEFS_H +//------------------------------------------------------------------------------ +// Constant definitions +//------------------------------------------------------------------------------ + +// maximum trace array entries supported by P9 chip design +static const uint8_t P9_TRACEARRAY_NUM_ROWS = 128; +// bits to store per trace array entry +static const uint8_t P9_TRACEARRAY_BITS_PER_ROW = 128; +// maximum trace array size in bytes +static const uint16_t PROC_TRACEARRAY_MAX_SIZE = + (P9_TRACEARRAY_NUM_ROWS* P9_TRACEARRAY_BITS_PER_ROW) / 8; + +//------------------------------------------------------------------------------ +// Structure definitions +//------------------------------------------------------------------------------ + +/** + * @brief Identifiers for supported trace arrays. + * + * There is an identifier for each available trace bus. Many arrays are shared + * between multiple trace buses; in that case, several identifiers point to the + * same trace array. + */ +enum p9_tracearray_bus_id +{ + /* Pervasive chiplet - TARGET_TYPE_PROC_CHIP */ + PROC_TB_PIB = 1, + PROC_TB_OCC, + PROC_TB_TOD, + PROC_TB_SBE, + PROC_TB_PIB_ALT, /* alternate sink for PIB trace */ + + /* Nest chiplets - TARGET_TYPE_PROC_CHIP */ + PROC_TB_PB0, + PROC_TB_PB1, + PROC_TB_PB2, + PROC_TB_PB3, + PROC_TB_PB4, + PROC_TB_PB5, + PROC_TB_PB6, + PROC_TB_PB7, + PROC_TB_PB8, + PROC_TB_PB9, + PROC_TB_PB10, + PROC_TB_PB11, + PROC_TB_PB12, + PROC_TB_PB13, + PROC_TB_MCS0, + PROC_TB_MCS1, + PROC_TB_MCS2, + PROC_TB_MCS3, + PROC_TB_MCD0, + PROC_TB_MCD1, + PROC_TB_VAS, + PROC_TB_PBIO0, + PROC_TB_PBIO1, + PROC_TB_PBIOE0, + PROC_TB_PBIOE1, + PROC_TB_CXA0, + PROC_TB_CXA1, + PROC_TB_NX, + PROC_TB_IOPSI, + PROC_TB_PCIS0, + PROC_TB_PCIS1, + PROC_TB_PCIS2, + PROC_TB_NPU0, + PROC_TB_NPU1, + PROC_TB_NMMU0, + PROC_TB_NMMU1, + PROC_TB_INT, + PROC_TB_BRIDGE, + + /* XBUS chiplet - TARGET_TYPE_PROC_CHIP */ + PROC_TB_IOX0, + PROC_TB_IOX1, + PROC_TB_IOX2, + PROC_TB_PBIOX0, + PROC_TB_PBIOX1, + PROC_TB_PBIOX2, + + /* PCI chiplets - TARGET_TYPE_PROC_CHIP */ + PROC_TB_PCI0X, + PROC_TB_PCI00, + PROC_TB_PCI1X, + PROC_TB_PCI11, + PROC_TB_PCI12, + PROC_TB_PCI2X, + PROC_TB_PCI23, + PROC_TB_PCI24, + PROC_TB_PCI25, + + _PROC_TB_LAST_PROC_TARGET = PROC_TB_PCI25, + + /* OBus chiplets - TARGET_TYPE_OBUS */ + PROC_TB_PBIOOA, + PROC_TB_IOO, + + _PROC_TB_LAST_OBUS_TARGET = PROC_TB_IOO, + + /* MemCtrl chiplets - TARGET_TYPE_MCS */ + PROC_TB_MCA0, + PROC_TB_MCA1, + PROC_TB_IOMC0, + PROC_TB_IOMC1, + PROC_TB_IOMC2, + PROC_TB_IOMC3, + + _PROC_TB_LAST_MC_TARGET = PROC_TB_IOMC3, + + /* Cache chiplets - TARGET_TYPE_EX */ + PROC_TB_L30, + PROC_TB_L31, + PROC_TB_NCU0, + PROC_TB_NCU1, + PROC_TB_CME, + PROC_TB_EQPB, // note: only for odd EX instances + PROC_TB_IVRM, + PROC_TB_SKEWADJ, // note: only for even EX instances + PROC_TB_L20, + PROC_TB_L21, + PROC_TB_SKIT10, + PROC_TB_SKIT11, + + _PROC_TB_LAST_EX_TARGET = PROC_TB_SKIT11, + + /* Core chiplets - TARGET_TYPE_CORE */ + PROC_TB_CORE0, + PROC_TB_CORE1, +}; + +#endif //_P9_TRACEARRAY_DEFS_H -- cgit v1.2.1